JP2010176702A5 - - Google Patents

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Publication number
JP2010176702A5
JP2010176702A5 JP2010102697A JP2010102697A JP2010176702A5 JP 2010176702 A5 JP2010176702 A5 JP 2010176702A5 JP 2010102697 A JP2010102697 A JP 2010102697A JP 2010102697 A JP2010102697 A JP 2010102697A JP 2010176702 A5 JP2010176702 A5 JP 2010176702A5
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JP
Japan
Prior art keywords
management unit
data
storage area
memory system
valid data
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JP2010102697A
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English (en)
Japanese (ja)
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JP5221593B2 (ja
JP2010176702A (ja
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Priority to JP2010102697A priority Critical patent/JP5221593B2/ja
Priority claimed from JP2010102697A external-priority patent/JP5221593B2/ja
Publication of JP2010176702A publication Critical patent/JP2010176702A/ja
Publication of JP2010176702A5 publication Critical patent/JP2010176702A5/ja
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Publication of JP5221593B2 publication Critical patent/JP5221593B2/ja
Expired - Fee Related legal-status Critical Current
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JP2010102697A 2010-04-27 2010-04-27 メモリシステム Expired - Fee Related JP5221593B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010102697A JP5221593B2 (ja) 2010-04-27 2010-04-27 メモリシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010102697A JP5221593B2 (ja) 2010-04-27 2010-04-27 メモリシステム

Related Parent Applications (1)

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JP2008063404A Division JP4510107B2 (ja) 2008-03-01 2008-03-12 メモリシステム

Publications (3)

Publication Number Publication Date
JP2010176702A JP2010176702A (ja) 2010-08-12
JP2010176702A5 true JP2010176702A5 (enExample) 2011-05-06
JP5221593B2 JP5221593B2 (ja) 2013-06-26

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ID=42707530

Family Applications (1)

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JP2010102697A Expired - Fee Related JP5221593B2 (ja) 2010-04-27 2010-04-27 メモリシステム

Country Status (1)

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JP (1) JP5221593B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012248109A (ja) 2011-05-30 2012-12-13 Toshiba Corp マルチチャネルを有するメモリ装置及び同装置におけるコンパクションのためのリードコマンド群生成方法
US8924636B2 (en) 2012-02-23 2014-12-30 Kabushiki Kaisha Toshiba Management information generating method, logical block constructing method, and semiconductor memory device
JP5813589B2 (ja) 2012-07-13 2015-11-17 株式会社東芝 メモリシステムおよびその制御方法
US9329994B2 (en) 2014-02-20 2016-05-03 Kabushiki Kaisha Toshiba Memory system
US9443617B2 (en) 2014-07-18 2016-09-13 Kabushiki Kaisha Toshiba Memory system and method of controlling memory system

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4768237B2 (ja) * 2004-06-25 2011-09-07 株式会社東芝 携帯可能電子装置及び携帯可能電子装置の制御方法
JP2008033788A (ja) * 2006-07-31 2008-02-14 Matsushita Electric Ind Co Ltd 不揮発性記憶装置、データ記憶システム、およびデータ記憶方法
JP4653817B2 (ja) * 2008-03-01 2011-03-16 株式会社東芝 メモリシステム
JP4498426B2 (ja) * 2008-03-01 2010-07-07 株式会社東芝 メモリシステム
JP4592774B2 (ja) * 2008-03-01 2010-12-08 株式会社東芝 メモリシステム
JP4745356B2 (ja) * 2008-03-01 2011-08-10 株式会社東芝 メモリシステム

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