JP2010172047A - Apparatus to counter momentary drop - Google Patents

Apparatus to counter momentary drop Download PDF

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JP2010172047A
JP2010172047A JP2009009474A JP2009009474A JP2010172047A JP 2010172047 A JP2010172047 A JP 2010172047A JP 2009009474 A JP2009009474 A JP 2009009474A JP 2009009474 A JP2009009474 A JP 2009009474A JP 2010172047 A JP2010172047 A JP 2010172047A
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voltage
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Toshiya Kaneko
敏也 金子
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Fuji Electric Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that a conventional system does not discharge energy efficiently, if it uses a detected voltage discharged from an accumulating device with an internal voltage and a recommended lower limit voltage as a terminal voltage and stops its discharge when this value comes to a recommended lower limit voltage. <P>SOLUTION: The voltage lower limit value to stop the discharge of the accumulating device is set to a value obtained by subtracting a drop voltage (the product of a discharge current and an internal resistance value) due to an internal resistance from the recommended lower limit voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、電力変換装置と、二次電池や大容量キャパシタ等の蓄電デバイスで構成される無停電電源装置、特に短時間補償を目的とした瞬低対策装置に関する。   The present invention relates to an uninterruptible power supply device including a power conversion device and a power storage device such as a secondary battery or a large-capacitance capacitor, and more particularly to a voltage sag countermeasure device for the purpose of short-time compensation.

無停電電源装置の蓄電デバイスとしては、従来から鉛蓄電池が一般的に使用されてきた。
近年、交流電源の瞬時電圧低下現象に対する対策として、エネルギー密度は鉛蓄電池に対して低いが、充放電サイクル寿命が長く、内部抵抗が低い高出力密度が得られるキャパシタを適用した瞬低対策装置(瞬低補償装置とも言う)が製品化されてきている。キャパシタを適用した瞬低対策装置は数秒以下の電力補償の用途に適している。
Conventionally, lead storage batteries have been generally used as power storage devices for uninterruptible power supplies.
In recent years, as a countermeasure against the instantaneous voltage drop phenomenon of AC power supply, the energy density is lower than that of lead-acid batteries, but the instantaneous voltage drop countermeasure device applying a capacitor that has a long charge / discharge cycle life and low internal resistance and high output density ( It is also called a voltage sag compensator. The voltage sag countermeasure device using a capacitor is suitable for power compensation for a few seconds or less.

キャパシタを適用した瞬低対策装置の例として、電気二重層キャパシタ(以下、EDLC)を適用した瞬低対策装置の従来例として特許文献1がある。
図4に特許文献1で提案されている瞬低対策装置の回路構成を示す。回路は、商用電源(交流電源)1、瞬時電圧低下(以下瞬低と記す)を検出する瞬低検出部7、瞬低時に商用電源1からの電力供給を遮断する高速スイッチ2、負荷3、蓄電デバイスとしてのEDLC4、交流電力と直流電力とを相互に変換する電力変換器5、EDLC4からの直流電力を電力変換器5により変換した交流電力を負荷3に供給するための電力変換入力遮断器6から構成される。電力変換器5は、逆変換動作(インバータ動作)と順変換動作(コンバータ動作)ができる半導体スイッチ素子、ダイオード等を用いたインバータ回路から構成される。また、蓄電デバイスとしてのEDLC4は内部抵抗4rと静電容量4cの直列回路で表現される。
As an example of a voltage sag countermeasure device to which a capacitor is applied, Patent Document 1 is a conventional example of a voltage sag countermeasure device to which an electric double layer capacitor (hereinafter referred to as EDLC) is applied.
FIG. 4 shows a circuit configuration of the voltage sag countermeasure device proposed in Patent Document 1. The circuit includes a commercial power source (AC power source) 1, an instantaneous voltage drop detection unit 7 that detects an instantaneous voltage drop (hereinafter referred to as “instantaneous voltage drop”), a high-speed switch 2 that shuts off the power supply from the commercial power source 1 during an instantaneous voltage drop, a load 3, EDLC 4 as an electricity storage device, power converter 5 for converting AC power and DC power to each other, power conversion input circuit breaker for supplying AC power obtained by converting DC power from EDLC 4 by the power converter 5 to the load 3 6 is composed. The power converter 5 includes an inverter circuit using a semiconductor switch element, a diode, and the like that can perform an inverse conversion operation (inverter operation) and a forward conversion operation (converter operation). Moreover, EDLC4 as an electrical storage device is represented by the series circuit of the internal resistance 4r and the electrostatic capacitance 4c.

商用電源が健全な時は、商用電源1から高速スイッチ2を通して負荷3に商用電力を供給する一方、商用電源1からの交流電力を電力変換器5により変換した直流電力をEDLC4に定格電圧まで定電圧充電して待機する。
瞬低検出部7が瞬低を検出すると、高速スイッチ2の開放と電力変換入力遮断器6の投入を行い、EDLCからの直流電力を電力変換器により変換した交流電力を負荷3に供給する。
When the commercial power source is healthy, commercial power is supplied from the commercial power source 1 to the load 3 through the high-speed switch 2, while the DC power obtained by converting the AC power from the commercial power source 1 by the power converter 5 is set to the rated voltage in the EDLC 4. Charge the battery and wait.
When the voltage sag detector 7 detects a voltage sag, the high-speed switch 2 is opened and the power conversion input circuit breaker 6 is turned on, and AC power obtained by converting DC power from the EDLC by the power converter is supplied to the load 3.

特開2006−246609号公報JP 2006-246609 A

蓄電デバイスとして、EDLCよりエネルギーを持続可能なハイブリッドキャパシタを瞬低対策装置に適用した場合を例として説明する。ハイブリッドキャパシタとは正極と負極のどちらか一方はファラデー反応、もう一方は非ファラデー反応を利用したキャパシタである。また、下限電圧が存在するため、下限電圧の制御が必要となる。   A case where a hybrid capacitor that can sustain energy from EDLC as an electricity storage device is applied to a voltage sag countermeasure device will be described as an example. A hybrid capacitor is a capacitor that uses a Faraday reaction at one of the positive electrode and the negative electrode and a non-Faraday reaction at the other. Moreover, since the lower limit voltage exists, it is necessary to control the lower limit voltage.

ハイブリッドキャパシタには内部抵抗が存在するため、放電電流に応じた電圧降下が発生する。その結果、観測されるキャパシタ電圧は、残存容量に依存する静電容量電圧値から、放電電流により発生する電圧降下値を減算した値となる。従って、図2(上段)に示すように、キャパシタ電圧Vbが下限電圧V2に到達した時点で放電を停止した場合、終止到達時点の放電電流と内部抵抗によって決まる電圧降下分ΔVrに相当する下記ΔJで示されるエネルギーが残存する事になる。内部抵抗が大きいほど、この残存量が増加し、その後の放出可能エネルギーを低下させる原因となる。

Since the hybrid capacitor has an internal resistance, a voltage drop corresponding to the discharge current occurs. As a result, the observed capacitor voltage is a value obtained by subtracting the voltage drop value generated by the discharge current from the capacitance voltage value depending on the remaining capacity. Therefore, as shown in FIG. 2 (upper stage), when the discharge is stopped when the capacitor voltage Vb reaches the lower limit voltage V 2 , this corresponds to a voltage drop ΔV r determined by the discharge current and the internal resistance at the time of reaching the end. The energy indicated by ΔJ below remains. The larger the internal resistance, the more this residual amount becomes, causing a decrease in the subsequent releasable energy.

この対策として、内部抵抗の小さいキャパシタを選択する方法や、並列数を増加させて内部抵抗を下げる方法がある。前者は内部抵抗が小さくなるとその分静電容量も減少するため、本来エネルギー放出に必要となる静電容量を得るために並列数が増加する。一方、後者は並列数を増加させると、静電容量が必要容量に対して余剰になる。そのため、いずれの方法もキャパシタ群を大型化させる事になる。   As countermeasures, there are a method of selecting a capacitor having a low internal resistance and a method of decreasing the internal resistance by increasing the number of parallel connections. In the former, the capacitance decreases as the internal resistance decreases, so the number of parallel increases in order to obtain the capacitance that is originally required for energy release. On the other hand, in the latter case, when the parallel number is increased, the electrostatic capacity becomes excessive with respect to the required capacity. Therefore, both methods increase the size of the capacitor group.

上述の課題を解決するために、第1の発明においては電力変換装置と推奨下限電圧のある蓄電デバイスを有し、交流電源が健全時は前記交流電源から負荷に交流電力を供給し、前記交流電源の電圧または周波数が所定の範囲を逸脱した場合には、前記蓄電デバイスから前記電力変換装置を介して、前記負荷に交流電力を供給する無停電電源装置において、
前記蓄電デバイスの電圧が推奨下限電圧に基づいて決まる判定値に到達した時、前記電力変換装置から前記負荷への電力供給動作を停止する。
In order to solve the above-mentioned problem, in the first invention, the power conversion device and a power storage device having a recommended lower limit voltage are provided. When the AC power source is healthy, AC power is supplied from the AC power source to the load. When the voltage or frequency of the power supply deviates from a predetermined range, in the uninterruptible power supply that supplies AC power to the load from the power storage device via the power converter,
When the voltage of the power storage device reaches a determination value determined based on a recommended lower limit voltage, the power supply operation from the power converter to the load is stopped.

第2の発明においては、前記推奨下限電圧に基づいて決まる判定値は、前記蓄電デバイスの推奨下限電圧から、前記蓄電デバイスからの放電電流と前記蓄電デバイスの内部抵抗値とから推定される電圧降下量を減算した電圧値とする。   In the second invention, the determination value determined based on the recommended lower limit voltage is a voltage drop estimated from a discharge current from the power storage device and an internal resistance value of the power storage device from the recommended lower limit voltage of the power storage device. The voltage value is obtained by subtracting the amount.

第3の発明においては、前記推奨下限電圧に基づいて決まる判定値は、前記蓄電デバイスの推奨下限電圧から、前記蓄電デバイスからの放電電流と、前記蓄電デバイスの内部抵抗値と、前記蓄電デバイスの温度測定値とから推定される電圧降下量を減算した電圧値とする。   In a third aspect of the invention, the determination value determined based on the recommended lower limit voltage is a recommended lower limit voltage of the power storage device, a discharge current from the power storage device, an internal resistance value of the power storage device, and the power storage device. The voltage value is obtained by subtracting the estimated voltage drop from the temperature measurement value.

第4の発明においては、前記蓄電デバイスは、正極と負極の一方がファラデー反応を、他方が非ファラデー反応を利用したハイブリッドキャパシタとする。   In a fourth invention, the power storage device is a hybrid capacitor in which one of the positive electrode and the negative electrode uses a Faraday reaction and the other uses a non-Faraday reaction.

本発明では、内部抵抗による電圧降下分を本来の放電終止レベルから下方修正するこ とで、静電容量に蓄えられた残存容量を0%とすることができる。
この結果、キャパシタの保持しているエネルギーを最大限に使用できるため、キャパシ タ群の小型化が可能となる。
In the present invention, the remaining capacity stored in the electrostatic capacity can be reduced to 0% by correcting the voltage drop due to the internal resistance downward from the original discharge end level.
As a result, the energy stored in the capacitor can be used to the maximum, and the capacitors can be downsized.

図1は、本発明の第1の実施例を示す回路図である。FIG. 1 is a circuit diagram showing a first embodiment of the present invention. 図2は、放電時のキャパシタ電圧Vbと内部抵抗による電圧降下ΔVrの関係を示す動作図である。FIG. 2 is an operation diagram showing the relationship between the capacitor voltage Vb during discharge and the voltage drop ΔVr due to the internal resistance. 図1は、本発明の第2の実施例を示す回路図である。FIG. 1 is a circuit diagram showing a second embodiment of the present invention. 図4は、従来を説明するための回路図である。FIG. 4 is a circuit diagram for explaining the prior art.

本発明の要点は、ハイブリッドキャパシタを放電させる場合の放電下限電圧を求める方法として、従来ハイブリッドキャパシタの端子電圧を測定して求めていたが、本発明では内部抵抗分を考慮して、端子電圧から内部抵抗分の電圧降下分を減算して求めるようにした点である。   The main point of the present invention is that the terminal voltage of the hybrid capacitor is conventionally measured as a method for determining the discharge lower limit voltage when discharging the hybrid capacitor. In the present invention, however, the internal voltage is taken into account from the terminal voltage. This is a point obtained by subtracting the voltage drop corresponding to the internal resistance.

図1に、本発明の第1の実施例を示す。また、図2(下段)に、その放電電圧と電流の動作波形を示す。図1はハイブリッドキャパシタを瞬低対策装置に適用した場合における、内部抵抗による電圧降下分を本来の放電終止レベルから下方修正する演算処理を行う回路例である。図1の回路は、図4の従来技術の回路に、電流検出器8で検出した放電電流Icとキャパシタ4の内部抵抗4rの抵抗値Rcとの乗算を行う乗算器10、キャパシタ電圧Vbの電圧を検出する電圧検出器9、キャパシタ電圧Vbが下限電圧V2に到達する時に投入するスイッチ11から構成される演算回路を追加した回路である。   FIG. 1 shows a first embodiment of the present invention. Fig. 2 (lower) shows the operating waveforms of the discharge voltage and current. FIG. 1 shows an example of a circuit that performs arithmetic processing for correcting a voltage drop due to internal resistance downward from the original discharge end level when the hybrid capacitor is applied to a voltage drop countermeasure device. The circuit of FIG. 1 is different from the circuit of the prior art of FIG. 4 in that the multiplier 10 that multiplies the discharge current Ic detected by the current detector 8 and the resistance value Rc of the internal resistance 4r of the capacitor 4 and the voltage of the capacitor voltage Vb. This is a circuit in which an arithmetic circuit composed of a voltage detector 9 for detecting the voltage and a switch 11 that is turned on when the capacitor voltage Vb reaches the lower limit voltage V2 is added.

まず、放電電流Icとキャパシタ4の内部抵抗値Rcを乗算器10で乗算し、内部抵抗による電圧降下分ΔVrを算出する。キャパシタ電圧Vbが下限電圧V2に到達した時にスイッチ11を投入し、その時のΔVr’を算出する。下限電圧V2からΔVr’を減算し、新たな下限電圧V2’を算出する。その電圧V2’を停止判定基準とする。その下限電圧V2’まで放電すると、放電終了後のキャパシタ電圧Vbは従来制御の下限電圧V2となり、キャパシタの残存エネルギーを0%とすることが可能となる。その時、過渡的に、ハイブリッドキャパシタ4を下限電圧V2’まで放電しても、キャパシタの特性や寿命に影響は及ばない。   First, the multiplier 10 multiplies the discharge current Ic and the internal resistance value Rc of the capacitor 4 to calculate a voltage drop ΔVr due to the internal resistance. When the capacitor voltage Vb reaches the lower limit voltage V2, the switch 11 is turned on, and ΔVr ′ at that time is calculated. By subtracting ΔVr ′ from the lower limit voltage V2, a new lower limit voltage V2 ′ is calculated. The voltage V2 'is used as a stop determination criterion. When discharging to the lower limit voltage V2 ', the capacitor voltage Vb after the end of discharge becomes the lower limit voltage V2 of the conventional control, and the remaining energy of the capacitor can be set to 0%. At that time, even if the hybrid capacitor 4 is transiently discharged to the lower limit voltage V2 ', the characteristics and life of the capacitor are not affected.

以上の結果、従来方式において問題となっていたエネルギー放出可能量の低下を対策することができ、キャパシタの保持しているエネルギーを最大限に使用できるため、キャパシタ群の小型化が可能となる。   As a result, it is possible to take measures against a decrease in the amount of energy that can be released, which has been a problem in the conventional method, and the energy held by the capacitor can be used to the maximum, so that the capacitor group can be downsized.

図3に、本発明の第2の実施例を示す。実施例1との違いは、ハイブリッドキャパシタ4に温度検出器4Tが備えられ、内部抵抗値Rcを温度補正回路14で補正し、この補正結果Rc’と放電電流Icの乗算結果をハイブリッドキャパシタの内部抵抗による電圧ドロップとしている点である。   FIG. 3 shows a second embodiment of the present invention. The difference from the first embodiment is that the hybrid capacitor 4 is provided with a temperature detector 4T, the internal resistance value Rc is corrected by the temperature correction circuit 14, and the multiplication result of the correction result Rc ′ and the discharge current Ic is the internal value of the hybrid capacitor. This is a voltage drop due to resistance.

ハイブリッドキャパシタの内部抵抗値は温度に依存して変動するため、この温度特性を予め温度補正回路に準備することにより実現できる。この方式を用いることにより、環境変化が大きい場合でもキャパシタの保持しているエネルギーを最大限に使用でき、キャパシタ群の小型化が可能となる。
尚、上記実施例には蓄電デバイスとしてハイブリッドキャパシタの例を示したが、内部抵抗が存在する蓄電デバイスであれば、実現可能である。
Since the internal resistance value of the hybrid capacitor varies depending on the temperature, this temperature characteristic can be realized by preparing the temperature correction circuit in advance. By using this method, even when the environmental change is large, the energy held by the capacitor can be used to the maximum, and the capacitor group can be downsized.
In addition, although the example of the hybrid capacitor was shown as an electrical storage device in the said Example, if it is an electrical storage device with an internal resistance, it is realizable.

本発明は、瞬低対策装置に限られず、内部抵抗のある大容量キャパシタを適用する電気自動車、系統連系補償装置などへの適用が可能である。   The present invention is not limited to the voltage drop countermeasure device, but can be applied to an electric vehicle, a grid interconnection compensation device, and the like to which a large-capacitance capacitor having an internal resistance is applied.

1・・・商用電源(交流電源) 2・・・高速スイッチ
3・・・負荷 4・・・蓄電デバイス 5・・・電力変換器
6・・・電力変換入力遮断器 7・・・瞬低検出器
8・・・電流検出器 9・・・電圧検出器 10・・・乗算器
11・・・スイッチ 12・・・加算器 13・・・停止判定回路



DESCRIPTION OF SYMBOLS 1 ... Commercial power supply (AC power supply) 2 ... High-speed switch 3 ... Load 4 ... Power storage device 5 ... Power converter 6 ... Power conversion input circuit breaker 7 ... Instantaneous voltage drop detection 8 ... Current detector 9 ... Voltage detector 10 ... Multiplier 11 ... Switch 12 ... Adder 13 ... Stop determination circuit



Claims (4)

電力変換装置と推奨下限電圧のある蓄電デバイスを有し、交流電源が健全時は前記交流電源から負荷に交流電力を供給し、前記交流電源の電圧または周波数が所定の範囲を逸脱した場合には、前記蓄電デバイスから前記電力変換装置を介して、前記負荷に交流電力を供給する無停電電源装置であって、
前記蓄電デバイスの電圧が推奨下限電圧に基づいて決まる判定値に到達した時、前記電力変換装置から前記負荷への電力供給動作を停止することを特徴とする瞬低対策装置。
When the power converter has an electricity storage device with a recommended lower limit voltage and the AC power source is healthy, AC power is supplied from the AC power source to the load, and the voltage or frequency of the AC power source deviates from a predetermined range An uninterruptible power supply that supplies AC power to the load from the power storage device via the power converter,
When the voltage of the said electrical storage device reaches the determination value determined based on a recommendation lower limit voltage, the power supply operation | movement from the said power converter device to the said load is stopped, The instantaneous voltage drop countermeasure apparatus characterized by the above-mentioned.
前記推奨下限電圧に基づいて決まる判定値は、前記蓄電デバイスの推奨下限電圧から、前記蓄電デバイスからの放電電流と前記蓄電デバイスの内部抵抗値とから推定される電圧降下量を減算した電圧値とすることを特徴とする請求項1に記載の瞬低対策装置。   The determination value determined based on the recommended lower limit voltage is a voltage value obtained by subtracting a voltage drop amount estimated from a discharge current from the power storage device and an internal resistance value of the power storage device from the recommended lower limit voltage of the power storage device. The voltage sag countermeasure device according to claim 1. 前記推奨下限電圧に基づいて決まる判定値は、前記蓄電デバイスの推奨下限電圧から、前記蓄電デバイスからの放電電流と、前記蓄電デバイスの内部抵抗値と、前記蓄電デバイスの温度測定値とから推定される電圧降下量を減算した電圧値とすることを特徴とする請求項1に記載の瞬低対策装置。   The determination value determined based on the recommended lower limit voltage is estimated from the recommended lower limit voltage of the power storage device, the discharge current from the power storage device, the internal resistance value of the power storage device, and the temperature measurement value of the power storage device. The voltage drop countermeasure device according to claim 1, wherein the voltage value is obtained by subtracting the voltage drop amount. 前記蓄電デバイスは、正極と負極の一方がファラデー反応を、他方が非ファラデー反応を利用したハイブリッドキャパシタであることを特徴とする請求項1〜3に記載の瞬低対策装置。
The power storage device according to claim 1, wherein one of the positive electrode and the negative electrode is a hybrid capacitor using a Faraday reaction and the other using a non-Faraday reaction.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08336243A (en) * 1995-04-06 1996-12-17 Seiko Epson Corp Electronic apparatus and control method therefor
JP2005269708A (en) * 2004-03-16 2005-09-29 Sony Corp Battery device and method of controlling charge of battery device
WO2007013766A1 (en) * 2005-07-28 2007-02-01 Eppscore Co., Ltd Uninterruptible power supply for the back up of dc power source
JP2009011081A (en) * 2007-06-28 2009-01-15 Nippon Telegr & Teleph Corp <Ntt> Power supply system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08336243A (en) * 1995-04-06 1996-12-17 Seiko Epson Corp Electronic apparatus and control method therefor
JP2005269708A (en) * 2004-03-16 2005-09-29 Sony Corp Battery device and method of controlling charge of battery device
WO2007013766A1 (en) * 2005-07-28 2007-02-01 Eppscore Co., Ltd Uninterruptible power supply for the back up of dc power source
JP2009011081A (en) * 2007-06-28 2009-01-15 Nippon Telegr & Teleph Corp <Ntt> Power supply system

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