JP2010166438A - Piezoelectric oscillator - Google Patents

Piezoelectric oscillator Download PDF

Info

Publication number
JP2010166438A
JP2010166438A JP2009008183A JP2009008183A JP2010166438A JP 2010166438 A JP2010166438 A JP 2010166438A JP 2009008183 A JP2009008183 A JP 2009008183A JP 2009008183 A JP2009008183 A JP 2009008183A JP 2010166438 A JP2010166438 A JP 2010166438A
Authority
JP
Japan
Prior art keywords
voltage
circuit
temperature compensation
variable capacitance
external control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009008183A
Other languages
Japanese (ja)
Other versions
JP2010166438A5 (en
JP5310018B2 (en
Inventor
Atsushi Kiyohara
厚 清原
Masayuki Ishikawa
匡亨 石川
Sohiro Yamamoto
壮洋 山本
Norihito Matsukawa
典仁 松川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Miyazaki Epson Corp
Original Assignee
Miyazaki Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Miyazaki Epson Corp filed Critical Miyazaki Epson Corp
Priority to JP2009008183A priority Critical patent/JP5310018B2/en
Publication of JP2010166438A publication Critical patent/JP2010166438A/en
Publication of JP2010166438A5 publication Critical patent/JP2010166438A5/en
Application granted granted Critical
Publication of JP5310018B2 publication Critical patent/JP5310018B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a piezoelectric oscillator achieved in accurate temperature compensation by preventing a temperature compensation function and an AFC function from influencing each other, in a circuit structure having the temperature compensation function and the AFC function. <P>SOLUTION: The piezoelectric oscillator 10 includes: an oscillation circuit 20 including a piezoelectric oscillator 26, an oscillating amplifier circuit and a voltage-controlled variable capacitance element; a temperature compensation voltage generation circuit 30 for outputting a temperature compensation voltage for compensating a frequency-temperature characteristic of the oscillation circuit 20 by increasingly and decreasingly controlling the value of a first variable capacitance element 28a; an output current-supplying voltage regulation means 50 to change the value of a second variable capacitance element 28b according to the temperature compensation voltage; and an amplifier circuit 40 having a second operational amplifier 44 for outputting a frequency control voltage for controlling the value of the second variable capacitance element 28b according to an external control voltage. The voltage regulation means 50 includes a differential amplifier circuit 52 for supplying an output current generated based on the difference between the external control voltage and a fixed voltage to the second operational amplifier 44 to control a reference current according to the temperature compensation voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、水晶振動子の発振周波数の温度補償を行う圧電発振器に関し、特に温度補償機能とAFC(Auto Frequeny Control)機能を備えた圧電発振器に関する。   The present invention relates to a piezoelectric oscillator that performs temperature compensation of the oscillation frequency of a crystal resonator, and more particularly, to a piezoelectric oscillator having a temperature compensation function and an AFC (Auto Frequency Control) function.

図4は従来の温度補償型水晶発振器の回路構成を示す説明図である。図示のように温度補償型水晶発振器1は、インバーター素子を用いた発振回路2と、電圧可変容量素子に印加する温度補償電圧を発生する温度補償回路3と、可変容量素子を用いたAFC回路4と、を付加している。温度補償回路3は、1次電圧発生回路と3次電圧発生回路とで構成されており、水晶振動子自身が持つ本来の周波数温度特性を打ち消すために、発振回路2内の可変容量素子に温度補償電圧を印加して、例えば水晶振動子の3次曲線の温度特性を打ち消すように周波数を可変させて発振周波数を安定化させている。IC化された発振器では、AFC回路4をオペアンプで構成している。すなわちオペアンプの抵抗値を制御することで外部制御電圧のゲインを任意に変更し、ICの電気的特性にばらつきを補正すると共に、ユーザーの任意の仕様に合わせたAFC特性が得られるように調整することができる。このAFC回路4は、ユーザーが使用する機能であり、外部制御電圧に対して所望の周波数可変が求められる。AFC機能は、ユーザーごとに、外部制御電圧範囲や、必要とする周波数可変幅が異なっている。
このような温度補償回路とAFC回路を備えた水晶発振器が特許文献1、2に開示されている。
FIG. 4 is an explanatory diagram showing a circuit configuration of a conventional temperature compensated crystal oscillator. As shown in the figure, a temperature compensated crystal oscillator 1 includes an oscillation circuit 2 using an inverter element, a temperature compensation circuit 3 that generates a temperature compensation voltage to be applied to the voltage variable capacitance element, and an AFC circuit 4 using a variable capacitance element. And are added. The temperature compensation circuit 3 includes a primary voltage generation circuit and a tertiary voltage generation circuit. In order to cancel the original frequency temperature characteristic of the crystal resonator itself, a temperature is applied to the variable capacitance element in the oscillation circuit 2. By applying a compensation voltage, for example, the frequency is varied so as to cancel the temperature characteristic of the cubic curve of the crystal resonator, thereby stabilizing the oscillation frequency. In the oscillator formed as an IC, the AFC circuit 4 is composed of an operational amplifier. In other words, the gain of the external control voltage is arbitrarily changed by controlling the resistance value of the operational amplifier, the variation in the electrical characteristics of the IC is corrected, and the adjustment is performed so as to obtain the AFC characteristics according to the user's arbitrary specifications. be able to. The AFC circuit 4 is a function used by the user, and a desired frequency variation is required for the external control voltage. The AFC function has different external control voltage ranges and required frequency variable widths for each user.
Patent Documents 1 and 2 disclose a crystal oscillator including such a temperature compensation circuit and an AFC circuit.

特開2002−217643号公報JP 2002-217743 A 特開2007−19565号公報JP 2007-19565 A

図5は、従来の温度補償型水晶発振器のAFC特性を示す説明図である。同図の横軸は外部制御電圧(V)を示し、縦軸は発振周波数の偏差(ppm)を示している。従来の温度補償型水晶発振器に温度補償回路とAFC回路が共存する温度補償型水晶発振器の場合、常温においてAFC回路を最適設計しても、図示のように、その温度特性を確認すると温度によってAFC特性の傾きが変化してしまう。これは温度補償電圧により温度補償用の可変容量素子が容量変化するので、この可変容量の変化の影響を受けて、予め設定された可変容量素子の感度に影響を及ぼしてしまうためである。そうするとAFC回路により変化する発振周波数の変化量が変わってしまう。   FIG. 5 is an explanatory diagram showing the AFC characteristics of a conventional temperature compensated crystal oscillator. In the figure, the horizontal axis indicates the external control voltage (V), and the vertical axis indicates the oscillation frequency deviation (ppm). In the case of a temperature compensated crystal oscillator in which a temperature compensated crystal oscillator and an AFC circuit coexist in a conventional temperature compensated crystal oscillator, even if the AFC circuit is optimally designed at room temperature, as shown in FIG. The slope of the characteristic changes. This is because the temperature compensation variable capacitance element undergoes capacitance change due to the temperature compensation voltage, and therefore the sensitivity of the preset variable capacitance element is affected by the change in the variable capacitance. Then, the amount of change of the oscillation frequency that is changed by the AFC circuit changes.

そこで本発明は、従来技術の問題点を解決するため、温度補償機能とAFC機能を備えた回路構成において、AFC機能が温度補償の影響を受けにくくする事を実現した圧電発振器を提供することを目的としている。   SUMMARY OF THE INVENTION In order to solve the problems of the prior art, the present invention provides a piezoelectric oscillator that realizes that the AFC function is less affected by the temperature compensation in the circuit configuration having the temperature compensation function and the AFC function. It is aimed.

本発明は、上記の課題の少なくとも一部を解決するためになされたものであり、以下の形態又は適用例として実現することが可能である。
〔適用例1〕圧電振動子と、発振用増幅回路と、電圧制御型の第1及び第2の可変容量素子と、を備えた発振回路と、前記第1の可変容量素子の値を増減制御して前記発振回路の周波数温度特性を補償するための温度補償電圧を出力する温度補償電圧発生回路と、前記温度補償電圧に応じて前記第2の可変容量素子の値を変化させる出力電流を供給する電圧調整手段と、前記第2の可変容量素子の値を制御するための周波数制御電圧を外部制御電圧に応じて出力する第2のオペアンプを有する増幅回路と、を備え、前記電圧調整手段は、前記外部制御電圧に基づく電圧と固定電圧の差分に基づき発生した前記出力電流を前記第2のオペアンプに供給するものであって、前記温度補償電圧に応じて基準電流を制御した差動増幅回路を備えたことを特徴とする圧電発振器。
SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.
[Application Example 1] An oscillation circuit including a piezoelectric vibrator, an oscillation amplifier circuit, and voltage-controlled first and second variable capacitance elements, and increase / decrease control of the value of the first variable capacitance element A temperature compensation voltage generating circuit for outputting a temperature compensation voltage for compensating the frequency temperature characteristic of the oscillation circuit, and an output current for changing the value of the second variable capacitance element in accordance with the temperature compensation voltage. And an amplifier circuit having a second operational amplifier that outputs a frequency control voltage for controlling the value of the second variable capacitance element according to an external control voltage. A differential amplifier circuit for supplying the output current generated based on a difference between a voltage based on the external control voltage and a fixed voltage to the second operational amplifier, and controlling a reference current in accordance with the temperature compensation voltage Having Piezoelectric oscillator, characterized.

これにより温度補償電圧による発振回路の負荷容量が変化し、AFC回路用の可変容量値の可変感度が変化しても温度補償電圧に応じた出力電流を用いて周波数制御電圧を微調整することができる。よって温度変化に係らずゲイン変動の小さなAFC特性が得られる。またAFC電圧または温度補償電圧を出力する可変容量素子を独立に設けて、個々に電圧設定することができる。   As a result, the load capacitance of the oscillation circuit due to the temperature compensation voltage changes, and even if the variable sensitivity of the variable capacitance value for the AFC circuit changes, the frequency control voltage can be finely adjusted using the output current according to the temperature compensation voltage. it can. Therefore, an AFC characteristic with small gain fluctuation can be obtained regardless of temperature change. Moreover, the variable capacitance element which outputs an AFC voltage or a temperature compensation voltage can be provided independently, and the voltage can be set individually.

〔適用例2〕前記増幅回路が前記外部制御電圧を入力抵抗を介して入力信号とした第1のオペアンプと、前記第1の出力信号を入力信号とする前記第2のオペアンプと、前記第1のオペアンプの帰還抵抗と、を備え、前記外部制御電圧が供給される前記差動増幅回路の第1のトランジスターのベースを前記第1のオペアンプの帰還抵抗の間に接続したことを特徴とする適用例1に記載の圧電発振器。
これにより直列抵抗からなる分圧回路を別途設ける必要がなく、発振器の全体構成を簡略化させることができる。
Application Example 2 The first operational amplifier in which the amplifier circuit uses the external control voltage as an input signal via an input resistor, the second operational amplifier that uses the first output signal as an input signal, and the first And a feedback resistor of the first operational amplifier, wherein the base of the first transistor of the differential amplifier circuit to which the external control voltage is supplied is connected between the feedback resistors of the first operational amplifier. The piezoelectric oscillator described in Example 1.
As a result, it is not necessary to separately provide a voltage dividing circuit composed of a series resistor, and the overall configuration of the oscillator can be simplified.

〔適用例3〕前記差動増幅回路の前記外部制御電圧と前記固定電圧が供給される前記第1及び第2のトランジスターのエミッタに抵抗を備えたことを特徴とする適用例1または適用例2に記載の圧電発振器。
これにより差動増幅回路に入力する外部制御電圧の入力幅を広くとることができ、ゲイン調整を容易に行うことができる。
Application Example 3 Application Example 1 or Application Example 2 in which a resistor is provided in the emitters of the first and second transistors to which the external control voltage and the fixed voltage of the differential amplifier circuit are supplied. A piezoelectric oscillator according to 1.
As a result, the input width of the external control voltage input to the differential amplifier circuit can be widened, and gain adjustment can be easily performed.

本発明の圧電発振器の構成概略を示す図である。It is a figure which shows the structure outline of the piezoelectric oscillator of this invention. AFC電圧(VAFC)と外部制御電圧(VCONT)の関係を示すグラフである。It is a graph which shows the relationship between an AFC voltage (VAFC) and an external control voltage (VCONT). 変形例の圧電発振器の構成概略を示す図である。It is a figure which shows the structure outline of the piezoelectric oscillator of a modification. 従来の温度補償型水晶発振器の回路構成を示す説明図である。It is explanatory drawing which shows the circuit structure of the conventional temperature compensation type | mold crystal oscillator. 従来の温度補償型水晶発振器のAFC特性を示す説明図である。It is explanatory drawing which shows the AFC characteristic of the conventional temperature compensation type | mold crystal oscillator.

本発明の圧電発振器の実施形態を添付の図面を参照しながら以下詳細に説明する。図1は本発明の圧電発振器の構成概略を示す図である。図示のように本発明の圧電発振器10は、発振回路20と、温度補償電圧発生回路30と、増幅回路40と、電圧調整手段50とを主な構成要件としている。   Embodiments of a piezoelectric oscillator according to the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a diagram showing a schematic configuration of a piezoelectric oscillator according to the present invention. As shown in the figure, the piezoelectric oscillator 10 of the present invention mainly includes an oscillation circuit 20, a temperature compensation voltage generation circuit 30, an amplification circuit 40, and a voltage adjusting means 50.

発振回路20は、発振用増幅回路を形成する帰還抵抗22とインバーター素子24と、圧電振動子26と電圧制御型の複数の可変容量素子28とから構成されている。可変容量素子28は、一例としてMOS型の電圧可変容量素子を適用することができ、この場合、MOS型の電圧可変容量素子のゲート端子の電位とバックゲート端子の電位とを制御して容量値を制御するものとなる。第2の可変容量素子28bのゲート端子は、コンデンサーC1を介してインバーター素子24の入力端側に接続し、第1の可変容量素子28aのゲート端子は、コンデンサーC2を介してインバーター素子24の出力端側に接続され、第1及び第2の可変容量素子28a,28bのバックゲート端子は接地されている。そして第2の可変容量素子28bのゲート端子とコンデンサーC1の間の接続点に抵抗R1を介して、後述する増幅回路50からのAFC電圧(周波数制御電圧)が供給される。一方、第1の可変容量素子28aのゲート端子とコンデンサーC2の間の接続点に抵抗R2を介して、後述する温度補償電圧発生回路30からの温度補償電圧(Vcomp)が供給される。   The oscillation circuit 20 includes a feedback resistor 22 and an inverter element 24 that form an oscillation amplifier circuit, a piezoelectric vibrator 26, and a plurality of voltage-controlled variable capacitance elements 28. For example, a MOS type voltage variable capacitance element can be applied to the variable capacitance element 28. In this case, the capacitance value is controlled by controlling the potential of the gate terminal and the potential of the back gate terminal of the MOS type voltage variable capacitance element. Will be controlled. The gate terminal of the second variable capacitance element 28b is connected to the input end side of the inverter element 24 via the capacitor C1, and the gate terminal of the first variable capacitance element 28a is the output of the inverter element 24 via the capacitor C2. The back gate terminals of the first and second variable capacitance elements 28a and 28b are connected to the end side and grounded. Then, an AFC voltage (frequency control voltage) from an amplifier circuit 50 described later is supplied to the connection point between the gate terminal of the second variable capacitance element 28b and the capacitor C1 via the resistor R1. On the other hand, a temperature compensation voltage (Vcomp) from a temperature compensation voltage generation circuit 30 described later is supplied to a connection point between the gate terminal of the first variable capacitance element 28a and the capacitor C2 via a resistor R2.

温度補償電圧発生回路30は、1次電圧発生回路32と3次電圧発生回路34と温度センサー36から構成されている。1次電圧発生回路32及び3次電圧発生回路34には、温度センサー36の出力信号を入力している。1次電圧発生回路32及び3次電圧発生回路34の出力信号を加算器により合成した温度補償電圧を第1の可変容量素子28aへ印加して、水晶振動子の温度特性を打ち消すように第1の可変容量素子28aの値(容量値)を制御して発振周波数を制御するようにしている。   The temperature compensation voltage generation circuit 30 includes a primary voltage generation circuit 32, a tertiary voltage generation circuit 34, and a temperature sensor 36. The output signal of the temperature sensor 36 is input to the primary voltage generation circuit 32 and the tertiary voltage generation circuit 34. A temperature compensation voltage obtained by synthesizing the output signals of the primary voltage generation circuit 32 and the tertiary voltage generation circuit 34 by an adder is applied to the first variable capacitance element 28a so that the temperature characteristic of the crystal resonator is canceled. The oscillation frequency is controlled by controlling the value (capacitance value) of the variable capacitance element 28a.

増幅回路40は、第1及び第2のオペアンプ42,44で構成されている。第1のオペアンプ42は、抵抗Ra,Rbと反転増幅回路を構成している。第1のオペアンプ42の非反転入力端子には固定電圧(VREF1)が供給される。第2のオペアンプ44は、抵抗Rc,Rdと反転増幅回路を構成している。第2のオペアンプ54の非反転入力端子には固定電圧(VREF2)が供給される。このような構成の前記増幅回路40は、AFC機能の役割を成し、調整されたAFC電圧を第2の可変容量素子28bへ出力させている。   The amplifier circuit 40 includes first and second operational amplifiers 42 and 44. The first operational amplifier 42 constitutes resistors Ra and Rb and an inverting amplifier circuit. A fixed voltage (VREF 1) is supplied to the non-inverting input terminal of the first operational amplifier 42. The second operational amplifier 44 constitutes resistors Rc and Rd and an inverting amplifier circuit. A fixed voltage (VREF 2) is supplied to the non-inverting input terminal of the second operational amplifier 54. The amplifier circuit 40 having such a configuration plays a role of the AFC function, and outputs the adjusted AFC voltage to the second variable capacitance element 28b.

電圧調整手段50は、差動増幅回路52と、分圧回路54と、電圧電流変換回路56とから構成されている。
差動増幅回路52は、第1及び第2のPNPトランジスターTr1a,Tr1bと、第1及び第2のNPNトランジスターTr2a,Tr2bとから構成されている。
The voltage adjusting means 50 includes a differential amplifier circuit 52, a voltage dividing circuit 54, and a voltage / current conversion circuit 56.
The differential amplifier circuit 52 includes first and second PNP transistors Tr1a and Tr1b, and first and second NPN transistors Tr2a and Tr2b.

第1及び第2のPNPトランジスターTr1a,Tr1bは、エミッタが電源入力(VDD)端子60と接続し、ベースを互いに接続し、第1のPNPトランジスターTr1aのコレクタとベースを接続し、カレントミラー回路を構成している。   The first and second PNP transistors Tr1a and Tr1b have emitters connected to the power supply input (VDD) terminal 60, bases connected to each other, collectors and bases of the first PNP transistor Tr1a connected, and current mirror circuits. It is composed.

第1及び第2のNPNトランジスターTr2a,Tr2bは、コレクタを第1及び第2のPNPトランジスターTr1a,Tr1bのコレクタと接続している。第1のNPNトランジスターTr2aのベースは、後述する分圧回路54を介して外部制御電圧端子70に接続させている。第2のNPNトランジスターTr2bのベースは、固定電圧VREF3が供給される。また第1及び第2のNPNトランジスターTr2a,Tr2bのエミッタには、それぞれ抵抗R3,R4を介して後述する電圧電流変換回路56のカレントミラーを構成する第4のNPNトランジスターTr3bのコレクタに接続している。   The first and second NPN transistors Tr2a and Tr2b have collectors connected to the collectors of the first and second PNP transistors Tr1a and Tr1b. The base of the first NPN transistor Tr2a is connected to the external control voltage terminal 70 via a voltage dividing circuit 54 described later. The base of the second NPN transistor Tr2b is supplied with a fixed voltage VREF3. The emitters of the first and second NPN transistors Tr2a and Tr2b are connected to the collector of a fourth NPN transistor Tr3b constituting a current mirror of a voltage-current conversion circuit 56 described later via resistors R3 and R4, respectively. Yes.

差動増幅回路52の外部制御電圧と固定電圧が供給される第1及び第2のNPNトランジスターTr2a,Tr2bのエミッタに抵抗R3,R4を備えたことにより、差動増幅回路52に入力する外部制御電圧の入力幅を広くとることができ、ゲイン調整を容易に行うことができる。   Since the resistors R3 and R4 are provided at the emitters of the first and second NPN transistors Tr2a and Tr2b to which the external control voltage and the fixed voltage of the differential amplifier circuit 52 are supplied, the external control input to the differential amplifier circuit 52 is provided. The voltage input width can be widened, and gain adjustment can be easily performed.

また第2のPNPトランジスターTr1bのコレクタと第2のNPNトランジスターTr2bのコレクタの間と、第2のオペアンプの抵抗Rc,Rd間とを接続し、出力電流(Iout)を第2のオペアンプ44へ供給している。   Further, the collector of the second PNP transistor Tr1b and the collector of the second NPN transistor Tr2b are connected between the resistors Rc and Rd of the second operational amplifier, and the output current (Iout) is supplied to the second operational amplifier 44. is doing.

分圧回路54は、一端を外部制御電圧入力端子70と増幅回路40との間に接続させてあり、他端を差動増幅回路52の第1のNPNトランジスターTr2aのベースに接続させている。分圧回路54は、複数の抵抗を直列接続して形成し、外部制御電圧を所定電圧に調整している。   One end of the voltage dividing circuit 54 is connected between the external control voltage input terminal 70 and the amplifier circuit 40, and the other end is connected to the base of the first NPN transistor Tr2a of the differential amplifier circuit 52. The voltage dividing circuit 54 is formed by connecting a plurality of resistors in series, and adjusts the external control voltage to a predetermined voltage.

電圧電流変換回路56は、供給された電圧に応じた電流を発生させる回路である。本実施形態では、具体的に温度補償電圧発生回路30から出力された温度補償電圧が変換回路の入力側に入力されて、温度補償電圧に応じた電流に変換している。電圧電流変換回路56は、カレントミラー接続された第3及び第4のNPNトランジスターTr3a,Tr3bを有するカレントミラー回路を介して差動増幅回路52の第1及び第2のNPNトランジスターTr2a,Tr2bのエミッタと接続している。
このような構成により差動増幅回路52は、電圧電流変換回路56から温度補償電圧に応じた電流を基準電流としている。
The voltage-current conversion circuit 56 is a circuit that generates a current corresponding to the supplied voltage. In the present embodiment, the temperature compensation voltage specifically output from the temperature compensation voltage generation circuit 30 is input to the input side of the conversion circuit and converted into a current corresponding to the temperature compensation voltage. The voltage-to-current conversion circuit 56 is connected to the emitters of the first and second NPN transistors Tr2a and Tr2b of the differential amplifier circuit 52 via a current mirror circuit having third and fourth NPN transistors Tr3a and Tr3b connected in a current mirror connection. Connected.
With such a configuration, the differential amplifier circuit 52 uses a current corresponding to the temperature compensation voltage from the voltage-current conversion circuit 56 as a reference current.

上記構成による本発明の圧電発振回路の動作について以下説明する。図2はAFC電圧(VAFC)と外部制御電圧(VCONT)の関係を示すグラフである。同グラフの横軸は外部制御電圧(VCONT)を示し、縦軸はAFC電圧(VAFC)を示す。破線は補正前のAFC特性を示し、実線は補正後のAFC特性を示している。   The operation of the piezoelectric oscillation circuit of the present invention having the above configuration will be described below. FIG. 2 is a graph showing the relationship between the AFC voltage (VAFC) and the external control voltage (VCONT). The horizontal axis of the graph shows the external control voltage (VCONT), and the vertical axis shows the AFC voltage (VAFC). A broken line indicates the AFC characteristic before correction, and a solid line indicates the AFC characteristic after correction.

まず差動増幅回路52の第1のPNPトランジスターTr1a,1bからなるカレントミラー回路では、それぞれのトランジスターに同じ電流が流れる。
また外部制御電圧入力端子70から入力された外部制御電圧が分圧回路54に供給される。分圧回路54では外部制御電圧を所定の電圧に調整している。所定電圧に調整された外部制御電圧が第1のNPNトランジスターTr2aのベースに供給される。一方、第2のNPNトランジスターTr2bのベースには固定電圧VREF3が供給される。
First, in the current mirror circuit including the first PNP transistors Tr1a and 1b of the differential amplifier circuit 52, the same current flows in each transistor.
An external control voltage input from the external control voltage input terminal 70 is supplied to the voltage dividing circuit 54. The voltage dividing circuit 54 adjusts the external control voltage to a predetermined voltage. An external control voltage adjusted to a predetermined voltage is supplied to the base of the first NPN transistor Tr2a. On the other hand, a fixed voltage VREF3 is supplied to the base of the second NPN transistor Tr2b.

また温度補償電圧発生回路30からの温度補償電圧が電圧調整手段50の電圧電流変換回路56に供給される。電圧電流変換回路56では、供給された温度補償電圧に応じた電流を発生し、カレントミラー回路を構成する第4のNPNトランジスターTr3bのベースに供給される。第4のNPNトランジスターTr3bのベースには、基準電流として温度補償電圧に応じた電流が供給される。   Further, the temperature compensation voltage from the temperature compensation voltage generation circuit 30 is supplied to the voltage / current conversion circuit 56 of the voltage adjusting means 50. In the voltage-current conversion circuit 56, a current corresponding to the supplied temperature compensation voltage is generated and supplied to the base of the fourth NPN transistor Tr3b constituting the current mirror circuit. A current corresponding to the temperature compensation voltage is supplied as a reference current to the base of the fourth NPN transistor Tr3b.

外部制御電圧を分圧した電圧Vinと、固定電圧VREF3が等しい場合には、外部制御電圧が基準値である基準状態のときであり、第1及び第2のNPNトランジスターTr2a,Tr2bのベース電圧が等しくなる。そうすると出力電流Ioutが全く流れない状態となる。この場合、外部制御電圧のみの信号が増幅回路40により増幅されてAFC電圧となり、第2の可変容量素子28bへ供給される。   When the voltage Vin obtained by dividing the external control voltage is equal to the fixed voltage VREF3, this is a reference state in which the external control voltage is a reference value, and the base voltages of the first and second NPN transistors Tr2a and Tr2b are Will be equal. As a result, the output current Iout does not flow at all. In this case, the signal of only the external control voltage is amplified by the amplifier circuit 40 to become an AFC voltage and supplied to the second variable capacitance element 28b.

次に、外部制御電圧を分圧した電圧Vinが、固定電圧VREF3よりも低い場合には(Vin<VREF3)、第1のNPNトランジスターTr2aの電圧が、第2のトランジスターTr2bの電圧よりも小さい状態となる。結果的に第1のNPNトランジスターTr2aのコレクタ電流が、第2のトランジスターTr2bのコレクタ電流よりも小さい状態となる。そうすると増幅回路の第2のオペアンプ44側からの差分の電流が差動増幅回路52内へ流れ込むことになる。よって図2のAに示すように足りない電流分を補おうとして第2のオペアンプ44では、ゲインが上がることになる。   Next, when the voltage Vin obtained by dividing the external control voltage is lower than the fixed voltage VREF3 (Vin <VREF3), the voltage of the first NPN transistor Tr2a is smaller than the voltage of the second transistor Tr2b. It becomes. As a result, the collector current of the first NPN transistor Tr2a is smaller than the collector current of the second transistor Tr2b. As a result, a difference current from the second operational amplifier 44 side of the amplifier circuit flows into the differential amplifier circuit 52. Therefore, as shown in FIG. 2A, the gain of the second operational amplifier 44 increases to compensate for the insufficient current.

一方、外部制御電圧を分圧した電圧Vinが、固定電圧VREF3よりも高い場合には(Vin>VREF3)、第1のNPNトランジスターTr2aのコレクタ電流が、第2のトランジスターTr2bのコレクタ電流よりも大きい状態となる。そうすると差動増幅回路52により第2のオペアンプ44へ出力電流として送り込むことになる。よって図2のBに示すように第2のオペアンプ44では、ゲインが下がることになる。また温度補償電圧に応じて変化する基準電流が大きくなった場合、AFC電圧はC、Dのように傾きが変わるのでAFC特性の傾きを調整することができる。   On the other hand, when the voltage Vin obtained by dividing the external control voltage is higher than the fixed voltage VREF3 (Vin> VREF3), the collector current of the first NPN transistor Tr2a is larger than the collector current of the second transistor Tr2b. It becomes a state. Then, the differential amplifier circuit 52 sends the output current to the second operational amplifier 44. Therefore, as shown in FIG. 2B, the gain of the second operational amplifier 44 decreases. When the reference current that changes according to the temperature compensation voltage increases, the slope of the AFC voltage changes like C and D, so that the slope of the AFC characteristic can be adjusted.

図3は圧電発振器の変形例の構成概略を示す図である。図3は説明の便宜上、増幅回路20と電圧調整手段50のみを示している。変形例の圧電発振器10Aと図1に示す圧電発振器10との構成上の相違は、分圧回路を削除して、第1のオペアンプ42の複数の帰還抵抗の間と差動増幅回路52の第1のNPNトランジスターTr2aのベースを接続した構成である。その他の構成は図1に示す圧電発振器と同一の構成であり、その詳細な説明を省略する。   FIG. 3 is a diagram showing a schematic configuration of a modification of the piezoelectric oscillator. FIG. 3 shows only the amplifier circuit 20 and the voltage adjusting means 50 for convenience of explanation. The difference in configuration between the piezoelectric oscillator 10A of the modified example and the piezoelectric oscillator 10 shown in FIG. 1 is that the voltage dividing circuit is deleted, and between the plurality of feedback resistors of the first operational amplifier 42 and the differential amplifier circuit 52. In this configuration, the base of one NPN transistor Tr2a is connected. The other configuration is the same as that of the piezoelectric oscillator shown in FIG. 1, and detailed description thereof is omitted.

前述のように分圧回路は複数の抵抗を直列接続して形成することができ、本実施形態では、増幅回路20の第1のオペアンプ42の直列抵抗Ra、Rb、Rb’のうち抵抗Rb、Rb’の間と、第1のNPNトランジスターTr2aのベースを接続している。   As described above, the voltage dividing circuit can be formed by connecting a plurality of resistors in series. In this embodiment, among the series resistors Ra, Rb, and Rb ′ of the first operational amplifier 42 of the amplifier circuit 20, resistors Rb, The base of the first NPN transistor Tr2a is connected between Rb ′.

上記構成による変形例の圧電発振器10Aによれば、図1に示す分圧回路を第1のオペアンプの直列抵抗と代替することによって、分圧回路の構成を削除することができ、発振器の全体構成を簡略化させることができる。増幅回路40の帰還抵抗から外部制御電圧を差動増幅回路52へ入力させる構成であっても、図1の圧電発振器10と同様にAFC電圧を調整することができる。   According to the piezoelectric oscillator 10A of the modified example having the above configuration, the configuration of the voltage dividing circuit can be eliminated by replacing the voltage dividing circuit shown in FIG. 1 with the series resistance of the first operational amplifier. Can be simplified. Even when the external control voltage is input from the feedback resistor of the amplifier circuit 40 to the differential amplifier circuit 52, the AFC voltage can be adjusted as in the piezoelectric oscillator 10 of FIG.

1………温度補償水晶型発振器、2………発振回路、3………温度補償回路、4………AFC回路、10、10A………圧電発振器、20………発振回路、22………帰還抵抗、24………インバーター素子、26………圧電振動子、28………可変容量素子、30………温度補償電圧発生回路、32………1次電圧発生回路、34………3次電圧発生回路、36………温度センサー、40………増幅回路、42………第1のオペアンプ、44………第2のオペアンプ、50………電圧調整手段、52………差動増幅回路、54………分圧回路、56………電圧電流変換回路、60………電源入力端子、70………外部制御電圧入力端子。 DESCRIPTION OF SYMBOLS 1 ......... Temperature compensation crystal oscillator, 2 ......... Oscillation circuit, 3 ......... Temperature compensation circuit, 4 ......... AFC circuit, 10, 10A ......... Piezoelectric oscillator, 20 ...... Oscillation circuit, 22 ... ...... Feedback resistor, 24... Inverter element, 26... Piezoelectric vibrator, 28... Variable capacitance element, 30... Temperature compensation voltage generation circuit, 32. ...... Third-order voltage generation circuit 36... Temperature sensor 40... Amplifier circuit 42... First operational amplifier 44 44 Second operational amplifier 50 Voltage adjusting means 52. ... Differential amplifier circuit 54... Voltage divider circuit 56... Voltage / current converter circuit 60... Power supply input terminal 70.

Claims (3)

圧電振動子と、発振用増幅回路と、電圧制御型の第1及び第2の可変容量素子と、を備えた発振回路と、
前記第1の可変容量素子の値を増減制御して前記発振回路の周波数温度特性を補償するための温度補償電圧を出力する温度補償電圧発生回路と、
前記温度補償電圧に応じて前記第2の可変容量素子の値を変化させる出力電流を供給する電圧調整手段と、
前記第2の可変容量素子の値を制御するための周波数制御電圧を外部制御電圧に応じて出力する第2のオペアンプを有する増幅回路と、を備え、
前記電圧調整手段は、前記外部制御電圧に基づく電圧と固定電圧の差分に基づき発生した前記出力電流を前記第2のオペアンプに供給するものであって、前記温度補償電圧に応じて基準電流を制御した差動増幅回路を備えたことを特徴とする圧電発振器。
An oscillation circuit including a piezoelectric vibrator, an oscillation amplifier circuit, and voltage-controlled first and second variable capacitance elements;
A temperature compensation voltage generation circuit that outputs a temperature compensation voltage for compensating the frequency temperature characteristic of the oscillation circuit by increasing or decreasing the value of the first variable capacitance element;
Voltage adjusting means for supplying an output current for changing the value of the second variable capacitance element according to the temperature compensation voltage;
An amplification circuit having a second operational amplifier that outputs a frequency control voltage for controlling the value of the second variable capacitance element according to an external control voltage;
The voltage adjusting means supplies the output current generated based on a difference between a voltage based on the external control voltage and a fixed voltage to the second operational amplifier, and controls a reference current according to the temperature compensation voltage. A piezoelectric oscillator comprising the differential amplifier circuit.
前記増幅回路が前記外部制御電圧を入力抵抗を介して入力信号とした第1のオペアンプと、前記第1の出力信号を入力信号とする前記第2のオペアンプと、前記第1のオペアンプの帰還抵抗と、を備え、前記外部制御電圧が供給される前記差動増幅回路の第1のトランジスターのベースを前記第1のオペアンプの帰還抵抗の間に接続したことを特徴とする請求項1に記載の圧電発振器。   A first operational amplifier in which the amplifier circuit uses the external control voltage as an input signal via an input resistor; a second operational amplifier that uses the first output signal as an input signal; and a feedback resistor of the first operational amplifier The base of the first transistor of the differential amplifier circuit to which the external control voltage is supplied is connected between the feedback resistors of the first operational amplifier. Piezoelectric oscillator. 前記差動増幅回路の前記外部制御電圧と前記固定電圧が供給される前記第1及び第2のトランジスターのエミッタに抵抗を備えたことを特徴とする請求項1または請求項2に記載の圧電発振器。   3. The piezoelectric oscillator according to claim 1, wherein a resistor is provided in an emitter of each of the first and second transistors to which the external control voltage and the fixed voltage of the differential amplifier circuit are supplied. .
JP2009008183A 2009-01-16 2009-01-16 Oscillator Expired - Fee Related JP5310018B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009008183A JP5310018B2 (en) 2009-01-16 2009-01-16 Oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009008183A JP5310018B2 (en) 2009-01-16 2009-01-16 Oscillator

Publications (3)

Publication Number Publication Date
JP2010166438A true JP2010166438A (en) 2010-07-29
JP2010166438A5 JP2010166438A5 (en) 2012-03-08
JP5310018B2 JP5310018B2 (en) 2013-10-09

Family

ID=42582236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009008183A Expired - Fee Related JP5310018B2 (en) 2009-01-16 2009-01-16 Oscillator

Country Status (1)

Country Link
JP (1) JP5310018B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015091111A (en) * 2013-11-07 2015-05-11 セイコーエプソン株式会社 Oscillation circuit, oscillator, electronic apparatus, moving body, and method of manufacturing oscillator
WO2016206384A1 (en) * 2015-06-26 2016-12-29 深圳市中兴微电子技术有限公司 Crystal oscillator circuit, crystal oscillator circuit tuning method, and storage medium
US10193557B2 (en) 2016-03-22 2019-01-29 Asahi Kasei Microdevices Corporation Oscillation control apparatus and oscillation apparatus

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05505068A (en) * 1989-07-18 1993-07-29 セイコー株式会社 Low voltage voltage controlled oscillator temperature compensation
JPH08186442A (en) * 1994-11-04 1996-07-16 Citizen Watch Co Ltd Temperature compensated crystal oscillator
JPH10200334A (en) * 1997-01-08 1998-07-31 Oki Electric Ind Co Ltd Voltage control oscillator
JP2000244243A (en) * 1999-02-22 2000-09-08 Nippon Dempa Kogyo Co Ltd Voltage-controlled crystal oscillator
JP2003069343A (en) * 2000-08-31 2003-03-07 Citizen Watch Co Ltd Temperature compensated oscillator
JP2005176198A (en) * 2003-12-15 2005-06-30 Matsushita Electric Ind Co Ltd Temperature compensated crystal oscillator
JP2006100985A (en) * 2004-09-28 2006-04-13 Matsushita Electric Ind Co Ltd Crystal oscillator and oscillation device employing it

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05505068A (en) * 1989-07-18 1993-07-29 セイコー株式会社 Low voltage voltage controlled oscillator temperature compensation
JPH08186442A (en) * 1994-11-04 1996-07-16 Citizen Watch Co Ltd Temperature compensated crystal oscillator
JPH10200334A (en) * 1997-01-08 1998-07-31 Oki Electric Ind Co Ltd Voltage control oscillator
JP2000244243A (en) * 1999-02-22 2000-09-08 Nippon Dempa Kogyo Co Ltd Voltage-controlled crystal oscillator
JP2003069343A (en) * 2000-08-31 2003-03-07 Citizen Watch Co Ltd Temperature compensated oscillator
JP2005176198A (en) * 2003-12-15 2005-06-30 Matsushita Electric Ind Co Ltd Temperature compensated crystal oscillator
JP2006100985A (en) * 2004-09-28 2006-04-13 Matsushita Electric Ind Co Ltd Crystal oscillator and oscillation device employing it

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015091111A (en) * 2013-11-07 2015-05-11 セイコーエプソン株式会社 Oscillation circuit, oscillator, electronic apparatus, moving body, and method of manufacturing oscillator
WO2016206384A1 (en) * 2015-06-26 2016-12-29 深圳市中兴微电子技术有限公司 Crystal oscillator circuit, crystal oscillator circuit tuning method, and storage medium
US10193557B2 (en) 2016-03-22 2019-01-29 Asahi Kasei Microdevices Corporation Oscillation control apparatus and oscillation apparatus

Also Published As

Publication number Publication date
JP5310018B2 (en) 2013-10-09

Similar Documents

Publication Publication Date Title
JP3350040B2 (en) Temperature compensated oscillator
TWI392219B (en) Low noise reference circuit of improving frequency variation of ring oscillator
US8854125B2 (en) Linear amplifier that perform level shift and method of level shifting
JP5129394B2 (en) Oscillator
JP2010130141A (en) Voltage controlled temperature compensation piezoelectric oscillator
JP4527592B2 (en) Constant voltage power circuit
JP5310018B2 (en) Oscillator
JP2012032867A (en) Differential amplifier circuit
JP3760100B2 (en) Voltage controlled oscillator
JP2007233657A (en) Amplifier, step-down regulator using it, and operational amplifier
US20070222532A1 (en) Temperature-compensated crystal oscillator
JP2010166438A5 (en) Oscillator
KR20060042200A (en) Regulator circuit
JP5034772B2 (en) Temperature compensated piezoelectric oscillator
KR101258281B1 (en) Voltage to current converter and method for converting
JP2008294623A (en) Temperature-compensated crystal oscillator
US7928810B2 (en) Oscillator arrangement and method for operating an oscillating crystal
JP3542022B2 (en) regulator
JP4042207B2 (en) Piezoelectric oscillator
JP2010161532A (en) Piezoelectric oscillator
US20130009670A1 (en) Signal operating circuit
JP3825304B2 (en) Oscillator circuit
JP4311313B2 (en) Piezoelectric oscillator
JP2003218634A (en) Oscillation circuit
JP2004318407A (en) Regulator circuit

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20100705

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20100705

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120113

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120113

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130228

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130307

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130507

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130604

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130617

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 5310018

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees