JP2010156839A - Display device and driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem of requiring the capacity of a quite larger capacitor than a realistic layout size in a driving method of allowing electric charge accumulated in conventional capacity to flow to light emitting elements to emit light (afterglow) to obtain desired brightness. <P>SOLUTION: Pixels having light emitting elements and a driving circuit connected to the light emitting elements and allowing the light emitting elements to emit light, are arranged in matrix shape, and a plurality of selection lines for applying selection signals to a plurality of pixel rows arranged in one direction, and a plurality of data lines for applying data signals to a plurality of pixel columns arranged in the other direction, are provided. The driving circuit has the capacitor and a switch for connecting the data lines to the capacitor by signals of the selection lines. A storage part is provided for storing image data of one frame for displaying image data of one screen portion, and a control circuit is provided for repeatedly outputting image data stored in the storage part, to a plurality of fields divided timewise. Data signals based on the output image data is output to the data lines. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display device using a light emitting element and a driving method thereof. In particular, the present invention relates to a display device using a current-controlled light emitting element in which light emission luminance is controlled by a current flowing through the element, such as organic and inorganic EL (electroluminescence) or LED (light emitting diode), and a driving method thereof.

  In recent years, electronic devices using organic semiconductor materials have been widely developed, and the development of organic EL (Electro-Luminescence), organic TFT (Thin Film Transistor), organic solar cells, etc., which are light emitting elements, has been reported. Yes. Among them, the organic EL display is regarded as promising as the technology that is closest to practical use.

  The configuration of the organic EL display panel is classified into a passive matrix type and an active matrix type. Since the passive matrix type does not require TFTs, there are advantages such as higher definition and lower substrate cost. However, on the premise of blinking driving, the value of current that flows during lighting increases, so there is a serious trade-off between luminance and lifetime, and it is difficult to obtain a high-luminance display panel. In addition, an increase in power consumption due to parasitic capacitance and instantaneous luminance is a problem.

  On the other hand, in the active matrix type, it is not always necessary to drive to blink, and operation close to lighting is possible, so that the current value flowing at the time of lighting can be lowered, and the life of organic EL and the power consumption are reduced. It will be advantageous. However, the active matrix type is disadvantageous in terms of TFT characteristic drift, definition, cost, and yield.

  As a method having both advantages of the passive matrix type and the active matrix type, a driving method (hereinafter referred to as charge) using light emission (hereinafter referred to as afterglow) caused by flowing the charge accumulated in the charge accumulation means to the light emitting element after a selection period. Called a driving method). As the charge storage means, a capacitor provided in a drive circuit in a pixel on the substrate is usually used. As a drive circuit, basically, a switch and a capacitor may be provided one by one. The charge driving method is introduced in Patent Document 1, Patent Document 2, Patent Document 3, and the like.

  FIG. 5 is a diagram illustrating a configuration of a conventional charge-driven display device. The pixel 101 includes one capacitor 103, one switch 104 that controls charge accumulation, and a light emitting element 102. Although only a part of the pixels is shown in FIG. 5, the display area is actually configured by arranging X pixels in the horizontal direction and Y pixels in the vertical direction in a matrix. Each pixel is composed of a selection line 106-1 to selection line 106-Y for selecting each pixel and a data line 105-1 to a data line 105-X for inputting a data signal to each pixel. As the light emitting element 102, for example, an organic electroluminescence (EL) element is used.

  The operation principle of the display device will be described. A switch 104 of each pixel connected to the selection line 106 is turned on by a signal from the selection line 106-1. Then, a data voltage (or data current) corresponding to the luminance data is applied to the capacitor 103 from the data lines 105-1 to 105-X via the switch 104. As a result, a current corresponding to the data voltage flows through the light emitting element and emits light with a desired luminance.

  Next, the switch 104 of each pixel connected to the selection line 106 is turned OFF by a signal from the selection line 106-1. Then, the charge accumulated in the capacitor 103 flows to the light emitting element 102, and afterglow is generated. Afterglow can be controlled by the amount of charge, and this amount of charge is determined by the data voltage and the capacitance of the capacitor 103. In other words, in addition to light emission according to the data voltage (or data current) at the time of charging the capacitor, this is a driving method that obtains desired luminance by using afterglow according to the amount of charge.

  If this method is used, the configuration of the pixel drive circuit is simple, so high definition can be easily achieved. Further, since the TFT is used as a switch, the influence of variations in TFT characteristics is small, and the yield of the TFT can be increased. .

  FIG. 6 is a timing chart of a conventional charge drive type display device. The horizontal axis indicates time, and the operation of two frames (Mth, (M + 1) th) is described. One frame is a time for displaying image data for one screen, and the image data is input from the outside to a controller (not shown) that drives the display device in one frame cycle.

The selection signals S _{1 to} S _Y shown in FIG. 6 are signals applied to the selection lines 106-1 to 106-Y in FIG. For example, in the Mth frame, voltage pulses that become High in one selection period are sequentially applied as selection signals S _{1 to} S _Y. Period, each of the selection signals _S 1 to S _Y becomes High, the switch 104 in the pixel 101 is turned ON, first terminal side of the capacitor 103 potential of (anode side of the light emitting element 102) is the data line 105-1～105- Data voltage applied to X. As a result, charges corresponding to the data voltage are accumulated in the capacitor 103. Thus, in one frame period, electric charges are sequentially stored in the capacitor 103 in units of rows. The same operation is performed for the (M + 1) th frame.

Data signals corresponding to image data are respectively applied to the data lines 105-1 to 105-X in FIG. Here, the description of the data signal D ₁ applied to the data line 105-1 as an example. 6, the data signal is only the data signal D ₁ is shown.

Data signal D ₁ is a gray-scale voltage for the light emitting element 102 during the selection period at a desired luminance, changes the tone defined in synchronization with the selection signal S ₁ to S _Y. Here, current may be used instead of voltage. For example, the M-th frame, the gradation voltage of the data signal _{D 1} changes according to the selection signal _S 1 to S _Y. Data signals D ₁ of the this M-th frame is a signal based on the image data of M-th frame. Similarly, (M + 1) th data signal D ₁ of the frame is a signal based on the image data of the (M + 1) th frame.

The light emitting elements 102 arranged in a matrix form light emitting elements 102 in the first row → light emitting elements 102 in the second row →... → light emission in the Y row in accordance with the selection signals S _{1 to} S _Y. As in the element 102, light is emitted sequentially in units of rows. Each light emitting element 102, the selection period is current emission flows corresponding to the voltage difference between the cathode potential of the voltage and the light emitting element 102 of the data signal D _1. After the selection period, the charge accumulated in the capacitor 103 flows into the light emitting element 102 and emits light as afterglow. For example, in the M-th frame, light is emitted sequentially (light emission in the selected period and light emission elements 102 in the first row → second row of light-emitting elements 102 →... → Y-th row of light-emitting elements 102). Afterglow). The light emission operation is performed in the same manner for the (M + 1) th frame. In FIG. 6, I _{1 to} I _Y indicate the light emitting element currents of the light emitting elements 102 of Y pixels connected to the data line 105-1.
Japanese Patent Application Laid-Open No. 08-054836 Japanese Patent No. 3281848 JP 2000-276109 A

  However, when the charge driving method is used, the instantaneous luminance increases because the afterglow is smaller than the required luminance. Since the instantaneous luminance is high and the peak current is large, the power consumption of the DC component is increased. Here, in order to reduce the power consumption to the same level as the active matrix type, it is required to suppress the peak current and increase the afterglow.

In order to maintain the same luminance at a low peak current, the afterglow time may be increased by increasing the capacity. However, the capacity of the organic EL element per pixel and the capacity of a capacitor that can be created in one pixel are limited in layout. For example, assuming a VGA 3-inch panel, a capacitance of about 14 pF is required to obtain a peak luminance of 250 cd / m ² using afterglow. Here, it was assumed that the data voltage was 15 V and the current density of the light emitting element was 1 A / cm ² . On the other hand, even if it is laid out over the entire area of one pixel, the total of the organic EL element and the capacitor is about 2 to 3 pF, and only a luminance of about 30 to 50 cd / m ² can be obtained.

  Therefore, the conventional driving method for obtaining a desired luminance by causing the electric charge accumulated in the capacitor to flow through the light emitting element to emit light (afterglow) requires a capacitance of the capacitor that is considerably larger than the actual layout size. was there.

  An object of the present invention is to provide a display device and a driving method capable of emitting light with a desired luminance by reducing the size of a capacity used for afterglow as compared with the prior art.

In the present invention, pixels having a light emitting element and a driving circuit connected to the light emitting element and causing the light emitting element to emit light are arranged in a matrix,
A plurality of selection lines for applying a selection signal to a row of a plurality of pixels arranged in one direction and a plurality of data lines for applying a data signal to a column of a plurality of pixels arranged in the other direction,
The driving circuit is a display device including a capacitor and a switch that connects the data line and the capacitor by a signal of the selection line,
A storage unit that stores the image data of one frame that displays image data for one screen, and a control circuit that repeatedly outputs the image data stored in the storage unit to a plurality of temporally divided fields; Have
The data signal based on the image data output to the data line is output;
In each of the plurality of fields, the data signal is transmitted from the data line to the capacitor, and charge is supplied from the capacitor to the light emitting element.

In the present invention, pixels having a light emitting element and a driving circuit connected to the light emitting element and emitting the light emitting element are arranged in a matrix,
A plurality of selection lines for applying a selection signal to a row of a plurality of pixels arranged in one direction and a plurality of data lines for applying a data signal to a column of a plurality of pixels arranged in the other direction,
The driving circuit is a driving method of a display device including a capacitor and a switch that connects the data line and the capacitor by a signal of the selection line,
One frame for displaying image data for one screen includes a plurality of time-divided fields, and in each of the plurality of fields, transmission of the data signal from the data line to the capacitor; This is a method for driving a display device in which charge is supplied from a capacitor to the light emitting element.

  According to the present invention, one frame for displaying image data for one screen is displayed in a plurality of fields. Even if the number of fields increases and the selection period becomes shorter, the luminance of one afterglow does not decrease. Using this feature, the amount of light emitted by afterglow can be doubled by the number of fields. As a result, the capacity used for afterglow can be reduced as compared with the conventional case, and light can be emitted with a desired luminance.

  Hereinafter, embodiments according to the present invention will be described in detail with reference to the drawings. In this embodiment, the configuration of the display device is the same as that described with reference to FIG. Each of the selection lines 106-1 to 106-Y is a wiring that applies a selection signal to a row of a plurality of pixels arranged in one direction, and each of the data lines 105-1 to 105-X is in the other direction. It is a wiring for applying a data signal to a plurality of arranged pixels. The driving circuit of the pixel 101 includes one capacitor 103 and one switch 104 that controls charge accumulation.

  FIG. 1 is a diagram showing a timing chart of a display device according to an embodiment of the present invention. The horizontal axis indicates time, and the operation of two frames (Mth, (M + 1) th) is described. One frame is a time for displaying image data for one screen, and the image data is input from the outside to a controller (not shown) that drives the display device in one frame cycle. One frame is composed of a plurality of fields divided in time. The number of fields is assumed to be N (N is a natural number of 2 or more), and the description will be continued. In each of the plurality of fields, transmission of a data signal from the data line to the capacitor and charge supply from the capacitor to the light emitting element are executed.

The selection signals S _{1 to} S _Y shown in FIG. 1 are signals applied to the selection lines 106-1 to 106-Y in FIG. In each field from the first field to the Nth field, the selection signals S _{1 to} S _Y are sequentially applied, and each selection signal is applied as a voltage pulse that becomes High in one selection period. For example, a period in which the selection signals _{S 1} becomes High, the potential data line switch 104 is turned ON, first terminal side of the capacitor 103 in the pixel 101 connected to the selection line 106-1 (anode side of the light emitting element 102) This is the data voltage applied to 105. As a result, charges corresponding to the data voltage are accumulated in the capacitor 103. Similar operations are sequentially performed on the selection signals S _{2 to} S _Y. Thus, in one field period, electric charges are sequentially stored in the capacitor 103 in units of rows.

  The operations from the first field to the Nth field are performed for each frame, and FIG. 1 shows the operations in the Mth frame and the (M + 1) th frame.

Data signals corresponding to image data are respectively applied to the data lines 105-1 to 105-X in FIG. Here, the description of the data signal D ₁ applied to the data line 105-1 as an example. In Figure 1, the data signal is only the data signal D ₁ is shown.

Data signal D ₁ is a gray-scale voltage for the light emitting element 102 during the selection period at a desired luminance, changes the tone defined in synchronization with the selection signal S ₁ to S _Y. Here, current may be used instead of voltage. For example, the M-th frame, the first field, the gradation voltage of the data signal D ₁ changes according to the selection signal S ₁ to S _Y. Although the data signal D ₁ of the first field is a signal based on the image data of M-th frame, in the second field to N-th field following the first field, the same in response to the selection signal S ₁ to S _Y Output a signal. That is, in the first field to the Nth field, scanning for one screen is repeated N times based on the same image data. For the (M + 1) th frame, the same operation as the Mth frame is performed based on the image data of the (M + 1) th frame.

The light emitting elements 102 arranged in a matrix form light emitting elements 102 in the first row → light emitting elements 102 in the second row →... → light emission in the Y row in accordance with the selection signals S _{1 to} S _Y. As in the element 102, light is emitted sequentially in units of rows. Each light emitting element 102, the selection period is current emission flows corresponding to the voltage difference between the cathode potential of the voltage and the light emitting element 102 of the data signal D _1. After the selection period, the charge accumulated in the capacitor 103 flows into the light emitting element 102 and emits light as afterglow. In one field, light is emitted sequentially (light emission and afterglow in a selected period) like the light emitting element 102 in the first row → the light emitting element 102 in the second row →→→ the light emitting element 102 in the Yth row. To do. This is repeated from the first field to the Nth field. The light emission operation is performed in the same manner for the (M + 1) th frame. In FIG. 1, I _{1 to} I _Y indicate the light emitting element currents of the light emitting elements 102 of Y pixels connected to the data line 105-1.

  Next, the effect by this embodiment is demonstrated. In the conventional display method described with reference to FIGS. 5 and 6, the luminance at which all pixels emit light during the selection period in one frame is set to 1, and the luminance at which all pixels emit light as afterglow in one frame is set to M (selected). Relative to the period). In that case, in the conventional display method, the luminance in one frame is (1 + M).

  On the other hand, the brightness | luminance in 1 frame of this embodiment is calculated | required. First, the luminance of all the pixels that emit light during the selection period in one frame is 1, which is not different from the conventional one. This is because the luminance in the selection period is (voltage between terminals of the light emitting element) × (light emission time), and even if the number of fields increases to N, the light emission time in one selection period is (1 / N). . On the other hand, the luminance at which all pixels emit light as afterglow in one frame is (M × N), which increases. This is because the luminance of afterglow is determined by (the amount of charge accumulated in the capacitor). That is, the luminance of afterglow can be increased by the number of times that charges are accumulated in the capacitor. Therefore, the luminance in one frame of this embodiment is (1 + M · N).

  This suggests that when the luminance due to afterglow is sufficiently larger than the luminance in the selection period (M >> 1), the luminance in one frame is N times.

Based on the above effects, how far the capacitance of the capacitor can be reduced with a desired luminance will be described. Considering the case of emitting light with the same luminance as the conventional driving method, assuming that the capacity can be reduced to (1 / A), from the above relationship,
(1 + M) = (1 + M · N · (1 / A))
Thus, it can be seen that A = N.

  That is, the capacity can be reduced to (1 / N) as compared with the conventional driving method.

  FIG. 2 is a diagram showing the required capacitance of the capacitor when the number of fields is changed. The capacity ratio on the vertical axis is calculated as a relative value of the capacity ratio required when the number of fields is increased, assuming that the capacity is 1 when the number of fields is 1. Thus, by increasing the number of fields N, the capacity can be reduced to (1 / N).

  Here, a method for determining the number of fields will be described. From the above-described effects, it is advantageous to reduce the capacity by increasing the number N of fields as much as possible. However, N cannot be increased without limit. A certain time constant is required to store the charge corresponding to the data voltage in the capacitance of the capacitor. That is, the larger N is, the shorter one selection period is (1 / N), and it becomes impossible to accumulate desired charges from a certain place. As a result, the afterglow becomes smaller than the desired luminance, and the expected effect cannot be obtained. Therefore, it is desirable to determine the number N of fields so that the time required for the desired voltage to be stored in the capacitor is longer than the time required. The number of fields is set by a control circuit 201, which will be described later. The control circuit 201 sets one selection period for selecting each selection line of a plurality of selection lines, and the time during which the voltage corresponding to the data signal is stored in the charge storage means. The number of fields is set so as to be the above.

  The number of fields is also limited by the time constant of afterglow. The time constant of afterglow is determined by the resistance and capacitance of the capacitor, the light emitting element, and the wiring. When one selection period is shorter than the time constant of afterglow, all desired charges do not flow through the light emitting element 102, and accurate gradation display cannot be performed.

  Therefore, the number of fields N can be determined so that the light emitting element 102 does not emit light within the time from the end of each selection period to the next selection of the same selection line among the plurality of selection lines. desirable.

  Hereinafter, further description will be given based on examples of the present invention.

  FIG. 3 is a diagram showing the configuration of the charge drive type display device of the first embodiment according to the present invention. In the display device of this embodiment, the panel size is 3 inches, the display colors are RGB, and the resolution is VGA. The pixel 101 includes one capacitor 103, one switch 104 that controls charge accumulation, and a light emitting element 102. Although only a part of the pixels are shown in FIG. 3, in practice, 1920 pixels in the horizontal direction and 480 pixels in the vertical direction are arranged in a matrix to form a display area. Each pixel includes selection lines 106-1 to 106-480 for selecting each pixel in units of rows, and data lines 105-1 to 105-1920 for inputting a data signal to each pixel. The light emitting element 102 is an organic electroluminescence (EL) element.

  FIG. 4 is a timing chart of the display device according to the first embodiment of the present invention. The horizontal axis indicates time, and the operation of two frames (Mth, (M + 1) th) is described. One frame is a time for displaying image data for one screen, and the image data is input from the outside to a controller (not shown) that drives the display device in one frame cycle. One frame is composed of a plurality of fields divided in time. In this embodiment, the number of fields is six. Here, the frame frequency of the input image data is 60 Hz. In each of the plurality of fields, transmission of a data signal from the data line to the capacitor and charge supply from the capacitor to the light emitting element are executed.

Selection signals S _{1 to} S ₄₈₀ shown in FIG. 4 are signals applied to selection lines 106-1 to 106-480 in FIG. In each field from the first field to the sixth field, the selection signals S _{1 to} S ₄₈₀ are sequentially applied, and each selection signal is applied as a voltage pulse that becomes High in one selection period. For example, a period in which the selection signals _{S 1} becomes High, the potential data line switch 104 is turned ON, first terminal side of the capacitor 103 in the pixel 101 connected to the selection line 106-1 (anode side of the light emitting element 102) This is the data voltage applied to 105. As a result, charges corresponding to the data voltage are accumulated in the capacitor 103. The same operation is sequentially performed on the selection signals S _{2 to} S ₁₆₀ . Thus, in one field period, electric charges are sequentially stored in the capacitor 103 in units of rows.

  The operations from the first field to the sixth field are performed for each frame, and FIG. 4 shows the operations in the Mth frame and the (M + 1) th frame.

Data signals, which are signals corresponding to image data, are applied to the data lines 105-1 to 105-1920 in FIG. Here, the description of the data signal D ₁ applied to the data line 105-1 as an example. 4, the data signal is only the data signal D ₁ is shown.

Data signal D ₁ is a gray-scale voltage for the light emitting element 102 during the selection period at a desired luminance, changes the tone defined in synchronization with the selection signal S ₁ to S _480. For example, in the Mth frame, in the first field, the gradation voltage of the data signal 202 changes according to the selection signals S _{1 to} S ₄₈₀ . Although the data signal D ₁ of the first field is a signal based on the image data of M-th frame, in the second field to sixth field following the first field, the same in response to the selection signal S ₁ to S ₄₈₀ Output a signal. That is, in the first field to the sixth field, scanning for one screen is repeated six times based on the same image data. For the (M + 1) th frame, the same operation as the Mth frame is performed based on the image data of the (M + 1) th frame.

The light emitting elements 102 arranged in a matrix form emit light in the first row of light emitting elements 102 → second row of light emitting elements 102 →... → 480th row of light emission in accordance with the selection signals S _{1 to} S _480. As in the element 102, light is emitted sequentially in units of rows. Each light emitting element 102, the selection period is current emission flows corresponding to the voltage difference between the cathode potential of the voltage and the light emitting element 102 of the data signal D _1. After the selection period, the charge accumulated in the capacitor 103 flows into the light emitting element 102 and emits light as afterglow. In one field, light is emitted sequentially (light emission and afterglow in a selected period) like the light emitting element 102 in the first row → the light emitting element 102 in the second row →→→ the light emitting device 102 in the 480th row. To do. This is similarly repeated from the first field to the sixth field. The light emission operation is performed in the same manner for the (M + 1) th frame. In FIG. 4, I _{1 to} I ₄₈₀ indicate the light emitting element currents of the light emitting elements 102 of 480 pixels connected to the data line 105-1.

Next, effects of the present embodiment will be described. For example, it is assumed that the luminous efficiency of the organic EL element exhibits a luminance of 250 cd / m ² at a current density of 2.95 mA / cm ² (direct current). In the conventional display method described with reference to FIGS. 5 and 6, when a peak luminance of 250 cd / m ² is obtained, if a current density in a selection period is set to 1 A / cm ² and a data voltage is set to 15 V, a necessary capacitor The capacitance is 14 pF. At this time, the luminance of all the pixels that emit light during the selection period in one frame is 177 cd / m ² , and the luminance that all the pixels emit as afterglow in one frame is 73 cd / m ² . Even if a capacitor is laid out over the entire area of one pixel, the combined capacitance of the organic EL element and the capacitor is 2.4 pF. In this case, the relative dielectric constant of the organic EL element was 3, the relative dielectric constant of the insulating film of the capacitor was 7.5, and the thicknesses of the organic EL element and the insulating film were both 100 nm. This can only be obtained a luminance of 43cd / ^{m 2.}

Here, since the number of fields N = 6 in this embodiment, the capacity can be reduced to 1/6 when light is emitted at the same 250 cd / m ² as in the conventional driving method. That is, a capacitance of 2.3 pF is sufficient. Therefore, even with a realistic capacitor capacity that can be laid out, in this embodiment, a peak luminance of 250 cd / m ² can be obtained.

  Here, the reason why the number of fields N = 6 will be described. The time required to store charges corresponding to the data voltage in the capacitance of the capacitor was calculated using SPICE simulation under the following conditions. The ON resistance of the organic EL element was 125 kΩ, the parasitic resistance of the data line (for example, the data line 105-1) was 2.3 kΩ, and the parasitic capacitance was 9.5 pF. The parasitic resistance of the selection line (for example, the selection line 106-1) was 61 kΩ, and the parasitic capacitance was 58 pF. Further, assuming that the switch 104 is a p-type low-temperature polysilicon TFT, L / W = 10/15 μm was set. As a result, the time required for charge accumulation was 3.5 μsec. Since the frame frequency is 60 Hz, the selection period when the number of fields N = 6 is 5.8 μsec. Therefore, it is considered that N = 6 is desirable under the conditions of the present embodiment with a slight margin.

  FIG. 7 is a diagram showing the overall configuration of the charge drive type display device according to the first embodiment of the present invention.

  In FIG. 7, 201 is a control circuit, 202 is a storage unit composed of a first frame memory 202-1 and a second frame memory 202-2, 203 is a data driver, 204 is a selection driver, and 205 is a pixel arranged in a matrix. Display panel.

  Image data, horizontal synchronization clock (Hsync), and vertical synchronization clock (Vsync) are input to the control circuit 201. The input image data is alternately input to the first frame memory 202-1, the second frame memory for each frame. 202-2.

  In this embodiment, one frame of the panel display data consists of six fields. For example, first, image data of the nth frame is stored in the first frame memory 202-1. Next, the image data of the nth frame stored in the first frame memory 202-1 is read in each of the six fields and sent to the data line of the panel by the data driver. At the time of this reading, the image data of the (n + 1) th frame is stored in the second frame memory 202-2.

  Next, the image data of the (n + 1) th frame stored in the second frame memory 202-2 is read in each of the six fields and sent to the data line of the panel by the data driver. . At the time of this reading, the image data of the (n + 2) th frame is stored in the first frame memory 202-1. Thus, storage in one frame memory and reading from each field in one frame from the other frame memory are simultaneously performed.

  In FIG. 8, when the number of fields is two and the number of rows of the display panel 205 is 12, the image data input to the control circuit corresponding to any one column and the input to the display panel are displayed. It is a figure which shows the panel display data. In FIG. 8, the number of fields is two for simplification. Numbers 1 to 12 of the image data of the n frame indicate data given to the pixels of the first row to the twelfth row, and numbers 13 to 24 of the image data of the (n + 1) frame are the first row to the twelfth row. Data given to eye pixels is shown. Similarly, numbers 25 to 36 of the image data of the (n + 2) frame indicate data given to the pixels in the first row to the twelfth row.

  FIG. 9 is a diagram showing the overall configuration of a charge drive type display device according to the second embodiment of the present invention.

  In this embodiment, the storage unit is composed of only the frame memory 206.

  In FIG. 10, when the number of fields is two and the number of rows of the display panel 205 is 12, the image data input to the control circuit corresponding to an arbitrary column and the input to the display panel are displayed. It is a figure which shows the panel display data.

  In FIG. 10, the number of fields is two for simplification, and the case where the number of fields is two will be described in the following description.

  For example, first, image data of the nth frame is stored in the frame memory 206. When the data of numbers 1 to 6 is stored in the frame memory 206, data reading from the number 1 is started from the frame memory 206 as the first field. Then, the image data of the nth frame is completely stored in the frame memory 206, and data reading from the number 1 is started from the frame memory 206 as the second field.

  As a second field, data reading from the number 1 is started from the frame memory 206 and the image data of the (n + 1) th frame is stored in the frame memory 206.

  In this way, two fields can be formed in one frame in the same manner as the operation shown in FIG. 8 with one frame memory.

  In the present embodiment, an example of a display device that switches the double speed number according to the luminance mode will be described.

  FIG. 11A is a diagram for explaining the remaining light amount. FIG. 11B is a characteristic diagram showing the relationship between the double speed number and the luminance ratio. The double speed number indicates an integral multiple of the normal speed (the number of fields is 1). For example, a double speed number of 2 indicates that the number of fields is two. The luminance ratio indicates a relative value of luminance with respect to the normal speed (the number of fields is 1).

  As shown in FIG. 11 (b), it increases in proportion to the double speed number. Note that even if the speed is the same, the luminance ratio is small if the remaining light amount ratio is small. As shown in FIG. 11A, the remaining light amount ratio is expressed by the remaining light amount ratio = (light emission amount in the afterglow period) / (light emission amount in the selection period).

  From the characteristics of FIG. 11B, the luminance can be switched by switching the number of double speeds (number of fields). For example, when switching the display to the high brightness mode, the standard brightness mode, and the low brightness mode, the display may be switched to 4 × speed, 2 × speed, or 1 × speed. Note that the number of folds does not necessarily have to be switched to double, and the number of fields may be switched to 3 (triple speed), 2 (double speed), 1 (equal speed).

  FIG. 12 is a diagram showing a circuit configuration for switching the double speed number of the charge drive type display device according to the third embodiment of the present invention.

  As shown in FIG. 12, the luminance mode control circuit 301 includes a luminance mode switching control unit 302 and a clock control unit 303. The luminance mode control circuit 301 and the clock control unit 303 are provided as part of the control circuit 201 shown in FIG. The clock control unit 303 outputs to the data driver 203 and the selection driver 204 a clock that defines the application timing of the selection signal applied to the selection line and the data signal applied to the data line. The luminance mode switching control unit 302 switches the clock frequency of the clock control unit 303 in order to switch the luminance in a plurality of stages. The number of fields is set by switching the clock frequency. When luminance mode commands such as the high luminance mode, standard luminance mode, and low luminance mode are input to the luminance mode control circuit, the luminance mode switching control unit 302 sets the frequency of the display clock (Hsync, Vsync) of the clock control unit 303. Change according to the brightness mode. Based on the changed display clock, the data driver 203 and the selection driver 204 display the image data.

  Various information devices can be configured using the display device of the present invention. The information device is a mobile phone, a mobile computer, a still camera or video camera, a PDA, or the like, or a device having a plurality of these functions.

  These information devices include an information input unit. In the case of a mobile phone, the information input unit includes an antenna. In the case of a PDA or a portable PC, an interface unit for a network is an information input unit. In the case of a still camera or a movie camera, the information input unit includes a sensor unit such as a CCD or CMOS. The present invention can also be applied to a display device such as a television.

  FIG. 13 is a block diagram of a digital still camera equipped with the display device of the present invention. The video of the subject photographed by the photographing unit 112 or the video of the subject recorded in the memory 115 can be signal-processed by the video signal processing circuit 113 and viewed on the display panel 114. The CPU 116 controls the photographing unit 112, the memory 115, the video signal processing circuit 113, and the like by input from the operation unit 117, and performs photographing, recording, reproduction, and display suitable for the situation.

  The present invention is applied to a display device using a light emitting element and a driving method thereof, and particularly to a display device of a current control type light emitting element in which light emission luminance is controlled by a current flowing through the element, such as organic and inorganic EL or LED. Available. For example, the present invention can be used for a display device such as a mobile phone, a mobile computer, a still camera or video camera, an information device such as a PDA, or a display device such as a television.

It is a figure which shows the timing chart of the display apparatus of embodiment which concerns on this invention. It is a figure which shows the capacity | capacitance which a capacitor requires when changing the number of fields based on this invention. 1 is a diagram illustrating a configuration of a charge drive type display device according to a first embodiment of the present invention. FIG. It is a figure which shows the timing chart of the display apparatus of Example 1 which concerns on this invention. It is a figure which shows the structure of the display apparatus of the conventional charge drive system. It is a figure which shows the timing chart of the display apparatus of the conventional charge drive system. 1 is a diagram illustrating an overall configuration of a charge drive type display device according to a first embodiment of the present invention. FIG. When the number of fields is two and the number of display panel rows is 12, the image data input to the control circuit and the panel display data input to the display panel corresponding to any one column FIG. It is a figure which shows the whole structure of the display apparatus of the electric charge drive system of Example 2 which concerns on this invention. When the number of fields is two and the number of rows of the display panel 205 is 12, the image data input to the control circuit and the panel display data input to the display panel corresponding to an arbitrary column FIG. (A) is a figure explaining a residual light quantity, (b) is a characteristic view which shows the relationship between a double speed number and a luminance ratio. It is a figure which shows the circuit structure which switches the double speed number of the charge drive type display apparatus of Example 3 which concerns on this invention. It is a block diagram which shows the structure of the digital camera using the display apparatus of this invention.

Explanation of symbols

101 pixel 102 light emitting element 103 capacitor 104 switch 105 data line 106 selection line

Claims (9)

Pixels having a light emitting element and a driving circuit connected to the light emitting element and causing the light emitting element to emit light are arranged in a matrix,
A plurality of selection lines for applying a selection signal to a row of a plurality of pixels arranged in one direction and a plurality of data lines for applying a data signal to a column of a plurality of pixels arranged in the other direction,
The driving circuit is a display device including a capacitor and a switch that connects the data line and the capacitor by a signal of the selection line,
A storage unit that stores the image data of one frame that displays image data for one screen, and a control circuit that repeatedly outputs the image data stored in the storage unit to a plurality of temporally divided fields; Have
The data signal based on the output image data is output to the data line,
A display device configured to execute transmission of the data signal from the data line to the capacitor and supply of charge from the capacitor to the light emitting element in each of the plurality of fields. In a plurality of fields in the one frame,
The display device according to claim 1, wherein a data signal corresponding to the same image data for one screen is applied to the data line in each field. The control circuit includes one selection period for selecting each selection line of the plurality of selection lines,
The display device according to claim 1, wherein the number of the fields is set so that a voltage corresponding to the data signal is equal to or longer than a time during which the voltage is stored in the charge storage unit. The control circuit switches a luminance to a plurality of stages, and a clock control unit that outputs a clock that defines a timing of applying the selection signal applied to the selection line and the data signal applied to the data line And a luminance mode switching control unit for switching the frequency of the clock for
The display device according to claim 1, wherein the number of fields of the plurality of fields is set by switching the frequency.   5. A video signal processing circuit comprising: the display device according to claim 1; a photographing unit that photographs a subject; and a video signal processing circuit that processes a signal photographed by the photographing unit. A camera characterized in that the video signal processed in step (a) is displayed on the display device. Pixels having a light emitting element and a driving circuit connected to the light emitting element and causing the light emitting element to emit light are arranged in a matrix,
A plurality of selection lines for applying a selection signal to a row of a plurality of pixels arranged in one direction and a plurality of data lines for applying a data signal to a column of a plurality of pixels arranged in the other direction,
The driving circuit is a driving method of a display device including a capacitor and a switch that connects the data line and the capacitor by a signal of the selection line,
One frame for displaying image data for one screen includes a plurality of time-divided fields, and in each of the plurality of fields, transmission of the data signal from the data line to the capacitor; A driving method of a display device, wherein charge is supplied from a capacitor to the light emitting element. In a plurality of fields in the one frame,
7. The method of driving a display device according to claim 6, wherein a data signal corresponding to the same image data for one screen is applied to the data line in each field. One selection period for selecting each selection line of the plurality of selection lines,
8. The method of driving a display device according to claim 6, wherein the number of the fields is determined so that a voltage corresponding to the data signal is equal to or longer than a time during which the voltage is stored in the charge storage unit. The frequency of the clock that defines the timing of application of the selection signal applied to the selection line and the data signal applied to the data line is switched to switch the luminance in a plurality of stages,
The method for driving a display device according to claim 6, wherein the number of fields of the plurality of fields is set by switching the frequency.