JP2010139268A - Pattern light emitting device - Google Patents

Pattern light emitting device Download PDF

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JP2010139268A
JP2010139268A JP2008313598A JP2008313598A JP2010139268A JP 2010139268 A JP2010139268 A JP 2010139268A JP 2008313598 A JP2008313598 A JP 2008313598A JP 2008313598 A JP2008313598 A JP 2008313598A JP 2010139268 A JP2010139268 A JP 2010139268A
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emitting device
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JP5438308B2 (en
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Yukio Sato
幸男 佐藤
Susumu Shibata
進 柴田
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SPACE VISION KK
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a pattern light emitting device for measuring a three-dimensional shape for which working of manufacturing such as wiring is less troublesome. <P>SOLUTION: An LED chip includes an element array having a plurality of string LED elements arranged in a direction perpendicular to an extending direction of the elements. The element array is produced by a semiconductor process. Each of the string LED elements has a p-side electrode 108 extending like a string and the electrodes are separated by element separation grooves 110 from one another. The string LED elements are formed on a common substrate 120 and an n-side electrode 130 commonly used by all of the elements is formed at the lower side of the substrate 120. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、三次元形状計測用のパターン光を発光するパターン光発光装置に関する。   The present invention relates to a pattern light emitting device that emits pattern light for three-dimensional shape measurement.

能動的ステレオ法により対象物表面の各点の三次元位置を計測するシステム(アクティブ・レンジファインダとも呼ばれる)が普及している。この種のシステムでは、対象物表面上の点を特定するために対象物に光を投影し、光が投影された状態の対象物をカメラで撮影する。例えば、光切断法では、レーザ光源などにより形成されるスリット光で対象物を走査する。また、空間コード化法や位相シフト法では、例えば光源と液晶シャッタにより縞模様のパターン光を形成して対象物に投影する。   A system (also called an active range finder) that measures the three-dimensional position of each point on the surface of an object by the active stereo method has become widespread. In this type of system, light is projected onto an object in order to specify a point on the surface of the object, and the object in a state where the light is projected is photographed with a camera. For example, in the light cutting method, an object is scanned with slit light formed by a laser light source or the like. In the spatial encoding method and the phase shift method, for example, a striped pattern light is formed by a light source and a liquid crystal shutter and projected onto an object.

しかしながら、スリット光を走査する方式は走査機構のために光源ユニットが大型化してしまう。また、光源と液晶シャッタによりパターン光を形成する方式でも、光源から液晶シャッタまでにはある程度の距離を空ける必要があるため、光源ユニットの小型化には限界がある。   However, the method of scanning the slit light increases the size of the light source unit due to the scanning mechanism. In addition, even in a method in which pattern light is formed by a light source and a liquid crystal shutter, it is necessary to provide a certain distance from the light source to the liquid crystal shutter.

これに対し、特許文献1には、点光源として機能する発光ダイオード(LED)素子をマトリクス状に配列したパターン光発光装置が開示されている。この装置では、LED素子の列ごとに発光強度を制御することでパターン光を形成する。   On the other hand, Patent Document 1 discloses a pattern light emitting device in which light emitting diode (LED) elements functioning as point light sources are arranged in a matrix. In this apparatus, pattern light is formed by controlling the light emission intensity for each column of LED elements.

特開2002−195812号公報JP 2002-195812 A

しかしながら、点光源として機能するLED素子をマトリクス状に配列した発光装置の場合、製造する際に多数のLED素子を基板に接続する作業が煩雑である。   However, in the case of a light-emitting device in which LED elements that function as point light sources are arranged in a matrix, it is complicated to connect a large number of LED elements to a substrate during manufacturing.

本発明は、三次元形状計測用のパターン光を発光するパターン光発光装置であって、線状の発光層を持つ線状発光ダイオードを、当該線状発光ダイオードの延伸方向に対して直交する方向に、複数個配列してなる発光アレイ部と、前記発光アレイ部の前記各線状発光ダイオードを所定のスイッチングパターンに従ってスイッチングするスイッチング回路と、を備えるパターン光発光装置を提供する。   The present invention relates to a pattern light emitting device that emits pattern light for measuring a three-dimensional shape, in which a linear light emitting diode having a linear light emitting layer is perpendicular to the extending direction of the linear light emitting diode. Further, there is provided a pattern light emitting device comprising a plurality of light emitting array units arranged and a switching circuit for switching each linear light emitting diode of the light emitting array unit according to a predetermined switching pattern.

1つの態様では、前記各線状発光ダイオードの表面に、それぞれ、当該線状ダイオードの延伸方向の略全長にわたって連続した電極が形成されている。   In one aspect, the continuous electrode is formed in the surface of each said linear light emitting diode over the substantially full length of the extending | stretching direction of the said linear diode, respectively.

更に好適な態様では、前記複数の線状発光ダイオードは共通の基板の一方の面上に形成されており、当該基板の他方の面には前記複数の線状発光ダイオードに共通の電極が形成されている。   In a further preferred aspect, the plurality of linear light emitting diodes are formed on one surface of a common substrate, and an electrode common to the plurality of linear light emitting diodes is formed on the other surface of the substrate. ing.

本発明によれば、配線等の製造作業の繁雑さの少ないパターン光発生装置を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the pattern light generator with little complexity of manufacturing work, such as wiring, can be provided.

以下、図面を参照して、この発明に係るパターン光発光装置の実施形態を説明する。   Embodiments of a patterned light emitting device according to the present invention will be described below with reference to the drawings.

この実施形態では、三次元形状計測用のパターン光源として、図1に示すLEDチップ10を用いる。このLEDチップ10は、線状発光ダイオード(以下「LED」)素子100が当該ダイオード100の延伸方向(すなわち線の延びる方向)Pに垂直な方向Qに沿って複数配列されてなる素子アレイを備える。1チップに形成する線状LED素子100の本数は、例えば128本である(ただしこれはあくまで一例に過ぎない)。また線状LED素子100は、例えば、幅約0.2mm及び長さ約10mmである(ただしこれはあくまで一例に過ぎない)。   In this embodiment, the LED chip 10 shown in FIG. 1 is used as a pattern light source for three-dimensional shape measurement. The LED chip 10 includes an element array in which a plurality of linear light emitting diode (hereinafter “LED”) elements 100 are arranged along a direction Q perpendicular to the extending direction P (that is, a line extending direction) P of the diode 100. . The number of linear LED elements 100 formed in one chip is, for example, 128 (however, this is only an example). The linear LED element 100 has, for example, a width of about 0.2 mm and a length of about 10 mm (however, this is only an example).

LEDチップ10の隅の部分Rの上面図を図2に示す。この図に示すように、個々の線状LED素子100は、素子分離溝110により相互に分離されている。線状LED素子100を構成する要素として、上面図である図2では、線状のp側電極108とp型半導体層102の上面が示されている。p側電極108は、線状LED素子100のほぼ全長に渡って連続的に延びており、その端部にワイヤボンディング用のパッド部108aが形成されている。このパッド部108aが、ワイヤボンディングにより制御回路に接続される。   A top view of the corner portion R of the LED chip 10 is shown in FIG. As shown in this figure, the individual linear LED elements 100 are separated from each other by element separation grooves 110. As elements constituting the linear LED element 100, FIG. 2, which is a top view, shows the top surfaces of the linear p-side electrode 108 and the p-type semiconductor layer 102. The p-side electrode 108 extends continuously over almost the entire length of the linear LED element 100, and a pad portion 108a for wire bonding is formed at the end thereof. The pad portion 108a is connected to the control circuit by wire bonding.

図示例では、すべてのラインのp側電極108のパッド部108aが同じ側(図では下側)に設けられているが、これは一例に過ぎない。この代わりに、例えば奇数番目のラインではパッド部108aをラインの上端に設け、偶数番目のラインでは下端に設けるなどと言うように、パッド108aの位置を周期的に上下させてもよい。また、p側電極108の両端にパッド部108aを設け、両方のパッド部108aにそれぞれ同じ電源電圧を印加するようにしてもよい。線状のp側電極108の長手方向にそった各位置での電位は、電源電圧が印加されるパッド部108aからの距離に応じて降下するため発光強度もそれに応じて低下する。p側電極108の両側から電源電圧を印加すれば、片側から印加する場合よりも電極108の各位置での電位の高低差を小さくし、発光強度のばらつきを小さくすることができる。   In the illustrated example, the pad portions 108a of the p-side electrodes 108 of all the lines are provided on the same side (lower side in the figure), but this is only an example. Instead, for example, the pad portion 108a may be provided at the upper end of the odd-numbered line and the lower end of the even-numbered line may be provided at the lower end. Alternatively, pad portions 108a may be provided at both ends of the p-side electrode 108, and the same power supply voltage may be applied to both pad portions 108a. Since the potential at each position along the longitudinal direction of the linear p-side electrode 108 decreases according to the distance from the pad portion 108a to which the power supply voltage is applied, the emission intensity also decreases accordingly. If the power supply voltage is applied from both sides of the p-side electrode 108, the difference in potential at each position of the electrode 108 can be reduced and the variation in emission intensity can be reduced compared to the case where the power supply voltage is applied from one side.

図2におけるAA線に沿った断面のうち4本の線状LED素子100が並んだ部分を図3に示す。図3に示すように、LEDチップ10の基板120は基板120を基礎としている。基板120の材質は特に限定されない。例えばGaAs(ガリウムヒ素)などの材料を用いればよい。   FIG. 3 shows a portion where four linear LED elements 100 are arranged in the cross section taken along the line AA in FIG. As shown in FIG. 3, the substrate 120 of the LED chip 10 is based on the substrate 120. The material of the substrate 120 is not particularly limited. For example, a material such as GaAs (gallium arsenide) may be used.

基板120の一方の面全体に渡ってn側電極130が形成されている。このn側電極130は、全ての線状LED素子10についての共通電極となる。   An n-side electrode 130 is formed over the entire surface of the substrate 120. The n-side electrode 130 is a common electrode for all the linear LED elements 10.

基板120のもう一方の面には、基板120に近い順に、n型半導体層106,発光層104,p型半導体層102が積層形成されている。そして、p型半導体層102の上に線状のp側電極108が複数形成されている。p側電極108は、1つの線状LED素子ごとに1つ設けられる。   On the other surface of the substrate 120, an n-type semiconductor layer 106, a light emitting layer 104, and a p-type semiconductor layer 102 are stacked in the order closer to the substrate 120. A plurality of linear p-side electrodes 108 are formed on the p-type semiconductor layer 102. One p-side electrode 108 is provided for each linear LED element.

n型半導体層106,発光層104及びp型半導体層102は素子分離溝110により素子ごとに分離されている。図示例では、素子分離溝110はp型半導体層102の上面からn型半導体層102の途中までの深さであるが、これは一例に過ぎない。素子分離溝110の深さは、発光層104を完全に切断する深さ以上であればよい。   The n-type semiconductor layer 106, the light emitting layer 104, and the p-type semiconductor layer 102 are separated for each element by an element isolation groove 110. In the illustrated example, the element isolation trench 110 has a depth from the upper surface of the p-type semiconductor layer 102 to the middle of the n-type semiconductor layer 102, but this is only an example. The depth of the element isolation groove 110 may be equal to or greater than the depth at which the light emitting layer 104 is completely cut.

n型半導体層106,発光層104及びp型半導体層102の材質は、本実施形態の構成上特に限定されない。通常LEDに用いられる様々なものを用いることができる。また、n側電極130及びp側電極108は、通常LEDの電極に用いられる材料(例えば金)で形成すればよい。   The materials of the n-type semiconductor layer 106, the light emitting layer 104, and the p-type semiconductor layer 102 are not particularly limited due to the configuration of this embodiment. Various things normally used for LED can be used. The n-side electrode 130 and the p-side electrode 108 may be formed of a material (for example, gold) that is usually used for an LED electrode.

このようなLEDチップ10の製造手順の一例を図4に示す。   An example of the manufacturing procedure of such LED chip 10 is shown in FIG.

(a)まず、ウエハ状の基板120の一方の面に金蒸着などによりn側電極130を形成するとともに、基板120のもう一方の面に、エピタキシャル結晶成長法などの手法により、LED動作層、すなわちn型半導体層106,発光層104及びp型半導体層102を下から(すなわち基板120側から)この順に形成する。   (A) First, an n-side electrode 130 is formed on one surface of a wafer-shaped substrate 120 by gold vapor deposition or the like, and an LED operation layer is formed on the other surface of the substrate 120 by a technique such as an epitaxial crystal growth method. That is, the n-type semiconductor layer 106, the light emitting layer 104, and the p-type semiconductor layer 102 are formed in this order from the bottom (that is, from the substrate 120 side).

(b)次に、p型半導体層102の上面に、金蒸着などの方法により、所定間隔ごとに並んだ複数の線状のp側電極108を形成する。なお、p側電極108を透明電極とすれば、金などの不透明電極を用いる場合よりも、線状LED素子100の発光面積を増大させることができる。透明電極には、公知の透明導電材料を用いればよい。   (B) Next, a plurality of linear p-side electrodes 108 arranged at predetermined intervals are formed on the upper surface of the p-type semiconductor layer 102 by a method such as gold vapor deposition. If the p-side electrode 108 is a transparent electrode, the light emitting area of the linear LED element 100 can be increased as compared with the case where an opaque electrode such as gold is used. A known transparent conductive material may be used for the transparent electrode.

(c)そして、ダイシングカットにより素子分離溝110を形成する。素子分離溝110は、発光層104より深い位置まで形成する。ただし、n側電極130は切断しない。   (C) Then, an element isolation groove 110 is formed by dicing cut. The element isolation trench 110 is formed to a position deeper than the light emitting layer 104. However, the n-side electrode 130 is not cut.

このようにして素子分離を行った後、ウエハ全体に(電極108及び130の部分を除いて)保護膜を形成し、チップサイズごとにカットする。そして、このようにしてできたチップのn側電極130及び各p側電極108を、それぞれワイヤボンディングにより制御回路に接続することで、LEDチップ10が完成する。   After element isolation is performed in this manner, a protective film is formed on the entire wafer (excluding the portions of the electrodes 108 and 130) and cut for each chip size. Then, the LED chip 10 is completed by connecting the n-side electrode 130 and the p-side electrode 108 of the chip thus formed to the control circuit by wire bonding.

次に、このLEDチップ10の発光パターン制御のための構成の一例を、図5を参照して説明する。   Next, an example of a configuration for controlling the light emission pattern of the LED chip 10 will be described with reference to FIG.

図5の例は、位相シフト法による三次元形状計測に利用可能な回路構成である。図では、煩雑さを避けるため、チップ10上の線状LED素子100のうちの16本のみを示している。   The example of FIG. 5 is a circuit configuration that can be used for three-dimensional shape measurement by the phase shift method. In the figure, only 16 of the linear LED elements 100 on the chip 10 are shown to avoid complexity.

各線状LED素子100の一方の端子は電源Vccに接続され、他方の端子はスイッチsw0,sw1,sw2,…,又はsw7を介してグランドに接続されている。各スイッチsw0,sw1,sw2,…,sw7は、それぞれ素子アレイ中の8つごとの素子に接続されている。隣り合うスイッチsw0,sw1,sw2,…,sw7は素子アレイ内の隣り合う素子100に接続されている。例えば、sw0は左から8,16,…8n番目(nは自然数)の素子100に、sw1は左から7,15,…,(8n−1)番目の素子100に、それぞれ接続されている。   One terminal of each linear LED element 100 is connected to the power supply Vcc, and the other terminal is connected to the ground via the switches sw0, sw1, sw2,. Each of the switches sw0, sw1, sw2,..., Sw7 is connected to every eight elements in the element array. The adjacent switches sw0, sw1, sw2,..., Sw7 are connected to the adjacent elements 100 in the element array. For example, sw0 is connected to the 8,100,..., 8nth element 100 (n is a natural number) from the left, and sw1 is connected to the 7,15,..., (8n-1) th element 100 from the left.

各スイッチsw0,sw1,sw2,…,sw7は、制御回路200によりオン・オフ制御される。位相シフト法のためのこれらスイッチのスイッチングパターンの一例を図6(a)に示す   The switches sw0, sw1, sw2,..., Sw7 are on / off controlled by the control circuit 200. An example of the switching pattern of these switches for the phase shift method is shown in FIG.

この例のスイッチングパターンは、4つの時相I,II,III,IVを繰り返す。各時相のパターンは、素子アレイの2ライン(すなわち2素子)ごとに交互にオン・オフされる周期パターンであり、その周期パターンが1時相ごとに1ライン、すなわちπ/2ずつ一方に移動する。例えば、時相Iではスイッチsw0及びsw1とsw4及びsw5とがオンされ残りのスイッチがオフされ、時相IIではスイッチsw1及びsw2とsw5及びsw6とがオンされ残りのスイッチがオフされる。   The switching pattern of this example repeats four time phases I, II, III, and IV. Each time phase pattern is a periodic pattern that is alternately turned on / off every two lines (ie, two elements) of the element array, and the periodic pattern is one line per time phase, ie, π / 2. Moving. For example, in time phase I, switches sw0 and sw1, and sw4 and sw5 are turned on and the remaining switches are turned off. In time phase II, switches sw1 and sw2, sw5 and sw6 are turned on and the remaining switches are turned off.

図6(b)には各時相での素子アレイの発光パターンを、(c)には各時相の発光パターンに応じて平面に投影されるパターン光の投影パターンを示す。発光パターンはラインすなわち隣り合う2つの線状LED素子100を単位とした画然としたオン・オフパターンであるが、それが投影されると、発光自体の広がり等により、オン・オフパターンが鈍ることにより、サインカーブに近い光の強度分布が得られる。   FIG. 6B shows a light emission pattern of the element array in each time phase, and FIG. 6C shows a projection pattern of pattern light projected on a plane according to the light emission pattern in each time phase. The light emission pattern is a distinct on / off pattern in units of lines, that is, two adjacent linear LED elements 100, but when it is projected, the on / off pattern becomes dull due to the spread of the light emission itself. Thus, a light intensity distribution close to a sine curve can be obtained.

位相シフト法では、典型的には、サイン状の強度分布を持つ縞パターン光を対象に投影し、そのパターン光の位相をπ/2ずつずらしながらカメラで撮影し、それら各時相での撮影画像から対象の奥行き情報を得る。図5及び図6に例示した装置は、そのような位相シフト法に利用可能なパターン光を投影することができる。   In the phase shift method, a fringe pattern light having a sine-like intensity distribution is typically projected onto a target, and the pattern light is photographed with a camera while shifting the phase by π / 2, and photographed at each time phase. The depth information of the object is obtained from the image. The apparatus illustrated in FIGS. 5 and 6 can project pattern light that can be used in such a phase shift method.

なお、位相シフト法自体は周知の手法であるので説明は省略する。必要であれば、特開平06−109438号公報、三高良介・濱田長生著「位相シフト法による高速高精度3次元計測技術」松下電工技報(Aug.2002)pp.10-15,2002年8月(http://www.mew.co.jp/tecrepo/78j/pdfs/78_02.pdf)等を参照されたい。   Since the phase shift method itself is a well-known method, description thereof is omitted. If necessary, Japanese Patent Application Laid-Open No. 06-109438, Ryosuke Mitaka and Nagao Hamada “High-speed and high-accuracy three-dimensional measurement technology using the phase shift method” Matsushita Electric Works Technical Report (Aug. 2002) pp.10-15, 2002 Please refer to August (http://www.mew.co.jp/tecrepo/78j/pdfs/78_02.pdf).

以上、この発明の実施形態を説明した。この実施形態のパターン光発生装置は半導体プロセスにより形成される線状LED素子100のアレイなので、点光源のLED素子をマトリックス状に配列した光源よりも製造や配線の煩雑さが少ない。また、個別の点光源のLED素子を多数用いる場合、個々の素子の特性のばらつきにより発光強度分布がラインごとに不規則になるが、本実施形態では半導体プロセスにより形成される線状LED素子100を用いるのでそのようなラインごとのばらつきはすくない。また、n側電極130をすべての線状LED素子100で共用しているので、n側電極130についての配線その他の構成が簡素化できる。   The embodiment of the present invention has been described above. Since the pattern light generator of this embodiment is an array of linear LED elements 100 formed by a semiconductor process, the manufacturing and wiring are less complicated than a light source in which LED elements of point light sources are arranged in a matrix. When a large number of LED elements of individual point light sources are used, the emission intensity distribution becomes irregular for each line due to variations in the characteristics of the individual elements. In this embodiment, the linear LED element 100 formed by a semiconductor process is used. Therefore, such line-by-line variations are not great. In addition, since the n-side electrode 130 is shared by all the linear LED elements 100, wiring and other configurations for the n-side electrode 130 can be simplified.

また、この実施形態では、比較的簡単な配線と制御により、位相シフト法のための発光パターンを生成することができる。   In this embodiment, a light emission pattern for the phase shift method can be generated by relatively simple wiring and control.

なお、上記実施形態のLEDチップ10の適用先は位相シフト法に限られるわけではない。配線とスイッチングロジックが多少複雑にはなるが、空間コード化法のための二進コードパターンやグレイコードパターンも生成可能であることは、当業者ならば容易に理解できるであろう。   In addition, the application destination of the LED chip 10 of the said embodiment is not necessarily restricted to a phase shift method. Those skilled in the art will readily understand that although the wiring and switching logic are somewhat complicated, binary code patterns and gray code patterns for spatial coding methods can also be generated.

実施形態のLEDチップの概略構成を模式的に示す斜視図である。It is a perspective view which shows typically schematic structure of the LED chip of embodiment. 実施形態のLEDチップの部分的な上面図である。It is a partial top view of the LED chip of embodiment. 実施形態のLEDチップの部分的な断面図である。It is a fragmentary sectional view of the LED chip of an embodiment. 実施形態のLEDチップの製造工程の一例を示す図である。It is a figure which shows an example of the manufacturing process of the LED chip of embodiment. 実施形態のLEDチップの発光パターン制御のための構成の一例を示す図である。It is a figure which shows an example of the structure for the light emission pattern control of the LED chip of embodiment. スイッチのオン・オフ制御パターン、これに対応する素子アレイの発光パターン、及び素子アレイから発せられた光の投影パターンを説明するための図である。It is a figure for demonstrating the on / off control pattern of a switch, the light emission pattern of the element array corresponding to this, and the projection pattern of the light emitted from the element array.

符号の説明Explanation of symbols

10 LEDチップ、100 線状LED素子、102 p型半導体層、104 発光層、106 n型半導体層、108 p側電極、110 素子分離溝、120 基板、130 n側電極。   10 LED chip, 100 linear LED element, 102 p-type semiconductor layer, 104 light emitting layer, 106 n-type semiconductor layer, 108 p-side electrode, 110 element isolation groove, 120 substrate, 130 n-side electrode.

Claims (3)

三次元形状計測用のパターン光を発光するパターン光発光装置であって、
線状の発光層を持つ線状発光ダイオードを、当該線状発光ダイオードの延伸方向に対して直交する方向に、複数個配列してなる発光アレイ部と、
前記発光アレイ部の前記各線状発光ダイオードを所定のスイッチングパターンに従ってスイッチングするスイッチング回路と、
を備えるパターン光発光装置。
A pattern light emitting device for emitting pattern light for three-dimensional shape measurement,
A light-emitting array portion formed by arranging a plurality of linear light-emitting diodes having a linear light-emitting layer in a direction orthogonal to the extending direction of the linear light-emitting diodes;
A switching circuit that switches the linear light emitting diodes of the light emitting array unit according to a predetermined switching pattern;
A pattern light emitting device comprising:
前記各線状発光ダイオードの表面に、それぞれ、当該線状ダイオードの延伸方向の略全長にわたって連続した電極が形成されていることを特徴とする請求項1記載のパターン光発光装置。   2. The pattern light emitting device according to claim 1, wherein an electrode is formed on the surface of each linear light emitting diode so as to be continuous over substantially the entire length in the extending direction of the linear diode. 前記複数の線状発光ダイオードは共通の基板の一方の面上に形成されており、当該基板の他方の面には前記複数の線状発光ダイオードに共通の電極が形成されていることを特徴とする請求項2記載のパターン光発光装置。   The plurality of linear light emitting diodes are formed on one surface of a common substrate, and an electrode common to the plurality of linear light emitting diodes is formed on the other surface of the substrate. The patterned light-emitting device according to claim 2.
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