JP2010134498A - Integrated circuit design program, integrated circuit design device and integrated circuit design method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a RAM (Random Access Memory) from being disabled due to a test executed after production of an integrated circuit, to prevent design rework, to reduce the number of tests after the production, and to reduce test cost. <P>SOLUTION: In designing the integrated circuit, a plurality of RAMs are classified into a plurality of groups based on a current consumption value of each RAM, a weighted current consumption value obtained by weighting the current consumption value based on the location of each RAM, or a value obtained by reflecting a distance between elements in the weighted current consumption value. Core noise is analyzed for each group, and it is determined whether or not an obtained power supply drop amount satisfies a predetermined condition. As to the group wherein the power supply drop amount satisfies the predetermined condition, the RAMs included in the group are defined to simultaneously operate. As to the group wherein the power supply drop amount does not satisfy the predetermined condition, a classification condition of the RAMs is changed, and the RAMs are classified again. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an integrated circuit design program, an integrated circuit design apparatus, and an integrated circuit design method.

  2. Description of the Related Art Conventionally, an LSI operation guarantee design system is known as an LSI (Large Scale Integration) design system using a computer. This system generates isolation constraint information that defines a combination of cells to be isolated at the time of layout as an isolation cell set from the cell connection information and the dynamic power consumption value of the cell included in the cell connection information. It has an information generation means and a layout generation means for generating a layout based on the isolation constraint information generated by the isolation constraint information generation means (see, for example, Patent Document 1).

JP 2000-164723 A

  However, in the conventional technology, there is no standard for dividing a plurality of RAMs (Random Access Memory) into a plurality of groups for each RAM operating at the same time. Therefore, the RAMs cannot be appropriately grouped. Therefore, the following problems may occur in tests performed after the integrated circuit is manufactured. When the number of RAMs per group is estimated to be small, the number of groups increases. When it is necessary to perform a test for each group, the number of tests increases as the number of groups increases, and the test cost increases. On the other hand, if the number of RAMs per group is too large, the number of RAMs that operate simultaneously during the test increases, so that the power supply noise of the core part due to the operation of the RAMs increases. As a result, the RAM does not operate normally and the test cannot be performed normally. In this case, since it is necessary to design again, there is a problem that the entire time and cost from the start of design to the end of production increase.

  In this integrated circuit design program, integrated circuit design apparatus, and integrated circuit design method, a plurality of elements are allocated to a plurality of groups based on electrical characteristic values, core noise is analyzed for each group, and the obtained power supply drop amount is predetermined. It is determined whether or not the above condition is satisfied. For a group in which the power drop amount satisfies a predetermined condition, the elements included in the group are elements that are operated simultaneously. On the other hand, for the group in which the power drop amount does not satisfy the predetermined condition, the element distribution condition is changed and the process is repeated from the element distribution. As the electrical characteristic value of the element, a consumption current value, a weighted consumption current value obtained by weighting the consumption current value based on the arrangement position of the element, or a value considering the distance between the elements in the weighted consumption current value can be used. .

  According to the integrated circuit design program, the integrated circuit design apparatus, and the integrated circuit design method, since a plurality of elements are appropriately distributed to groups for each element that operates simultaneously in the design stage, the integrated circuit design program is implemented after the integrated circuit is manufactured. The number of tests can be reduced, and the test cost can be reduced. Moreover, the test can be performed normally. In this case, since it is not necessary to perform the design again, the overall time and cost from the start of design to the end of production can be reduced.

  Exemplary embodiments of an integrated circuit design program, an integrated circuit design apparatus, and an integrated circuit design method will be described below in detail with reference to the accompanying drawings.

(Outline)
FIG. 1 is an explanatory diagram of a configuration of an integrated circuit design apparatus according to an embodiment. As shown in FIG. 1, the integrated circuit design apparatus, for example, at the time of designing an integrated circuit, for example, a current consumption value of a RAM (element), a current consumption value of a RAM in consideration of a RAM arrangement position, or a RAM arrangement position and a RAM A plurality of RAMs are appropriately allocated to groups of RAMs operating simultaneously based on any of the current consumption values considering the distance between them.

(Functional configuration of integrated circuit design equipment)
As illustrated in FIG. 1, the integrated circuit design apparatus includes a selection unit 1, a first distribution unit 2, a second distribution unit 3, a third distribution unit 4, an analysis unit 5, a determination unit 6, a determination unit 7, and a change unit 8. It has. The selection unit 1 selects the first distribution unit 2, the second distribution unit 3, or the third distribution unit 4 based on the distribution of RAM in the chip. The first distribution unit 2 distributes a plurality of RAMs into groups for each RAM that operates simultaneously based on the average current consumption value of the RAMs. The second distribution unit 3 distributes a plurality of RAMs into groups for each RAM that operates simultaneously on the basis of the weighted consumption current value obtained by weighting the average consumption current value of the RAM in consideration of the arrangement position of the RAM. The third distribution unit 4 distributes a plurality of RAMs into groups for each RAM that operates simultaneously, based on the weighted consumption current value in consideration of the distance between the RAMs.

  The analysis unit 5 analyzes the core noise for the group to which the RAM is allocated. For example, the analysis unit 5 creates a core noise analysis model and executes a SPICE simulation to measure a dynamic power drop amount. The determination unit 6 compares the power drop amount of the operating RAM with the minimum guaranteed voltage of the RAM, and determines whether the power drop amount of the operating RAM is within a predetermined range with respect to the minimum guaranteed voltage of the RAM.

  The determination unit 7 determines the RAM allocated to the group determined to be within the predetermined range by the determination unit 6 as the RAM to be operated simultaneously. The changing unit 8 changes the RAM distribution condition for the group determined by the determining unit 6 that the power drop amount of the operation RAM is lower than the minimum guaranteed voltage of the RAM. By changing the distribution condition, the number of RAMs to be operated simultaneously is reduced or the combination is changed. In addition, the changing unit 8 is a RAM that operates simultaneously on the groups determined by the determining unit 6 that the power supply drop amount of the operation RAM has a margin enough to exceed a preset threshold with respect to the minimum guaranteed voltage of the RAM. Add

(Functional configuration of the first distribution unit)
FIG. 2 is an explanatory diagram illustrating a configuration of the first distribution unit. As shown in FIG. 2, the first distribution unit 2 includes a sort processing unit 21, an in-group consumption current calculation unit 22, and a group determination unit 23. The sort processing unit 21 rearranges a plurality of RAMs based on the average current consumption value of the RAMs. For example, the sort processing unit 21 arranges the RAMs in descending order of the average current consumption value. The average consumption current value of the RAM is obtained from consumption current value data 11 which is one of design data.

  The intra-group current consumption calculation unit 22 calculates the total value of the average current consumption of the RAM (allocated RAM) already allocated to the group for each group. The total value of the average current consumption of the group to which the RAM is not allocated is zero. The group determination unit 23 determines a distribution destination group of the distribution target RAM based on the average current consumption value of the RAM. For example, the group determination unit 23 distributes the allocation target RAM having the largest average current consumption value at that time to the group having the smallest total average current consumption value of the allocated RAM.

(Functional configuration of the second distribution unit)
FIG. 3 is an explanatory diagram illustrating a configuration of the second distribution unit. As shown in FIG. 3, the second distribution unit 3 includes a weighting coefficient acquisition unit 31, a weighted consumption current calculation unit 32, a sort processing unit 33, an in-group consumption current calculation unit 34, and a group determination unit 35. The weighting coefficient acquisition unit 31 acquires a weighting coefficient for weighting the average current consumption value of the RAM based on the arrangement position of the RAM in the chip. The RAM arrangement position is obtained from the RAM arrangement coordinate data 12 which is one of the design data. The weighting coefficient is obtained from the weighting coefficient table 13, for example. The weighting coefficient is set based on the occupation ratio of the power mesh inside the chip or the resistance value of the power wiring itself.

  The weighted consumption current calculation unit 32 calculates a weighted consumption current value based on the average consumption current value and the weighting coefficient of the RAM. For example, the weighted consumption current calculation unit 32 multiplies the average consumption current value of the RAM by a weighting coefficient to obtain a weighted consumption current value. The sort processing unit 33 rearranges a plurality of RAMs based on the weighted current consumption values of the RAMs. For example, the sort processing unit 33 arranges the RAMs in descending order of weighted current consumption values.

  The intra-group current consumption calculator 34 calculates the total value of the weighted current consumption of the allocated RAM for each group. The total weighted consumption current of the group to which the RAM is not allocated is zero. The group determination unit 35 determines a distribution destination group of the distribution target RAM based on the weighted consumption current value of the RAM. For example, the group determination unit 35 distributes the allocation target RAM having the largest weighted consumption current value at that time to the group having the smallest total weighted consumption current value of the allocated RAM.

(Functional configuration of the third distribution unit)
FIG. 4 is an explanatory diagram showing the configuration of the third distribution unit. As shown in FIG. 4, the third distribution unit 4 includes a weighting coefficient acquisition unit 41, a weighted consumption current calculation unit 42, a sort processing unit 43, an inter-RAM distance calculation unit 44, an in-group consumption current calculation unit 45, and a group determination unit. 46 is provided. The weighting coefficient acquisition unit 41, the weighted consumption current calculation unit 42, and the sort processing unit 43 are the same as the weighting coefficient acquisition unit 31, the weighted consumption current calculation unit 32, and the sort processing unit 33 of the second distribution unit 3, respectively.

  The inter-RAM distance calculation unit 44 calculates the distance between the allocation target RAM and the allocated RAM for each group. For example, the inter-RAM distance calculation unit 44 calculates the distance between the RAMs based on the RAM arrangement coordinates. The RAM arrangement coordinates are obtained from the RAM arrangement coordinate data 12.

  The intra-group consumption current calculation unit 45 calculates the average of the total of the distance-dependent weighted consumption currents of the allocated RAM based on the weighted consumption current value of the allocated RAM and the distance between the allocation target RAM and the allocated RAM at that time. Calculate the value for each group. The distance-dependent weighted consumption current is a weighted consumption current considering the distance between RAMs. The average value of the total distance-dependent weighted consumption currents of the groups to which RAM is not allocated is zero. The group determination unit 46 determines a distribution destination group of the distribution target RAM based on the average value of the total distance-dependent weighted consumption currents of the RAM. For example, the group determination unit 46 distributes the allocation target RAM having the largest weighted consumption current value at that time to the group having the smallest average value of the distance-dependent weighted consumption currents of the allocated RAMs for the RAM.

(Hardware configuration of computer device)
FIG. 5 is an explanatory diagram of a hardware configuration of the computer apparatus according to the embodiment. As shown in FIG. 5, the computer device includes a computer main body 210, an input device 220, and an output device 230. The computer device can be connected to a network 110 such as a LAN, a WAN, or the Internet via a router or a modem (not shown).

  The computer main body 210 includes a CPU, a storage unit, and an interface. The CPU controls the entire computer device. The storage unit is composed of one or more of ROM, RAM, HD, optical disk 211, and flash memory. The storage unit is used as a work area for the CPU.

  In addition, various programs are stored in the storage unit, and loaded according to instructions from the CPU. In the HD and the optical disk 211, data read / write is controlled by a disk drive. Further, the optical disk 211 and the flash memory are detachable from the computer main body 210. The interface controls input from the input device 220, output to the output device 230, and transmission / reception with respect to the network 110.

  The input device 220 includes a keyboard 221, a mouse 222, a scanner 223, and the like. The keyboard 221 includes keys for inputting characters, numbers, various instructions, and the like, and inputs data. Further, it may be a touch panel type. The mouse 222 performs cursor movement, range selection, window movement, size change, and the like. The scanner 223 optically reads an image. The read image is captured as image data and stored in a storage unit in the computer main body 210. Note that the scanner 223 may have an OCR function.

  Examples of the output device 230 include a display 231, a speaker 232, and a printer 233. The display 231 displays data such as a document, an image, and function information as well as a cursor, an icon, or a tool box. The speaker 232 outputs sounds such as sound effects and reading sounds. The printer 233 prints image data and document data.

  Among the functional units of the integrated circuit design apparatus, the functional unit 21 to 23 of the selection unit 1, the first distribution unit 2, the functional units 31 to 35 of the second distribution unit 3, and the functional units of the third distribution unit 4 41-46, the analysis part 5, the determination part 6, the determination part 7, and the change part 8 make CPU execute the program regarding the said function memorize | stored in the memory | storage part of the computer main body 210, or input / output I / O, for example. The function can be realized by F. The consumption current value data 11, the RAM arrangement coordinate data 12, and the weighting coefficient table 13 are realized by, for example, a storage unit.

(Integrated circuit design procedure)
FIG. 6 is an explanatory diagram of an overall flow of the integrated circuit design process according to the embodiment. The design process shown in FIG. 6 is performed for each RAM satisfying a predetermined constraint that, for example, the operating frequency is the same and the type is the same. That is, RAMs with different operating frequencies and types are not selected as RAMs that operate simultaneously.

  As shown in FIG. 6, when the integrated circuit design process is started, first, the analysis unit 5 selects all RAMs satisfying the constraints as candidates for RAMs to be operated at the same time (step S1). Analysis is performed (step S2). In the core noise analysis, for example, a core noise analysis model is created, and a SPICE simulation is executed to measure a dynamic power drop amount. Next, the determination unit 6 determines the RAM unit drop peak. For example, the power drop amount of the operating RAM is compared with the minimum guaranteed voltage of the RAM, and it is determined whether or not the power drop amount of the operating RAM is within a predetermined range with respect to the minimum guaranteed voltage of the RAM (step S3).

  When the result of the RAM portion drop peak determination is good (step S4: Yes), for example, when the power drop amount of the operation RAM is within a predetermined range with respect to the minimum guaranteed voltage of the RAM, the determination portion 7 All the RAMs determined to be good are determined to be RAMs that are simultaneously operated in a test after manufacture. Thereby, the number of RAMs to be simultaneously operated in the test after manufacture is determined (step S5). Then, a series of design processing ends.

  On the other hand, if the result of the RAM portion drop peak determination is not good (step S4: No), for example, if the power drop amount of the operating RAM is lower than the minimum guaranteed voltage of the RAM, the changing portion 8 changes the RAM distribution condition. (Step S7), the process returns to Step S1. Strictly speaking, when all the RAMs are selected in the first round, since the RAM distribution conditions are not particularly set, the distribution conditions are set in step S7, but here are included in the change of the distribution conditions.

  Returning to step S1, in the second round, the selection unit 1 selects the first distribution unit 2, the second distribution unit 3 or the third distribution unit 4 based on the distribution in the chip of the plurality of RAMs satisfying the constraints. . Then, the selected sorting unit sorts a plurality of RAMs into a plurality of groups, thereby selecting the RAMs to be operated simultaneously for each group (step S1).

  Next, the analysis unit 5 analyzes the core noise for each group (step S2), and measures, for example, the power drop amount. Next, the RAM unit drop peak is determined by the determination unit 6 (step S3). When the result of the RAM portion drop peak determination is good (step S4: Yes), the RAM allocated to the group is simultaneously operated in the test after manufacture by the determination unit 7 for the group determined to be good. Decide on RAM. Thereby, the number of RAMs to be simultaneously operated in the post-manufacturing test is determined for the group determined to be good (step S5).

  On the other hand, if the result of the RAM portion drop peak determination is not good (step S4: No), the RAM allocation condition is changed by the changing unit 8 for the group determined to be not good (step S7), and the process goes to step S1. It returns and repeats from selection of operation | movement RAM on a new distribution condition. As a result, in the third and subsequent rounds, new groups are created by reducing the number of RAMs to be operated simultaneously or changing the combinations of groups for which the RAM section drop peak determination result is not good. .

  In addition to the above-described reason, even if the power drop amount of the operation RAM is equal to or greater than the minimum guaranteed voltage of the RAM, there is a case where there is a margin that exceeds a preset threshold with respect to the minimum guaranteed voltage of the RAM. The determination unit 6 determines that the RAM section drop peak determination result is not good. In that case, the changing unit 8 adds RAM to the group determined to be not good (step S7), and returns to step S1. The above processing is repeated until the distribution for all the RAMs is completed (step S6: No). This iterative process is performed for the remaining RAMs except for the RAMs allocated to the group whose result of the RAM unit drop peak determination is good in step S4. When the distribution of all the RAMs satisfying the restriction is finished (step S6: Yes), a series of design processing is finished.

  FIG. 7 is an explanatory diagram schematically showing how a plurality of RAMs are grouped in the design procedure shown in FIG. FIG. 7 shows an example of a distribution condition in which the entire group or each group is divided into two groups in the first grouping, and the groups are increased one by one in the second and subsequent groupings.

  In FIG. 7, as indicated by reference numeral 51, the whole is divided into two groups A and B. The whole is all the RAMs that satisfy the above-mentioned restrictions. If both the group A and the group B are not good (NG) as a result of the RAM portion drop peak determination, the whole is divided into three groups C, D, and E as indicated by reference numeral 52. As a result of the RAM portion drop peak determination, if all three groups are not good (NG), as shown by reference numeral 53, the whole group F, group G,... It will be divided into many groups until the drop peak judgment is good.

  Further, after the whole is divided into two, if the result of the RAM portion drop peak determination is that group A is good (OK) and group B is not good (NG), as shown by reference numeral 54, the group A operates simultaneously. Only the group B is divided into two groups, Ba and BB. As a result of the determination of the RAM portion drop peak, when both of the group Ba and the group Bb are not good (NG), as shown by reference numeral 55, the group B has three of Bc, Bd, and Be. Divided into two groups. As indicated by reference numeral 56, as in the case of the whole, the group B is further subdivided into more groups until one of the subdivided groups of the group B is satisfactory in the RAM portion drop peak determination. To go.

  In any of the states indicated by reference numerals 52 to 56, if any of the subdivided groups is satisfactory in the RAM portion drop peak determination, the RAM that is simultaneously operated for the group is determined. Then, as indicated by reference numeral 54, only the groups that are not good in the RAM portion drop peak determination are similarly finely grouped. An upper limit may be set for the number of groups to be subdivided. For example, when the upper limit value of the number of groups when subdividing the whole group or each group is set to 4, in the example shown in FIG. If the peak judgment is not satisfactory, the distribution condition is changed and the operation RAM is selected again from the beginning. The distribution conditions are not limited to the above example, and the whole or each group is divided into three or more groups in the first grouping, and the number of groups is increased by two or more in the second and subsequent groupings. Also good.

(Operation RAM selection processing procedure)
FIG. 8 is an explanatory diagram showing the flow of operation RAM selection processing. 9 to 12 are explanatory diagrams showing determination criteria in the operation RAM selection process shown in FIG. As shown in FIG. 8, when the selection process of the operation RAM is started, first, the selection unit 1 determines whether or not the RAM is uniformly distributed in the vertical and horizontal directions of the chip (step S11). For example, it is assumed that the RAM is uniform when the entire chip is present, and is not uniform when the RAM is concentrated on the upper or lower portion of the chip, or on the left or right portion. Specifically, the chip is divided into a plurality of areas in a grid pattern, the RAM arrangement position is obtained from the RAM arrangement coordinate data 12, and the number of RAMs present in each area is counted. If there is no bias in the number of RAMs between regions, it may be uniform, and if there is a bias, it may not be uniform.

  For example, in the example shown in FIG. 9, since the ratio of the number of RAMs existing in the J, K, M, and N areas is 1: 1: 1: 1, it is assumed to be uniform. In the example shown in FIG. 10, since the ratio of the number of RAMs existing in the J, K, M, and N areas is 0: 2: 2: 0 (= 0: 1: 1: 0), it is not uniform. To do. As an example, when the ratio value of the area where the most RAM exists is converted to 1, the remaining area RAM is assumed to be uniform when the existing ratio of the RAM is a predetermined threshold, for example, 0.5 or more. Is not uniform when there is a region where the abundance ratio is smaller than the threshold.

  Returning to FIG. 8, when the RAM is not uniformly distributed in the vertical and horizontal directions of the chip (step S <b> 11: No), the selection unit 1 selects the third distribution unit 4. Thereby, the third distribution unit 4 executes the third distribution process (step S15) and ends the operation RAM selection process. On the other hand, when the RAM is uniformly distributed in the vertical and horizontal directions of the chip (step S11: Yes), the selection unit 1 determines whether the RAM is uniformly distributed on the concentric circles of the chip (step S12). ). For example, it is assumed that the RAM is uniform only when the RAM is concentrated only in the peripheral part or the central part of the chip, and is not uniform when the RAM exists in both the peripheral part and the central part of the chip. Specifically, the chip is concentrically divided into a plurality of areas, the RAM arrangement position is obtained from the RAM arrangement coordinate data 12, and the number of RAMs present in each area is counted. If there is no bias in the number of RAMs between regions, it may be uniform, and if there is a bias, it may not be uniform.

  For example, in the example shown in FIG. 11, the ratio of the number of RAMs present in the P and Q areas is 3: 1. If the ratio value of the area P in which the most RAM is present is converted to 1, the RAM existing ratio in the area Q is 0.33, which is smaller than a predetermined threshold, for example, 0.5, and is not uniform. In the example shown in FIG. 12, since the ratio of the number of RAMs existing in the P and Q areas is 2: 2 (= 1: 1), it is assumed to be uniform.

  Returning to FIG. 8, when the RAM is uniformly distributed on the concentric circles of the chip (step S <b> 12: Yes), the selection unit 1 selects the first distribution unit 2. As a result, the first distribution unit 2 executes the first distribution process (step S13) and ends the operation RAM selection process. On the other hand, when the RAM is not uniformly distributed on the concentric circles of the chip (step S12: No), the selection unit 1 selects the second distribution unit 3. Thereby, the second distribution unit 3 executes the second distribution process (step S14), and ends the operation RAM selection process.

  FIGS. 13, 14, and 15 are explanatory diagrams showing typical RAM arrangement patterns in which the first distribution process, the second distribution process, and the third distribution process are executed, respectively. In the pattern shown in FIG. 13, the RAM is concentrated on only the peripheral portion of the chip. In the pattern shown in FIG. 14, the RAM is arranged in both the peripheral part and the central part of the chip. In the pattern shown in FIG. 15, the RAM is concentrated on the upper or lower part of the chip, or on the left or right part.

(First sort processing procedure)
FIG. 16 is an explanatory diagram showing the flow of the first distribution process. As shown in FIG. 16, when the first distribution process is started, first, the sort processing unit 21 rearranges the RAMs based on the average current consumption value of the RAM acquired from the current consumption value data 11 (step S21). . For example, the sort processing unit 21 arranges the RAMs in descending order of the average current consumption value. Next, the total current consumption (total current value) of the allocated RAM is calculated for each group by the intra-group current consumption calculator 22 and checked (step S22). Initially, since no RAM is allocated to any group, the total value of the average current consumption of each group is zero.

  Next, the group determination unit 23 distributes the allocation target RAM based on the average current consumption value of the RAM (step S23). For example, the group determination unit 23 distributes the allocation target RAM having the largest average current consumption value to the group having the smallest average current consumption value at that time. Initially, since the total value of the average current consumption of each group is zero, a group to be distributed to is selected according to a predetermined rule. Next, the average current consumption value of the RAM allocated in step S23 is added to the total value of the average current consumption of the group by the intra-group current consumption calculation unit 22 (step S24). Then, it is determined whether or not the allocation has been completed for all the RAMs (step S25). If there is any unallocated RAM (step S25: No), the process returns to step S22. When all the RAMs have been distributed (step S25: Yes), the first distribution process is ended.

  FIG. 17 is an explanatory diagram schematically illustrating how the RAM is distributed in the first distribution process illustrated in FIG. 16. For example, assume that the average current consumption values of RAM_a, RAM_b, RAM_c, and RAM_d are 30 mA, 150 mA, 50 mA, and 130 mA, respectively. In this case, the sort processing unit 21 rearranges the RAMs in the order of RAM_b, RAM_d, RAM_c, and RAM_a. Then, as indicated by reference numeral 61 in FIG. 17, in the first round of the first distribution process, RAM_b is distributed to group A, and the total value of the average current consumption of group A is 150 mA. Next, as indicated by reference numeral 62, in the second round of the first distribution process, since the total value of the average current consumption is smaller in group B than in group A, RAM_d is distributed to group B. As a result, the total value of average current consumption of group B is 130 mA.

  Next, as indicated by reference numeral 63, in the third round of the first distribution process, since the total value of the average current consumption is smaller in group B than in group A, RAM_c is distributed to group B. As a result, the total value of the average current consumption of group B is 180 mA. Next, as indicated by reference numeral 64, in the fourth round of the first distribution process, since the total value of the average current consumption is smaller in group A than in group B, RAM_a is distributed to group A. As a result, the total value of the average current consumption of group A and group B is 180 mA. In this way, the RAMs are distributed so that the total average current consumption in the group is substantially the same.

(Second distribution procedure)
FIG. 18 is an explanatory diagram showing the flow of the second distribution process. As shown in FIG. 18, when the second distribution process is started, first, the weighting coefficient acquisition unit 31 acquires the RAM arrangement position in the chip from the RAM arrangement coordinate data 12, and the RAM coefficient from the weighting coefficient table 13. A weighting coefficient corresponding to the arrangement position is acquired. Then, the weighted consumption current calculation unit 32 calculates the weighted consumption current value based on the average consumption current value of RAM and the weighting coefficient acquired from the consumption current value data 11 (step S31). For example, the weighted consumption current calculation unit 32 calculates a value obtained by multiplying the average consumption current value of the RAM by a weighting coefficient to obtain a weighted consumption current value.

  Then, it is determined whether or not the weighted consumption current values have been calculated for all the RAMs (step S32). If there is a RAM that has not been calculated (step S32: No), the process returns to step S31. When the calculation of the weighted consumption current values is completed for all the RAMs (step S32: Yes), the sort processing unit 33 rearranges the RAMs based on the RAM weighted consumption current values (step S33). For example, the sort processing unit 33 arranges the RAMs in descending order of weighted current consumption values. Next, the total current consumption (total current value) of the allocated RAM is calculated for each group by the intra-group current consumption calculator 34 and checked (step S34). Initially, since no RAM is allocated to any group, the total weighted consumption current of each group is zero.

  Next, the group determination unit 35 distributes the allocation target RAM based on the weighted current consumption value of the RAM (step S35). For example, the group determination unit 35 distributes the allocation target RAM having the largest weighted consumption current value to the group having the smallest total weighted consumption current value. Initially, since the total value of the weighted consumption currents of each group is zero, a distribution destination group is selected according to a predetermined rule. Next, the intra-group consumption current calculation unit 34 adds the weighted consumption current value of the RAM distributed in step S35 to the total weighted consumption current value of the group (step S36). Then, it is determined whether or not the allocation has been completed for all the RAMs (step S37). If there is any unallocated RAM (step S37: No), the process returns to step S34. When all the RAMs have been distributed (step S37: Yes), the second distribution process ends.

  FIG. 19 is an explanatory diagram showing regions with different weighting coefficients. In the example shown in FIG. 19, it is assumed that there are power sources on the four sides of the chip. In this case, since the resistance becomes higher near the center of the chip, the weighting coefficient increases in the order of the peripheral area R of the chip, the area T inside thereof, and the central area U of the chip. For example, the weighting coefficients of the region R, the region T, and the region U are 1.0, 1.3, and 1.5, respectively, and the average current consumption values of the RAM_a, RAM_b, RAM_c, and RAM_d are 30 mA, 150 mA, 50 mA, and 130 mA, respectively. RAM_a exists in the region U, RAM_b and RAM_c exist in the region R, and RAM_d exists in the region T. The weighted current consumption values of RAM_a, RAM_b, RAM_c, and RAM_d are 45 mA (= 30 mA × 1.5), 150 mA (= 150 mA × 1.0), 50 mA (= 50 mA × 1.0), and 169 mA (= 130 mA, respectively). Therefore, the sort processing unit 33 rearranges the RAMs in the order of RAM_d, RAM_b, RAM_c, and RAM_a.

  FIG. 20 is an explanatory diagram showing the flow of the third distribution process. As shown in FIG. 20, when the third distribution process is started, first, the RAMs are rearranged based on the weighted consumption current values of the RAMs in the same manner as in Steps S31 to S33 (Steps S41 to S43). . Next, the distance between the RAM to be allocated and the allocated RAM in the group at that time is calculated for each group by the inter-RAM distance calculation unit 44 (step S44). For example, the RAM distance calculation unit 44 calculates the RAM distance based on the RAM arrangement coordinates acquired from the RAM arrangement coordinate data 12. Initially, since no RAM is allocated to any group, it is not necessary to calculate the distance between RAMs.

  Next, the intra-group consumption current calculation unit 45 calculates the distance-dependent weighted consumption current of the allocated RAM based on the weighted consumption current value of the allocated RAM and the distance between the allocation target RAM and the allocated RAM at that time. (Step S45). For example, the intra-group consumption current calculation unit 45 divides the weighted consumption current value of the allocated RAM by the distance between the RAMs, and acquires the distance-dependent weighted consumption current value of the allocated RAM. Then, it is determined whether or not the distance-dependent weighted consumption current values have been calculated for all the RAMs in the group (step S46). If there is a RAM that has not been calculated yet (step S46: No), the process proceeds to step S44. Return. Initially, since no RAM is allocated to any group, it is not necessary to calculate the distance-dependent weighted consumption current value.

  When the calculation of the distance-dependent weighted consumption current value is completed for all the RAMs in the group (step S46: Yes), the group consumption current calculation unit 45 causes the average value of the sum of the distance-dependent weighted consumption currents of the RAMs in the group ( The total current value) is calculated for each group (step S47). Then, it is determined whether or not the total average value (total current value) of the distance-dependent weighted consumption currents has been calculated for all the groups (step S48), and when a group that has not been calculated remains (step S48: No), it returns to step S44. Initially, since no RAM is allocated to any group, it is not necessary to calculate the average value of the distance-dependent weighted consumption currents.

  When the calculation of the total average value (total current value) of the distance-dependent weighted consumption currents for all the groups is completed (step S48: Yes), the group determination unit 46 sets the average value of the distance-dependent weighted consumption currents of the RAM to the average value. Based on this, the allocation target RAM is allocated (step S49). For example, the group determination unit 46 distributes the allocation target RAM having the largest weighted consumption current value at that time to the group having the smallest average value of the distance-dependent weighted consumption currents of the allocated RAM for the RAM. Initially, since the average value of the total of the distance-dependent weighted consumption currents of each group is zero, a distribution destination group is selected according to a predetermined rule. Then, it is determined whether or not the allocation has been completed for all the RAMs (step S50). If there is any unallocated RAM (step S50: No), the process returns to step S44. When all the RAMs have been distributed (step S50: Yes), the third distribution process ends.

  21 and 22 are explanatory diagrams schematically showing how the RAM is distributed in the third distribution process shown in FIG. As shown in FIG. 21, for example, it is assumed that the distance between RAM_a and RAM_b, the distance between RAM_a and RAM_c, and the distance between RAM_a and RAM_d are x2, x3, and x1, respectively. Further, it is assumed that the weighted consumption current values of RAM_b, RAM_c, and RAM_d are y2, y3, and y1, respectively. Then, as shown in FIG. 22, it is assumed that RAM_d is already allocated to group A, and RAM_b and RAM_c are allocated to group B.

In this state, when RAM_a is the allocation target RAM, the group consumption current calculation unit 45 calculates the following equation (1) for the group A, and averages the total of the distance-dependent weighted consumption currents of the group A i1 is obtained, and the following equation (2) is calculated for the group B to obtain an average value i2 of the total of the distance-dependent weighted consumption currents of the group B. The group determination unit 46 allocates RAM_a to the group A when i1 ≦ i2. When i1> i2, RAM_a is allocated to group B.
i1 = y1 / x1 (1)
i2 = (y2 / x2 + y3 / x3) / 2 (2)

(Core noise analysis processing)
Dynamic power supply noise is determined by core noise analysis. In performing the core noise analysis, a core noise analysis model including a power supply package resistance, an inductance, a core power supply resistance, a core power supply capacitance, and a core current source is created. As the core noise analysis model, a simple model in which the layout area of the integrated circuit is divided into a plurality of divided units (power units) and the power supply wiring, the inter-power supply capacity, and the current source are expressed in units of power units may be used. Alternatively, a detailed power supply network model created based on the power supply wiring result and the cell arrangement result may be used.

  FIG. 23 is an explanatory diagram showing a simple model used for core noise analysis. As shown in FIG. 23, the chip layout area 71 is divided into a plurality of power units 72. In FIG. 23, reference numeral 73 is a resistance due to the power supply package, and reference numeral 74 is an inductance due to the power supply package. Further, in the power unit 72, reference numeral 75 is a core power supply resistance, reference numeral 76 is a current source, reference numeral 77 is a capacitance between power supplies, reference numeral 78 is a VDDI noise observation point, and reference numeral 79 is a VSS noise observation point. is there. As the current source, a triangular waveform or a trapezoidal waveform is created from the average current consumption, or a current waveform obtained from a simulation result of a unit cell or RAM alone is used. For the RAM unit, a RAM current source is used. A logic current source is used for the logic unit. The configuration of such a simple model and the core noise analysis using this simple model are the same as in the prior art.

(RAM section drop peak determination processing)
FIG. 24 is an explanatory diagram showing a state of comparison between the power supply drop amount of the operation RAM and the minimum guaranteed voltage of the RAM. In FIG. 24, the lowest voltage trough portion of the power waveform of the operation RAM is compared with the minimum guaranteed voltage of the RAM.

(Procedure from integrated circuit design start to manufacture end)
FIG. 25 is an explanatory diagram showing a flow from the start of integrated circuit design to the end of manufacture. As shown in FIG. 25, first, logical design is performed (step S61). Next, test composition is performed based on information on the number of RAMs determined to be simultaneously operated according to the above-described embodiment (step S62). Next, layout design is performed (step S63), and an integrated circuit is actually manufactured (step S64). Thereafter, the manufactured integrated circuit is tested (step S65). If the number of RAMs that are used simultaneously for test synthesis is not appropriate, the RAM may not operate in the test of step S65, and the test may not be performed normally. However, according to the embodiment, it is possible to appropriately determine the RAM that operates simultaneously at the time of design, and therefore it is possible to prevent the RAM from being in an inoperable state during the test. Therefore, the test can be performed normally.

  The integrated circuit design method described in the present embodiment can be realized by executing a program prepared in advance on a computer such as a personal computer or a workstation. This program is recorded on a computer-readable recording medium such as a hard disk, a flexible disk, a CD-ROM, an MO, and a DVD, and is executed by being read from the recording medium by the computer. The program may be a transmission medium that can be distributed via a network such as the Internet.

  In addition, the integrated circuit design apparatus described in the present embodiment includes a PLD (Programmable) such as a standard cell or a specific application IC (hereinafter simply referred to as “ASIC”) such as a structured ASIC (Application Specific Integrated Circuit). It can also be realized by Logic Device). Specifically, for example, the functions 1 to 8, 21 to 23, 31 to 35, and 41 to 46 of the above-described integrated circuit design apparatus are defined by HDL description, and the HDL description is logically synthesized to ASIC or PLD. By providing, an integrated circuit design apparatus can be manufactured.

  According to the embodiments described above, there are provided an integrated circuit design program, an integrated circuit design apparatus, and an integrated circuit design method capable of reducing the number of tests performed after manufacturing an integrated circuit and reducing the test cost. The Also provided are an integrated circuit design program, an integrated circuit design apparatus, and an integrated circuit design method capable of performing the test normally, thereby reducing the overall time and cost from design to manufacture. .

  According to the embodiment described above, since a plurality of RAMs are appropriately divided into groups for each RAM that operates simultaneously in the design stage, the test performed after the manufacture of the integrated circuit can be performed with a smaller number of times. finish. Therefore, the test cost can be reduced as compared with the case where the number of RAMs per group is estimated to be small. Moreover, since the power supply noise of the core part resulting from the operation of the RAM falls within an allowable range during the test, the RAM operates normally and the test can be performed normally. In this case, since it is not necessary to perform the design again, the overall time and cost from the design to the manufacturing can be reduced.

  The following additional notes are disclosed with respect to the embodiment described above.

(Supplementary note 1) According to a distribution unit that distributes a plurality of elements to a plurality of groups based on electrical characteristic values, an analysis unit that analyzes core noise for each group to which the elements are distributed by the distribution unit, and the analysis unit Determining means for determining whether or not a power drop amount of the element obtained by core noise analysis satisfies a predetermined condition; and for the group determined by the determining means that the power drop amount of the element satisfies a predetermined condition A determination unit that determines the elements included in the group as elements to be operated at the same time, and the element distribution by the distribution unit for the group determined by the determination unit that the power drop amount of the element does not satisfy a predetermined condition It functions as a changing means for changing conditions. Integrated circuit design program to be.

(Additional remark 2) As said distribution means, the said computer, each group obtained by said group consumption current calculation means which calculates the total value of the consumption current of the allocated element for every said group, and said group consumption current calculation means The integrated circuit design program according to appendix 1, wherein the integrated circuit design program is caused to function as a group determination unit that determines a distribution destination group of a distribution target element based on a total value of the current consumption.

(Supplementary Note 3) Weighted consumption current calculation means for weighting the current consumption value of the element based on the arrangement position of the element as the distribution means, and the distributed element obtained by the weighted consumption current calculation means A group consumption current calculation means for calculating the total weighted consumption current for each group, and based on the weighted consumption current total value of each group obtained by the group consumption current calculation means The integrated circuit design program according to appendix 1, wherein the integrated circuit design program is caused to function as group determination means for determining a distribution destination group.

(Additional remark 4) As said distribution means, said computer is weighted consumption current calculation means for weighting the current consumption value of said element based on the arrangement position of said element, and the distance between the distribution target element and the allocated element is said group Based on the element-to-element distance calculation means to calculate for each, the weighted consumption current value of the assigned element obtained by the weighted consumption current calculation means and the element-to-element distance obtained by the element-to-element distance calculation means In-group consumption current calculation means for calculating an average value of the total weighted consumption current considering the distance between elements of each element for each group, and the inter-element distance of each group obtained by the in-group consumption current calculation means Distribution of the distribution target elements based on the average value of the total weighted current consumption considering Integrated circuit design program according to Note 1, characterized in that the functioning of the group determines the group determination unit as.

(Supplementary Note 5) The computer functions as at least two of the distribution means according to Supplementary Note 2, the distribution means according to Supplementary Note 3, and the distribution means according to Supplementary Note 4, and the distribution of the elements The integrated circuit design program according to appendix 1, wherein the integrated circuit design program is made to function as a selection unit that selects any one of the distribution units based on the above.

(Additional remark 6) The distribution part which distributes a some element to a some group based on an electrical property value, The analysis part which analyzes a core noise about each group to which the said element was distributed by the said distribution part, The core noise by the said analysis part A determination unit that determines whether or not a power drop amount of the element obtained by the analysis satisfies a predetermined condition; and the group that is determined by the determination unit that the power drop amount of the element satisfies a predetermined condition A determination unit that determines the elements included in the group as elements to be operated simultaneously, and the determination unit determines that the power drop amount of the elements does not satisfy a predetermined condition. An integrated circuit design apparatus comprising: a changing unit that changes a distribution condition.

(Additional remark 7) The said distribution part is the consumption current calculation part in a group which calculates the total value of the consumption current of the allocated element for every said group, and the said consumption of each said group obtained by the said consumption current calculation part in a group The integrated circuit design device according to appendix 6, further comprising: a group determination unit that determines a distribution destination group of the distribution target element based on a total value of currents.

(Supplementary Note 8) The distribution unit includes a weighted consumption current calculation unit that weights the consumption current value of the element based on the arrangement position of the element, and a weighted consumption of the distributed element obtained by the weighted consumption current calculation unit An intra-group consumption current calculation unit that calculates a total current value for each group, and a distribution destination of the distribution target element based on the total weighted consumption current value of each group obtained by the intra-group consumption current calculation unit The integrated circuit design device according to appendix 6, further comprising: a group determination unit that determines a group.

(Additional remark 9) The said distribution part calculates the distance of the weighting consumption current calculation part which weights the consumption current value of the said element based on the arrangement position of the said element, and the distribution object element and the allocated element for every said group Based on the inter-element distance calculation unit, the weighted consumption current value of the allocated element obtained by the weighted consumption current calculation unit, and the inter-element distance obtained by the inter-element distance calculation unit. An intra-group current consumption calculator that calculates an average value of the total weighted current consumption considering the distance between the elements for each group, and the inter-element distance of each group obtained by the intra-group current consumption calculator. Group determination for determining a distribution destination group of the distribution target element based on an average value of the total weighted current consumption considered If, integrated circuit design apparatus according to note 6, characterized in that it comprises a.

(Supplementary Note 10) The distribution unit according to Supplementary Note 7, including the distribution unit according to Supplementary Note 8, and the distribution unit according to Supplementary Note 9, wherein any one of the distribution units is provided based on the distribution of the elements. The integrated circuit design device according to appendix 6, further comprising a selection unit that selects the distribution unit.

(Additional remark 11) The distribution step which distributes a some element to a some group based on an electrical property value, The analysis step which analyzes a core noise about each group to which the said element was distributed by the said allocation step, The core noise by the said analysis step A determination step of determining whether or not a power drop amount of the element obtained by the analysis satisfies a predetermined condition; and the group in which the power drop amount of the element is determined to satisfy a predetermined condition by the determination step A determination step of determining the elements included in the group as elements to be simultaneously operated, and the determination of the element by the distribution step for the group determined by the determination step that the power drop amount of the elements does not satisfy a predetermined condition Changes to change sorting conditions Integrated circuit design method characterized by comprising Tsu and up, the.

(Additional remark 12) The said distribution step calculates the total value of the consumption current of the distributed element for every said group, and the said consumption of each said group obtained by the said consumption current calculation step in the said group The integrated circuit design method according to appendix 11, further comprising: a group determination step of determining a distribution destination group of the distribution target element based on a total value of currents.

(Additional remark 13) The distribution step includes a weighted consumption current calculation step for weighting the consumption current value of the element based on an arrangement position of the element, and a weighted consumption of the distributed element obtained by the weighted consumption current calculation step. A group current consumption calculation step for calculating a total current value for each group, and a distribution destination of the distribution target element based on the weighted current consumption total value of each group obtained by the group current consumption calculation step The integrated circuit design method according to claim 11, further comprising a group determination step of determining a group.

(Additional remark 14) The said allocation step calculates the distance of the weighting consumption current calculation step which weights the consumption current value of the said element based on the arrangement position of the said element, and the element for distribution, and the allocated element for every said group The inter-element distance calculation step, the weighted consumption current value of the allocated element obtained by the weighted consumption current calculation step, and the inter-element distance obtained by the inter-element distance calculation step, The intra-group consumption current calculation step for calculating the average value of the total weighted consumption current considering the inter-element distance, and the inter-element distance of each group obtained by the intra-group consumption current calculation step. Based on an average value of the total of the weighted consumption currents considered, Integrated circuit design method according to Note 11, characterized in that it comprises a group determining step of determining distribution destination group, the.

(Supplementary Note 15) At least two of the distribution step according to Supplementary Note 12, the distribution step according to Supplementary Note 13, and the distribution step according to Supplementary Note 14, and any one of them based on the distribution of the elements The integrated circuit design method according to claim 11, further comprising a selection step of selecting the distribution step.

It is explanatory drawing which shows the structure of the integrated circuit design apparatus concerning embodiment. It is explanatory drawing which shows the structure of a 1st distribution part. It is explanatory drawing which shows the structure of a 2nd distribution part. It is explanatory drawing which shows the structure of a 3rd distribution part. It is explanatory drawing which shows the hardware constitutions of the computer apparatus concerning embodiment. It is explanatory drawing which shows the flow of the whole integrated circuit design process concerning embodiment. It is explanatory drawing which shows a mode that RAM is grouped. It is explanatory drawing which shows the flow of operation | movement RAM selection processing. It is explanatory drawing which shows the criterion in operation | movement RAM selection processing. It is explanatory drawing which shows the criterion in operation | movement RAM selection processing. It is explanatory drawing which shows the criterion in operation | movement RAM selection processing. It is explanatory drawing which shows the criterion in operation | movement RAM selection processing. It is explanatory drawing which shows the arrangement pattern of the typical RAM in which a 1st distribution process is performed. It is explanatory drawing which shows the arrangement pattern of the typical RAM in which a 2nd distribution process is performed. It is explanatory drawing which shows the arrangement pattern of the typical RAM in which a 3rd distribution process is performed. It is explanatory drawing which shows the flow of a 1st distribution process. It is explanatory drawing which shows typically a mode that RAM is distributed by a 1st distribution process. It is explanatory drawing which shows the flow of a 2nd distribution process. It is explanatory drawing which shows the area | region where a weighting coefficient differs. It is explanatory drawing which shows the flow of a 3rd distribution process. It is explanatory drawing which shows typically a mode that RAM is distributed by a 3rd distribution process. It is explanatory drawing which shows typically a mode that RAM is distributed by a 3rd distribution process. It is explanatory drawing which shows the simple model used for a core noise analysis. It is explanatory drawing which shows the mode of a comparison with the power supply drop amount of operation | movement RAM, and the minimum guarantee voltage of RAM. It is explanatory drawing which shows the flow from the design start of an integrated circuit to completion | finish of manufacture.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Selection part 2,3,4 Distribution part 5 Analysis part 6 Determination part 7 Determination part 8 Change part 22, 34, 45 In-group consumption current calculation part 23, 35, 46 Group determination part 32, 42 Weighted consumption current calculation part 44 Inter-element distance calculator

Claims (7)

Computer
A distribution means for distributing a plurality of elements into a plurality of groups based on electrical characteristic values;
Analyzing means for analyzing core noise for each group to which the elements are distributed by the distributing means;
Determining means for determining whether or not the power drop amount of the element obtained by the core noise analysis by the analyzing means satisfies a predetermined condition;
A determining unit that determines, by the determining unit, an element that simultaneously operates the elements included in the group for the group in which the power drop amount of the element is determined to satisfy a predetermined condition;
Changing means for changing the element distribution condition by the distribution means for the group determined by the determination means that the power drop amount of the element does not satisfy a predetermined condition;
An integrated circuit design program characterized by functioning as As the distribution means, the computer is
In-group consumption current calculation means for calculating a total value of consumption current of the allocated elements for each group,
Group determination means for determining a distribution destination group of elements to be distributed based on a total value of the current consumption of each group obtained by the current consumption calculation means in the group;
The integrated circuit design program according to claim 1, wherein the integrated circuit design program is made to function as: As the distribution means, the computer is
Weighted consumption current calculation means for weighting the consumption current value of the element based on the arrangement position of the element;
In-group consumption current calculation means for calculating a total value of weighted consumption currents of allocated elements obtained by the weighted consumption current calculation means for each group,
Group determination means for determining a distribution destination group of the distribution target element based on a total value of the weighted consumption currents of the groups obtained by the in-group consumption current calculation means;
The integrated circuit design program according to claim 1, wherein the integrated circuit design program is made to function as: As the distribution means, the computer is
Weighted consumption current calculation means for weighting the consumption current value of the element based on the arrangement position of the element;
Inter-element distance calculation means for calculating the distance between the distribution target element and the allocated element for each group,
Weighting considering the inter-element distance of the allocated element based on the weighted consumption current value of the allocated element obtained by the weighted consumption current calculation means and the inter-element distance obtained by the inter-element distance calculation means In-group consumption current calculation means for calculating an average value of the total consumption current for each group,
Group determination means for determining a distribution destination group of the distribution target elements based on an average value of a total of weighted consumption currents in consideration of the distance between the elements of each group obtained by the intra-group consumption current calculation means;
The integrated circuit design program according to claim 1, wherein the integrated circuit design program is made to function as: The computer,
And functioning as at least two of the distribution means according to claim 2, the distribution means according to claim 3, and the distribution means according to claim 4,
Selection means for selecting any one of the sorting means based on the distribution of the elements;
The integrated circuit design program according to claim 1, wherein the integrated circuit design program is made to function as: A distribution unit that distributes a plurality of elements into a plurality of groups based on electrical characteristic values;
An analysis unit that analyzes core noise for each group to which the elements are distributed by the distribution unit;
A determination unit that determines whether or not the power drop amount of the element obtained by the core noise analysis by the analysis unit satisfies a predetermined condition;
A determination unit that determines, as the element that simultaneously operates the elements included in the group, for the group that is determined by the determination unit that the power drop amount of the element satisfies a predetermined condition;
A change unit for changing the element distribution condition by the distribution unit for the group determined by the determination unit that the power drop amount of the element does not satisfy a predetermined condition;
An integrated circuit design apparatus comprising: A distribution step of distributing a plurality of elements into a plurality of groups based on electrical characteristic values;
An analysis step of analyzing core noise for each group to which the elements are distributed by the distribution step;
A determination step of determining whether or not the power drop amount of the element obtained by the core noise analysis in the analysis step satisfies a predetermined condition;
A determination step of determining, as the element that simultaneously operates the elements included in the group, for the group determined by the determination step that the power drop amount of the element satisfies a predetermined condition;
A change step of changing the element distribution condition by the distribution step for the group determined by the determination step that the power drop amount of the element does not satisfy a predetermined condition;
An integrated circuit design method comprising:

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