JP2010129576A5 - Stacked semiconductor device and method of manufacturing stacked semiconductor device - Google Patents
Stacked semiconductor device and method of manufacturing stacked semiconductor device Download PDFInfo
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- JP2010129576A5 JP2010129576A5 JP2008299401A JP2008299401A JP2010129576A5 JP 2010129576 A5 JP2010129576 A5 JP 2010129576A5 JP 2008299401 A JP2008299401 A JP 2008299401A JP 2008299401 A JP2008299401 A JP 2008299401A JP 2010129576 A5 JP2010129576 A5 JP 2010129576A5
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Claims (18)
前記二つの半導体基板の少なくとも一方から他方に向けて突出して設けられた識別部とを含み、
前記識別部の突出量は、接合後において他方の前記半導体基板に当接しない大きさに設定されている積層半導体装置。 Two semiconductor substrates joined in an overlapping manner;
And an identification portion projecting from at least one of the two semiconductor substrates toward the other,
The stacked semiconductor device in which the protrusion amount of the identification portion is set to a size that does not abut on the other semiconductor substrate after bonding.
前記識別部が設けられた前記接合面からの前記識別部の高さは、接合された前記二つの半導体基板の間隔の大きさ以下である請求項１に記載の積層半導体装置。 A terminal portion disposed between the bonding surfaces of the two semiconductor substrates and electrically connecting the two semiconductor substrates;
2. The stacked semiconductor device according to claim 1, wherein a height of the identification portion from the junction surface on which the identification portion is provided is equal to or less than a size of a distance between the two joined semiconductor substrates.
前記識別部が設けられた前記接合面からの前記識別部の高さは、前記バンプが設けられた前記接合面からの前記バンプの高さ以下である請求項３に記載の積層半導体装置。 The terminal portion has a bump disposed on at least one bonding surface of the two semiconductor substrates,
4. The stacked semiconductor device according to claim 3, wherein a height of the identification portion from the junction surface on which the identification portion is provided is equal to or less than a height of the bump from the junction surface on which the bump is provided.
前記識別部が設けられた前記接合面からの前記識別部の高さは、前記第１バンプが設けられた前記接合面からの前記第１バンプの高さと、前記第２バンプが設けられた前記接合面からの前記第２バンプの高さとの合計以下である請求項３に記載の積層半導体装置。 The terminal portion has a first bump disposed on the bonding surface of one of the semiconductor substrates of the two semiconductor substrates, and a second bump disposed on the bonding surface of the other semiconductor substrate.
The height of the identification unit from the joint surface provided with the identification unit is the height of the first bump from the joint surface provided with the first bump, and the height at which the second bump is provided. The stacked semiconductor device according to claim 3, which is equal to or less than the sum of the height of the second bumps from the bonding surface.
前記識別部が設けられた前記接合面からの前記識別部のそれぞれの高さの合計は、前記第１バンプ及び前記第２バンプの高さの合計以下である請求項５に記載の積層半導体装置。 The identification unit is provided on the bonding surface of both of the two semiconductor substrates,
6. The stacked semiconductor device according to claim 5, wherein the sum of the heights of the identification portions from the joint surface on which the identification portions are provided is equal to or less than the sum of the heights of the first bumps and the second bumps. .
前記識別部が設けられた前記接合面からの前記識別部のそれぞれの高さの合計は、接合された前記二つの半導体基板の間隔の大きさ以下である請求項２から６のいずれか一項に記載の積層半導体装置。 The identification unit is provided on the bonding surface of both of the two semiconductor substrates,
The total of each height of the said identification part from the said joint surface in which the said identification part was provided is below the magnitude | size of the space | interval of the two said semiconductor substrates joined. The stacked semiconductor device according to claim 1.
前記識別部が設けられた前記接合面からの前記周縁部の高さは、接合された前記二つの半導体基板の間隔の大きさ以下である請求項２から７のいずれか一項に記載の積層半導体装置。 The identification unit includes an identification mark and a peripheral edge protruding from the peripheral edge of the identification mark,
The lamination according to any one of claims 2 to 7, wherein the height of the peripheral portion from the bonding surface provided with the identification portion is equal to or less than the size of the distance between the two bonded semiconductor substrates. Semiconductor device.
前記二つの半導体基板の間に、前記二つの半導体基板を電気的に接続する端子部を形成する端子部形成工程と、
前記二つの半導体基板を互いに重ねて接合する接合工程とを有し、
前記接合工程、前記識別形成工程、および、前記端子部形成工程の少なくとも一つの工程において、前記識別部が設けられる前記接合面からの前記識別部の高さを、相対的に、前記端子部によって形成される前記二つの半導体基板の間隔の大きさ以下にする積層半導体装置の製造方法。 An identification forming step of forming an identification portion on at least one bonding surface of two semiconductor substrates;
A terminal portion forming step of forming a terminal portion electrically connecting the two semiconductor substrates between the two semiconductor substrates;
And bonding the two semiconductor substrates in an overlapping manner.
In at least one of the bonding step, the identification forming step, and the terminal portion forming step, the height of the identification portion from the joint surface on which the identification portion is provided is relatively determined by the terminal portion A method of manufacturing a stacked semiconductor device, wherein the size of the distance between the two semiconductor substrates to be formed is equal to or less than that of the two semiconductor substrates.
前記接合工程、前記識別形成工程、および、前記端子部形成工程の少なくとも一つの工程において、前記識別部が設けられた前記接合面からの前記識別部の高さを、相対的に前記バンプが設けられた前記接合面からの前記バンプの高さ以下にする請求項１１に記載の積層半導体装置の製造方法。 In the terminal portion forming step, bumps are formed on at least one of the bonding surfaces of the two semiconductor substrates,
In at least one of the bonding step, the identification forming step, and the terminal portion forming step, the bump is relatively provided with respect to the height of the identification portion from the junction surface on which the identification portion is provided. The method for manufacturing a stacked semiconductor device according to claim 11, wherein the height is made equal to or less than the height of the bump from the bonding surface.
前記接合工程、前記識別形成工程、および、前記端子部形成工程の少なくとも一つの工程において、前記識別部が設けられた前記接合面からの前記識別部の高さを、相対的に、前記第１バンプが設けられた前記接合面からの前記第１バンプの高さと、前記第２バンプが設けられた前記接合面からの前記第２バンプの高さとの合計以下にする請求項１１に記載の積層半導体装置の製造方法。 In the terminal portion forming step, a first bump is formed on the bonding surface of one of the two semiconductor substrates of the semiconductor substrate, and a second bump is formed on the bonding surface of the other of the semiconductor substrates.
In at least one of the bonding step, the identification formation step, and the terminal portion formation step, the height of the identification portion relative to the junction surface on which the identification portion is provided is set relatively to the first portion. The lamination according to claim 11, wherein the sum of the height of the first bump from the joint surface on which the bump is provided and the height of the second bump from the joint surface on which the second bump is provided is equal to or less than 12. Semiconductor device manufacturing method.
前記接合工程、前記識別形成工程、および、前記端子部形成工程の少なくとも一つの工程において、前記識別部が設けられた前記接合面からの前記識別部のそれぞれの高さの合計を、相対的に、前記第１バンプ及び前記第２バンプの高さの合計以下にする請求項１３に記載の積層半導体装置の製造方法。 In the identification forming step, the identification portion is formed on the bonding surface of both of the two semiconductor substrates,
In at least one of the bonding step, the identification formation step, and the terminal portion formation step, the total height of the identification portions from the joint surface on which the identification portion is provided is relatively determined. The method of manufacturing a stacked semiconductor device according to claim 13, wherein the total height of the first bump and the second bump is equal to or less than the total height of the first bump and the second bump.
前記接合工程、前記識別形成工程、および、前記端子部形成工程の少なくとも一つの工程において、前記識別部が設けられた前記接合面からの前記周縁部の高さを、相対的に、接合された前記二つの半導体基板の間隔の大きさ以下にする請求項１１から１４のいずれか一項に記載の積層半導体装置の製造方法。 The identification unit has an identification and a peripheral edge protruding from the peripheral edge of the identification;
In at least one of the bonding step, the identification forming step, and the terminal portion forming step, the height of the peripheral portion from the bonding surface provided with the identification portion is relatively joined. The method of manufacturing a stacked semiconductor device according to any one of claims 11 to 14, wherein the distance is equal to or less than the distance between the two semiconductor substrates.
二つの半導体基板の少なくとも一方から他方に向けて突出した識別部を設ける段階と、
前記二つの半導体基板を重なり合わせて接合する段階とを含み、
前記識別部の突出量は、他方の前記半導体基板に当接しない大きさに設定されている積層半導体装置の製造方法。 Two semiconductor substrates joined in an overlapping manner;
Providing an identification portion projecting from at least one of the two semiconductor substrates toward the other;
And overlapping and joining the two semiconductor substrates,
A method of manufacturing a stacked semiconductor device, wherein an amount of projection of the identification portion is set to a size that does not abut on the other of the semiconductor substrates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008299401A JP2010129576A (en) | 2008-11-25 | 2008-11-25 | Lamination semiconductor substrate, and method of manufacturing lamination semiconductor substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008299401A JP2010129576A (en) | 2008-11-25 | 2008-11-25 | Lamination semiconductor substrate, and method of manufacturing lamination semiconductor substrate |
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| Publication Number | Publication Date |
|---|---|
| JP2010129576A JP2010129576A (en) | 2010-06-10 |
| JP2010129576A5 true JP2010129576A5 (en) | 2012-07-12 |
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| JP2008299401A Pending JP2010129576A (en) | 2008-11-25 | 2008-11-25 | Lamination semiconductor substrate, and method of manufacturing lamination semiconductor substrate |
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| JP5939184B2 (en) | 2013-03-22 | 2016-06-22 | ソニー株式会社 | Manufacturing method of semiconductor device |
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| JP4063944B2 (en) * | 1998-03-13 | 2008-03-19 | 独立行政法人科学技術振興機構 | Manufacturing method of three-dimensional semiconductor integrated circuit device |
| JP4321897B2 (en) * | 1999-02-25 | 2009-08-26 | 株式会社小松製作所 | Semiconductor die |
| JP2001217387A (en) * | 2000-02-03 | 2001-08-10 | Rohm Co Ltd | Semiconductor device and method of manufacturing the same |
| JP4659660B2 (en) * | 2006-03-31 | 2011-03-30 | Ｏｋｉセミコンダクタ株式会社 | Manufacturing method of semiconductor device |
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