JP2010124302A - Multichannel receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent increase in circuit scale when a plurality of A/D conversion parts are prepared and increase in speed of a clock signal supplied to the A/D conversion part, in a multichannel receiver for receiving signals of plural frequency bands. <P>SOLUTION: The multichannel receiver 1 includes: an A/D conversion part 12 for A/D converting a reception signal composed of signals of plural frequency bands; a clock generation part 14 for controlling the frequency of a clock supplied to the A/D conversion part 12 to a predetermined value in accordance with the frequency arrangement of desired signals of plural frequency bands to output the clock; and a demodulation part 13 for simultaneously reproducing a plurality of data by extracting the desired signals of plural frequency bands from the output of the A/D conversion part 12. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a multi-channel receiving apparatus that simultaneously demodulates only signals of a plurality of desired bands from among received signals composed of signals of a large number of bands.

  A general single channel receiving apparatus takes out only a signal of one desired band from a received signal composed of signals of a large number of bands in an analog section, and inputs the output to an A / D conversion section. Then, the digitized signal is input to the demodulator to reproduce desired data. Conventionally, multi-channel receivers that receive signals in a plurality of bands are often realized by including a plurality of analog units, A / D conversion units, and demodulation units. However, in such a configuration including a plurality of analog units, A / D conversion units, and demodulation units, there is a problem that the circuit scale increases and the cost increases.

  In order to solve this problem, by providing an A / D converter corresponding to a high-speed clock signal, the received signal is digitized over the entire band, and a signal in each band is separated by a demodulator. A method for receiving signals in a plurality of bands has been proposed (see, for example, Patent Document 1). As a result, only one A / D conversion unit is provided, and the analog unit is further simplified to enable reception of signals in a plurality of bands.

JP-T-2005-504468

  However, for example, in order to A / D convert a signal whose entire band extends over 300 MHz, such as terrestrial digital broadcasting, the A / D converter must be operated with a high-speed clock signal of 600 MHz. Realizing such an A / D conversion unit corresponding to a high-speed clock signal while maintaining a certain level of performance requires a very advanced technology, which increases the cost. In addition, there is a new problem that it is very difficult to stably supply such a high-speed clock signal to the A / D converter while suppressing jitter and the like.

  The present invention has been made to solve the above-described problems. In a multi-channel receiving apparatus that receives signals of a plurality of bands, an increase in circuit scale by including a plurality of A / D conversion units, and A / The object is to suppress the speeding up of the clock signal supplied to the D converter.

  The multi-channel receiving apparatus according to the present invention provides a desired frequency of A / D conversion means for A / D conversion of a reception signal composed of signals in a plurality of bands, and a desired clock frequency supplied to the A / D conversion means. According to the frequency arrangement of signals in a plurality of bands, a signal in a desired plurality of bands is extracted from the output of the clock generation means and A / D conversion means that are controlled to a predetermined frequency and output, and a plurality of data are reproduced simultaneously. A demodulating means is provided.

  As an effect of the present invention, the clock generation unit controls the frequency of the clock signal to a predetermined value according to the frequency arrangement of signals in a desired plurality of bands and supplies the clock signal to the A / D conversion unit (A / D conversion unit). Therefore, it is possible to suppress an increase in the speed of the clock signal supplied to the A / D converter, and it is possible to avoid unstable supply due to an increase in energy consumption, cost, jitter, and the like. Further, since only one A / D conversion unit is used, there is no need to increase the circuit scale, and it is possible to suppress an increase in cost in this respect.

  Hereinafter, the present invention will be specifically described with reference to the drawings showing embodiments thereof.

<Embodiment 1>
FIG. 1 is a block diagram showing a configuration of a multi-channel receiving apparatus 1 using an OFDM (Orthogonal Frequency-Division Multiplexing) system according to Embodiment 1 of the present invention apparatus. As shown in FIG. 1, an analog unit 11 to which a received signal is input is provided, and an output unit of the analog unit 11 is an A / D converter (A / D conversion means) 12. The A / D converter 12 is a clock that is output by controlling the frequency of the clock supplied to the A / D converter 12 to a predetermined frequency according to the frequency arrangement of signals in a desired plurality of bands. An output unit of a generation unit (clock generation unit) 14 is also connected, and the output unit of the A / D conversion unit 12 takes out signals of a desired plurality of bands from the output of the A / D conversion unit 12 and outputs a plurality of data. It is connected to a demodulator (demodulator) 13 that reproduces simultaneously. The demodulator 13 outputs data # 1, data # 2,..., Data #n.

  FIG. 2 is a block diagram showing a configuration of the analog unit 11. An amplifier 111 to which a received signal is input is provided, and an output unit of the amplifier 111 is connected to an input unit of the frequency shift unit 112. The output unit of the frequency shift unit 112 is connected to the input unit of the MBPF (multiband pass filter) unit 113, and the output unit of the MBPF unit 113 serves as the output unit of the analog unit 11.

  FIG. 4 is a block diagram showing the configuration of the MBPF unit 113 described above. The input unit to the MBPF unit 113 is connected to a plurality of BPF (band bus filter) units 11311, 11312,..., 1131n connected in parallel, and the output unit of each BPF unit is connected to the signal synthesis unit 1132. The output unit of the signal synthesis unit 1132 becomes the output unit of the MBPF unit 113.

  FIG. 3 is a block diagram showing a configuration of the demodulator 13. As shown in FIG. 1, the output part of the A / D converter 12 is connected to the input part of the demodulator 13, and the input part of the demodulator 13 is a plurality of resampler parts connected in parallel as shown in FIG. (Resample means) 1311, 1312, ..., 131n. The output unit of the resampler unit 1311 is connected to the input unit of the baseband conversion unit 1321, and the output unit of the baseband conversion unit 1321 is connected to the input unit of the LPF (low-pass filter) unit 1331. The output unit of the LPF unit 1331 is connected to the input unit of the FFT unit 1341, and the output unit of the FFT unit 1341 is connected to the input unit of the transmission path correction unit 1351. The output unit of the transmission path correction unit 1351 is connected to the input unit of the demapping unit 1361, and the output unit of the demapping unit 1361 is an output unit of the demodulation unit 13.

  Similarly to the resampler unit 1311, the resampler unit 1312 is connected in the order of a baseband conversion unit 1322, an LPF unit 1332, an FFT unit 1342, a transmission path correction unit 1352, and a demapping unit 1362. Similarly, the resampler unit 1313,..., And the resampler unit 131n are similarly connected to the demapping units 1363,. Therefore, the output unit of the demodulation unit 13 is an output unit of the demapping unit 1361, the demapping unit 1362, ..., the demapping unit 136n.

  Next, the operation of multichannel receiving apparatus 1 according to the present embodiment will be described.

  In FIG. 1, a reception signal composed of signals in a plurality of bands is subjected to analog signal processing in an analog unit 11 and input to an A / D conversion unit 12. The signal digitally converted by the A / D converter 12 is input to the demodulator 13 and separated by the demodulator 13 for each band, and data is reproduced at the same time. Further, the clock generation unit 14 controls the frequency of the clock signal to a predetermined value in accordance with the frequency arrangement of signals in a desired plurality of bands, and supplies the clock signal to the A / D conversion unit 12.

  Next, the operation inside the analog unit 11 will be described with reference to FIG. The received signal is input to the amplifier 111, the gain is adjusted so that the signal has a desired signal power, and is output to the frequency shift unit 112. The frequency shift unit 112 converts the center frequency of the received signal into a desired frequency. The signal output from the frequency shift unit 112 is input to an MBPF (multiband pass filter) unit 113, and the MBPF unit 113 passes only a plurality of band signals out of a large number of band signals.

  That is, the analog unit 11 suppresses a part of the band of the reception signal composed of signals of a plurality of bands, and outputs only a limited plurality of bands of signals to the A / D converter 12. It becomes a means. Further, the analog unit 11 may control the pass band and the suppression band so that the band through which the received signal is passed and the band to be suppressed are a combination of certain predetermined bands.

  Next, the operation of the demodulator 13 will be described with reference to FIG. The signal digitized by the A / D conversion unit 12 is input to the resampler units 1311 to 131n, and the received signal is converted into a signal of a desired sample rate. That is, sample rate conversion is performed. The outputs of the resamplers 1311 to 131n are input to baseband converters 1321 to 132n, the center frequency of the signal in the band to be received is shifted to the baseband frequency, and the LPF (low pass filter) unit is used as a complex baseband signal of I and Q. It is output to 1331-133n. In the LPF units 1331 to 133n, unnecessary signal components other than the baseband region are suppressed, and only desired signals in the baseband region are extracted and output to the FFT units 1341 to 134n. In the FFT units 1341 to 134n, the input I and Q baseband signals are converted from time-axis signals to frequency-axis signals, and the results are output to the transmission path correction units 1351 to 135n.

  In the transmission path correction units 1351 to 135n, the degradation due to the transmission path is estimated from the input frequency axis signal, and signals corrected for the degradation are supplied to the demapping units 1361 to 136n. In the demapping units 1361 to 136n, the received data is restored from the input signal based on the modulation multilevel number such as BPSK, QPSK, and 16QAM in the received signal. As shown in FIG. 3, the resampler units 1311 to 131n, the baseband conversion units 1321 to 132n, the LPF units 1331 to 133n, the FFT units 1341 to 134n, the transmission path correction units 1351 to 135n, and the demapping units 1361 to 136n, By connecting the series so as to have a plurality of pairs in parallel, signals in a plurality of bands can be demodulated simultaneously.

  Here, the MBPF unit 113 in the analog unit 11 does not have to suppress all unnecessary band signals. Moreover, it is good also as a structure which can vary the band to pass by the band of desired multiple signals. Furthermore, as shown in FIG. 4, the MBPF unit 113 may include a plurality of BPF (band pass filter) units 11311 to 1131n and a signal synthesis unit 1132 that synthesizes these output signals. That is, a plurality of BPF units 11311 to 1131n that allow different frequency components to pass through, and a signal synthesis unit 1132 that synthesizes a plurality of output signals of the plurality of BPF units 11311 to 1131n. With such a configuration, a desired band can be selected more flexibly by a combination of the frequency width shifted by the frequency shift unit 112 and the band setting passed by the MBPF unit 113.

  Further, as shown in FIG. 5, the relationship between the frequency of the clock supplied from the clock generator 14 to the A / D converter 12 and the signal of the desired band is an undersample relationship, as shown in FIG. May be mixed together. With this configuration, the clock generator 14 can set the frequency of the clock signal supplied to the A / D converter 12 to be lower. Further, in this case, as shown by the band signal C in FIG. 5, the signal component is reversed, that is, a band signal whose frequency is reversed due to aliasing distortion is input. For this reason, the demodulating unit 13 has a function of inverting such a signal component once more and normally reproducing data of the band signal before the original frequency level is reversed.

  Further, as shown in FIG. 6, the demodulator 13 may be configured to use a common output 1311 of the resampler unit in a system that reproduces a plurality of desired band signals. In this case, since the sample rate is common in the systems that receive the signals of the respective bands, it is possible to use a common clock signal in each part of the demodulator 13. As this clock signal, use a clock with a frequency several times higher than the required clock frequency, and process in each block of the system that receives the signal of each band is not parallel processing but serial processing that shares each block. Therefore, the circuit can be greatly reduced.

  As an effect of the present invention, the clock generation unit 14 controls the frequency of the clock signal to a predetermined value according to the frequency arrangement of the signals of a plurality of desired bands and supplies the clock signal to the A / D conversion unit 12. The increase in the speed of the clock signal supplied to the A / D conversion unit 12 can be suppressed, and unstable supply due to an increase in energy consumption, cost, jitter, and the like can be avoided.

  In addition, since only one A / D converter 12 is used to receive signals in a plurality of bands, the circuit scale can be greatly reduced, and the analog unit 11 can suppress unnecessary signals to reduce A / D. It is possible to reduce the speeding up of the clock signal supplied to the converter 12.

<Embodiment 2>
The overall view of multi-channel receiving apparatus 2 in the second embodiment is the same as that in the first embodiment as shown in FIG. However, in the second embodiment, the configuration of the analog unit (multi-band passing means) 21 is different from that of the first embodiment. FIG. 8 shows the configuration. An amplifier 211 to which a received signal is input is provided, and an output section of the amplifier 211 is connected to input sections of a plurality of frequency shift sections (frequency shift means) 2121 to 212n that convert the center frequencies of the plurality of band signals. . The output units of the frequency shift units 2121 to 212n are a plurality of BPF units (band-pass means) 2131 to 213n that allow different frequency components to pass in the plurality of signals converted to different center frequencies by the frequency shift units 2121 to 212n. Connected to the input. Output units of the plurality of BPF units 2131 to 213n are connected to an input unit of a signal synthesis unit (signal synthesis unit) 214 that synthesizes a plurality of output signals of the plurality of BPF units 2131 to 213n. The output unit of the signal synthesis unit 214 becomes the output unit of the analog unit 21.

  Next, the operation of multichannel receiving apparatus 2 according to the present embodiment will be described.

  The received signal is input to the amplifier 211 of the analog unit 21, the gain is adjusted so that the signal has a desired signal power, and is output to the frequency shift units 2121 to 212 n corresponding to signals in a desired plurality of bands. The frequency shift units 2121 to 212n convert the center frequency of the received signal into a desired frequency. The signals output from the frequency shift units 2121 to 212n are input to BPF (band pass filter) units 2131 to 213n corresponding to signals of a desired plurality of bands, and signals in one band among signals of a large number of bands. Only pass through.

  Here, as in the first embodiment, the relationship between the frequency of the clock supplied from the clock generator 14 to the A / D converter 12 and the signal in the desired band is an undersample as shown in FIG. And those that are oversampled may be mixed. With this configuration, the clock generator 14 can set the frequency of the clock signal supplied to the A / D converter 12 to be lower. Also in this case, as in the first embodiment, as shown by the band signal C in FIG. 5, there may be a case where the signal component is reversed and the frequency is reversed. For this reason, the demodulator 13 has a function of inverting such a signal component once again and reproducing data normally.

  Similarly to the first embodiment shown in FIG. 6, the demodulator 13 may be configured to use the output of one resampler unit 1311 that is common in the system that receives signals in each band. In this case, since the sample rate is common in the system that receives the signals of each band, it is possible to use a common clock signal in each part. As this clock signal, use a clock with a frequency several times higher than the required clock frequency, and process in each block of the system that receives the signal of each band is not parallel processing but serial processing that shares each block. Therefore, the circuit can be greatly reduced.

  In the second embodiment, the configuration of the analog unit 21 is complicated, but by providing the frequency shift units 2121 to 212n corresponding to signals of a desired plurality of bands, a signal of a desired plurality of bands is reduced to a low frequency band. It becomes possible to concentrate on. Thereby, there is an advantage that the frequency of the clock signal supplied from the clock generation unit 14 to the A / D conversion unit 12 can be further lowered.

  In Embodiments 1 and 2, a multi-channel receiving apparatus using multi-carriers using OFDM signals has been described. However, the present invention can be applied to a multi-channel receiving apparatus using single carriers. is there.

  As an application example of the present invention, the present invention can be applied to a digital broadcast receiver or a wireless LAN receiver.

1 is a block diagram of a multichannel receiving apparatus showing Embodiment 1 of the present invention. It is a block diagram which shows the structure of the analog part used in Embodiment 1 of this invention. It is a block diagram which shows an example of a structure of the demodulation part used by Embodiment 1 or 2 of this invention. It is a block diagram which shows an example of a structure of the MBPF part used in Embodiment 1 of this invention. It is a figure which shows the frequency arrangement | positioning of the band signal before and behind A / D conversion in Embodiment 1 or 2 of this invention. It is a block diagram which shows an example of a structure of the demodulation part used by Embodiment 1 or 2 of this invention. It is a block diagram of the multichannel receiver which shows Embodiment 2 of this invention. It is a block diagram which shows an example of a structure of the analog part used in Embodiment 2 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Multichannel receiver, 11 Analog part, 12 A / D conversion part, 13 Demodulation part, 14 Clock generation part, 111 Amplifier, 112 Frequency shift part, 113 MBPF part, 1311-131n Resampler part, 1321-132n Baseband conversion 1331 to 133n LPF unit, 1341 to 134n FFT unit, 1351 to 135n transmission path correction unit, 1361 to 136n demapping unit, 1311 to 1131n BPF unit, 1132 signal synthesis unit, 2 multichannel receiver, 21 analog unit, 211 Amplifier, 2121 to 212n Frequency shift unit, 2131 to 213n BPF unit, 214 Signal synthesis unit.

Claims (8)

A / D conversion means for A / D converting a received signal composed of signals in a plurality of bands;
Clock generation means for controlling the frequency of the clock supplied to the A / D conversion means to a predetermined frequency according to the frequency arrangement of signals in a desired plurality of bands;
Demodulation means for extracting signals of a desired plurality of bands from the output of the A / D conversion means and reproducing a plurality of data simultaneously;
Multi-channel receiver. The relationship between the frequency of the clock supplied from the frequency clock generation means and the signal in the desired band is a mixture of an undersample relationship and an oversample relationship.
The multi-channel receiver according to claim 1. The demodulating means normally reproduces data of the band signal before the original high and low frequency is reversed, even if a band signal whose frequency is reversed due to aliasing is input.
The multi-channel receiving device according to claim 1 or 2. The demodulating means includes resampling means for converting the sample rate of the output data of the A / D converting means, and the output of the resampling means is commonly used in a system for reproducing signals of a plurality of desired bands. ,
The multi-channel receiving device according to any one of claims 1 to 3. A plurality of band passing means for suppressing a part of the band of the received signal composed of signals of a plurality of bands and outputting only a limited plurality of bands of signals to the A / D conversion means;
The multi-channel receiving device according to any one of claims 1 to 4. The multiple band passing means controls the pass band and the suppression band so that the band for passing the received signal and the band to be suppressed are a combination of certain predetermined bands, and outputs the received signal.
The multi-channel receiving device according to claim 5. The multi-band passing means includes
A plurality of bandpass means for passing different frequency components,
Signal combining means for combining a plurality of output signals of the plurality of band-pass means,
The multi-channel receiver according to claim 5 or 6. The multi-band passing means includes
A plurality of frequency shift means for converting the center frequency of each of the plurality of band signals;
A plurality of band pass means for passing different frequency components in a plurality of signals converted to different center frequencies by the frequency shift means;
Signal combining means for combining a plurality of output signals of the plurality of band-pass means,
The multi-channel receiver according to claim 5 or 6.

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