JP2010123808A - Nonvolatile memory element, its manufacturing method and nonvolatile storage - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nonvolatile memory element excellent in electric performance and process-proof performance, its manufacturing method and a nonvolatile storage. <P>SOLUTION: The nonvolatile memory element includes: an oxide of fluorite structure including cerium and a metal element which can be trivalent differing from cerium; and a recording layer in which transition is made possible between a plurality of states having mutually different resistances according to at least either voltage to be applied or current to be energized. Moreover, there is provided the nonvolatile storage including: the nonvolatile memory element; and a drive unit in which information is stored by enabling the recording layer to transit between a plurality of states having mutually different resistances according to at least either voltage application to the recording layer of the nonvolatile memory element or current energization to the recording layer. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nonvolatile memory element, a manufacturing method thereof, and a nonvolatile memory device.

  The great progress and development of electronic devices in recent years largely depend on downsizing, power saving, high-speed writing, etc. of storage devices such as NAND flash memory and HDD (Hard disk drive). However, it is said that there is a limit to increasing the storage capacity of these storage devices.

  On the other hand, various memories such as those using phase change, those using magnetic change, those using ferroelectrics, and those using resistance change have been proposed as the next storage device. Among them, a resistance change type memory, so-called ReRAM (Resistive Random Access Memory), has high expectations that power consumption is reduced by microfabrication and writing / reading speed can be greatly improved as compared with the conventional technique.

  In this ReRAM, a resistance change material that changes its resistance value when energized by applying a voltage is used as a recording layer. Various materials have been proposed as this variable resistance material, but they are used for electrical performance such as practical operating voltage and durability, heat resistance that can withstand the manufacturing process of the recording device, chemical resistance, etc. No material has been found that satisfies the requirements for practical use related to various process resistance performance such as consistency with the material.

Incidentally, the CeO ₂ used as a storage layer, which the Cu, Ag, techniques for a particular storage device that combines an ion source layer of Zn or the like has been disclosed (e.g., Patent Document 1).
JP 2007-157941 A

  The present invention provides a nonvolatile memory element excellent in electrical performance and process resistance performance, a manufacturing method thereof, and a nonvolatile memory device.

  According to one embodiment of the present invention, an oxide having a fluorite structure including cerium and a metal element that can be trivalent and is different from cerium is used, and an applied voltage and current are applied. There is provided a nonvolatile memory element comprising a recording layer capable of transitioning between a plurality of states having different resistances by at least one of currents.

  According to another aspect of the present invention, there is provided a nonvolatile memory element having a recording layer capable of transitioning between a plurality of states having different resistances depending on at least one of an applied voltage and an energized current. An oxide having a fluorite structure containing cerium and a trivalent metal element different from cerium on a conductive layer provided on a substrate. There is provided a method for manufacturing a nonvolatile memory element, characterized in that a layer including the film is formed.

  According to another aspect of the present invention, there is provided a nonvolatile memory element having a recording layer capable of transitioning between a plurality of states having different resistances depending on at least one of an applied voltage and an energized current. A method of manufacturing, wherein a first layer containing one of cerium and a trivalent metal element different from cerium is formed on a conductive layer provided on a substrate. A second layer containing the other of cerium and the metal element is formed on the first layer, and the cerium and the metal element are formed between the first layer and the second layer. There is provided a method for manufacturing a nonvolatile memory element, wherein at least one of them is diffused to produce an oxide having a fluorite structure containing cerium and the metal element.

  According to another aspect of the present invention, at least one of the above nonvolatile memory element, application of a voltage to the recording layer of the nonvolatile memory element, and energization of a current to the recording layer Accordingly, there is provided a non-volatile storage device comprising: a drive unit that records information by causing the recording layer to transition between the plurality of states having different resistances.

  ADVANTAGE OF THE INVENTION According to this invention, the non-volatile memory element excellent in electrical performance and process-proof performance, its manufacturing method, and a non-volatile memory device are provided.

Embodiments of the present invention will be described below with reference to the drawings.
Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio coefficient of the size between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratio coefficient may be represented differently depending on the drawing.
Further, in the present specification and each drawing, the same reference numerals are given to the same elements as those described above with reference to the previous drawings, and detailed description thereof will be omitted as appropriate.

(First embodiment)
The nonvolatile memory element according to the first embodiment of the present invention can be applied to nonvolatile memory devices having various configurations. In the following, first, the nonvolatile memory element will be described as an example applied to a cross-point type nonvolatile memory device.
FIG. 1 is a schematic view illustrating the configuration of the nonvolatile memory element according to the first embodiment of the invention.
1A is a schematic perspective view illustrating the configuration of a nonvolatile memory element, and FIG. 1B is a schematic diagram illustrating the configuration of an oxide used in the nonvolatile memory element.

FIG. 2 is a schematic view illustrating the configuration of a nonvolatile memory device to which the nonvolatile memory element according to the first embodiment of the invention is applied.
1A is a schematic perspective view, and FIG. 1B is a schematic plan view.
FIG. 3 is a schematic cross-sectional view illustrating the configuration of a nonvolatile memory device to which the nonvolatile memory element according to the first embodiment of the invention is applied.
That is, FIGS. 4A and 4B are a cross-sectional view taken along line AA ′ and a cross-sectional view taken along line BB ′ in FIG.
FIG. 4 is a schematic cross-sectional view illustrating the configuration of another nonvolatile memory element to which the nonvolatile memory device according to the first embodiment of the invention is applied.
FIG. 5 is a schematic perspective view illustrating the configuration of another nonvolatile memory device to which the nonvolatile memory element according to the first embodiment of the invention is applied.

  As illustrated in FIG. 1A, the nonvolatile memory element 140 according to the first embodiment of the present invention is provided between the first wiring 110 and the second wiring 120, for example. The nonvolatile memory element 140 changes the information between the plurality of states having different resistances according to at least one of the voltage applied by the first wiring 110 and the second wiring 120 and the current supplied thereto. A recording layer 140R capable of recording That is, the recording layer 140R is a resistance change layer. In the recording layer 140R, a plurality of states having different resistances can reversibly transition.

As shown in FIG. 1B, the recording layer 140 </ b> R includes an oxide 70 having a fluorite structure including a cerium (Ce) element 50 and a trivalent metal element 55. Here, in the present specification, the metal element 55 capable of taking trivalence will be referred to as “trivalent metal element 55”.
That is, the oxide 70 is a compound including the cerium element 50, the trivalent metal element 55, and the oxygen 60.

As the trivalent metal element 55, for example, a lanthanoid group metal element (excluding Ce), Y that is not a lanthanoid group, Al, or the like can be used. Here, the trivalent metal element 55 only needs to be trivalent, and for example, an element that takes trivalence and divalence may be used. In this example, lanthanoid group Sm is used as the trivalent metal element 55.
Here, the Ce element 50 is tetravalent, but can be slightly trivalent. The trivalent metal element 55 does not contain Ce. Therefore, the oxide 70 is an oxide having a fluorite structure, which includes cerium and a metal element that can be trivalent and excludes cerium.
In other words, the recording layer 140 </ b> R includes the oxide 70 having a fluorite structure including the cerium element 50 and the trivalent metal element 55 different from the Ce element 50.

Thus, the oxide 70 has a fluorite structure. Note that CeO ₂ which is an oxide of the Ce element 50 has a fluorite structure. Therefore, although the oxide 70 is an oxide containing the Ce element 50 and a metal element that is different from the Ce element 50, the fluorite structure of CeO ₂ is maintained. Therefore, as shown in FIG. 1B, a part of the tetravalent Ce element 50 is replaced by the trivalent trivalent metal element 55, and at this time, the condition of the charge neutrality is satisfied. Causes oxygen deficiency 61.

  In the nonvolatile memory element 140 according to the present embodiment, a desired operating voltage and high operating durability are realized by adopting a conductive mechanism using the artificially produced oxygen deficiency 61, and heat resistance High process resistance such as compatibility, chemical resistance and consistency with various materials.

  In this specific example, a rectifying element unit 150 made of a diode or the like for controlling the direction of current flow is provided between the second wiring 120 and the nonvolatile memory element 140. As will be described later, the arrangement of the rectifying element unit 150 is arbitrary, and the rectifying element unit 150 may be omitted.

Hereinafter, an example of the configuration of a nonvolatile memory device to which the nonvolatile memory element 140 of this embodiment is applied will be described with reference to FIGS. 2 and 3.
As shown in FIG. 2, in the nonvolatile memory device 10 to which the nonvolatile memory element 140 according to the first embodiment of the present invention is applied, it extends in the X-axis direction on the main surface of the substrate 105. A strip-shaped first wiring 110 is provided. A strip-shaped second wiring 120 extending in the Y-axis direction orthogonal to the X-axis in a plane parallel to the substrate 105 is provided to face the first wiring 110.
In the above example, the first wiring 110 and the second wiring 120 are orthogonal to each other. However, the first wiring 110 and the second wiring 120 may be crossed, that is, may be non-parallel.
As described above, the plane parallel to the main surface of the substrate 105 is the XY plane, the extending direction of the first wiring 110 is the X axis, and the axis is orthogonal to the X axis in the XY plane. Is the Y axis, and the direction perpendicular to the X and Y axes is the Z axis.

  In FIG. 2, four each of the first wiring 110 and the second wiring 120 are illustrated, but the number of the first wiring 110 and the second wiring 120 is not limited to this, but is arbitrary. . For example, the first wiring 110 becomes the bit wiring BL, and the second wiring 120 becomes the word wiring WL. However, in this case, the first wiring 110 may be the word wiring WL and the second wiring 120 may be the bit wiring BL. In the following description, it is assumed that the first wiring 110 is the bit wiring BL and the second wiring 120 is the word wiring WL.

  A nonvolatile memory element 140 (recording layer 140R) is sandwiched between the first wiring 110 and the second wiring 120. That is, in the nonvolatile memory device 10, the nonvolatile memory element 140 (recording layer 140R) is provided at an intersection 130 (cross point) formed by three-dimensionally intersecting the bit wiring BL and the word wiring WL. .

  The voltage applied to each nonvolatile memory element 140 changes depending on the combination of the potential applied to the first wiring 110 and the potential applied to the second wiring 120, and information is stored according to the characteristics of the recording layer 140R at that time. Can do.

  At this time, in order to give directionality to the polarity of the voltage applied to the recording layer 140R, for example, the rectifying element unit 150 having rectifying characteristics can be provided. For the rectifying element unit 150, for example, a PIN diode, an MIM (Metal-Insulator-Metal) element, or the like can be used. Note that the rectifying element unit 150 may be provided in a region other than a region where the first wiring 110 and the second wiring 120 face each other. Furthermore, the rectifying element unit 150 may be provided as necessary, and may be omitted in some cases.

  When the recording layer 140R and the rectifying element unit 150 are provided between the first wiring 110 and the second wiring 120, the stacking order of the recording layer 140R and the rectifying element unit 150 is arbitrary. As will be described later, when a plurality of stacked structures including the first wiring 110, the recording layer 140R, the rectifying element portion 150, and the second wiring 120 are provided, the recording layer 140R and the rectifying element portion 150 are provided. The order of stacking is arbitrary. For example, in each stacked structure, the stacking order of the recording layer 140R and the rectifying element unit 150 may be the same or may be changed.

As the substrate 105, for example, a silicon substrate can be used, and a driving circuit for driving a nonvolatile memory device can be provided on the silicon substrate.
Various conductive materials including metal and polysilicon can be used for the first wiring 110 and the second wiring 120.

  As shown in FIG. 1A and FIG. 2A, the first wiring 110 and the second wiring 120 are formed in a non-volatile memory in a region formed by three-dimensionally intersecting each other. The element 140 (recording layer 140R) is provided, and one nonvolatile memory element 140 is one memory element, which is called a memory cell.

In addition, as illustrated in FIG. 3, the first wiring 110, the second wiring 120, and the recording layer 140 </ b> R have a plurality of regions provided at intervals, and are sandwiched between the plurality of regions. As shown, an insulating portion 160 is provided. In FIG. 2, the insulating part 160 is omitted.
For example, silicon oxide (SiO ₂ ) having high electrical resistance can be used for the insulating portion 160. However, the present invention is not limited thereto, and various materials higher than the electric resistance of the recording layer 140R can be used for the insulating portion 160.

  Further, as shown in FIG. 4, a lower electrode 141 and an upper electrode 142 for applying a voltage to the recording layer 140R can be provided above and below the recording layer 140R. The lower electrode 141, the recording layer 140R, and the upper electrode 142 are included in the memory cell 148. The nonvolatile memory element 140 includes a memory cell 148, that is, includes a lower electrode 141, a recording layer 140R, and an upper electrode 142.

  Further, for example, the intermediate layer 141b and the intermediate layer 142b can be provided between the lower electrode 141 and the recording layer 140R and between the upper electrode 142 and the recording layer 140R. The intermediate layers 141b and 142b can function as barrier layers. The nonvolatile memory element 140 may further include intermediate layers 141b and 142b. However, these intermediate layers 141b and 142b are provided as necessary and can be omitted.

  In addition, an intermediate layer 150 b can be provided between the rectifying element unit 150 and the second wiring 120. The intermediate layer 150b can function as a barrier layer. The intermediate layer 150b is provided as necessary and can be omitted.

  In this specific example, the rectifying element unit 150 is a separate element from the nonvolatile memory element 140, that is, the memory cell 148, but the rectifying element unit 150 is the nonvolatile memory element 140, that is, the memory cell 148. May be considered as part of

Note that at least one of the lower electrode 141 and the upper electrode 142 is also used as, for example, at least one of the first wiring 110, the rectifying element unit 150, the second wiring 120, and various barrier layers adjacent to the recording layer 140R. It can also be omitted.
In the following description, it is assumed that there are no intermediate layers 141b, 142b, and 150b.

  As shown in FIGS. 5A and 5B, the first wiring 110, the second wiring 120, and the nonvolatile memory element 140 (recording layer 140R) and the rectifying element portion 150 sandwiched between them are provided. Further, a plurality of non-volatile storage devices 20 and 21 having a three-dimensional structure can be configured by stacking a plurality of them. That is, each of the nonvolatile memory devices 20 and 21 includes a plurality of stacked structures each including a word wiring WL, a bit wiring BL, and a nonvolatile memory element 140 provided between the word wiring WL and the bit wiring BL. Is done.

As already described, the nonvolatile memory element 140 according to this embodiment uses the recording layer 140R that includes the cerium element 50 and the trivalent metal element 55 and includes the oxide 70 having a fluorite structure. Yes. That is, the oxide 70 has a structure in which a part of the Ce element 50 is replaced with the trivalent metal element 55 in the fluorite structure of CeO ₂ having excellent heat resistance and chemical resistance. As a result, the oxygen vacancies 61 can be formed stably, realizing a desired operating voltage and high operating durability, and having high heat resistance, high chemical resistance and high process consistency derived from the fluorite structure. Have

CeO ₂ having a fluorite structure has high heat resistance. For example, even when CeO ₂ is deposited on TiN at 800 ° C., a complex compound is hardly formed due to the interaction between CeO ₂ and TiN. CeO ₂ is a material used as an electrode of a solid electrolyte fuel cell, for example, and exhibits high heat resistance. CeO ₂ is also known as an intermediate layer for superconducting film formation in a TFA-MOD (Metal Organic Deposition using trifluoroacetates) method. For example, CeO ₂ is resistant to water vapor and hydrogen fluoride gas at 750 ° C. CeO ₂ has high chemical resistance and is chemically stable.

  As shown in FIG. 1B, the Ce element 50 is a tetravalent metal element. In the nonvolatile memory element 140 according to the present embodiment, trivalent is added to a part of the Ce element 50 site. The metal element 55 is replaced and introduced.

  At this time, as the trivalent metal element 55, all elements of the lanthanoid group close to Ce (excluding Ce) can be used even if the atomic radius is in an ion state, and the site of the Ce element 50 can be replaced. Further, as the trivalent metal element 55, Y of the same group as Ce or Al capable of taking trivalence can also be used.

At this time, when the site of the Ce element 50 is replaced by the trivalent metal element 55, the fluorite structure that is the crystal structure of CeO ₂ is maintained.

The substitutable amount varies depending on the atomic radius of the element used for the trivalent metal element 55.
For example, when the Ce element 50 is replaced with an element of the lanthanoid group, the fluorite structure is maintained in the substitution of 20 mol% or less with all elements of the lanthanoid group. For example, when the Ce element 50 is replaced by Sm or Eu, the fluorite structure is maintained at 40 mol% or less. As described above, when a lanthanoid group element having substantially the same atomic radius as the Ce element 50, which is one of the lanthanoid groups, is used as the trivalent metal element 55, the degree of freedom in the composition ratio is high and relatively wide. The Ce element 50 can be replaced with the trivalent metal element 55 at a composition ratio in the range. This makes it easy to adjust the electrical characteristics of the recording layer 140R to a desired specification.

  On the other hand, when an element other than the lanthanoid group is used as the trivalent metal element 55, the Ce element 50 is replaced with a material having a substantially different atomic radius from the Ce element 50. At this time, if the composition ratio of the trivalent metal element 55 is increased, the crystal structure changes. That is, it becomes difficult to maintain a good fluorite structure. Accordingly, when an element other than the lanthanoid group is used as the trivalent metal element 55, the composition ratio is set so as to maintain a highly heat-resistant fluorite structure.

  As described above, when a lanthanoid group element is used, the molar ratio of the trivalent metal element 55 to the total number of metal elements contained in the oxide 70 can be 20% or less. Of these, when Sm or Eu is used, the molar ratio of the trivalent metal element 55 can be 40% or less. Therefore, the molar ratio of the cerium element 50 to the total of the metal elements contained in the oxide 70 is higher than 60%. This maintains the fluorite structure.

  By substituting a part of the site of the Ce element 50 with the trivalent metal element 55 in the oxide 70, the average value of the total valence of the Ce element 50 and the trivalent metal element 55 is equal to the valence of the Ce element 50. The value is smaller than 4 which is. On the other hand, since oxygen 60 always has a valence of 2, the oxide 70 as a whole has a charge neutrality law due to the presence of a metal element having a molar number of 1/2 or more that of oxygen. . The amount of deficiency of oxygen 60 and metal (the total of Ce element 50 and trivalent metal element 55) as a whole of oxide 70 is determined by conditions such as temperature, but in this state, the site of the metal element is filled and oxygen 60 Defects will be concentrated on the site on the other side.

  That is, by replacing part of the site of the Ce element 50 with the trivalent metal element 55, an oxygen deficiency 61 is generated in the oxide 70.

Thus, in CeO ₂ , artificial oxygen can be obtained by substituting a part of the site of the Ce element 50 with the trivalent metal element 55 that can take only trivalent or can take bivalent and trivalent. The defect 61 can be created stably, and this structure can be maintained stably. For example, in CeO ₂ , if 20 mol% of Ce element 50 is substituted with Sm, Sm _0.2 Ce _0.8 O _{1.9 is obtained} , and 5% oxygen deficiency 61 is obtained as compared with CeO _2. Can be created.

The amount of oxygen vacancies 61 is arbitrarily controlled by changing the composition ratio of the trivalent metal element 55, that is, the ratio of replacing the Ce element 50 with the trivalent metal element 55 in the fluorite structure of CeO _2. This can be used to control electrical characteristics such as operating voltage to a practical desired value.

  In the nonvolatile memory element 140 according to this embodiment, the oxide 70 of the recording layer 140R has a sturdy structure having the fluorite structure illustrated in FIG. 1B, and a structure in which ion migration is relatively difficult. It is. However, the oxide 70 has an oxygen deficiency 61 while maintaining a fluorite structure. At this time, in the fluorite structure, when oxygen is deficient, the insulating property is largely lost, and the resistance value changes in a smaller direction. That is, at the time of switching setting, the oxygen deficiency 61 changes to a low resistance and energetically unstable state. At the time of resetting, the heat returns to a stable insulator, and at this time, the state returns to a high resistance and energy stable state. This switching mechanism is called a switching mechanism based on oxygen deficiency.

In the recording layer 140R of the nonvolatile memory element 140 according to this embodiment, oxygen deficiency 61 is artificially formed stably in CeO _{2 having} a fluorite structure. As a result, the oxide 70 is stably switched. Ce is a metal element that is usually easily tetravalent. A part of the Ce element 50 is similar to the Ce element 50 in the atomic radius, is similar in chemical properties, and can be a trivalent metal element (trivalent metal element). 55) is effective.

  If a part of the tetravalent Ce element 50 site is replaced with the trivalent metal element 55, the charge neutrality law works, so that an oxygen deficiency 61 is generated. When the oxygen vacancies 61 are generated, the resistance value becomes small and the switching is facilitated. At the same time, the lattice defects are concentrated on the oxygen side sites, thereby promoting the oxygen recombination 61 and the oxygen recombination at the reset.

Note that various methods can be used to replace part of the site of the Ce element 50 in CeO ₂ with the trivalent metal element 55. For example, chemical vapor deposition method (CVD: Chemical Vapor Deposition method) such as metal organic chemical vapor deposition method (MOCVD), a method using the same, sputtering method and pulsed laser deposition method (PLD: Pulsed) Any method such as a vapor deposition method such as a laser deposition method or a solution deposition method can be used.

  For example, in the CVD method, by using a material in which the raw material composition of the Ce element 50 and the trivalent metal element 55 is mixed in a desired ratio, a uniform film formation with a desired composition ratio can be achieved.

  In addition, when using the sputtering method or the PLD method, a target having a desired composition of the Ce element 50 and the trivalent metal element 55 is prepared by sintering in advance, and a layer of the oxide 70 is deposited using the target. By doing so, a film having a desired composition can be obtained.

  Further, in the MOD method in which a film is formed from a solution through a gel film, for example, two types of solutions each containing a Ce element 50 and a trivalent metal element 55 are prepared, and a coating solution is prepared by mixing them with a desired composition. A uniform film composition at the atomic level is realized by forming a gel film from the solution by spin coating or dip coating. And the thin film of the oxide 70 is obtained from the obtained gel film through the heat processing of temporary baking and main baking.

  In addition to the methods exemplified above, for example, a film having a desired composition can be obtained in the film finally formed by any method of mixing the Ce element 50 and the trivalent metal element 55.

  The recording layer 140R can be formed, for example, on the lower electrode 141 provided on the silicon wafer. As the lower electrode 141, for example, a TiN layer, a W layer, or the like can be used. Alternatively, a film may be formed on the intermediate layer 141b having conductivity, for example.

Since the CeO ₂ -based material is a material having a relatively high polarity, the underlying layer when the recording layer 140R is formed, that is, the lower electrode 141 and the intermediate layer 141b that are in contact with the recording layer 140R are also made of a material having a strong polarity. Often desirable. However, since the oxide 70 which becomes the recording layer 140R has a highly symmetrical fluorite structure, the oxide 70 having a fluorite structure can be formed even if the polarity of these underlayers is zero or small. In this case, good characteristics can be obtained.

  On the other hand, the upper electrode 142 is formed on the recording layer 140R. However, any conductive material can be used as long as it does not easily cause a chemical change during the switching operation of the recording layer 140R.

For example, a noble metal material such as Pt can be used for the lower electrode 141 and the upper electrode 142, and Ti, TiN, TiO _2, or the like can be used. Further, as the upper electrode 142, TiN or TiO ₂ doped with various materials can be used. Further, for example, a material obtained by doping hexavalent W (tungsten) with tetravalent or pentavalent Nb, Hf, Ta, or the like can be used. Furthermore, various metal materials such as Zr, Mo, Ni, Mn, Co, Cu, and Zn, and conductive materials containing elements therefrom can be used.

  Hereinafter, manufacturing methods and evaluation results of various examples according to the present embodiment will be described.

(First embodiment)
First, an oxide 70 to be a recording layer 140R was formed on a silicon wafer on a substrate on which a W layer, a Ti layer, and a TiN layer to be the lower electrode 141 were sequentially formed. At this time, the substrate was set in a PLD chamber, and a target made of a material in which 20% of Ce element 50 in CeO ₂ was replaced with Sm was set. That is, the target composition contains 20% Sm in terms of the molar ratio of the metal elements, and the rest is Ce. That is, in this specific example, Sm is used as the trivalent metal element 55, and the molar ratio of cerium (Ce) to the total of metal elements contained in the oxide 70 is 80%. Note that the molar ratio of the trivalent metal element 55 to the total of the metal elements contained in the oxide 70 is 20%.

Then, the oxygen partial pressure in the PLD chamber was set to 1 Pa, the substrate was heated to 400 ° C., the laser energy density was set to 200 mJ, and the pulse frequency of the laser was set to 10 Hz. At this time, the film was formed so as to have a film thickness of 10 nm. The sample thus obtained is referred to as “Sample 1 FR1” (first embodiment, Film, Resistive, Sample 1).
Then, after cooling until the temperature of the PLD chamber became 40 ° C., the sample 1FR1 was taken out.

  The film formation rate in the PLD film formation is obtained by dissolving a separately prepared film in an acid and measuring the concentration of the solution by ICP measurement to calculate the average film thickness, thereby obtaining the film formation rate. The film formation of Sample 1FR1 is performed so that the film formation rate is 0.84 nm / s. In the sample 1FR1, a portion that is electrically connected to the W layer is provided at the end thereof, and is used as a lower electrode when measuring switching characteristics.

The obtained sample 1FR1 was measured for 2θ / θ by XRD (X-Ray Diffraction, X-ray diffraction) method. As a result, in the sample _{1FR1, JCPDS (Joint Committee for Power} Diffraction Standards) strong peaks only near 28 degrees to match the card appeared to be identified by Sm _0.2 Ce _{0.8 O 1.9.} That is, Sample 1FR1 had a fluorite structure.

  A metal mask provided with a large number of circular holes with a diameter of 50 microns was placed on the sample 1FR1, and Pt serving as the upper electrode 142 was formed with a thickness of 100 nm by an RF sputtering apparatus. At this time, the sample 1FR1 provided with a metal mask was placed in a sputtering chamber and the pressure was reduced, and then a Pt film was formed to a thickness of 100 nm while flowing an argon gas. The sample thus obtained is referred to as “Sample 1FT1” (first example, Film, Top electrode, Sample 1). The sample 1FT1 has a large number of pad-like Pt films having a diameter of 50 microns arranged on the surface, and the Pt pad is used as an upper electrode during electrical measurement.

  The resistance change of sample 1FT1 was measured. At this time, when the set voltage is applied and the reset voltage is applied, the upper electrode (Pt pad) is made positive with respect to the lower electrode (the lower electrode 141 made of a laminated film of the W layer, the Ti layer, and the TiN layer). It was measured. This arrangement of potentials is referred to as “+ / + arrangement”. Then, the resistance value R1 in the high resistance state and the resistance value R2 in the low resistance state were measured for each N times of the switching operation, with the application of the set voltage Vset and the reset voltage Vreset as one switching operation. Note that the voltage applied in the measurement of the resistance value R1 and the resistance value R2 is 0.1 V, which is a minute voltage. In this specific example, the measurement was performed until the switching frequency N was up to 8700 cycles.

FIG. 6 is a graph illustrating characteristics of the nonvolatile memory element according to the first example of the invention.
That is, the horizontal axis of the figure represents the number of switching operations N (cycle), and the vertical axis represents the resistance value R1 in the high resistance state and the resistance value R2 in the low resistance state.

  As shown in FIG. 6, in the sample 1FT1 of the nonvolatile memory element 140 according to this embodiment, the resistance value R1 in the high resistance state and the resistance value R2 in the low resistance state are clearly distinguished. That is, the resistance value R1 in the high resistance state is about 10 KΩ, the resistance value R2 in the low resistance state is about 100Ω, and the resistance value changes about 100 times by switching. Further, it hardly changes depending on the number N of switching operations. In addition, the switching frequency N showed a characteristic that is almost the same as the initial value even at 8700 cycles, which is the maximum frequency measured this time.

  The set voltage Vset is about 1.6V, the reset voltage Vreset is about 0.8V, and the voltage margin ΔV that is the difference between the set voltage Vset and the reset voltage Vreset is about 0.8V. The voltage is easy to use. The set voltage Vset, the reset voltage Vreset, and the voltage margin ΔV were hardly changed depending on the switching frequency N.

  As described above, the nonvolatile memory element 140 according to the present embodiment has a practical operating voltage, good operation durability, and excellent electrical performance.

  Next, heat resistance of the nonvolatile memory element 140 and process consistency with other materials used for the lower electrode 141 and the upper electrode 142 will be described.

FIG. 7 is a schematic view illustrating the analysis result of the nonvolatile memory element according to the first example of the invention.
That is, this figure is a graph illustrating the result of analyzing the distribution of elements in the sample 1FR1 of the nonvolatile memory element 140 according to the first example by means of SIMS (Secondary Ion Mass Spectrometer). Yes, the horizontal axis represents the distance t in the depth direction, and the vertical axis represents the secondary ion intensity I. FIG. 4A shows the characteristics before the heat treatment, and FIG. 4B shows the characteristics after the heat treatment. The heat treatment at this time is based on RTA (Rapid Thermal Annealing) and is a heat treatment at 800 ° C. for 5 seconds. In addition, the same figure illustrates the secondary ion intensity I regarding Ce, Sm, Ti and W contained in the sample 1FR1.

As shown in FIG. 7, the peak of the secondary ionic strength I for Ce, Sm, and Ti shows a slight change before and after the high temperature treatment of RTA, but the change is not so large and practically used. Is not a problem. Thus, it can be confirmed that the oxide 70 (Sm _0.2 Ce _0.8 O _1.9 ) of the sample 1FR1 has high heat resistance. The reaction between the oxide 70 and the TiN layer, the Ti layer, and the W layer, which are the lower electrode 141, and the diffusion between them do not substantially occur, and the oxide 70 has good compatibility with the electrode material. It was also confirmed that the process consistency was good.

  For example, even when an RTA process for activating the diode that becomes the rectifying element portion 150 is performed, the metal element constituting the recording layer 140R does not diffuse into the rectifying element portion 150, the layer that becomes the electrode, and the like, Various elements contained in the element portion 150 and the layer serving as an electrode do not diffuse into the recording layer 140R, and the characteristics of the recording layer 140R, the rectifying element portion 150, and the electrode are prevented from changing.

Sample 1FR1 uses Sm _0.2 Ce _0.8 O _1.9 having a fluorite structure as the recording layer 140R (oxide 70), and has high chemical resistance and chemical properties similar to CeO _2. Stable.

(First comparative example)
The nonvolatile memory element 149p (not shown) of the first comparative example uses Mn ₃ O ₄ as the recording layer 140R (oxide 70). The rest is the same as the configuration of the sample 1FR1 in the first embodiment.

FIG. 8 is a schematic view illustrating the analysis result regarding the characteristics of the nonvolatile memory element of the first comparative example.
That is, this figure is a graph illustrating the result of SIMS analysis of the element distribution in the nonvolatile memory element 149p of the first comparative example. FIGS. 7A and 7B illustrate characteristics before and after the RTA heat treatment at 800 ° C. for 5 seconds, respectively. Also in this case, as the lower electrode 141, a laminated film of a W layer, a Ti layer, and a TiN layer is used. In the figure, secondary ionic strength I relating to Mn, O, TiN, Ti, NO and W constituting these is illustrated.

  As shown in FIG. 8A, before the high temperature treatment of RTA, for example, the peaks of the secondary ionic strength I related to Mn and Ti are clearly separated from each other in the depth direction. The lower electrode 141 and the recording layer 140R (oxide 70) exist as separate layers.

  On the other hand, as shown in FIG. 8B, after the high temperature treatment of RTA, for example, the peaks of Mn and Ti have a broad characteristic that does not have a clear peak in the depth direction. . That is, for example, Mn and Ti are interdiffused, and the composition of the recording layer 140R and the lower electrode 141 changes before and after the high temperature treatment. Thus, in the nonvolatile memory element 149p of the first comparative example, the recording layer 140R does not function as a recording layer due to the high temperature treatment.

  For example, when an RTA process for activating the diode that becomes the rectifying element portion 150 is performed, the metal element constituting the recording layer 140R diffuses into the layer that becomes the electrode. As a result, the switching operation becomes abnormal. Although it is conceivable to control this diffusion by providing a diffusion prevention layer or the like, the number of processes is increased, and there is a risk of defects due to pinholes in the diffusion prevention layer, which is not practical.

(Second comparative example)
The nonvolatile memory element 149q of the second comparative example uses CeO ₂ as the oxide 70 that is the recording layer 140R.
FIG. 9 is a schematic view illustrating the configuration of an oxide used for the nonvolatile memory element of the second comparative example.
As shown in FIG. 9, in the case of the nonvolatile memory element 149q of the second comparative example, CeO ₂ is used as the oxide 70 of the recording layer 140R, and the oxide 70 has a fluorite structure. However, the trivalent metal element 55 is not introduced, and the oxygen deficiency 61 is not provided. Therefore, the nonvolatile memory element 149q is excellent in heat resistance, chemical resistance, and process consistency, but its electrical characteristics are not practical.

  That is, in the non-volatile memory element 149q, the recording layer 140R has a strong insulating property, for example, the resistance is too high. For this reason, the operating voltage becomes, for example, 20 V or more, and an excessive voltage and an excessive current are required at the time of forming for initialization, which is not practical. Further, there is a possibility that the recording layer 140R itself may be destroyed during forming, which is a problem.

For example, in the case of the recording layer 140R using CeO ₂ , even a very thin film having a film thickness of 20 nm exhibits a very high resistance value and a high forming voltage. Then, due to the large current that flows immediately after forming, the element may short-circuit and not operate. Further, even when forming without short-circuiting is performed, the number N of subsequent on / off switching operations is about 30 to 100 times, which makes the operation impossible. This is presumably because even after forming, a resistance value that is too high becomes an obstacle, and an excessive current flows by applying a high voltage.

  On the other hand, as described above, in the nonvolatile memory element 140 according to the present embodiment, the oxygen vacancies 61 are introduced by introducing an appropriate amount of the trivalent metal element 55 into the oxide 70 of the recording layer 140R. Can be generated artificially by controlling the desired amount, thereby realizing practical electrical characteristics.

In the Patent Document 1, a CeO ₂ used as a recording layer 140R, which the Cu, Ag, a technique of combining a specific ion source layer of Zn or the like has been proposed, in this case, the CeO ₂ Since the trivalent metal element 55 is not introduced, the oxygen deficiency 61 is not generated. In Patent Document 1, it is also described that one or more kinds of oxides selected from NiO, CoO, and CeO ₂ are used as the recording layer 140R. However, these plural compounds are stacked as separate layers. it is premised, the site of Ce in the crystal structure of CeO ₂ is replaced by other elements is not considered. In addition, this technique does not mention maintaining a fluorite structure. That is, in Patent Document 1, CeO ₂ is used, and in this case, the above ion source layers are combined. Therefore, the present invention is a technique that is completely different from the technique described in Patent Document 1.

In addition, as a variable resistance material, in addition to oxides such as NiO, CoO, and ZnFeO ₃ , composite oxides having a perovskite structure that are used as superconducting materials such as Pr _0.7 Ca _0.3 MnO ₃ Furthermore, non-oxides such as ZnCaS are also known.

  In these various materials, there is a problem that the operating voltage is not practical or switching durability is low. In addition, for example, a material with poor heat resistance is easily short-circuited at reset. Furthermore, for example, in the RTA process, which is an activation process of the diode that becomes the rectifying element unit 150, when heat of about 800 ° C. is applied, the resistance value increases due to the reaction of oxidation or reduction, and mutual diffusion or complex There arises a problem that the oxide is not switched due to the generation of oxide. In addition, deterioration of the material becomes a problem due to strong chemicals used in the manufacturing process or processing conditions.

  Although an element having a plurality of valences is used as the resistance change material, there is a problem that the valence changes due to oxidation or reduction and the switch is not easily switched. At that time, Al is a highly heat-resistant and chemical-resistant material that is resistant to oxidation and reduction, such as a group 3 element, but Al usually takes only a single valence, trivalent, and oxidation. The object is an insulator having a very high resistance, and other composite oxides have a high set voltage Vset which is not practical as a resistance change material.

  On the other hand, in the nonvolatile memory element 140 according to this embodiment, the oxide 70 of the recording layer 140R includes various elements having a fluorite structure that is very thermally and chemically stable. In the lanthanoid group having a substantially similar atomic radius, the only tetravalent Ce is adopted, and a structure in which a part of the Ce element 50 is replaced by the trivalent metal element 55 while maintaining the fluorite structure. Applied.

  Thereby, a nonvolatile memory element excellent in electrical performance and process resistance performance can be provided. At that time, by using another element in the lanthanoid group having substantially the same atomic radius as that of the Ce element 50 as the trivalent metal element 55, the fluorite structure is stabilized, and at a relatively high ratio. A trivalent metal element 55 can be introduced. This facilitates control of electrical characteristics such as operating voltage.

(Second embodiment)
In the second embodiment, Sm is used as the trivalent metal element 55 in the first embodiment, and the composition ratio is changed. The rest is the same as the first embodiment.
That is, the following 15 types were used as targets when forming the oxide 70 of the recording layer 140R. That is, the ratio of Sm is 0.01%, 0.02%, 0.05%, 0.1%, 0.2%, 0.5% with respect to the total amount of metallic elements of Sm and Ce. 1%, 2%, 5%, 10%, 30%, 40%, 50%, 60%, and 70%. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained sample was designated as Sample 2FR0.01 (second example, Film Resistive, Sm amount 0.01 mol%), 2FR0.02, 2FR0.05, 2FR0.1, 2FR0.2, 2FR0.5, 2FR1. 2FR2, 2FR5, 2FR10, 2FR30, 2FR40, 2FR50, 2FR60 and 2FR70 will be referred to. In addition, the composition ratio of Sm in each of these samples is the same as the composition ratio of Sm in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  As a result of performing 2θ / θ measurement by XRD on these samples, a fluorite structure was maintained when the Sm ratio was 0.01 to 40%, and a part of the fluorite structure was present otherwise. It was. That is, Samples 2FR0.01, 2FR0.02, 2FR0.05, 2FR0.1, 2FR0.2, 2FR0.5, 2FR1, 2FR2, 2FR5, 2FR10, 2FR30 and 2FR40 maintain a fluorite structure, and Sample 2FR50, In 2FR60 and 2FR70, part of the fluorite structure collapsed.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, samples having respective Sm ratios are obtained as Sample 2FT0.01 (second example, Top electrode, Sm amount 0.01 mol%), 2FT0.02, 2FT0.05, 2FT0.1, 2FT0.2. 2FT0.5, 2FT1, 2FT2, 2FT5, 2FT10, 2FT30, 2FT40, 2FT50, 2FT60 and 2FT70.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, the resistance changes in the samples 2FT0.05, 2FT0.1, 2FT0.2, 2FT0.5, 2FT1, 2FT2, 2FT5, 2FT10, 2FT30, and 2FT40 almost coincide with the results of the first embodiment, that is, The ratio of the resistance between the on state and the off state was about 100 to 1000 times.

  In Samples 2FT0.05, 2FT0.1, 2FT0.2, 2FT0.5, 2FT1, 2FT2, 2FT5, 2FT10, 2FT30, and 2FT40, there were pads in which the switching frequency N exceeded 10,000. On the other hand, in Samples 2FT0.01 and 2FT0.02, the switching frequency N of all the pads was particularly bad at 1000 or less. In Samples 2FT50, 2FT60, and 2FT70, there were pads with switching times N exceeding 1000 times, respectively, but there were no pads exceeding 10,000 times.

As in the first embodiment and this embodiment already described, a fluorite structure is formed when the amount of Ce substituted by Sm is 40 mol% or less. And the sample with many switching frequency N which showed favorable switching was 0.05-40 mol% in the ratio of Sm. When the ratio of Sm is 50% or more, the number of times of switching N is small. This is because Sm ₂ O ₃ is the main component of CeO _{2 having} a fluorite structure and the peak of the fluorite structure is smaller. Was guessed. In addition, when the Sm ratio was 0.01 or 0.02 mol%, the switching characteristics were poor. However, since the amount of Sm introduced was small, the effect of generating the oxygen deficiency 61 was insufficient. This is presumed to be the cause.

(Third embodiment)
In the third embodiment, the thickness of the oxide 70 film to be the recording layer 140R is changed in the first embodiment. That is, in the first example, the thickness of the recording layer 140R was 10 nm, but in this example, the film thickness was changed in 12 types in the range of 1 to 100 nm.

  That is, a film of oxide 70 was formed on the same substrate as in the first example by a PLD method using a target containing 20 mol% of Sm. At this time, the film was formed to have a film thickness of 1, 2, 3, 5, 7, 15, 20, 30, 40, 50, 70 and 100 nm. The obtained samples are made to correspond to the respective film thicknesses, and sample 3FR1 (third embodiment, Film, Resistive, film thickness 1 nm), 3FR2, 3FR3, 3FR5, 3FR7, 3FR20, 3FR30, 3FR40, 3FR50. These will be referred to as 3FR70 and 3FR100. At this time, the film formation rate was 0.84 nm / s, and the film was formed to have each film thickness.

  As a result of performing 2θ / θ measurement by XRD on these samples, peaks of fluorite structure were confirmed in samples 3FR3, 3FR5, 3FR7, 3FR20, 3FR30, 3FR40, 3FR50, 3FR70 and 3FR100 having a film thickness of 3 nm or more. It was done. On the other hand, in the samples 3FR1 and 3FR2 having the film thicknesses of 1 nm and 2 nm, the peak of the fluorite structure was not confirmed, but this is due to the XRD diffraction peak due to the thin film thickness while having the fluorite structure. May not have been obtained.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. The samples having respective film thicknesses are referred to as samples 3FT1 (third embodiment, Top electrode, film thickness 1 nm), 3FT2, 3FT3, 3FT5, 3FT7, 3FT20, 3FT30, 3FT40, 3FT50, 3FT70, and 3FT100. To do.

  In the same manner as in the first example, the number of switching times N of these samples was changed and measured. Note that the maximum number of switching times N is 10,000.

  As a result, the resistance changes in the samples 3FT5, 3FT7, 3FT20, 3FT30, 3FT40, and 3FT50 almost coincide with the results of the first embodiment, that is, the ratio of the resistance between the on state and the off state is about 100 times. It was. In other samples, that is, samples 3FT1, 3FT2, 3FT70, and 3FT100, switching could not be confirmed.

  And in the samples 3FR5, 3FR7, 3FR10, 3FR20, 3FR30, 3FR40, and 3FR50, it was confirmed that the number of switching times N exceeded 10,000. Some of the samples 3FR3 switched and others did not. Samples 3FR1 and 3FR2 were in a leaked state because of their thin film thickness. Further, Samples 3FT70 and 3FT100 having a film thickness of 70 nm or more have high insulating properties and have a pad to be switched, but cannot be switched many times.

In the recording layer 140R in which the substitution ratio of Ce with Sm is 20 mol% as in the first embodiment and the present embodiment described above, good switching characteristics were obtained when the film thickness was 5 nm to 50 nm. . At other film thicknesses, there was a tendency that the switching frequency N indicating good switching decreased. Thus, by adding Sm at 20 mol% to CeO ₂ and substituting Ce with Sm, the resistance can be reduced and a good switching operation is possible. However, when the film thickness is thicker than 50 nm, Switching was difficult with the added amount.

(Fourth embodiment)
In the fourth embodiment, Nd, which is another metal element of the lanthanoid group, is used instead of Sm as the trivalent metal element 55 of the oxide 70 to be the recording layer 140R in the second embodiment. . That is, Nd is used as the trivalent metal element 55 and the composition ratio is changed.

  That is, the following 16 types were used as targets when forming the oxide 70 of the recording layer 140R. That is, the ratio of Nd is 0.01%, 0.02%, 0.05%, 0.1%, 0.2%, 0.5% with respect to the total amount of metal elements of Nd and Ce. 1%, 2%, 5%, 10%, 20%, 30%, 40%, 50%, 60%, and 70%. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained sample was made into sample 4FR0.01 (4th Example, Film, Resistive, Nd amount 0.01 mol%), 4FR0.02, 4FR0.05, 4FR0.1, 4FR0.2, 4FR0.5, These will be referred to as 4FR1, 4FR2, 4FR5, 4FR10, 4FR20, 4FR30, 4FR40, 4FR50, 4FR60 and 4FR70. Note that the composition ratio of Nd in each of these samples is the same as the composition ratio of Nd in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  As a result of performing 2θ / θ measurement on these samples by XRD, it was found that a fluorite structure was maintained when the Nd ratio was 0.01 to 40%, and a part of the fluorite structure was present otherwise. I found out that That is, samples 4FR0.01, 4FR0.02, 4FR0.05, 4FR0.1, 4FR0.2, 4FR0.5, 4FR1, 4FR2, 4FR5, 4FR10, 4FR20, 4FR30 and 4FR40 maintain a fluorite structure, In 4FR50, 4FR60, and 4FR70, part of the fluorite structure collapsed.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, samples having respective Nd ratios were prepared as Sample 4FT0.01 (fourth example, Top electrode, Nd amount 0.01 mol%), 4FT0.02, 4FT0.05, 4FT0.1, 4FT0.2. 4FT0.5, 4FT1, 4FT2, 4FT5, 4FT10, 4FT20, 4FT30, 4FT40, 4FT50, 4FT60 and 4FT70 will be referred to.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in the samples 4FT0.05, 4FT0.1, 4FT0.2, 4FT0.5, 4FT1, 4FT2, 4FT5, 4FT10, 4FT20, 4FT30, and 4FT40, the resistance ratio between the on state and the off state is about 100 times. there were.

  In Samples 4FT0.05, 4FT0.1, 4FT0.2, 4FT0.5, 4FT1, 4FT2, 4FT5, 4FT10, 4FT20, 4FT30, and 4FT40, there were pads in which the switching frequency N exceeded 10,000. On the other hand, in Samples 4FT0.01 and 4FT0.02, the switching frequency N was particularly bad at 1000 or less for all pads. In Samples 4FT50, 4FT60, and 4FT70, there were pads with the switching frequency N exceeding 1000 times, but there were no pads exceeding 10,000 times.

Thus, good characteristics were obtained even when Nd was used instead of Sm. When the amount of Ce substituted by Nd was 40 mol% or less, a fluorite structure was formed. And the sample with many switching frequency N which shows a favorable switching operation | movement has the ratio of Nd 0.05-40 mol%. When the ratio of Nd is 50% or more, the number of switching times N is small. This is because Nd ₂ O ₃ is the main component of CeO _{2 having} a fluorite structure and the peak of the fluorite structure is small. Was guessed. In addition, when the Nd ratio was 0.01 or 0.02 mol%, the switching characteristics were poor, but this was not sufficient for the generation of oxygen deficiency 61 due to the small amount of Nd introduced. This is presumed to be the cause. As described above, when Nd was used as the trivalent metal element 55, the same results as in the second example using Sm as the trivalent metal element 55 were obtained.

(Fifth embodiment)
The fifth embodiment uses La, which is another metal element of the lanthanoid group, instead of Sm as the trivalent metal element 55 of the oxide 70 that becomes the recording layer 140R in the second embodiment. is there. That is, La is used as the trivalent metal element 55 and the composition ratio is changed.

  That is, the following 16 types were used as targets when forming the oxide 70 of the recording layer 140R. That is, the ratio of La is 0.01%, 0.02%, 0.05%, 0.1%, 0.2%, 0.5% with respect to the total amount of metallic elements of La and Ce. 1%, 2%, 5%, 10%, 20%, 30%, 40%, 50%, 60%, and 70%. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained sample was sample 5FR0.01 (5th Example, Film, Resistive, La amount 0.01 mol%), 5FR0.02, 5FR0.05, 5FR0.1, 5FR0.2, 5FR0.5, 5FR1, 5FR2, 5FR5, 5FR10, 5FR20, 5FR30, 5FR40, 5FR50, 5FR60 and 5FR70 will be referred to. Note that the composition ratio of La in each of these samples is the same as the composition ratio of La in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  These samples were subjected to 2θ / θ measurement by XRD. As a result, a fluorite structure was maintained when the La ratio was 0.01 to 30%, and a part of the fluorite structure was present otherwise. That is, samples 5FR0.01, 5FR0.02, 5FR0.05, 5FR0.1, 5FR0.2, 5FR0.5, 5FR1, 5FR2, 5FR5, 5FR10 and 5FR30 maintain the fluorite structure, and samples 5FR40, 5FR50, In 5FR60 and 5FR70, part of the fluorite structure collapsed.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, samples having respective La ratios were prepared as Sample 5FT0.01 (5th Example, Top electrode, La amount 0.01 mol%), 5FT0.02, 5FT0.05, 5FT0.1, 5FT0.2. 5FT0.5, 5FT1, 5FT2, 5FT5, 5FT10, 5FT20, 5FT30, 5FT40, 5FT50, 5FT60 and 5FT70 will be referred to.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in the samples 5FT0.05, 5FT0.1, 5FT0.2, 5FT0.5, 5FT1, 5FT2, 5FT5, 5FT10, and 5FT20, the resistance ratio between the on state and the off state was about 100 times.

  In Samples 5FT0.05, 5FT0.1, 5FT0.2, 5FT0.5, 5FT1, 5FT2, 5FT5, 5FT10, and 5FT20, there were pads in which the switching frequency N exceeded 10,000. On the other hand, in Samples 5FT0.01 and 5FT0.02, the switching frequency N was particularly bad at 1000 or less for all the pads. In Samples 5FT30, 5FT40, 5FT50, 5FT60, and 5FT70, there were pads with switching frequency N exceeding 1000 times, respectively, but there were no pads exceeding 10,000 times.

Thus, good characteristics were obtained even when La was used instead of Sm. A fluorite structure was formed when the amount of Ce substituted by La was 30 mol% or less. And the sample with many switching frequency N which shows a favorable switching operation | movement had the ratio of La of 0.05-20 mol%. When the ratio of La is 30% or more, the number of times of switching N is small. This is because La ₂ O ₃ is mainly composed of CeO _{2 having} a fluorite structure and the peak of the fluorite structure is small. Was guessed. In addition, when the La ratio was 0.01 or 0.02 mol%, the switching characteristics were poor. However, since the amount of La introduced was small, the effect of generating the oxygen deficiency 61 was insufficient. This is presumed to be the cause.

(Sixth embodiment)
In the sixth example, Gd, which is another metal element of the lanthanoid group, is used instead of Sm as the trivalent metal element 55 of the oxide 70 to be the recording layer 140R in the second example. is there. That is, Gd is used as the trivalent metal element 55 and the composition ratio is changed.

  That is, the following 16 types were used as targets when forming the oxide 70 of the recording layer 140R. That is, the ratio of Gd is 0.01%, 0.02%, 0.05%, 0.1%, 0.2%, 0.5% with respect to the total amount of metallic elements of Gd and Ce. 1%, 2%, 5%, 10%, 20%, 30%, 40%, 50%, 60%, and 70%. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained samples were designated as Sample 6FR0.01 (Sixth Example, Film, Resistive, Gd amount 0.01 mol%), 6FR0.02, 6FR0.05, 6FR0.1, 6FR0.2, 6FR0.5, These will be referred to as 6FR1, 6FR2, 6FR5, 6FR10, 6FR30, 6FR40, 6FR50, 6FR60 and 6FR70. The composition ratio of Gd in each of these samples is the same as the composition ratio of Gd in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  These samples were subjected to 2θ / θ measurement by XRD. As a result, when the Gd ratio was 0.01 to 40%, the fluorite structure was maintained, and in other cases, a fluorite structure was partially present. That is, samples 6FR0.01, 6FR0.02, 6FR0.05, 6FR0.1, 6FR0.2, 6FR0.5, 6FR1, 6FR2, 6FR5, 6FR10, 6FR20, 6FR30 and 6FR40 maintain the fluorite structure, In 6FR50, 6FR60, and 6FR70, a part of the fluorite structure collapsed.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, samples having respective Gd ratios were prepared as Sample 6FT0.01 (Sixth Example, Top electrode, Gd amount 0.01 mol%), 6FT0.02, 6FT0.05, 6FT0.1, 6FT0.2. , 6FT0.5, 6FT1, 6FT2, 6FT5, 6FT10, 6FT20, 6FT30, 6FT40, 6FT50, 6FT60 and 6FT70.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in the samples 6FT0.05, 6FT0.1, 6FT0.2, 6FT0.5, 6FT1, 6FT2, 6FT5, 6FT10, 6FT20, 6FT30 and 6FT40, the ratio of the resistance between the on state and the off state is about 100 times to It was 500 times.

  In Samples 6FT0.05, 6FT0.1, 6FT0.2, 6FT0.5, 6FT1, 6FT2, 6FT5, 6FT10, 6FT20, 6FT30, and 6FT40, there were pads with a switching frequency N exceeding 10,000. On the other hand, in the samples 6FT0.01 and 6FT0.02, the switching frequency N was particularly bad at 1000 or less for all the pads. In Samples 6FT50, 6FT60, and 6FT70, there were pads with switching frequency N exceeding 1000 times, respectively, but there were no pads exceeding 10,000 times.

Thus, even when Gd was used instead of Sm, good characteristics were obtained. When the amount of Ce substituted by Gd was 40 mol% or less, a fluorite structure was formed. And the sample with many switching frequency N which shows a favorable switching operation | movement has the ratio of Gd 0.05-40 mol%. When the Nd ratio is 50% or more, the number of switching times N is small. This is because Gd ₂ O ₃ is the main component of CeO _{2 having} a fluorite structure and the peak of the fluorite structure is small. Was guessed. In addition, when the Gd ratio was 0.01 or 0.02 mol%, the switching characteristics were poor. However, since the amount of Gd introduced was small, the effect of generating the oxygen deficiency 61 was insufficient. This is presumed to be the cause. As described above, when Gd was used as the trivalent metal element 55, the same result as in the second example using Sm as the trivalent metal element 55 was obtained.

(Seventh embodiment)
The seventh embodiment uses Yb, which is another metal element of the lanthanoid group, instead of Sm, as the trivalent metal element 55 of the oxide 70 that becomes the recording layer 140R in the second embodiment. is there. That is, Yb is used as the trivalent metal element 55 and the composition ratio is changed.

  That is, the following 16 types were used as targets when forming the oxide 70 of the recording layer 140R. That is, the ratio of Yb is 0.01%, 0.02%, 0.05%, 0.1%, 0.2%, 0.5% with respect to the total amount of metal elements of Yb and Ce. 1%, 2%, 5%, 10%, 20%, 30%, 40%, 50%, 60%, and 70%. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained sample was used as Sample 7FR0.01 (Seventh Example, Film, Resistive, Yb amount 0.01 mol%), 7FR0.02, 7FR0.05, 7FR0.1, 7FR0.2, 7FR0.5, 7FR1, 7FR2, 7FR5, 7FR10, 7FR20, 7FR30, 7FR40, 7FR50, 7FR60 and 7FR70 will be referred to. The Yb composition ratio in each of these samples is the same as the Yb composition ratio in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  These samples were subjected to 2θ / θ measurement by XRD. As a result, a fluorite structure was maintained when the Yb ratio was 0.01 to 30%, and a part of the fluorite structure was present otherwise. That is, samples 7FR0.01, 7FR0.02, 7FR0.05, 7FR0.1, 7FR0.2, 7FR0.5, 7FR1, 7FR2, 7FR5, 7FR10, 7FR20 and 7FR30 maintain the fluorite structure, and samples 7FR40, In 7FR50, 7FR60, and 7FR70, a part of the fluorite structure collapsed.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, samples having respective La ratios were prepared as Sample 7FT0.01 (Seventh Example, Top electrode, La amount 0.01 mol%), 7FT0.02, 7FT0.05, 7FT0.1, 7FT0.2. 7FT0.5, 7FT1, 7FT2, 7FT5, 7FT10, 7FT20, 7FT30, 7FT40, 7FT50, 7FT60 and 7FT70.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in the samples 7FT0.05, 7FT0.1, 7FT0.2, 7FT0.5, 7FT1, 7FT2, 7FT5, 7FT10, and 7FT20, the resistance ratio between the on state and the off state was about 100 times.

  In Samples 7FT0.05, 7FT0.1, 7FT0.2, 7FT0.5, 7FT1, 7FT2, 7FT5, 7FT10, and 7FT20, there were pads having a switching frequency N exceeding 10,000. On the other hand, in the samples 7FT0.01 and 7FT0.02, the switching frequency N was particularly bad at 1000 or less for all the pads. In Samples 7FT30, 7FT40, 7FT50, 7FT60, and 7FT70, there were pads with a switching frequency N exceeding 1000 times, but there were no pads exceeding 10,000 times.

Thus, good characteristics were obtained even when Yb was used instead of Sm. When the amount of Ce substituted by Yb was 30 mol% or less, a fluorite structure was formed. And the sample with many switching frequency N which shows a favorable switching operation | movement was 0.05-20 mol% in the ratio of Yb. When the ratio of Yb is 30% or more, the number of times of switching N is small. This is because Yb ₂ O ₃ is the main component of CeO _{2 having} a fluorite structure and the peak of the fluorite structure is small. Was guessed. In addition, when the Yb ratio was 0.01 or 0.02 mol%, the switching characteristics were poor. However, since the amount of Yb introduced was small, the effect of generating the oxygen deficiency 61 was insufficient. This is presumed to be the cause.

(Eighth embodiment)
In the eighth embodiment, as the trivalent metal element 55 of the oxide 70 to be the recording layer 140R in the first embodiment, Pr, Eu, Tb, which are other metal elements of the lanthanoid group in place of Sm, Dy, Ho, Er, Tm and Lu are used. At this time, the composition ratio of the trivalent metal element 55 was 5 mol%.

That is, the following eight types were used as targets when forming the oxide 70 of the recording layer 140R. That is, the ratio of the trivalent metal element 55 is constant at 5% with respect to the total amount of the metal elements of the trivalent metal element 55 and Ce, and the trivalent metal element 55, Pr, Eu, Tb, Dy, Ho. , Er, using a target obtained by respectively doped Tm and Lu in CeO _2. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained samples were designated as Sample 8FR-Pr5 (Eighth Example, Film, Resistive, Pr amount 5 mol%), 8FR-Eu5, 8FR-Tb5, 8FR-Dy5, 8FR-Ho5, 8FR-Er5, 8FR- These will be referred to as Tm5 and 8FR-Lu5. The type and composition ratio of the trivalent metal element 55 introduced in each of these samples are the same as the type and composition ratio of the trivalent metal element 55 in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  As a result of performing 2θ / θ measurement by XRD on these samples, it was found that the fluorite structure was maintained in all samples.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, samples of each type of trivalent metal element 55 are obtained as Sample 8FT-Pr5 (Eighth Example, Top electrode, Pr amount 5 mol%), 8FT-Eu5, 8FT-Tb5, 8FT-Dy5, 8FT- These will be referred to as Ho5, 8FT-Er5, 8FT-Tm5, and 8FT-Lu5.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in all the samples 8FT-Pr5, 8FT-Eu5, 8FT-Tb5, 8FT-Dy5, 8FT-Ho5, 8FT-Er5, 8FT-Tm5, and 8FT-Lu5, the resistance between the on state and the off state is measured. The ratio was about 100 to 2000 times.

  In all samples 8FT-Pr5, 8FT-Eu5, 8FT-Tb5, 8FT-Dy5, 8FT-Ho5, 8FT-Er5, 8FT-Tm5, and 8FT-Lu5, the number of switching times N exceeds 10,000. Existed.

  Thus, it has been found that no matter which lanthanoid group is used as the trivalent metal element 55, good switching characteristics can be obtained with an addition amount of 5 mol%.

(Ninth embodiment)
In the ninth embodiment, a plurality of metal elements selected from the lanthanoid group are used instead of Sm as the trivalent metal element 55 of the oxide 70 to be the recording layer 140R in the first embodiment. It is an example. Specifically, with respect to CeO _2, was added Nd in a molar ratio of 5%, further, the Sm, the addition amount is obtained by adding varied from 0.5% to 40%.

  That is, the following eight types were used as targets when forming the oxide 70 of the recording layer 140R. Hereinafter, the ratio of the trivalent metal element 55 to the total metal element amount of the trivalent metal element 55 and Ce will be described as mol%.

That is, in CeO ₂ , Nd was added at a molar ratio of 5%, and Sm was added at molar ratios of 0.5%, 1%, 2%, 5%, 10%, 20%, 30% and 40%. Was used. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. The obtained samples were 9FR-Nd5Sm0.5 (9th Example, Film, Resistive, Nd amount 5 mol%, Sm amount 0.5 mol%), 9FR-Nd5Sm1, 9FR-Nd5Sm2, 9FR-Nd5Sm5, 9FR. -Nd5Sm10, 9FR-Nd5Sm20, 9FR-Nd5Sm30, 9FR-Nd5Sm40. The type and composition ratio of the trivalent metal element 55 introduced in each of these samples are the same as the type and composition ratio of the trivalent metal element 55 in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  As a result of performing 2θ / θ measurement by XRD on these samples, the fluorite structure was maintained in all samples except Sample 9FR-Nd5Sm40.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, a sample having the type and composition ratio of each trivalent metal element 55 is obtained as Sample 9FT-Nd5Sm0.5 (Ninth Example, Top electrode, Nd amount 5 mol%, Sm amount 0.5 mol%) 9FT-Nd5Sm1, 9FT-Nd5Sm2, 9FT-Nd5Sm5, 9FT-Nd5Sm10, 9FT-Nd5Sm20, 9FT-Nd5Sm30, and 9FT-Nd5Sm40.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in the samples 9FT-Nd5Sm0.5, 9FT-Nd5Sm1, 9FT-Nd5Sm2, 9FT-Nd5Sm5, 9FT-Nd5Sm10, 9FT-Nd5Sm20, and 9FT-Nd5Sm30, the ratio of the resistance between the on state and the off state is about 100 times. It was 500 times.

  In the samples 9FT-Nd5Sm0.5, 9FT-Nd5Sm1, 9FT-Nd5Sm2, 9FT-Nd5Sm5, 9FT-Nd5Sm10, and 9FT-Nd5Sm20, there were pads having a switching frequency N exceeding 10,000.

  Thus, when Nd and Sm were used as the trivalent metal element 55, the fluorite structure was maintained when the total ratio of the trivalent metal elements 55 was 35 mol% or less. In addition, good switching characteristics can be obtained with a composition ratio in this range.

(Tenth embodiment)
Also in the tenth embodiment, a plurality of metal elements selected from the lanthanoid group are used as the trivalent metal element 55 of the oxide 70 to be the recording layer 140R. However, in this case, Nd and Tm are used. Specifically, Nd is added to CeO ₂ at a molar ratio of 5%, and Tm is added by changing the addition amount from 0.5% to 40%.

  That is, the following eight types were used as targets when forming the oxide 70 of the recording layer 140R. Hereinafter, the ratio of the trivalent metal element 55 to the total metal element amount of the trivalent metal element 55 and Ce will be described as mol%.

That is, in CeO ₂ , Nd was added at a molar ratio of 5%, and further Tm was added at molar ratios of 0.5%, 1%, 2%, 5%, 10%, 20%, 30% and 40%. Was used. Using each of these targets, an oxide 70 film was formed on the same substrate as in the first example by the PLD method. 10FR-Nd5Tm0.5 (10th Example, Film, Resistive, Nd amount 5 mol%, Tm amount 0.5 mol%), 10FR-Nd5Tm1, 10FR-Nd5Tm2, 10FR-Nd5Tm5, 10FR -Nd5Tm10, 10FR-Nd5Tm20, 10FR-Nd5Tm30, 10FR-Nd5Tm40. The type and composition ratio of the trivalent metal element 55 introduced in each of these samples are the same as the type and composition ratio of the trivalent metal element 55 in each of the above targets. At this time, the film thickness was 10 nm, and the film formation rate was 0.84 nm / s.

  As a result of performing 2θ / θ measurement on these samples by XRD, all samples except Sample 10FR-Nd5Tm40 maintained the fluorite structure.

  In the same manner as in the first example, a Pt film to be the upper electrode 142 was formed with a thickness of 100 nm. Then, a sample having the type and composition ratio of each trivalent metal element 55 is obtained as Sample 10FT-Nd5Tm0.5 (10th Example, Top electrode, Nd amount 5 mol%, TT amount 0.5 mol%). 10FT-Nd5Tm1, 10FT-Nd5Tm2, 10FT-Nd5Tm5, 10FT-Nd5Tm10, 10FT-Nd5Tm20, 10FT-Nd5Tm30, 10FT-Nd5Tm40.

  Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. Note that the maximum number of switching times N is 10,000.

  As a result, in the samples 10FT-Nd5Tm0.5, 10FT-Nd5Tm1, 10FT-Nd5Tm2, 10FT-Nd5Tm5, 10FT-Nd5Tm10, 10FT-Nd5Tm20 and 10FT-Nd5Tm30, the ratio of the resistance between the on state and the off state is 100 to 500 times. It was twice.

  Further, in the samples 10FT-Nd5Tm0.5, 10FT-Nd5Tm1, 10FT-Nd5Tm2, 10FT-Nd5Tm5, 10FT-Nd5Tm10, and 10FT-Nd5Tm20, there were pads having a switching frequency N exceeding 10,000 times.

  Thus, when Nd and Tm were used as the trivalent metal element 55, the fluorite structure was maintained when the total ratio of the trivalent metal elements 55 was 35 mol% or less. Depending on the element, the trivalent metal element 55 can be doped up to 40%.

That is, in the tenth embodiment, Tm is introduced in place of Sm in the ninth embodiment, but the results are almost the same. When replacing part of the Ce element 50 site of CeO ₂ with a lanthanoid group element, it is highly possible that the property is determined by the physical atomic radius, and the same result is obtained even when doping other elements of the lanthanoid genus Is estimated to be obtained. Further, even in experiments with three or more types of lanthanoid groups, it is known from XRD measurement that the fluorite structure is always maintained when the total doping amount does not exceed 20 mol%. At least in this range of composition ratio By using any combination of any lanthanoid group element as the trivalent metal element 55, a nonvolatile memory element having excellent electrical performance and process resistance can be provided.

(Eleventh embodiment)
The eleventh embodiment uses TiN instead of Pt as the upper electrode 142 in the first embodiment. The rest is the same as in the first embodiment.
That is, using a CeO2 target containing 20% of Sm in a molar ratio of the metal element on the substrate, a film was formed at a thickness of 10 nm and a film formation rate of 0.84 nm / s to obtain Sample 11FR1. A metal mask provided with a large number of circular holes with a diameter of 50 microns is placed on the sample 11FR1, and TiN to be the upper electrode 142 is formed with a thickness of 100 nm by an RF sputtering apparatus, and the sample 11FT1 did. The film forming conditions at this time are the same as those in the first embodiment. Then, in the same manner as in the first example, the electrical characteristics of these samples were measured by changing the switching frequency N. The maximum number of switching times N is 1000 times.

  As a result, in the sample 11FT1, the ratio of the resistance between the on state and the off state was about 100 to 1000 times, which was almost the same result as in the first example. Also, regarding the switching frequency N, good results were shown up to 1000 times in which the experiment was performed.

As described above, in the nonvolatile memory element 140 according to the embodiment of the present invention, it is also possible to use a conductive layer such as TiN that is inexpensive and easy to use in addition to a noble metal such as Pt as an electrode that contacts the recording layer 140R. Electrical characteristics can be obtained. This is because, in the embodiment of the present invention, the recording layer 140R is an oxide having a fluorite structure containing CeO ₂ that is chemically stable and has chemical properties that are significantly different from those of various conductive layers used for electrodes and the like. This is because 70 is used.

(Second Embodiment)
The method for manufacturing a nonvolatile memory device according to the second embodiment of the present invention is configured to transfer information between a plurality of states having different resistances according to at least one of applied voltage and energized current. This is a method for manufacturing a nonvolatile memory element having a recording layer 140R capable of recording.

FIG. 10 is a flowchart illustrating the method for manufacturing the nonvolatile memory element according to the second embodiment.
As shown in FIG. 10, in the method for manufacturing the nonvolatile memory device according to the present embodiment, cerium and a trivalent metal element cerium are formed on the conductive layer provided on the substrate. A layer containing an oxide 70 having a fluorite structure containing different metal elements is formed (step S110).

  As the substrate, for example, a silicon substrate can be used, and a driving circuit for driving a nonvolatile memory device can be provided on the silicon substrate. In addition, for example, one of the lower electrode 141 and the upper electrode 142 described above can be used for the conductive layer. The conductive layer may be either the first wiring 110 or the second wiring 120.

  Thereby, a nonvolatile memory element excellent in electrical performance and process resistance performance can be provided.

  In the above, the oxide 70 layer can be formed by using at least one of the PLD method, the sputtering method, the CVD method, and the MOD method.

Hereinafter, specific examples will be described.
FIG. 11 is a schematic view illustrating the method for manufacturing the nonvolatile memory element according to the second embodiment.
That is, the figure illustrates three types of manufacturing methods, the figure (a) illustrates the case where the PLD method and the sputtering method are used, and the figure (b) illustrates the case where the CVD method is used. FIG. 4C illustrates the case where the MOD method is used.

  As shown in FIG. 11A, when the PLD method and the sputtering method are used, a film is formed using a target 56t that is a material of the oxide 70 that becomes the recording layer 140R, and the oxide 70 is obtained. At this time, a target having a composition ratio of the Ce element 50 and the trivalent metal element 55 in the oxide 70 to be the recording layer 140R can be used as the target 56t. Therefore, the oxide 70 having a stable composition ratio can be manufactured. Further, when using, for example, a binary sputtering apparatus that can use a plurality of targets, a target having a low composition ratio of the trivalent metal element 55 is used for one target, and the other is a trivalent metal element. Using a target having a high composition ratio of 55, the composition ratio can be adjusted, which is advantageous in production.

  As shown in FIG. 11B, when using the CVD method, for example, a Ce raw material 50g (gas) containing the Ce element 50 and an M raw material 55g (gas) containing the trivalent metal element 55 are used. Using the film while oxidizing, the oxide 70 to be the recording layer 140R is formed. At this time, for example, the flow rate of the Ce raw material 50 g and the M raw material 55 g is controlled, and, for example, the composition ratio of the formed film is detected during the film formation and fed back, thereby providing a highly accurate composition ratio. Can be realized. In addition, the raw material in CVD is not necessarily limited to two types, and three or more types can be used.

As shown in FIG. 11C, when using the MOD method which is a chemical solution method, for example, a solution 50 l for CeO ₂ and a solution 55 l for the trivalent metal element 55 are used. Thus, the amount of impurities such as water can be minimized by individually adjusting the solution. These solutions are mixed so as to obtain a composition ratio of Ce element 50 and trivalent metal element 55 in the target oxide 70 to obtain a mixed coating solution 56l. This mixed coating solution 56l is applied onto the substrate, for example. The method of application is arbitrary. Thereby, a gel film 57 is formed on the substrate. Thereafter, provisional baking is performed to obtain a provisional baking film 58, and then main baking is performed to obtain the oxide 70 serving as the recording layer 140R. That is, the composition ratio between the Ce element 50 and the trivalent metal element 55 in the oxide 70 can be controlled with high accuracy by the mixing ratio of the mixed coating solution 56l. In this method, after the formation of the gel film 57, the oxide 70 having good characteristics is obtained mainly through the heat treatment of the rapid baking and rapid cooling temporary baking and the main baking for promoting crystallization.

  Note that, in the above, depending on the method for forming the oxide 70 to be the recording layer 140R, the conductive layer on the substrate and the oxide 70 can be continuously formed. For example, the oxide 70 can be formed in succession to the formation of the conductive film to be the lower electrode 141. Further, the oxide 70 may be formed continuously with the film forming the rectifying element portion 150. Further, the oxide 70 may be formed in succession to the formation of the conductive film to be the upper electrode 142 and the various intermediate layers described above. As already described, the lower electrode 141 and the upper electrode 142 are also used as, for example, a bit wiring or a word wiring (for example, the first wiring 110 and the second wiring 120) for driving the nonvolatile memory element 140. be able to.

In the manufacturing method described above, the oxide 70 serving as the recording layer 140R is directly manufactured so that the Ce element 50 and the trivalent metal element 55 have a desired composition ratio. For example, the oxide 70 is made of CeO _2. A layer and a layer containing the trivalent metal element 55 may be provided, and the trivalent metal element 55 may be diffused into the layer made of CeO ₂ by a technique such as thermal diffusion. This method will be described below.

FIG. 12 is a flowchart illustrating another method for manufacturing the nonvolatile memory element according to the second embodiment.
As shown in FIG. 12, in another method for manufacturing the nonvolatile memory element according to this embodiment, first, cerium and a trivalent metal element are formed on a conductive layer provided on a substrate. Then, a first layer containing one of the metal elements different from cerium (trivalent metal element 55) is formed (step S210). Here, the first layer is a CeO ₂ layer containing cerium.

  Then, a second layer containing the other of cerium and the metal element (trivalent metal element 55) is formed on the first layer (step S220). Here, for example, the second layer is a layer containing the trivalent metal element 55. The second layer may be a metal layer of the trivalent metal element 55 or a compound layer containing the trivalent metal element 55.

Then, at least one of cerium and the metal element (trivalent metal element 55) is diffused between the first layer and the second layer to oxidize the fluorite structure containing cerium and the metal element. An object 70 is generated (step S230). For example, by heating the first layer and the second layer, the trivalent metal element 55 contained in the second layer diffuses into the first layer, and a part of the Ce element 50 of CeO _{2 in} the first layer is formed. The trivalent metal element 55 is substituted. Thereby, the oxide 70 containing the cerium element 50 and the trivalent metal element 55 and having a fluorite structure is generated.

  According to this method, it becomes easy to control the ratio of the Ce element 50 and the trivalent metal element 55 in the direction of the thickness of the recording layer 140R, for example, process compatibility such as chemical resistance. And electrical characteristics such as operating voltage can be easily achieved at a higher level.

  In the above, a layer containing the trivalent metal element 55 may be formed in step S210, and a layer containing the Ce element 50 may be formed in step S220.

(Third embodiment)
The nonvolatile memory device 10 according to the third embodiment of the present invention is a cross-point type nonvolatile memory device using the nonvolatile memory element according to the embodiment of the present invention.
The structural configuration related to the nonvolatile memory element 140 and the wiring in the nonvolatile memory device 10 has already been described with reference to FIGS. Hereinafter, the electrical configuration and operation of the nonvolatile memory device 10 will be described.

FIG. 13 is a schematic circuit diagram illustrating the configuration of the nonvolatile memory device according to the third embodiment of the invention.
As shown in FIG. 13, in the nonvolatile memory device 10 according to the present embodiment, the strip-shaped first wiring 110 extending in the X-axis direction on the main surface of the substrate 105 (not shown), that is, Word lines WL (word lines WL _i−1 , WL _i , WL _{i + 1} ) are provided. Then, strip-shaped second wiring 120 extending in the Y-axis direction perpendicular to the X axis in the substrate 105 within a plane parallel to the main surface of the (not shown), i.e., the bit lines BL (bit lines _{BL j-1,} BL _j , BL _{j + 1} ) are provided to face the first wiring 110 (word wiring WL).
In the above example, the first wiring and the second wiring are orthogonal to each other, but the first wiring and the second wiring may be crossed (non-parallel).
In the above, the suffix i and the suffix j are arbitrary. That is, in the figure, an example in which three first wirings 110 and three second wirings 120 are provided is shown, but the present invention is not limited to this, and the first wiring 110 and the second wiring 120 are provided. The number of is arbitrary. In this specific example, the first wiring 110 becomes the word wiring WL, and the second wiring 120 becomes the bit wiring BL. However, the first wiring 110 may be the bit wiring BL and the second wiring 120 may be the word wiring WL. In the following description, it is assumed that the first wiring 110 is the word wiring WL and the second wiring 120 is the bit wiring BL.

  As shown in the figure, the nonvolatile memory element 140 is sandwiched between the first wiring 110 and the second wiring 120. The nonvolatile memory element 140 can be any of the nonvolatile memory elements according to the embodiments and examples of the present invention.

For example, one end of each of the word lines WL _i−1 , WL _i , WL _{i + 1} is connected to a word line driver 110D having a decoder function via a MOS transistor RSW as a selection switch, and a bit line BL _j−1. , BL _j , BL _{j + 1} are connected to a bit line driver 120D having a decoder and a read function via a MOS transistor CSW as a selection switch.

Selection signals R _i−1 , R _i , and R _{i + 1} for selecting one word line (row) are input to the gate of the MOS transistor RSW, and one bit line is input to the gate of the MOS transistor CSW. Selection signals C _i−1 , C _i , and C _{i + 1} for selecting (column) are input.

The memory cell 148 including the nonvolatile memory element 140 is disposed at an intersection of the word lines WL _i−1 , WL _i , WL _{i + 1} and the bit lines BL _j−1 , BL _j , BL _{j + 1} . This is a so-called cross-point cell array structure.

  As already described, a rectifying element unit 150 for preventing a sneak current during recording / reproduction can be added between the intersections of the first wiring 110 and the second wiring 120.

  As described above, the nonvolatile memory device 10 according to this embodiment includes any one of the nonvolatile memory elements 140 according to the embodiment of the present invention, the application of a voltage to the recording layer 140R of the nonvolatile memory element 140, and the recording layer. A drive unit 600 that records information by causing the recording layer 140R to transition between the plurality of states having different resistances by at least one of supplying a current to the 140R.

  Here, the drive unit 600 includes, for example, at least a part of the MOS transistor RSW, the word line driver 110D, the MOS transistor CSW, and the bit line driver 120D.

  The non-volatile memory device 10 further includes a word line WL and a bit line BL provided so as to sandwich the non-volatile memory element 140, and the driving unit 600 stores the non-volatile memory via the word line WL and the bit line BL. At least one of applying a voltage to the recording layer 140R of the element 140 and applying a current to the recording layer is performed.

  Since the nonvolatile memory device 10 according to this embodiment uses any one of the nonvolatile memory elements according to the embodiments and examples of the present invention, the nonvolatile memory device having excellent electrical performance and process resistance performance A storage device can be provided.

  Then, like the nonvolatile memory devices 20 and 21 illustrated in FIG. 5, the first wiring 110, the second wiring 120, and the nonvolatile memory element 140 (recording layer 140 </ b> R) and the rectifying element unit 150 sandwiched therebetween. In the case of a nonvolatile memory device having a three-dimensional structure in which a plurality of layers are stacked, various heat treatments and chemical treatments are performed when forming each layer. Therefore, the thermal history and the history of chemical treatment are different between the lower recording layer 140R formed earlier and the upper recording layer 140R formed later.

  At this time, if the heat resistance and chemical resistance of the recording layer 140R are low and the process consistency with other materials is low, the characteristics of the recording layer 140R in each of the above layers will be different, which is practically large. It becomes a problem. At this time, by using the nonvolatile memory elements according to the embodiments and examples of the present invention, the recording layer 140R has high heat resistance and chemical resistance and high process consistency with other materials. The recording layer 140R has uniform characteristics, is practical, and can provide a higher-density nonvolatile memory device.

(Fourth embodiment)
The nonvolatile memory device according to the fourth embodiment is a probe memory type nonvolatile memory device.
FIG. 14 is a schematic perspective view illustrating the configuration of the nonvolatile memory device according to the fourth embodiment of the invention.
FIG. 15 is a schematic plan view illustrating the configuration of the nonvolatile memory device according to the fourth embodiment of the invention.

  As shown in FIGS. 14 and 15, in the nonvolatile storage device 30 according to the fourth embodiment of the present invention, the storage medium 510 is disposed on the XY scanner 516. In the storage medium 510, the recording layer 140 </ b> R of the nonvolatile storage element 140 is disposed on the conductive layer 521 provided on the substrate 520. A protective layer 540 is provided on the recording layer 140R.

A probe array 528 is disposed to face the recording layer 140R.
The probe array 528 includes a substrate 523 and a plurality of probes 524 arranged in an array on the main surface of the substrate 523. Each of the plurality of probes 524 is composed of a cantilever, for example, and is driven by multiplex drivers 525 and 526.
Each of the plurality of probes 524 can be individually operated using the microactuator in the substrate 523. However, all the probes 524 can be collectively operated to access the data area 531 of the storage medium 510. .

First, using the multiplex drivers 525 and 526, all the probes 524 are reciprocated at a constant cycle in the X direction, for example, and the position information in the Y direction is read from the servo area of the storage medium 510. The position information in the Y direction is transferred to the driver 515.
The driver 515 drives the XY scanner 516 based on this position information, moves the storage medium 510 in the Y direction, and positions the storage medium 510 and the probe 524.
When the positioning of both is completed, data reading or writing is performed simultaneously and continuously on all the probes 524 on the data area.

Data reading and writing are continuously performed because the probe 524 reciprocates in the X direction. In addition, data reading and writing are performed row by row in the data area by sequentially changing the position of the nonvolatile memory element 140 in the Y direction.
Alternatively, the recording layer 140R may be reciprocated in the X direction at a constant period to read position information from the storage medium 510, and the probe 524 may be moved in the Y direction.

  The layer to be the recording layer 140R has a plurality of data areas 531 and servo areas 532 arranged at both ends of the plurality of data areas 531 in the X direction. The plurality of data areas 531 occupy the main part of the layer that becomes the recording layer 140R.

  Servo burst signals are stored in the servo area 532. The servo burst signal indicates position information in the Y direction within the data area 531.

  In addition to these pieces of information, an address area (not shown) for storing address data and a preamble area (not shown) for synchronization are arranged in the recording layer 140R.

  The data and servo burst signal are stored in the recording layer 140R as storage bits (electrical resistance fluctuation). Information of “1” and “0” of the storage bit is read by detecting the electric resistance of the recording layer 140R.

In this specific example, one probe 524 is provided corresponding to one data area 531, and one probe 524 is provided for one servo area 532.
The data area 531 is composed of a plurality of tracks. The track of the data area 531 is specified by the address signal read from the address area. Also, the servo burst signal read from the servo area 532 moves the probe 524 to the center of the track, and reduces the reading error of the stored bit.

  The nonvolatile memory device 30 having such a configuration includes the nonvolatile memory element 140 having the recording layer 140R, the application of voltage to the recording layer 140R of the nonvolatile memory element, and the energization of current to the recording layer 140R. A drive unit 600a that records information by causing the recording layer 140R to transition between the plurality of states having different resistances by at least one of them. In the above, as the nonvolatile memory element 140, any nonvolatile memory element according to the embodiment and examples of the present invention can be used. The multiplex drivers 525 and 526 can be used for the drive unit 600a.

  The non-volatile storage device 30 further includes a probe 524 provided alongside the non-volatile storage element 140, and the drive unit 600a uses the probe 524 as a recording unit of the recording layer 140R of the non-volatile storage element 140. On the other hand, at least one of application of the voltage and energization of the current is performed.

  Since the nonvolatile memory device 30 of this example uses any nonvolatile memory element of the nonvolatile memory elements according to the embodiments and examples of the present invention, the nonvolatile memory having excellent electrical performance and process resistance performance A device can be provided.

(Fifth embodiment)
The nonvolatile memory device according to the fifth embodiment of the present invention is a flash memory type nonvolatile memory device.
FIG. 16 is a schematic cross-sectional view illustrating the configuration of the main part of a nonvolatile memory device according to the fifth embodiment of the invention.
FIG. 17 is a schematic view illustrating the configuration of the nonvolatile memory device according to the fifth embodiment of the invention.

  As shown in FIG. 16, the nonvolatile memory device 31 according to the present embodiment includes a flash memory type memory cell 448, and this memory cell 448 has a structure of a MIS (Metal-Insulator-Semiconductor) transistor 450. Have

  That is, diffusion layers 420 a and 420 b are formed in the surface region of the semiconductor substrate 410. On the channel region 425 between the diffusion layers 420a and 420b, a gate insulating film 430 and a gate electrode 440 thereon are provided. Further, between the gate insulating film 430 and the gate electrode 440, A recording layer 140R of the nonvolatile memory element 140 is provided. Any one of the nonvolatile memory elements according to the embodiments and examples of the present invention is used for the nonvolatile memory element 140.

  The semiconductor substrate 410 may be a well region. The semiconductor substrate 410 and the diffusion layers 420a and 420b have conductivity types opposite to each other. The gate electrode 440 becomes a word wiring, and for example, conductive polysilicon is used.

  In this case, a driver 600b described later is provided connected to the gate electrode 440. The drive unit 600b performs at least one of application of a voltage to the recording layer 140R and energization of a current to the recording layer 140R through the gate electrode 440.

  In the above, any of the lower electrode 141 and the upper electrode 142 provided in contact with the recording layer 140R of the nonvolatile memory element 140 may be used as the gate electrode 440, for example.

  In the memory cell 448 having such a structure, the threshold value of the MIS transistor 450 can be changed by changing the resistance of the recording layer 140R according to the potential applied to the gate electrode 440. For example, when the recording layer 140R is in a high resistance state, this corresponds to the gate insulating film being substantially thicker in the MIS transistor 450. At this time, the threshold value of the MIS transistor 450 is increased. On the other hand, for example, when the recording layer 140R is in the low resistance state, this corresponds to the fact that the gate insulating film is substantially thinner in the MIS transistor 450. At this time, the threshold value of the MIS transistor 450 is lowered. Information can be reproduced by reading the change in threshold value. Thus, the nonvolatile memory device 31 can be used as a nonvolatile memory device by changing the threshold value of the memory cell based on a principle similar to that of a flash memory.

  As illustrated in FIG. 17, the nonvolatile memory device 31 according to the present embodiment can be configured as a NAND flash memory, for example. That is, the nonvolatile memory device 31 includes a NAND cell unit 460 and a drive unit 600b connected thereto.

  For example, the NAND cell unit 460 includes a NAND string composed of a plurality of memory cells 448 connected in series, and a total of two select gate transistors 471 and 472 connected to one end of each NAND string.

  The gate electrode 440 of each memory cell 448 is electrically connected to the driving unit 600b through the word line WL. Note that the driving unit 600 may be provided on a substrate on which the NAND cell unit 460 is provided, or may be provided on a different substrate.

The select gate transistor 471 is connected to the source line SL, and the select gate transistor 472 is connected to the bit line BL.
Then, by controlling the potential applied to the select gates 471g and 472g of the select gate transistors 471 and 472 and the word wiring WL, desired information is recorded in each memory cell 448, and the recorded information is also recorded. Can be played.

  That is, the nonvolatile memory device 31 according to the present embodiment includes at least one of the nonvolatile memory element 140, voltage application to the recording layer 140R of the nonvolatile memory element 140, and current supply to the recording layer 140R. Accordingly, the recording layer 140R includes a driving unit 600b that records information by changing between the plurality of states having different resistances. In the above, as the nonvolatile memory element 140, any nonvolatile memory element according to the embodiment and examples of the present invention can be used.

  In this specific example, the nonvolatile memory device 31 further includes a MIS transistor 450 including a gate electrode 440 and a gate insulating film 430 sandwiching the nonvolatile memory element 140, and the drive unit 600 b is nonvolatile via the gate electrode 440. At least one of application of voltage to the recording layer 140R of the volatile memory element 140 and energization of current to the recording layer 140R is performed.

  That is, the nonvolatile memory device 31 includes first and second conductive semiconductor regions (diffusion layer 420a and diffusion layer 420b) provided in the first conductive semiconductor substrate (semiconductor substrate 410), a first And a gate electrode 440 for controlling conduction / non-conduction between the first conductivity type semiconductor region (channel region 425) between the first conductivity type and the second second conductivity type semiconductor region. The nonvolatile memory element 140 is disposed between the gate electrode 440 and the first conductivity type semiconductor region, and the driving unit 600b is configured to pass the gate electrode 440 through the nonvolatile memory element 140. At least one of application of a voltage to the recording layer 140R and energization of a current to the recording layer 140R.

  Thereby, information can be recorded and reproduced by the same operation as the flash memory. Since the nonvolatile memory device 31 uses any one of the nonvolatile memory elements according to the embodiments and examples of the present invention, a nonvolatile memory device having excellent electrical performance and process resistance performance is provided. Can be provided.

  Although an example of a NAND type nonvolatile memory device has been described above, the present invention is not limited to this, and can be applied to a nonvolatile memory device having an arbitrary configuration such as a NOR type or a two-transistor type.

The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, with regard to the specific configuration of each element constituting the nonvolatile memory element, the manufacturing method thereof, and the nonvolatile memory device, those skilled in the art will implement the present invention in the same manner by appropriately selecting from a well-known range. As long as an effect can be obtained, it is included in the scope of the present invention.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

  In addition, all nonvolatile memory elements that can be implemented by those skilled in the art based on the nonvolatile memory element, the manufacturing method thereof, and the nonvolatile memory device described above as embodiments of the present invention, and the manufacturing method thereof. The nonvolatile memory device also belongs to the scope of the present invention as long as it includes the gist of the present invention.

  In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

1 is a schematic view illustrating the configuration of a nonvolatile memory element according to a first embodiment of the invention. 1 is a schematic view illustrating the configuration of a nonvolatile memory device to which a nonvolatile memory element according to a first embodiment of the invention is applied. 1 is a schematic cross-sectional view illustrating the configuration of a nonvolatile memory device to which a nonvolatile memory element according to a first embodiment of the invention is applied. FIG. 6 is a schematic cross-sectional view illustrating the configuration of another nonvolatile memory element to which the nonvolatile memory device according to the first embodiment of the invention is applied. FIG. 3 is a schematic perspective view illustrating the configuration of another nonvolatile memory device to which the nonvolatile memory element according to the first embodiment of the invention is applied. FIG. 6 is a graph illustrating characteristics of the nonvolatile memory element according to the first example of the invention. It is a schematic diagram illustrating the analysis result of the nonvolatile memory element according to the first example of the invention. It is a schematic diagram which illustrates the analysis result regarding the characteristic of the non-volatile memory element of a 1st comparative example. It is a schematic diagram which illustrates the structure of the oxide used for the non-volatile memory element of a 2nd comparative example. FIG. 6 is a flowchart illustrating a method for manufacturing a nonvolatile memory element according to a second embodiment. FIG. 10 is a schematic view illustrating a method for manufacturing a nonvolatile memory element according to a second embodiment. FIG. 6 is a flowchart illustrating another method for manufacturing a nonvolatile memory element according to the second embodiment. FIG. 6 is a schematic circuit diagram illustrating the configuration of a nonvolatile memory device according to a third embodiment of the invention. FIG. 9 is a schematic perspective view illustrating the configuration of a nonvolatile memory device according to a fourth embodiment of the invention. FIG. 6 is a schematic plan view illustrating the configuration of a nonvolatile memory device according to a fourth embodiment of the invention. FIG. 9 is a schematic cross-sectional view illustrating the configuration of a main part of a nonvolatile memory device according to a fifth embodiment of the invention. FIG. 9 is a schematic view illustrating the configuration of a nonvolatile memory device according to a fifth embodiment of the invention.

Explanation of symbols

10, 20, 21, 30, 31 Nonvolatile memory device 50 Cerium element (Ce element)
50 g Ce raw material 50 l CeO ₂ solution 55 Metal element capable of obtaining trivalence (trivalent metal element)
55 g M raw material containing trivalent metal element 55 l Solution for trivalent metal element 56 l Mixed coating solution 56 t Target 57 Gel film 58 Pre-baked film 60 Oxygen 61 Oxygen deficiency 70 Oxide 105 Substrate 110 First wiring 110D Word wiring driver 120 1st 2 wiring 120D bit wiring driver 130 intersection 140, 149p, 149q non-volatile memory element 140R recording layer 141 lower electrode 141b intermediate layer 142 upper electrode 142b intermediate layer 148 memory cell 150 rectifying element unit 150b intermediate layer 160 insulating unit 410 semiconductor substrate 420a , 420b Diffusion layer 425 Channel region 430 Gate insulating film 440 Gate electrode 448 Memory cell 450 MIS transistor 460 NAND cell unit 471, 472 Select gate transistor 71 g, 472 g select gate 510 storage medium 515 driver 516 XY scanner 520,523 substrate 521 conductive layer 524 probes 525 and 526 multiplexers driver 528 probe array 531 data area 532 servo areas 540 protective layer 600,600a, 600b driver BL, BL _{j −1} , BL _j , BL _{j + 1} bit wiring SL source line WL, WL _i−1 , WL _i , WL _{i + 1} word wiring

Claims (20)

  A fluorite-type structure oxide containing cerium and a trivalent metal element different from cerium, and having different resistances depending on at least one of applied voltage and energized current A non-volatile memory element comprising a recording layer capable of transitioning between a plurality of states.   The nonvolatile memory element according to claim 1, wherein a molar ratio of cerium to a total of metal elements contained in the oxide is higher than 60%.   3. The nonvolatile memory element according to claim 1, wherein a molar ratio of the metal element capable of taking the trivalence with respect to a total of metal elements contained in the oxide is 0.1% or more.   The nonvolatile memory element according to any one of 1 to 3, wherein the trivalent metal element includes at least one of lanthanoid group elements.   The non-volatile memory according to any one of 1 to 4, wherein the trivalent metal element includes at least one selected from the group consisting of La, Nd, Sm, Gd, and Yb. element.   The non-volatile memory according to claim 1, wherein a molar ratio of the metal element capable of taking the trivalence with respect to a total of metal elements contained in the oxide is 20% or less. element.   The non-volatile memory element according to any one of 1 to 4, wherein the trivalent metal element includes at least one of Sm and Eu.   8. The nonvolatile memory element according to claim 7, wherein a molar ratio of the metal element capable of taking the trivalence with respect to a total of metal elements contained in the oxide is 40% or less.   The nonvolatile memory element according to claim 1, wherein the recording layer has a thickness of 5 nm to 50 nm.   The recording layer further includes an electrode that performs at least one of application of the voltage and energization of the current, and the electrode includes Pt, Ti, N, W, Nb, Hf, Ta, Zr, Mo, Ni, Mn, The nonvolatile memory element according to claim 1, comprising at least one selected from the group consisting of Co, Cu, and Zn. A method for manufacturing a nonvolatile memory element having a recording layer capable of transitioning between a plurality of states having different resistances depending on at least one of an applied voltage and an energized current,
A layer containing an oxide having a fluorite structure containing cerium and a trivalent metal element that is different from cerium is formed over a conductive layer provided over the substrate. A method for manufacturing a nonvolatile memory element.   12. The nonvolatile layer according to claim 11, wherein the oxide layer is formed using at least one of a pulsed laser deposition method, a sputtering method, a chemical vapor deposition method, and a metal organic chemical vapor deposition method. A method for manufacturing a memory element. A method for manufacturing a nonvolatile memory element having a recording layer capable of transitioning between a plurality of states having different resistances depending on at least one of an applied voltage and an energized current,
On the conductive layer provided on the substrate, a first layer containing one of cerium and a trivalent metal element that is different from cerium is formed,
On the first layer, a second layer containing the other one of cerium and the metal element is formed,
Dispersing at least one of cerium and the metal element between the first layer and the second layer to produce an oxide having a fluorite structure containing cerium and the metal element. A method for manufacturing a nonvolatile memory element. The nonvolatile memory element according to any one of claims 1 to 10,
The recording layer is transitioned between a plurality of states having different resistances by at least one of applying a voltage to the recording layer of the nonvolatile memory element and applying a current to the recording layer. A drive unit for recording information,
A non-volatile storage device comprising: A word line and a bit line provided so as to sandwich the nonvolatile memory element;
The driving unit performs at least one of application of a voltage to the recording layer of the nonvolatile memory element and energization of a current to the recording layer through the word wiring and the bit wiring. 15. The non-volatile memory device according to claim 14, wherein   Provided between the word line and the bit line and the non-volatile memory element, and controls at least one of the polarity of the voltage applied to the non-volatile memory element and the direction of the energized current. The nonvolatile memory device according to claim 15, further comprising a rectifying element section.   16. The multilayer structure including the word wiring, the bit wiring, and the nonvolatile memory element provided between the word wiring and the bit wiring is stacked. The nonvolatile memory device according to 16. A probe provided alongside the nonvolatile memory element;
15. The drive unit performs at least one of application of the voltage and energization of the current to a recording unit of the recording layer of the nonvolatile memory element via the probe. Nonvolatile storage device. A MIS transistor including a gate electrode and a gate insulating film sandwiching the nonvolatile memory element;
The drive unit performs at least one of application of a voltage to the recording layer of the nonvolatile memory element and energization of a current to the recording layer through the gate electrode. Item 15. The nonvolatile memory device according to Item 14. First and second second conductivity type semiconductor regions provided in the first conductivity type semiconductor substrate;
A first conductivity type semiconductor region between the first and second second conductivity type semiconductor regions;
A gate electrode for controlling conduction / non-conduction between the first and second second conductivity type regions;
Further comprising
The nonvolatile memory element is disposed between the gate electrode and the first conductivity type semiconductor region,
The drive unit performs at least one of application of a voltage to the recording layer of the nonvolatile memory element and energization of a current to the recording layer through the gate electrode. Item 15. The nonvolatile memory device according to Item 14.