JP2010122857A - Backup device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a backup device which can cope with power failure just after main power supply is applied and momentary power failure and causes a small risk in online exchange. <P>SOLUTION: Electric double-layer capacitors C1, C2 and C3 of medium capacity (for example, 100 F) are provided as backup capacitors. The backup capacitors C1, C2 and C3 are connected in parallel, and charging is made first to the backup capacitor C1 after main power supply is applied. After the charging to the backup capacitor C1 is completed, a first electronic switch SW1 is turned on to start charging to the backup capacitor C2. After the charging to the backup capacitor C2 is completed, a second electronic switch SW2 is turned on to start charging to the backup capacitor C3. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a backup device that continues supplying power to a load by discharging electric charge stored in a backup capacitor when a main power supply is shut off.

  Conventionally, in a process controller that controls plant equipment, it is necessary to retain operation data at that time when the main power is cut off and use it at the next startup. For this purpose, a backup capacitor is provided, and power supply to the CPU is continued by discharging the charge stored in the backup capacitor for a few seconds to several tens of seconds after the main power supply is cut off. A method of writing data in a flash ROM (Read Only Memory) or the like is employed (see, for example, Patent Document 1).

  FIG. 5 shows a main part of a conventional process controller using a backup capacitor. In the figure, 1 is a main power supply circuit of a process controller, 2 is a backup capacitor, 3 is a charging circuit to the backup capacitor 2 (constant current charging circuit), and 4 is dropped to stabilize the output voltage from the backup capacitor 2 The regulator circuit 5 is an OR circuit that outputs the higher one of the output voltage from the main power supply circuit 1 and the output voltage from the regulator circuit 4, 6 is a CPU, and 7 is an output voltage from the OR circuit 5 required by the CPU 6. A regulator circuit that drops and stabilizes the voltage, 8 is a flash ROM that is a non-volatile memory, and 9 is a power interruption detection circuit that detects the interruption of the output voltage in the main power supply circuit 1.

  In this process controller, the backup capacitor 100, the charging circuit 3, and the regulator circuit 4 constitute a backup device 100, and a large-capacity capacitor called an electric double layer capacitor is used as the backup capacitor 2. In this example, a 300 F capacitor is used. In addition, when the backup capacitor 2 is fully charged, the output voltage from the regulator circuit 4 to the OR circuit 5 is slightly lower than the output voltage from the main power supply circuit 1 to the OR circuit 5.

[When main power is turned on]
When the main power supply circuit 1 is turned on, the output voltage from the main power supply circuit 1 is sent to the regulator circuit 7 via the OR circuit 5, and the voltage stabilized by the regulator circuit 7 is supplied to the CPU 6 as the operating voltage. The Further, the output voltage from the main power supply circuit 1 is supplied to the charging circuit 3, and charging of the backup capacitor 2 is started by a constant current supplied from the charging circuit 3.

  For example, the voltage output from the main power supply circuit 1 to the OR circuit 6 is 5.5V, and the voltage output to the charging circuit 3 is 6V. In this case, the output voltage of the backup capacitor 2 rises to 6V when charging is completed. The output voltage of the backup capacitor 2 is sent to the regulator circuit 4. The regulator circuit 4 stabilizes the output voltage of the backup capacitor 2 by dropping it to 5 V or less, for example.

  In this case, the output voltage from the regulator circuit 4 is supplied to the OR circuit 5, but the output voltage from the main power supply circuit 1 to the OR circuit 5 is higher, so that even after the backup capacitor 2 is completely charged, the main power supply circuit 1 is supplied to the regulator circuit 7, and an operating voltage (for example, 3.3 V) obtained from the output voltage from the main power supply circuit 1 is supplied to the CPU 6.

[Normal operation]
The CPU 6 operates in response to the supply of the operating voltage obtained from the output voltage from the main power supply circuit 1, collects data of plant input devices (for example, sensors, pressure gauges, flow meters, etc.), and collects the collected data. The control calculation is executed based on the above, and the output devices (for example, valves, pumps, etc.) of the plant are controlled.

[When main power is cut off]
For example, it is assumed that the main power supply circuit 1 is turned off due to a power failure. In this case, since the output voltage from the main power supply circuit 1 to the OR circuit 5 disappears, the output voltage from the regulator circuit 4 is sent to the regulator circuit 7 through the OR circuit 5 and is obtained from the output voltage from the regulator circuit 4. The operating voltage is supplied to the CPU 6. On the other hand, when the main power supply circuit 1 is turned off, the power-off detection circuit 9 outputs a main power-off detection signal to the CPU 6.

  When the main power cut-off detection signal is input from the power cut-off detection circuit 9, the CPU 6 determines that the main power cut-off has occurred, and saves the operation data at that time in the flash ROM 8 as necessary data at the next activation. At this time, the CPU 6 operates by receiving the operating voltage obtained from the output voltage from the regulator circuit 4, that is, the power supplied from the backup capacitor 2, and is necessary within the time when the power can be supplied from the backup capacitor 2. Save data to flash ROM7.

  There is also an instantaneous voltage drop (hereinafter referred to as an instantaneous power failure) that does not lead to a power outage when the main power is shut off. In the case of this instantaneous power failure, the operating voltage obtained from the output voltage from the regulator circuit 4 is supplied to the CPU 6 in the same manner as at the time of the power failure. Thereby, even if an instantaneous power failure occurs, it is possible to prevent the operating voltage to the CPU 6 from being interrupted and the CPU 6 from being reset.

JP-A-8-336233

  In the process controller described above, the capacity of the backup capacitor 2 is increased in order to secure the time required for saving data to the flash ROM 8 in the event of a power failure. The charging current to the backup capacitor 2 is limited to a value that does not affect the supply current from the main power supply circuit 1 to the CPU 6, and must be a small value. For this reason, it takes a considerable time to charge the backup capacitor 2.

  In general, the capacity of the backup capacitor 2 is larger than an expected capacity in consideration of a capacity decrease due to aging. For example, in the process controller shown in FIG. 5, the assumed capacity of the backup capacitor 2 is 200 F, and a 300 F capacitor having a margin is used. As described above, if the capacity of the capacitor is provided with a margin, the charging time is further increased.

  FIG. 6 shows the relationship between the output voltage (charging voltage) of the backup capacitor 2 and the charging time. In this relationship, the charging time required until the output voltage of the backup capacitor 2 reaches the value VCL that can secure the operating voltage of the CPU 6 becomes longer in proportion to the capacity of the backup capacitor 2. If a power failure occurs after the main power is turned on and before the output voltage of the backup capacitor 2 reaches VCL, the operating voltage to the CPU 6 cannot be secured, and the data can be saved to the flash ROM 8. Not done. Even if a power failure does not occur, if an instantaneous power failure occurs, the CPU 6 is reset. In particular, at the time of start-up, since many devices start at the same time, the power supply becomes unstable and there is a high risk of an instantaneous power failure. This causes problems such as the process controller failing to start next time or running away.

  In the process controller described above, there are cases where it is desired to replace the backup capacitor 2 with a new capacitor during operation of the process controller. This replacement of the backup capacitor during operation of the process controller is called online replacement. However, in this case, it is impossible to cope with a power failure or an instantaneous power failure while the backup capacitor 2 is removed, and the risk of online replacement is great.

  The present invention has been made to solve such a problem, and the object of the present invention is to cope with a power outage or an instantaneous power outage immediately after the main power is turned on and has a low risk of online replacement. It is to provide a backup device.

  In order to achieve such an object, the present invention provides a backup device that continues to supply power to a load by discharging electric charge stored in a backup capacitor when the main power is shut off. A first backup capacitor that is charged by being supplied, a first switch that is turned on when the charging voltage of the first backup capacitor reaches a predetermined voltage value, and a first backup capacitor And a second backup capacitor connected in parallel via one switch and charged by receiving a current supplied from a main power source passing through the first switch when the first switch is turned on. It is characterized by that.

  In the present invention, the second switch that is turned on when the charging voltage of the second backup capacitor reaches a predetermined voltage value, and the second backup capacitor are connected in parallel via the second switch. A third backup capacitor that is charged by receiving a current supplied from the main power source that passes through the second switch when the second switch is turned on may be provided.

  According to the present invention, the first backup capacitor and the second backup capacitor are provided as the backup capacitors. When the main power supply is turned on, the charging of the first backup capacitor is started first. When the charging voltage of the first backup capacitor increases and reaches a predetermined voltage value, the first switch is turned on and charging of the second backup capacitor is started. When the charging voltage of the second backup capacitor increases and reaches a predetermined voltage value, the second switch is turned on and charging of the third backup capacitor is started.

  For example, the capacity of the first backup capacitor is 100F, the capacity of the second backup capacitor is 100F, and the capacity of the third backup capacitor is 100F. In addition, a predetermined voltage value when the first switch is turned on is set as a voltage value when the charging of the first backup capacitor is completed, and a predetermined voltage value when the second switch is turned on is the second backup value. The voltage value when the capacitor is fully charged. In this case, the first backup capacitor is fully charged in a short time, and charging of the second backup capacitor is started with the first backup capacitor being charged. The second backup capacitor is also fully charged in a short time, and charging of the third backup capacitor is started in a state where the second backup capacitor is completely charged. The third backup capacitor is also fully charged in a short time.

  Thus, after charging the first backup capacitor after the main power is turned on, even if an instantaneous power failure occurs, the charge stored in the first backup capacitor is discharged, thereby causing a CPU or the like. The power supply to the load can be continued. Further, after charging the second backup capacitor after the main power is turned on, even if a power failure occurs, the CPU stores the charge stored in the first and second backup capacitors by discharging the charge. It is possible to secure power supply to a load such as data and save data in a nonvolatile memory. In addition, after charging the third backup capacitor after the main power is turned on, even if the capacities of the first and second backup capacitors are reduced due to aging, they are stored in the third backup capacitor. It is possible to make up for the shortage of the power supplied to the load by the charged electric charge and cope with a power failure.

  Further, during operation, when the first backup capacitor is removed, the second and third backup capacitors are left in a fully charged state, and when the second backup capacitor is removed, the first and third backup capacitors are When the third backup capacitor is removed after being charged, the first and second backup capacitors are left charged. In this case, the remaining backup capacitor can cope with at least an instantaneous power failure in the meantime (in some cases, it can also cope with a power failure), and the risk of online replacement is reduced.

  According to the present invention, by providing a plurality of backup capacitors as backup capacitors and charging the plurality of backup capacitors in order, the capacity of each backup capacitor is reduced, and the charging time of the backup capacitors is reduced. It can be shortened, and it is possible to respond to power outages and instantaneous power outages immediately after the main power is turned on. In addition, it is possible to remove and replace the backup capacitors one by one, and the remaining backup capacitors can cope with at least an instantaneous power failure therebetween, thereby reducing the risk of online replacement.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a diagram showing a main part of an embodiment of a process controller using a backup device according to the present invention. 5, the same reference numerals as those in FIG. 5 denote the same or equivalent components as those described with reference to FIG. 5, and the description thereof will be omitted.

  In this process controller, the backup capacitors C1, C2, and C3, the charging circuit 3, the regulator circuit 4, and the control circuit 10 constitute a backup device 200. As the backup capacitors C1, C2, and C3, electric double layer capacitors are used, and their capacities are 100F.

  That is, while the capacity of the backup capacitor 2 in the conventional process controller (FIG. 5) is as large as 300 F, the capacity of the backup capacitors C1, C2, and C3 used in this embodiment is as high as 100 F. It is supposed to be.

  For the backup capacitors C1, C2, and C3, a control circuit 10 is provided for controlling the charging start timing for the backup capacitors C1, C2, and C3.

  FIG. 2 shows an outline of the internal configuration of the control circuit 10. The control circuit 10 includes a first electronic switch SW1, a second electronic switch SW2, a first voltage detection circuit VDC1, a second voltage detection circuit VDC2, and diodes D1, D2, and D3. .

  In this process controller, the backup capacitor C1 is charged via the diode D1 in the control circuit 10 with the charging current (output voltage) to the input line L1 of the charging current from the charging circuit (constant current charging circuit) 3 and the regulator circuit 4. To the output line L2. The diode D1 is connected between the backup capacitor C1 and the line L2 with the anode thereof on the backup capacitor C1 side.

  The backup capacitor C2 is connected between the line L1 and the line L2 (in parallel with the backup capacitor C1) via the diode D2 in the control circuit 10 and the first electronic switch SW1. The diode D2 is connected between the backup capacitor C2 and the line L2 with the anode thereof on the backup capacitor C2 side. The first electronic switch SW1 is connected between the backup capacitor C2 and the line L1.

  The backup capacitor C3 is connected between the line L1 and the line L2 (in parallel with the backup capacitor C2) via the diode D3 in the control circuit 10 and the second electronic switch SW2. The diode D3 is connected between the backup capacitor C2 and the line L2 with the anode thereof on the backup capacitor C3 side. The second electronic switch SW2 is connected between the backup capacitor C3 and the line L1.

  In the control circuit 10, the first voltage detection circuit VDC1 monitors the charging voltage VC1 of the backup capacitor C1, and when the charging voltage VC1 becomes equal to or higher than a predetermined voltage value Vth1, the first electronic The switch SW1 is turned on. In this example, the predetermined voltage value Vth1 is a voltage value at the completion of charging of the backup capacitor C1.

  The second voltage detection circuit VDC2 monitors the charging voltage VC2 of the backup capacitor C2, and turns on the second electronic switch SW2 when the charging voltage VC2 becomes equal to or higher than a predetermined voltage value Vth2. It has a function to do. In this example, the predetermined voltage value Vth2 is a voltage value at the completion of charging of the backup capacitor C2.

[When main power is turned on]
In this process controller, when the main power supply circuit 1 is turned on, the output voltage from the main power supply circuit 1 is sent to the regulator circuit 7 via the OR circuit 5, and the voltage stabilized by the regulator circuit 7 is the operating voltage. To the CPU 6. Further, the output voltage from the main power supply circuit 1 is applied to the charging circuit 3, and charging of the backup capacitor C1 is started by a constant current supplied from the charging circuit 3.

  In this case, since the capacity of the backup capacitor C1 is 100F, the charging is completed in a short time. That is, since the capacity of the conventional backup capacitor 2 was as large as 300 F, the charging voltage did not increase easily, and it took a considerable time until the charging was completed. On the other hand, since the capacity of the backup capacitor C1 is as small as 100F, the charging voltage rises quickly and the charging is completed in a short time.

  The voltage detection circuit VDC1 turns on the first electronic switch SW1 when the charging voltage VC1 of the backup capacitor C1 rises and reaches the voltage value Vth1 at the completion of charging. Thereby, charging of the backup capacitor C2 is started in a state where the charging of the backup capacitor C1 is completed. The backup capacitor C2 is also fully charged in a short time.

  The voltage detection circuit VDC2 turns on the second electronic switch SW2 when the charging voltage VC2 of the backup capacitor C2 rises and reaches the voltage value Vth2 at the completion of charging. Thereby, charging of the backup capacitor C3 is started in a state where the charging of the backup capacitor C2 is completed. The backup capacitor C3 is also fully charged in a short time.

  FIG. 3 shows how the backup capacitors C1, C2, and C3 are sequentially charged. FIG. 4 shows a state in which the charge accumulation amount for the entire backup capacitors C1, C2, and C3 increases with charging. When the charging of the backup capacitor C1 is completed, the entire capacitor C1, C2, and C3 accumulates 100F of charge Q1, and when the charging of the backup capacitor C2 is completed, the entire capacitors C1, C2, and C3 are stored. Then, the charge Q2 for 200F is accumulated, and when the charging of the backup capacitor C3 is completed, the charge Q3 for 300F is accumulated in the capacitors C1, C2, and C3 as a whole.

  Thus, in the present embodiment, the backup capacitors C1, C2, and C3 are sequentially charged, and after the main power is turned on, the backup capacitor C1 is completely charged (FIG. 3). Even after an instantaneous power failure, the supply of power to the CPU 6 can be continued by discharging the charge stored in the backup capacitor C1.

  Further, after the main power is turned on, after the backup capacitor C2 is completely charged (after the point t2 shown in FIG. 3), even if a power failure occurs, the charges stored in the backup capacitors C1 and C2 are discharged. As a result, the power supplied to the CPU 6 can be secured, and the data can be saved in the flash ROM 8.

  In addition, after charging the backup capacitor C3 after the main power is turned on (after the point t3 shown in FIG. 3), even if the capacities of the backup capacitors C1 and C2 decrease due to aging, the backup capacitor C3 It is possible to make up for the shortage of power supplied to the CPU 6 by the stored electric charge and cope with a power failure.

[Online exchange]
The capacities of the backup capacitors C1, C2, and C3 decrease due to aging. The decrease in the capacity of the backup capacitors C1, C2, C3 is, for example, the time from the time when the CPU 6 writes necessary data to the flash ROM 6 when the power is shut down to the time when it becomes inoperable due to insufficient supply power. It is possible to obtain this information by comparing this margin time with a predetermined life determination time. In this case, if the margin time becomes shorter than the lifetime determination time, it is determined that the backup capacitors C1, C2, and C3 have reached the end of life, and a warning that prompts replacement of the backup capacitor is issued.

  When this warning is issued, the process controller administrator performs online replacement of the backup capacitor. In this case, since the conventional process controller has only one large-capacity backup capacitor, it cannot cope with power failure or instantaneous power failure while the backup capacitor is removed, and the risk of online replacement is great. It was.

  On the other hand, in this embodiment, when the backup capacitor C1 is removed during the operation of the process controller, the backup capacitors C2 and C3 are left in a charged state, and when the backup capacitor C2 is removed, the backup capacitors C1 and C3 are left. When C3 is left in the fully charged state and the backup capacitor C3 is removed, the backup capacitors C1 and C2 are left in the fully charged state. In this case, the remaining backup capacitor can cope with at least an instantaneous power failure in the meantime (in some cases, it can also cope with a power failure), and the risk of online replacement is reduced.

  In the above-described embodiment, the backup capacitor C3 is additionally provided with respect to the backup capacitors C1 and C2 in consideration of the capacity reduction due to aging of the backup capacitor. However, only the backup capacitors C1 and C2 may be provided. . Further, for example, the capacity of the backup capacitors C1 and C2 may be 150 F, and a total of 300 F of charge may be accumulated. In the above-described embodiment, three backup capacitors C1, C2, and C3 are used. However, the number of backup capacitors may be further increased. In the present invention, the load is not limited to the CPU.

In the above-described embodiment, the capacities of the backup capacitors C1, C2, and C3 are set to 100F, and the total capacity is set to 300F. However, these values are merely examples, and are limited to such values. It goes without saying that it is not a thing.
In addition, when performing online replacement of the backup capacitor, it is not always necessary to perform the deterioration diagnosis. For example, the backup capacitors may be exchanged online one by one when the usage period has passed five years.

It is a figure which shows the principal part of one Embodiment of the process controller using the backup apparatus which concerns on this invention. It is a figure which shows the outline of the internal structure of the control circuit in the backup device used for this process controller. It is a figure which shows a mode that charging to backup capacitor | condenser C1, C2, C3 is performed in order in this process controller. It is a figure which shows a mode that the accumulation amount of the electric charge with respect to the whole backup capacitor C1, C2, C3 increases with charge. It is a figure which shows the principal part of the conventional process controller using a backup capacitor. It is a figure which shows the relationship between the output voltage (charging voltage) of the backup capacitor in a conventional process controller, and charging time.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Main power supply circuit, 3 ... Charge circuit, 4 ... Regulator circuit, 5 ... OR circuit, 6 ... CPU, 7 ... Regulator circuit, 8 ... Flash ROM, 9 ... Power-off detection circuit, 10 ... Control circuit, C1, C2 , C3 ... backup capacitors, D1, D2, D3 ... diodes, SW1 ... first electronic switch, SW2 ... second electronic switch, VDC1 ... first voltage detection circuit, VDC2 ... second voltage detection circuit, 200 ... Backup device.

Claims (2)

In the backup device that continues to supply power to the load by discharging the charge stored in the backup capacitor when the main power supply is shut off,
A first backup capacitor that is charged by receiving a current from the main power supply;
A first switch that is turned on when the charging voltage of the first backup capacitor reaches a predetermined voltage value;
The first backup capacitor is connected in parallel via the first switch, and when the first switch is turned on, the current supply from the main power supply that passes through the first switch is received. And a second backup capacitor to be charged. The backup device according to claim 1,
A second switch that is turned on when a charging voltage of the second backup capacitor reaches a predetermined voltage value;
The second backup capacitor is connected in parallel via the second switch, and when the second switch is turned on, the current supply from the main power supply that passes through the second switch is received. And a third backup capacitor to be charged.

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