JP2010114776A - Acoustic transducer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an acoustic transducer having a membrane, which controls sound pressure on the back face of the membrane while improving sensitivity of the acoustic transducer. <P>SOLUTION: The acoustic transducer includes: a substrate 111 including a back cavity 201 formed on the back surface of the substrate and functioning as acoustic capacitance, ventilation holes 202<SB>1</SB>, 202<SB>2</SB>opened on the front side of the substrate, located on the side of the back cavity and functioning as acoustic resistance, and communication paths 203<SB>1</SB>, 203<SB>2</SB>located on the side of the back cavity for allowing the back cavity to communicate with the ventilation holes; and an acoustic element 112 formed on the front surface of the substrate, located above the back cavity, and located on the side of the ventilation holes. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an acoustic transducer, for example, an acoustic transducer ventilation structure having a membrane structure.

  An example of an acoustic transducer whose demand has been increasing in recent years is a small microphone for a portable device. Conventionally, as a small microphone for a portable device, an ECM (Electret Condenser Microphone) using a special organic film called an electret film has been mainstream. However, the ECM has problems such as not having reflow resistance and decreasing in sensitivity when it is downsized.

  On the other hand, in recent years, Si (silicon) microphones manufactured using MEMS (Micro Electro Mechanical Systems) technology have been developed. Si microphones are rapidly becoming widespread because they can be mounted by reflow in addition to being small and highly sensitive.

  A MEMS microphone currently being developed detects a change in capacitance between a diaphragm that vibrates by detecting sound pressure and a back electrode called a back plate. In this microphone, when a DC bias is applied between the diaphragm and the back plate and the distance between the two changes due to the sound pressure, the amount of accumulated charge changes. In the microphone, the sound pressure is generally detected by detecting the change in the charge amount. According to this method, a decrease in sensitivity due to downsizing can be prevented by narrowing the distance between the diaphragm and the back plate, which is advantageous for downsizing.

  As another method for detecting sound pressure, a method using a piezoelectric body has been proposed. In this method, a single membrane including a piezoelectric body is prepared, and a deflection generated in the membrane due to sound pressure is detected by a potential difference generated between electrodes sandwiching the piezoelectric body. In this method, since only one membrane needs to be prepared, the manufacturing process of the acoustic transducer is simpler than that of the electrostatic detection type.

  Examples of the piezoelectric material include ferroelectric materials such as AlN, ZnO, and PZT. Among these, AlN has high consistency with the LSI process. In order to exhibit sufficient piezoelectricity, AlN needs to have crystallinity that is highly c-axis oriented. For that purpose, selection of the lower electrode and processing before processing the piezoelectric body are important points.

  In an acoustic transducer using a piezoelectric body, sound pressure is also generated on the back surface of the membrane due to the bending of the membrane caused by the sound pressure from the outside. The characteristics of acoustic transducers are highly dependent on how well this sound pressure is released. There is a demand for a mechanism and structure for controlling the sound pressure on the back surface of the membrane so that the sound pressure generated on the back surface of the membrane does not vibrate the membrane and cause deterioration of the characteristics of the acoustic transducer.

  In the conventional acoustic transducer, the sound pressure generated on the back surface of the membrane is released by providing a vent hole penetrating the membrane. However, such a vent has a problem in that sound waves enter the cavity and the sensitivity of the acoustic transducer decreases. As described above, the vent hole has an advantage of releasing the sound pressure, but has a defect that a sound wave wraps around, and the problem of the sound pressure and the problem of the sound wave are in a trade-off relationship. The presence of vents that penetrate the membrane reduces the movement of the membrane and hinders the improvement of the sensitivity of the acoustic transducer.

  Patent Document 1 describes an example of a microphone chip package including a silicon microphone chip, a circuit board having an opening for a cavity, and a casing having an opening for receiving sound.

Further, in Patent Document 2, a back chamber is formed between the acoustic sensor chip and the housing, and a vent hole for setting an acoustic resistance between the back chamber and the outside is provided in the support portion of the acoustic sensor chip. An example of an acoustic sensor is described.
JP 2007-60285 A JP 2006-325034 A

  The present invention relates to an acoustic transducer having a membrane, and an object thereof is to achieve both control of sound pressure on the back surface of the membrane and improvement of sensitivity of the acoustic transducer.

  One embodiment of the present invention includes, for example, a back surface cavity formed on the back surface of the substrate and functioning as an acoustic capacitor, and a communication hole functioning as an acoustic resistor that is open on the front surface side of the substrate and is located on the side of the back surface cavity. A substrate provided with a pore and a communication path located on the side of the back surface cavity and connecting the back surface cavity and the vent hole, and formed on the surface of the substrate, and positioned above the back surface cavity And an acoustic element positioned on the side of the vent hole.

  ADVANTAGE OF THE INVENTION According to this invention, regarding the acoustic transducer which has a membrane, it becomes possible to make compatible control of the sound pressure of a membrane back surface, and the improvement of the sensitivity of an acoustic transducer.

  Embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a side sectional view of an acoustic transducer 101 according to the first embodiment. The acoustic transducer 101 in FIG. 1 includes an SOI (Semiconductor On Insulator) substrate 111, a piezoelectric element 112, and a lid 113. The SOI substrate 111 corresponds to an example of the substrate of the present invention, and the piezoelectric element 112 corresponds to an example of the acoustic element of the present invention.

The SOI substrate 111 includes a semiconductor substrate 121, a buried insulating film 122, and a semiconductor layer 123. Here, the semiconductor substrate 121 is a silicon substrate. Here, the buried insulating film 122 is a silicon oxide film. Here, the semiconductor layer 123 is a silicon layer. In FIG. 1, the surface of the SOI substrate 111 is indicated by S ₁ , and the back surface of the SOI substrate 111 is indicated by S ₂ . The buried insulating film 122 of this embodiment is used as an etching stopper film when forming cavities and holes to be described later. The buried insulating film 122 may be a film other than the insulating film as long as it can be used as an etching stopper film. An example of such a film is a metal film.

The piezoelectric element 112 includes a lower electrode 131, a piezoelectric film 132, and an upper electrode 133. The lower electrode 131 is formed on the surface S ₁ of the SOI substrate 111. Here, the lower electrode 131 is an active layer formed in the semiconductor layer 123. The lower electrode 131 may be a metal electrode, but the number of manufacturing steps can be reduced by using an active layer. In FIG. 1, a contact plug for the lower electrode 131 is indicated by P. The piezoelectric film 132 is formed on the lower electrode 131. Here, the piezoelectric film 132 is an AlN (aluminum nitride) film. The upper electrode 133 is formed on the piezoelectric film 132. Here, the upper electrode 133 is an Al (aluminum) electrode.

The active layer (lower electrode 131) is formed by ion implantation into the surface of the semiconductor layer 123. The active layer is formed, for example, by forming an ion implantation mask pattern on the surface of the semiconductor layer 123 and implanting P (phosphorus) ions into the semiconductor layer 123. P ion implantation conditions are, for example, 180 keV and 1 × 10 ¹⁵ atoms / cm ² . As a result, an active layer functioning as the lower electrode 131 of the piezoelectric element 112 is formed.

The lid 113 is formed on the back surface S ₂ of the SOI substrate 111. The SOI substrate 111 and the lid 113 are bonded by an adhesive 141.

The acoustic transducer 101 of this embodiment is a MEMS microphone. In FIG. 1, a membrane including the piezoelectric element 112 is indicated by M. The membrane M functions as an acoustic capacity _CM as shown in FIG.

As shown in FIG. 1, the SOI substrate 111 is provided with a back surface cavity 201, first and second vent holes 202 ₁ and 202 _2, and first and second connection paths 203 ₁ and 203 _2. ing.

The back surface cavity 201 is formed in the back surface S ₂ of the SOI substrate 111 and is located below the piezoelectric element 112. In the present embodiment, the membrane M including the piezoelectric element 112 is formed by providing the back surface cavity 201 below the piezoelectric element 112. The back surface cavity 201 functions as an acoustic capacitor C ₁ as shown in FIG.

The first and second vent holes 202 ₁ and 202 ₂ are opened in the front surface S ₁ of the SOI substrate 111 and are located on the side of the back surface cavity 201. In the present embodiment, these vent holes 202 ₁ and 202 ₂ are formed not on the position penetrating the piezoelectric element 112 but on the side of the piezoelectric element 112. The ventilation holes 202 ₁ and 202 ₂ function as acoustic resistances R ₁ and R ₂ , respectively, as shown in FIG.

The first and second communication paths 203 ₁ and 203 ₂ are formed on the back surface S ₂ of the SOI substrate 111 and are located on the side of the back surface cavity 201. The first communication path 203 ₁ connects the back surface cavity 201 and the first vent hole 202 _1, and the second communication path 203 ₂ connects the back surface cavity 201 and the second vent hole 202 _2. is doing. Thus, in this embodiment, the back surface cavity 201 and the vent holes 202 ₁ and 202 ₂ are not directly connected, but are indirectly connected via the communication paths 203 ₁ and 203 ₂ .

In the present embodiment, the first communication path 203 ₁ has a first communication cavity 211 ₁ located on the vent hole 202 ₁ side and a first communication hole 212 ₁ located on the back surface cavity 201 side. Further, the second communication path 203 ₂ has a second communication cavity 211 ₂ located on the vent hole 202 ₂ side and a second communication hole 212 ₂ located on the back surface cavity 201 side. The communication cavities 211 ₁ and 211 ₂ function as acoustic capacitors C ₂ and C ₃ , respectively, as shown in FIG. Further, the communication holes 212 ₁ and 212 ₂ function as acoustic resistances R ₃ and R ₄ , respectively, as shown in FIG.

An equivalent circuit relating to the acoustic capacitance and acoustic resistance of the acoustic transducer 101 of FIG. 1 is shown in FIG. 2A. In FIG. 2A, the configuration X, the configuration Y, and C _M are connected in parallel, and these and C ₁ are connected in series. In the configuration X, R ₁ , C ₂ and R ₃ are connected in series, and in the configuration Y, R ₂ , C ₃ and R ₄ are connected in series.

As described above, in the present embodiment, the vent holes 202 ₁ and 202 ₂ are opened on the surface S ₁ of the SOI substrate 111. Thereby, in this embodiment, the sound pressure generated on the back surface of the membrane can be released. In addition, in the present embodiment, the vent holes 202 ₁ and 202 ₂ are formed not on the position penetrating the piezoelectric element 112 but on the side of the piezoelectric element 112. As described above, the presence of the vent hole penetrating the membrane reduces the movement of the membrane and hinders the improvement of the sensitivity of the acoustic transducer. According to the present embodiment, such problems can be solved by providing the vent holes 202 ₁ and 202 ₂ on the side of the piezoelectric element 112.

  Thus, according to this embodiment, it is possible to achieve both the control of the sound pressure on the back surface of the membrane and the improvement of the sensitivity of the acoustic transducer 101.

In the present embodiment, a structure in which the back surface cavity 201 and the vent holes 202 ₁ and 202 ₂ are connected via the communication paths 203 ₁ and 203 ₂ is adopted. Accordingly, the vent holes 202 ₁ and 202 ₂ can be formed on the side of the piezoelectric element 112 apart from the back surface cavity 201. The communication paths 203 ₁ and 203 ₂ of this embodiment act as a pressure damper between the front surface of the piezoelectric element 112 and the back surface cavity 201. Thereby, the deflection of the membrane M is improved.

Further, as described above, in the present embodiment, the vent holes 202 ₁ and 202 ₂ are formed not on the position penetrating the piezoelectric element 112 but on the side of the piezoelectric element 112. Thereby, in this embodiment, compared with the case where a ventilation hole penetrates a piezoelectric element, the effective range of a pressure damping characteristic becomes wide, and the characteristic improvement of the acoustic transducer 101 is implement | achieved significantly.

The conventional acoustic transducer has a problem in terms of sensitivity because the vent hole is formed in the piezoelectric element. On the other hand, in the acoustic transducer 101 of this embodiment, the sensitivity is improved by forming the vent holes 202 ₁ and 202 ₂ at positions away from the piezoelectric element 112 as shown in FIG. In the present embodiment, the communication cavities 211 ₁ , 211 ₂ and the communication holes 212 ₁ , 212 ₂ are used as an acoustic capacity and an acoustic resistance, respectively, and these act as a pressure damper between the front surface of the piezoelectric element 112 and the back surface cavity 201. ing.

In order for the vibration of sound to concentrate efficiently on the membrane M, the acoustic capacitance C _M needs to be smaller than the acoustic capacitances C ₁ , C ₂ , and C ₃ . Here, if the acoustic impedances of the membrane M, the back surface cavity 201, the first communication cavity 211 ₁ , and the second communication cavity 211 ₂ are Z _M , Z ₁ , Z ₂ , and Z ₃ , respectively, the acoustic impedance Z _M is The acoustic impedances Z ₁ , Z ₂ , and Z ₃ need to be large.

In order to increase the acoustic resistances R ₁ and R ₂ , it is necessary to reduce the cross-sectional area of the vent holes 202 ₁ and 202 ₂ or increase the length. Miniaturization of the cross-sectional area, because there is a lower limit, is a tradeoff between the reduction in yield, acoustic resistance R _1, R _2, it is desirable to adjust the length of the vent hole 202 _1, 202 ₂ .

However, since the lengths of the vent holes 202 ₁ and 202 ₂ correspond to the thicknesses of the semiconductor layer 123 and the buried insulating film 122, the adjustment thereof has a limit. The length of the vent holes 202 ₁ and 202 ₂ is usually as short as 10 μm or less. Further, in view of the dimensional controllability of the etcher, the diameter or width of the cross-sectional area is preferably 2 μm or more, more preferably 5 μm or more. Thus, it is difficult to control the acoustic resistance of the acoustic transducer 101 by setting the cross-sectional areas and lengths of the vent holes 202 ₁ and 202 ₂ .

On the other hand, the communication holes 212 ₁ and 212 ₂ can take the length in the horizontal direction of the SOI substrate 111. The length can be, for example, 200 μm. Furthermore, the length can be further extended by combining the linear pattern and the right-angle pattern to form the communication holes 212 ₁ and 212 ₂ in a maze shape. Further, the width of the communication holes 212 ₁ and 212 ₂ can be narrowed by forming a shallow trench on the back surface S ₂ of the SOI substrate 111, and miniaturization is easy due to the dimension controllability of the etcher.

  3 and 4 are manufacturing process diagrams of the acoustic transducer 101 of FIG.

First, an SOI substrate 111 is prepared (FIG. 3A). Here, the SOI substrate 111 is a 6-inch wafer. Next, a mark pattern for alignment is formed on the surface S ₁ of the SOI substrate 111. The mark pattern is formed on the surface of the semiconductor layer 123, which is a silicon layer, by dry etching.

The dry etching can be performed by any method capable of processing silicon. Here, the dry etching is performed by a RIE (Reactive Ion Etching) etcher using a gas such as CF ₄ or CHF ₃ . A normal photoresist can be used as the etching mask for the etching. Here, a novolac i-line positive resist having a thickness of 1.3 μm is used as an etching mask. The etching depth is 150 nm suitable for the performance of the stepper used. After the etching, the positive resist mask is removed by asher and SH cleaning treatment.

Next, the lower electrode 131 is formed on the surface of the semiconductor layer 123 by ion implantation (FIG. 3A). The lower electrode 131 is formed by forming an ion implantation mask pattern on the surface of the semiconductor layer 123 and implanting P (phosphorus) ions into the semiconductor layer 123. The ion implantation mask pattern is formed using the above positive resist. P ion implantation conditions are 180 keV and 1 × 10 ¹⁵ atoms / cm ² . After the ion implantation, the positive resist mask is removed by asher and SH cleaning treatment.

Next, a piezoelectric film 132 is deposited on the lower electrode 131 by sputtering (FIG. 3A). The material of the piezoelectric film 132 is AlN, and the thickness is 1000 nm. As the sputtering apparatus, an apparatus in which the distribution of film stress in the wafer surface is ± 50 MPa or less is used. Next, the piezoelectric film 132 is processed into a membrane shape. At this time, a contact hole for the lower electrode 131 is also formed. The piezoelectric film 132 is processed by forming a processing pattern with the above-described positive resist and then using an RIE etcher using a gas such as Cl ₂ or BCl ₃ . At this time, in order to control the etching rate and the processed cross-sectional shape, a gas such as Ar, O ₂ , N ₂ or the like may be further added. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, the electrode material of the upper electrode 133 is deposited on the piezoelectric film 132 by sputtering (FIG. 3A). The electrode material is Al, and the thickness of the electrode material is 500 nm. Next, the electrode material is processed into a contact plug P for the upper electrode 133 and the lower electrode 131. The electrode material is processed using a RIE etcher using a gas such as Cl ₂ or BCl ₃ after forming a processing pattern with the positive resist. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Thus, in this embodiment, the piezoelectric element 112 is formed on the surface S ₁ of the SOI substrate 111 (FIG. 3A).

Next, vent holes 202 ₁ and 202 ₂ are opened in the surface S ₁ of the SOI substrate 111 (FIG. 3B). In the present embodiment, the vent holes 202 ₁ and 202 ₂ are formed on the side of the piezoelectric element 112. The ventilation holes 202 ₁ and 202 ₂ are processed by Bosch D-RIE (Deep Reactive Ion Etching) using C ₄ F ₈ and SF ₆ gas after forming a processing pattern with the above positive resist. The processing of the air holes 202 ₁ and 202 ₂ may be performed by an RIE etcher using a gas such as Cl ₂ or BCl ₃ . In the etching for forming the vent holes 202 ₁ and 202 ₂ , the embedded insulating film 122 is used as an etching stopper film, and the semiconductor layer 123 is etched. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, the back surface cavity 201 and the communication paths 203 ₁ and 203 ₂ are formed on the back surface S ₂ of the SOI substrate 111 (FIG. 4A). In this embodiment, the back surface cavity 201 is formed in the lower part of the piezoelectric element 112, and the communication paths 203 ₁ and 203 ₂ are formed in the periphery of the lower part of the vent holes 202 ₁ and 202 ₂ . These processes are performed by Bosch D-RIE using a C ₄ F ₈ gas and an SF ₆ gas after forming a 5 μm-thick pattern with the positive resist. In the etching for forming these, the embedded insulating film 122 is used as an etching stopper film, and the semiconductor substrate 121 is etched. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

In this embodiment, the depth of the back surface cavity 201 and the communication cavities 211 ₁ and 211 ₂ is 400 μm, whereas the depth of the communication holes 212 ₁ and 212 ₂ is 1 μm. Therefore, in this embodiment, the processing of the communication holes 212 ₁ and 212 ₂ is performed separately from the processing of the back surface cavity 201 and the communication cavities 211 ₁ and 211 ₂ . In the present embodiment, prior to the D-RIE, a positive resist mask having a thickness of 5 μm is formed, and the connection holes 212 ₁ and 212 ₂ are processed by dry etching using chlorine-based RIE.

Next, the buried insulating film 122 remaining at the bottom of the back cavity 201 and the vent holes 202 ₁ and 202 ₂ is removed (FIG. 4B). As a result, the buried insulating film 122 below the membrane M is removed, and the vent holes 202 ₁ and 202 ₂ and the communication paths 203 ₁ and 203 ₂ are connected. These processes are performed by an RIE etcher using C ₄ F ₈ and O ₂ gas.

Next, the SOI substrate 111 is divided into pieces for each acoustic transducer 101 by dicing, and the lid 113 is bonded to the back surface of each piece (FIG. 4B). In this bonding, to form a AuSi pattern on the lid 113, the lid 113 is heat-bonding to the rear surface S ₂ of the singulated SOI substrate 111. Instead of the AuSi pattern, an Au pattern or a resin such as epoxy may be used.

  Here, the first embodiment and the comparative example are compared. FIG. 5 is a side sectional view of the acoustic transducer 101 of the comparative example.

In the first embodiment shown in FIG. 1, the vent holes 202 ₁ and 202 ₂ are formed not on the position penetrating the piezoelectric element 112 but on the side of the piezoelectric element 112. On the other hand, in the comparative example shown in FIG. 5, the vent holes 202 ₁ and 202 ₂ are formed in the piezoelectric element 112 and penetrate the piezoelectric element 112. In the first embodiment, the communication paths 203 ₁ and 203 ₂ are provided, whereas in the comparative example, the communication paths 203 ₁ and 203 ₂ are not provided.

  FIG. 6 shows sensitivity-frequency characteristics of the acoustic transducer 101 of the first embodiment and the comparative example. The horizontal axis in FIG. 6 represents the sound frequency, and the vertical axis in FIG. 6 represents the sensitivity of the acoustic transducer 101. In FIG. 6, the curve X represents the experimental result for the first embodiment, and the curve Y represents the experimental result for the comparative example.

  In FIG. 6, it can be seen that the sensitivity of the acoustic transducer 101 of the first embodiment is higher than the sensitivity of the acoustic transducer 101 of the comparative example, as indicated by an arrow A. This is due to the effect of the pressure damper and the effect of lowering the spring constant.

  Further, in FIG. 6, as indicated by an arrow B, it can be seen that the lowest frequency that can be detected by the acoustic transducer 101 of the first embodiment is lower than the lowest frequency that can be detected by the acoustic transducer 101 of the comparative example. . This is because the acoustic resistance in the first embodiment is higher than the acoustic resistance in the comparative example.

As described above, in the present embodiment, the back surface cavity 201 is formed in the lower portion of the piezoelectric element 112, the vent holes 202 ₁ and 202 ₂ are formed on the side of the piezoelectric element 112, and the back surface cavity 201 and the vent holes 202 ₁ and 202 ₁ are formed. 202 ₂ is communicated with the communication paths 203 ₁ and 203 ₂ . Thereby, in this embodiment, it is possible to achieve both the control of the sound pressure on the back surface of the membrane and the improvement of the sensitivity of the acoustic transducer 101.

  Hereinafter, the acoustic transducer 101 of the second to ninth embodiments will be described. The second to ninth embodiments are modifications of the first embodiment, and the second to ninth embodiments will be described focusing on the differences from the first embodiment.

(Second Embodiment)
FIG. 7 is a side sectional view of the acoustic transducer 101 of the second embodiment.

In the present embodiment, the first and second communication path 203 _1, 203 _2, respectively, have first and second contact cavities 211 _1, 211 _2. The communication cavities 211 ₁ and 211 ₂ function as acoustic capacitances C ₂ and C ₃ , respectively, as shown in FIG. In the present embodiment, the cross-sectional areas of the communication holes 212 ₁ and 212 ₂ shown in FIG. 1 are sufficiently wide, and the acoustic resistances R ₃ and R ₄ shown in FIG.

An equivalent circuit relating to the acoustic capacitance and acoustic resistance of the acoustic transducer 101 of FIG. 7 is shown in FIG. 2B. In FIG. 2B, the configuration X, the configuration Y, and C _M are connected in parallel, and these and C ₁ are connected in series. In configuration X, R ₁ and C ₂ are connected in series, and in configuration Y, R ₂ and C ₃ are connected in series.

The acoustic transducer 101 of FIG. 7 can be manufactured by the manufacturing process shown in FIGS. However, in the process of FIG. 4A, in the first embodiment, the depth of the communication holes 212 ₁ and 212 ₂ is 1 μm, whereas in the second embodiment, the depth of the corresponding portion is 200 μm. . In the second embodiment, the loading effect etching generated by setting the mask opening size of the above portion to ₁ μm which is extremely shorter than the mask opening size 200 μm of the back surface cavity 201 and the communication cavities 211 ₁ and 211 ₂ is used. The above part is processed by D-RIE simultaneously with the back surface cavity 201 and the communication cavities 211 ₁ and 211 ₂ .

  Here, the second embodiment is compared with the above-described comparative example.

  FIG. 8 shows sensitivity-frequency characteristics of the acoustic transducer 101 of the second embodiment and the comparative example. In FIG. 8, a curve X represents the experimental result for the second embodiment, and a curve Y represents the experimental result for the comparative example.

  In FIG. 8, it can be seen that the sensitivity of the acoustic transducer 101 of the second embodiment is higher than the sensitivity of the acoustic transducer 101 of the comparative example, as indicated by an arrow A. This is the same as in the first embodiment.

  Further, in FIG. 8, as indicated by an arrow B, it can be seen that the lowest frequency that can be detected by the acoustic transducer 101 of the second embodiment is lower than the lowest frequency that can be detected by the acoustic transducer 101 of the comparative example. . This is also the same as in the first embodiment.

As described above, in the present embodiment, as in the first embodiment, the back surface cavity 201 is formed in the lower portion of the piezoelectric element 112, and the vent holes 202 ₁ and 202 ₂ are formed on the sides of the piezoelectric element 112. The cavity 201 and the vent holes 202 ₁ , 202 ₂ are communicated with each other through communication paths 203 ₁ , 203 ₂ . Thereby, in this embodiment, it is possible to achieve both the control of the sound pressure on the back surface of the membrane and the improvement of the sensitivity of the acoustic transducer 101, as in the first embodiment.

In the present embodiment, the configuration of the communication paths 203 ₁ and 203 ₂ different from that in the first embodiment is adopted. This embodiment has an advantage that, for example, portions corresponding to the communication holes 212 ₁ and 212 ₂ can be processed simultaneously with the back surface cavity 201 and the communication cavities 211 ₁ and 211 ₂ . On the other hand, for example, the first embodiment has an advantage that it is relatively easy to adjust the acoustic resistance of the acoustic transducer 101.

(Third and fourth embodiments)
FIG. 9 is a side sectional view of the acoustic transducer 101 of the third embodiment.

In the present embodiment, the first and second communication paths 203 ₁ and 203 ₂ have first and second communication holes 212 ₁ and 212 ₂ , respectively. Each communication hole 212 _1, 212 _2, as shown in FIG. 9, which functions as an acoustic resistor R _3, R _4. In the present embodiment, the communication cavities 211 ₁ and 211 ₂ shown in FIG. 1 are not formed, and the acoustic capacitances C ₂ and C ₃ shown in FIG. In the present embodiment, the first and second ventilation paths 202 ₁ and 202 ₂ penetrate the SOI substrate 111.

  FIG. 10 is a side sectional view of the acoustic transducer 101 of the fourth embodiment.

The acoustic transducer 101 of the fourth embodiment has the same configuration as the acoustic transducer 101 of the third embodiment. However, in the fourth embodiment, the first and second communication holes 212 ₁ and 212 ₂ penetrate the first and second ventilation paths 202 ₁ and 202 ₂ , respectively. On the other hand, in the third embodiment, the first and second communication holes 212 ₁ and 212 ₂ do not penetrate the first and second ventilation paths 202 ₁ and 202 ₂ , respectively.

FIG. 2C shows an equivalent circuit relating to the acoustic capacitance and acoustic resistance of the acoustic transducer 101 of FIGS. In FIG. 2C, the configuration X, the configuration Y, and _CM are connected in parallel, and these and C ₁ are connected in series. In configuration X, R ₁ and R ₃ are connected in series, and in configuration Y, R ₂ and R ₄ are connected in series.

As described above, in the third and fourth embodiments, the back surface cavity 201 is formed in the lower portion of the piezoelectric element 112 and the vent holes 202 ₁ and 202 ₂ are formed on the side of the piezoelectric element 112, as in the first embodiment. Thus, the back surface cavity 201 and the vent holes 202 ₁ and 202 ₂ are connected to each other through the communication paths 203 ₁ and 203 ₂ . Thereby, in 3rd and 4th embodiment, it becomes possible to make compatible the control of the sound pressure of a membrane back surface, and the improvement of the sensitivity of the acoustic transducer 101 similarly to 1st Embodiment.

In the third and fourth embodiments, the configuration of the communication paths 203 ₁ and 203 ₂ different from the first embodiment is adopted. For example, the third and fourth embodiments have an advantage that a process of forming the communication cavities 211 ₁ and 211 ₂ is not necessary. On the other hand, for example, the first embodiment has an advantage that it is relatively easy to adjust the acoustic capacity of the acoustic transducer 101. If the acoustic capacity can be easily adjusted, the acoustic capacity C _M is made smaller than the acoustic capacity C ₁ , C ₂ , and C ₃ , so that sound vibrations can be efficiently concentrated on the membrane M.

(Fifth embodiment)
FIG. 11 is a side sectional view of the acoustic transducer 101 of the fifth embodiment. The acoustic transducer 101 in FIG. 11 includes a substrate 311, an acoustic element 312, and a lid 113. The substrate 311 corresponds to an example of the substrate of the present invention, and the acoustic element 312 corresponds to an example of the acoustic element of the present invention.

The substrate 311 includes a semiconductor substrate 121, a silicon oxide film 322, and a polysilicon layer 323. Here, the semiconductor substrate 121 is a silicon substrate. In Figure 11, the surface of the substrate 311 is indicated by S _1, the back surface of the substrate 311 is indicated by S _2. In this embodiment, the silicon oxide film 322 is interposed between the semiconductor substrate 121 and the polysilicon layer 323. However, for example, an insulating film other than the silicon oxide film 322 may be interposed.

The acoustic element 312 includes a lower electrode 131, an electrostatic cavity 332, an upper electrode 133, a first insulating film 334, and a second insulating film 335. The lower electrode 131 is formed on the surface S ₁ of the substrate 311. Here, the lower electrode 131 is an active layer formed in the polysilicon layer 323. The lower electrode 131 may be a metal electrode, but the number of manufacturing steps can be reduced by using an active layer. The upper electrode 133 is formed above the lower electrode 131 via an electrostatic cavity 332. Here, the upper electrode 133 is an Al (aluminum) electrode or a Ti (titanium) electrode.

  Here, the first insulating film 334 is a silicon nitride film. The upper electrode 133 is formed on the lower surface of the first insulating film 334 and is supported by the first insulating film 334. Here, the second insulating film 335 is a TEOS film. The second insulating film 335 is interposed between the lower electrode 131 and the upper electrode 133 on the side of the electrostatic cavity 332.

The active layer (lower electrode 131) is formed by ion implantation into the surface of the polysilicon layer 323. The active layer is formed, for example, by forming an ion implantation mask pattern on the surface of the polysilicon layer 323 and implanting P (phosphorus) ions into the polysilicon layer 323. P ion implantation conditions are, for example, 180 keV and 1 × 10 ¹⁵ atoms / cm ² . Thereby, an active layer functioning as the lower electrode 131 of the acoustic element 312 is formed.

The lid 113 is formed on the back surface S ₂ of the substrate 311. The substrate 311 and the lid 113 are bonded with an adhesive 141.

The acoustic transducer 101 of this embodiment is an electrostatic MEMS microphone. In FIG. 11, the membrane including the polysilicon layer 323 and the lower electrode 131 is indicated by M. The membrane M functions as an acoustic capacity _CM as shown in FIG.

As shown in FIG. 11, the substrate 311 is provided with a back surface cavity 201, first and second vent holes 202 ₁ and 202 _2, and first and second communication paths 203 ₁ and 203 _2. Yes.

The back surface cavity 201 is formed in the back surface S ₂ of the substrate 311 and is located below the acoustic element 312. In this embodiment, the membrane M including the polysilicon layer 323 and the lower electrode 131 is formed by providing the back surface cavity 201 below the acoustic element 312. As shown in FIG. 11, the back surface cavity 201 functions as an acoustic capacitance C ₁ .

The first and second vent holes 202 ₁ and 202 ₂ are opened to the front surface S ₁ side of the substrate 311 and are located to the side of the back surface cavity 201. In the present embodiment, these vent holes 202 ₁ , 202 ₂ are formed not on the position penetrating the acoustic element 312 but on the side of the acoustic element 312. The vent holes 202 ₁ and 202 ₂ penetrate the substrate 311, the first insulating film 334, the second insulating film 335, and the like on the side of the acoustic element 312. The vent holes 202 ₁ and 202 ₂ function as acoustic resistances R ₁ and R ₂ , respectively, as shown in FIG.

The first and second communication paths 203 ₁ and 203 ₂ are formed on the back surface S _{2 of the} substrate 311 and are located on the side of the back surface cavity 201. The first communication path 203 ₁ connects the back surface cavity 201 and the first vent hole 202 _1, and the second communication path 203 ₂ connects the back surface cavity 201 and the second vent hole 202 _2. is doing. Thus, in this embodiment, the back surface cavity 201 and the vent holes 202 ₁ and 202 ₂ are not directly connected, but are indirectly connected via the communication paths 203 ₁ and 203 ₂ .

In the present embodiment, the first and second communication paths 203 ₁ and 203 ₂ have first and second communication holes 212 ₁ and 212 ₂ , respectively. The communication holes 212 ₁ and 212 ₂ function as acoustic resistances R ₃ and R ₄ as shown in FIG.

  In the present embodiment, a large number of air holes 401 are further formed in the upper electrode 133 and the first insulating film 334. These air holes 401 pass through the upper electrode 133 and the first insulating film 334, and communicate the electrostatic cavity 332 with the outside.

An equivalent circuit regarding the acoustic capacitance and acoustic resistance of the acoustic transducer 101 of FIG. 11 is shown in FIG. 2D. In FIG. 2D, the configuration X, the configuration Y, and C _M are connected in parallel, and these and C ₁ are connected in series. In configuration X, R ₁ and R ₃ are connected in series, and in configuration Y, R ₂ and R ₄ are connected in series.

  12 and 13 are manufacturing process diagrams of the acoustic transducer 101 of FIG.

First, a semiconductor substrate 121 which is a silicon substrate is prepared (FIG. 12A). Here, the semiconductor substrate 121 is a 6-inch wafer. Next, a silicon oxide film 322 is formed on the semiconductor substrate 121. Next, a polysilicon layer 323 is formed on the silicon oxide film 322. Thus, the substrate 311 is formed (FIG. 12A). Next, a mark pattern for alignment is formed on the surface S ₁ of the substrate 311. The mark pattern is formed on the surface of the polysilicon layer 323 by dry etching.

The dry etching can be performed by any method capable of processing polysilicon. Here, the dry etching is performed by an RIE etcher using a gas such as CF ₄ or CHF ₃ . A normal photoresist can be used as the etching mask for the etching. Here, a novolac i-line positive resist having a thickness of 1.3 μm is used as an etching mask. The etching depth is 150 nm suitable for the performance of the stepper used. After the etching, the positive resist mask is removed by asher and SH cleaning treatment.

Next, the lower electrode 131 is formed on the surface of the polysilicon layer 323 by ion implantation (FIG. 12A). The lower electrode 131 is formed by forming an ion implantation mask pattern on the surface of the polysilicon layer 323 and implanting P (phosphorus) ions into the polysilicon layer 323. The ion implantation mask pattern is formed using the above positive resist. P ion implantation conditions are 180 keV and 1 × 10 ¹⁵ atoms / cm ² . After the ion implantation, the positive resist mask is removed by asher and SH cleaning treatment.

Next, a second insulating film 335 is deposited on the lower electrode 131 by TEOS-CVD (Chemical Vapor Deposition) (FIG. 12A). The material of the second insulating film 335 is TEOS and the thickness is 300 nm. Next, the second insulating film 335 is processed into a predetermined shape including a membrane shape and the like. The second insulating film 335 is processed by a dry etcher using CF ₄ gas after forming a processing pattern with the above positive resist. At this time, in order to control the etching rate and the processed cross-sectional shape, a gas such as Ar, O ₂ , N ₂ or the like may be further added. After the etching, the positive resist mask is removed by asher and SH cleaning treatment.

  Next, a sacrificial layer for the electrostatic cavity 332 (FIG. 12A) is applied on the lower electrode 131 and the second insulating film 335. The material of the sacrificial layer is a photosensitive polyimide resin, and the thickness is 5 μm. Next, the sacrificial layer is processed by lithography to form a sacrificial layer pattern.

  Next, the electrode material of the upper electrode 133 is deposited on the sacrificial layer pattern by sputtering (FIG. 12A). The electrode material is Ti, and the thickness of the electrode material is 100 nm. Next, the electrode material is processed into the upper electrode 133. The electrode material is processed by chlorine-based dry etching after forming a processing pattern with the positive resist. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, a first insulating film 334 is deposited on the upper electrode 133 (FIG. 12A). The material of the first insulating film 334 is silicon nitride, and the thickness is 300 nm. Next, the first insulating film 334 is processed into a predetermined shape including the outlet of the upper electrode 133. The first insulating film 334 is processed by a dry etcher using CF ₄ gas after forming a processing pattern with the above positive resist. Next, the second insulating film 335 is processed into a predetermined shape including a pattern of the outlet port of the lower electrode 131 and the vent holes 202 ₁ and 202 ₂ . The second insulating film 335 is processed by a dry etcher using CF ₄ gas after forming a processing pattern with the above positive resist. As a result, the vent holes 202 ₁ and 202 ₂ are opened to the upper surface of the polysilicon layer 323. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Thus, in this embodiment, the acoustic element 312 is formed on the surface S _{1 of the} substrate 311 (FIG. 12A).

Next, the ventilation holes 202 ₁ and 202 ₂ are further processed (FIG. 12B). The processing of the air holes 202 ₁ and 202 ₂ here is performed by D-RIE after forming a processing pattern with the above positive resist. As a result, the vent holes 202 ₁ and 202 ₂ are opened to the upper surface of the silicon oxide film 322. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, a wiring material for taking out the upper electrode 133 and the lower electrode 131 is deposited on the surface S ₁ side of the substrate 311 by sputtering. The wiring material is Al, and the thickness of the wiring material is 500 nm. Next, the wiring material is processed into an extraction wiring for the upper electrode 133 and the lower electrode 131. The wiring material is processed using a RIE etcher using a gas such as Cl ₂ or BCl ₃ after forming a processing pattern with the positive resist. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, connecting paths 203 ₁ and 203 ₂ are formed on the back surface S ₂ of the substrate 311 (FIG. 13A). The processing of the connecting paths 203 ₁ and 203 ₂ is performed by a dry etcher using CF ₄ gas after forming a processing pattern with the above positive resist. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, a back surface cavity 201 is formed in the back surface S ₂ of the substrate 311 (FIG. 13A). At this time, the lower portions of the vent holes 202 ₁ and 202 ₂ are formed at the same time. These processes are performed by D-RIE after forming a processing pattern having a thickness of 5 μm with the above positive resist. In the etching for forming these, the silicon oxide film 322 is used as an etching stopper film, and the semiconductor substrate 121 is etched. After the etching, the positive resist mask is peeled off by an asher and a photoresist remover treatment.

Next, the silicon oxide film 322 remaining at the bottom of the back cavity 201 and the vent holes 202 ₁ and 202 ₂ is removed (FIG. 13B). As a result, the silicon insulating film 322 below the membrane M is removed, and the vent holes 202 ₁ and 202 ₂ penetrate from the front surface S ₁ side to the back surface S ₂ side of the substrate 311, thereby forming the vent holes 202 ₁ and 202. ₂ and the communication paths 203 ₁ and 203 ₂ are connected. These processes are performed by an RIE etcher using C ₄ F ₈ and O ₂ gas.

Next, the substrate 311 is divided into pieces for each acoustic transducer 101 by dicing, and the lid 113 is joined to the back surface of each piece (FIG. 13B). In this bonding, to form a AuSi pattern on the lid 113, to heat-bonding the rear surface S ₂ in the lid 113 of the singulated substrate 311. Instead of the AuSi pattern, an Au pattern or a resin such as epoxy may be used.

  Here, the fifth embodiment and the above-described comparative example are compared.

  FIG. 14 shows sensitivity-frequency characteristics of the acoustic transducer 101 of the fifth embodiment and the comparative example. In FIG. 14, a curve X represents the experimental result for the fifth embodiment, and a curve Y represents the experimental result for the comparative example.

  In FIG. 14, it can be seen that the sensitivity of the acoustic transducer 101 of the fifth embodiment is higher than the sensitivity of the acoustic transducer 101 of the comparative example, as indicated by an arrow A. This is the same as in the first embodiment.

  Further, in FIG. 14, as indicated by an arrow B, it can be seen that the lowest frequency that can be detected by the acoustic transducer 101 of the fifth embodiment is lower than the lowest frequency that can be detected by the acoustic transducer 101 of the comparative example. . This is also the same as in the first embodiment.

As described above, in this embodiment, as in the first embodiment, the back surface cavity 201 is formed in the lower portion of the acoustic element 312, and the vent holes 202 ₁ and 202 ₂ are formed on the side of the acoustic element 312. The cavity 201 and the vent holes 202 ₁ , 202 ₂ are communicated with each other through communication paths 203 ₁ , 203 ₂ . Thereby, in this embodiment, it is possible to achieve both the control of the sound pressure on the back surface of the membrane and the improvement of the sensitivity of the acoustic transducer 101, as in the first embodiment.

  In the first embodiment, the piezoelectric element 112 is used, whereas in the fifth embodiment, an electrostatic acoustic element 312 is used. For example, the fifth embodiment has an advantage that the acoustic transducer 101 can be manufactured by a normal semiconductor manufacturing process because it is not necessary to use the piezoelectric element 112. The fifth embodiment further has an advantage that the manufacturing cost can be reduced because it is not necessary to use the SOI substrate 111. On the other hand, the first embodiment has an advantage that it is not necessary to form a hollow space like the electrostatic cavity 332, for example.

(6th and 7th embodiment)
FIG. 15 is a side sectional view of the acoustic transducer 101 of the sixth embodiment.

In the present embodiment, the first communication path 203 ₁ has a first communication cavity 211 ₁ located on the vent hole 202 ₁ side and a first communication hole 212 ₁ located on the back surface cavity 201 side. Further, the second communication path 203 ₂ has a second communication cavity 211 ₂ located on the vent hole 202 ₂ side and a second communication hole 212 ₂ located on the back surface cavity 201 side. The communication cavities 211 ₁ and 211 ₂ function as acoustic capacitors C ₂ and C ₃ , respectively, as shown in FIG. Further, the communication holes 212 ₁ and 212 ₂ function as acoustic resistances R ₃ and R ₄ as shown in FIG.

In the present embodiment, a ventilation hole 402 is further provided instead of the ventilation hole 401 (FIG. 11). The ventilation hole 402 penetrates the polysilicon layer 323 and the lower electrode 131 and connects the electrostatic cavity 332 and the back surface cavity 201. The ventilation hole 402 functions as an acoustic resistance R _X as shown in FIG. Further, the electrostatic cavity 332 functions as an acoustic capacitance C _X as shown in FIG.

  FIG. 16 is a side sectional view of the acoustic transducer 101 of the seventh embodiment.

The acoustic transducer 101 of the seventh embodiment has the same configuration as the acoustic transducer 101 of the sixth embodiment. However, the formation positions of the first and second communication holes 212 ₁ and 212 ₂ are different between the sixth embodiment and the seventh embodiment.

An equivalent circuit relating to the acoustic capacitance and acoustic resistance of the acoustic transducer 101 of FIGS. 15 and 16 is shown in FIG. 2E. In FIG. 2E, the configuration X, the configuration Y, and the _CM are connected in parallel, and these and the configuration Z are connected in series. In the configuration X, R ₁ , C ₂ and R ₃ are connected in series, and in the configuration Y, R ₂ , C ₃ and R ₄ are connected in series. In configuration Z, C ₁ , R _X and C _X are connected in series.

As described above, in the sixth and seventh embodiments, the back surface cavity 201 is formed in the lower part of the acoustic element 312 and the vent holes 202 ₁ and 202 ₂ are formed on the side of the acoustic element 312 as in the fifth embodiment. Thus, the back surface cavity 201 and the vent holes 202 ₁ and 202 ₂ are connected to each other through the communication paths 203 ₁ and 203 ₂ . Thereby, in the sixth and seventh embodiments, it is possible to achieve both the control of the sound pressure on the back surface of the membrane and the improvement of the sensitivity of the acoustic transducer 101 as in the fifth embodiment.

In the sixth and seventh embodiments, a vent hole 402 that connects the electrostatic cavity 332 and the back surface cavity 201 is provided. Thereby, in these embodiments, it is relatively easy to adjust the acoustic resistance and the acoustic capacitance of the acoustic transducer 101 by using the acoustic resistance R _X and the acoustic capacitance C _X.

(Eighth and ninth embodiments)
FIG. 17 is a side sectional view of the acoustic transducer 101 of the eighth embodiment.

In the present embodiment, the first and second communication paths 203 ₁ and 203 ₂ have first and second communication holes 212 ₁ and 212 ₂ , respectively. The communication holes 212 ₁ and 212 ₂ function as acoustic resistances R ₃ and R ₄ as shown in FIG. In the present embodiment, the first and second air passages 202 ₁ and 202 ₂ penetrate the substrate 311 and the like.

In the present embodiment, a ventilation hole 402 is further provided instead of the ventilation hole 401 (FIG. 11). The ventilation hole 402 penetrates the polysilicon layer 323 and the lower electrode 131 and connects the electrostatic cavity 332 and the back surface cavity 201. The ventilation hole 402 functions as an acoustic resistance R _X as shown in FIG. Further, the electrostatic cavity 332 functions as an acoustic capacitance C _X as shown in FIG.

  FIG. 18 is a side sectional view of the acoustic transducer 101 of the ninth embodiment.

  The acoustic transducer 101 of the ninth embodiment has the same configuration as the acoustic transducer 101 of the eighth embodiment. However, in the ninth embodiment, both the vent hole 401 and the vent hole 402 are provided.

An equivalent circuit relating to the acoustic capacitance and acoustic resistance of the acoustic transducer 101 of FIGS. 17 and 18 is shown in FIG. 2F. In FIG. 2F, the configuration X, the configuration Y, and the _CM are connected in parallel, and these and the configuration Z are connected in series. In configuration X, R ₁ and R ₃ are connected in series, and in configuration Y, R ₂ and R ₄ are connected in series. In configuration Z, C ₁ , R _X and C _X are connected in series.

As described above, in the eighth and ninth embodiments, as in the fifth embodiment, the back surface cavity 201 is formed in the lower portion of the acoustic element 312 and the vent holes 202 ₁ and 202 ₂ are formed on the side of the acoustic element 312. Thus, the back surface cavity 201 and the vent holes 202 ₁ and 202 ₂ are connected to each other through the communication paths 203 ₁ and 203 ₂ . Thereby, in the eighth and ninth embodiments, it is possible to achieve both the control of the sound pressure on the back surface of the membrane and the improvement of the sensitivity of the acoustic transducer 101 as in the fifth embodiment.

In the eighth and ninth embodiments, a vent hole 402 that connects the electrostatic cavity 332 and the back surface cavity 201 is provided. Thereby, in these embodiments, it is relatively easy to adjust the acoustic resistance and the acoustic capacitance of the acoustic transducer 101 by using the acoustic resistance R _X and the acoustic capacitance C _X.

  As mentioned above, although the example of the specific aspect of this invention was demonstrated by 1st-9th embodiment, this invention is not limited to these embodiment.

It is a sectional side view of the acoustic transducer of a 1st embodiment. 3 represents an equivalent circuit relating to acoustic capacitance and acoustic resistance of an acoustic transducer. It is a manufacturing-process figure (1/2) of the acoustic transducer of 1st Embodiment. It is a manufacturing-process figure (2/2) of the acoustic transducer of 1st Embodiment. It is side sectional drawing of the acoustic transducer of a comparative example. The sensitivity-frequency characteristic of the acoustic transducer of 1st Embodiment is represented. It is side sectional drawing of the acoustic transducer of 2nd Embodiment. The sensitivity-frequency characteristic of the acoustic transducer of 2nd Embodiment is represented. It is a side sectional view of an acoustic transducer of a 3rd embodiment. It is a sectional side view of the acoustic transducer of a 4th embodiment. It is a sectional side view of the acoustic transducer of 5th Embodiment. It is a manufacturing-process figure (1/2) of the acoustic transducer of 5th Embodiment. It is a manufacturing-process figure (2/2) of the acoustic transducer of 5th Embodiment. The sensitivity-frequency characteristic of the acoustic transducer of 5th Embodiment is represented. It is side sectional drawing of the acoustic transducer of 6th Embodiment. It is side sectional drawing of the acoustic transducer of 7th Embodiment. It is side sectional drawing of the acoustic transducer of 8th Embodiment. It is side sectional drawing of the acoustic transducer of 9th Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Acoustic transducer 111 SOI substrate 112 Piezoelectric element 113 Lid 121 Semiconductor substrate 122 Embedded insulating film 123 Semiconductor layer 131 Lower electrode 132 Piezoelectric film 133 Upper electrode 141 Adhesive 201 Back surface cavity 202 Vent hole 203 Connection path 211 Connection cavity 212 Connection hole 311 Substrate 312 Acoustic element 322 Silicon oxide film 323 Polysilicon layer 332 Electrostatic cavity 334 First insulating film 335 Second insulating film 401 Vent hole 402 Vent hole

Claims (5)

A back surface cavity formed on the back surface of the substrate and functioning as an acoustic capacity; an air hole opening on the front surface side of the substrate and positioned on the side of the back surface cavity and functioning as an acoustic resistance; and a side surface of the back surface cavity And a communication path that connects the back cavity and the vent hole, and a substrate provided with
An acoustic element formed on the surface of the substrate, located above the back cavity, and located lateral to the vent;
An acoustic transducer comprising: The acoustic element is
A lower electrode formed on the surface of the substrate, located at the top of the back cavity, and located at the side of the vent;
A piezoelectric film formed on the lower electrode;
An upper electrode formed on the piezoelectric film;
The acoustic transducer according to claim 1, comprising: The acoustic element is
A lower electrode formed on the surface of the substrate, located at the top of the back cavity, and located at the side of the vent;
An upper electrode formed via an electrostatic cavity above the lower electrode;
The acoustic transducer according to claim 1, comprising:   The acoustic transducer according to claim 3, wherein the acoustic element is provided with a vent hole penetrating the upper electrode or the lower electrode.   5. The acoustic transducer according to claim 1, wherein the communication path has one or both of a communication cavity that functions as an acoustic capacity and a communication hole that functions as an acoustic resistance. 6.

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