JP2010108216A - Memory management system, electronic equipment and memory management program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that it is impossible to efficiently avoid fragmentation of a memory, and that it is impossible to allocate or release continuous memory spaces at a high speed, and to increase/decrease the size of the allocated continuous memory spaces, in a memory management system, electronic equipment and a memory management program. <P>SOLUTION: In a memory management system, electronic equipment and a memory management program, a physical address space is treated in units of small-size micro-partitions, and continuous logical address spaces divided for each application are allocated to the necessary number of micro-partitions. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a technique for performing efficient memory management by suppressing the occurrence of fragmentation in memory allocation / release operations in memory management systems, electronic devices, and memory management programs.

  In an electronic device including a storage device such as a semiconductor memory or a magnetic rotating disk, there is a technical demand for efficiently managing the memory. The memory secures (allocates) a necessary area at the time of use, and releases it after use to prepare for reuse. When such memory allocation / release operations are repeated, the usable memory space called fragmentation is in a state of being finely distributed in the address space, and the memory usage rate is low. However, a situation occurs in which a large address space cannot be obtained.

  As a conventional technique, in a data processing apparatus such as an image forming apparatus, there is the following method for realizing a memory management method that reduces the occurrence of fragmentation and does not cause a decrease in throughput due to waiting for memory space or data movement in the memory. . When the page detection processing unit detects the start of a page, the memory resource acquisition processing unit allocates memory, partition (partition) partitioning is performed, and memory areas are allocated in the input data and processed data partitions (partitions). The When the processing data is generated by the data processing unit and stored in the processing data memory area, the memory resource release processing unit releases an unnecessary memory area. The released memory area becomes a part of an empty area of the machining data partition (partition) (see Patent Document 1).

  In addition, in order to provide a host device capable of realizing a high writing speed, the management system has a function of sequentially allocating unit areas partitioned on the memory area as write areas for storing write data. A management unit having a size several times larger is used as a unit for determining an allocation position, and a management unit is allocated as the write area in accordance with a possible writing speed order for each management unit in response to a write function call. There is a method of giving an instruction to the memory card to write the write data in the unit area allocated by the method (see Patent Document 2).

  However, since the method of Patent Document 1 presupposes processing for each page of the image forming apparatus, it cannot cope with processing over a plurality of pages. In addition, there is a limit of two partition partitions. Furthermore, even if the partition size is insufficient with the capacity at the time of the first allocation, the continuous memory space cannot be increased, and the capacity change can be handled only in the direction of decreasing the size of one partition.

Further, the method of Patent Document 2 relates to memory allocation at the time of writing, and cannot cope with suppression of fragmentation when the memory is continuously allocated / released.
JP 2002-351739 A JP 2006-285669 A

  The problem to be solved is that in the memory management system, the electronic device and the memory management program, the memory fragmentation could not be efficiently avoided, and the continuous memory space allocation / release operation is performed at high speed. And the size of the allocated continuous memory space could not be increased or decreased.

  The memory management system of the present invention includes a logical partition management unit that manages allocation and release of virtual memory used by an application in a logical address space, and allocation of the real memory by dividing real memory into small sizes in a physical address space. A physical partition management unit that manages release, and a conversion unit that performs address conversion between the logical address space and the physical address space based on a conversion table.

  The conversion unit of the memory management system of the present invention may generate or delete the conversion table that associates the logical address space with the physical address space.

  Further, the logical partition management unit of the memory management system of the present invention may secure the allocation of the virtual memory in a continuous logical address space for each application.

  In addition, the physical partition management unit of the memory management system of the present invention uses a hardware-dependent access area as a fixed area, and allocates to the fixed area with respect to virtual memory allocation by the application from the logical partition management unit. It is good also as not performing.

  An electronic apparatus according to the present invention includes the memory management system.

  The memory management program of the present invention includes a logical partition management function for managing allocation and release of virtual memory used by an application in a logical address space in a computer, and dividing the real memory into small sizes in the physical address space. A physical partition management function for managing the allocation and release of the logical address, and a conversion function for performing address conversion between the logical address space and the physical address space based on a conversion table.

  The memory management system of the present invention includes a logical partition management unit that manages allocation and release of virtual memory used by an application in a logical address space, and allocation of the real memory by dividing real memory into small sizes in a physical address space. A physical partition management unit that manages release, and a conversion unit that performs address conversion between the logical address space and the physical address space based on a conversion table.

  This effectively avoids fragmentation efficiency in the logical address space. In addition, it is possible to perform continuous virtual memory space allocation and release operations at high speed, and to increase or decrease the size of the allocated continuous virtual memory space.

  The conversion unit of the memory management system of the present invention may generate or delete the conversion table that associates the logical address space with the physical address space.

  For this reason, the address conversion from the logical address space of the virtual memory used by the application to the physical address space of the real memory can be efficiently performed.

  Further, the logical partition management unit of the memory management system of the present invention may secure the allocation of the virtual memory in a continuous logical address space for each application.

  For this reason, by releasing partitions partitioned for each application at a time, the virtual memory can be released at a high speed, and a continuous large logical address space can be obtained.

  In addition, the physical partition management unit of the memory management system of the present invention uses a hardware-dependent access area as a fixed area, and allocates to the fixed area with respect to virtual memory allocation by the application from the logical partition management unit. It is good also as not performing.

  For this reason, even if there is a hardware-dependent access such as DMA (Direct Memory Access), the location is operated without being assigned to another application or the like.

  An electronic apparatus according to the present invention includes the memory management system.

  For this reason, occurrence of fragmentation in the logical address space is efficiently avoided. In addition, it is possible to perform continuous virtual memory space allocation and release operations at high speed, and to increase or decrease the size of the allocated continuous virtual memory space. Further, by releasing partitions partitioned for each application at a time, it is possible to release virtual memory at high speed and obtain a continuous large logical address space. Also, even if there is a hardware-dependent access such as DMA (Direct Memory Access), the location is operated without being assigned to another application or the like.

  The memory management program of the present invention includes a logical partition management function for managing allocation and release of virtual memory used by an application in a logical address space in a computer, and dividing the real memory into small sizes in the physical address space. A physical partition management function for managing the allocation and release of the logical address, and a conversion function for performing address conversion between the logical address space and the physical address space based on a conversion table.

  For this reason, occurrence of fragmentation in the logical address space is efficiently avoided. In addition, it is possible to perform continuous virtual memory space allocation and release operations at high speed, and to increase or decrease the size of the allocated continuous virtual memory space.

  In memory management systems, electronic devices, and memory management programs, it is impossible to efficiently avoid memory fragmentation, and continuous virtual memory space allocation and release operations are performed at high speed. The problem that the size of the memory space cannot be increased or decreased is handled in units of micropartitions in which the physical address space is divided into small sizes, and the continuous logical address space divided in units of applications etc. is converted into the required number of micropartitions. Solved by assigning.

[Partition]
FIG. 1A is an explanatory diagram relating to real memory allocation in an address space in a conventional memory management system. Conventionally, the address space is divided into single partitions, and these single partitions are allocated (malloc ()) and released (free ()) by using the memory management API (Application Protocol Interface). . Under such memory management, as a result of repeated allocation / release of real memory, as shown in FIGS. 2A to 2B, the used and unused address spaces are distributed and fragmentation is performed. Therefore, a continuous large-capacity real memory space cannot be secured unless data movement processing in the real memory is performed. However, the data movement process in the real memory takes time, and the use of the real memory is greatly restricted during the data movement, which is very problematic for an electronic device that requires real-time processing such as an image forming apparatus.

  FIG. 1B is an explanatory diagram relating to allocation of physical address space when the physical address space is divided into partitions and used in the memory management system of the present invention. As shown in FIG. 3A, when an entire physical address space is divided by giving an ID to each of a plurality of partitions and an ID is associated and assigned for each application, one application is terminated (FIG. 3B ) In ID = 2), a large continuous address space can be obtained by performing a batch release of partition 2 by specifying an ID (free_all (ID = 2), see FIG. 1B).

  However, if there is a large difference between the partition size initially allocated and the memory size actually used, this method of partitioning alone will not provide sufficient capacity, especially with the actual memory size allocated by the partition. If it disappears, a continuous large physical address space cannot be obtained.

  Therefore, the present invention solves the above problem by converting the logical address space required by the application side into a micropartition physical address space in which the physical memory space is divided into small sizes.

[Constitution]
FIG. 4 is a functional block diagram of the memory management system according to the embodiment of the present invention.

  The memory management unit M10 includes functional units of a physical partition management unit M17, a conversion unit M19, and a logical partition management unit M21.

  Each of the above functional units accesses the physical micropartition M11 in the physical address space, generates or deletes the conversion table M13 between the physical address and the logical address, and accesses the logical partition M15 in the logical address space.

  The operation of each functional unit will be described below.

  The logical partition management unit M21 manages allocation of virtual memory used by the application in the logical address space, and the virtual memory allocation is divided into logical address partitions (logical partition M15) that are consecutive for each application.

  The conversion unit M19 performs address conversion between the logical address space and the physical address space. The address translation uses a translation table M13 that associates the logical address space with the physical address space (details will be described later). That is, the conversion unit M19 acquires unused areas of the virtual memory and the real memory from the logical partition management unit M19 and the physical partition management unit M17, respectively, and associates the physical address space with the logical address space. The conversion unit M19 generates and deletes the conversion table M13 according to the usage status of the application. Specifically, the conversion unit M19 generates a conversion table M13 in response to a request associated with activation or operation of the application, and deletes the conversion table M13 in response to the end of the application.

  The physical partition management unit M17 manages real memory allocation and release by dividing the real memory into physical micropartitions M11 for each small size in the physical address space.

[Conversion table and micropartition]
The conversion table will be described with reference to FIG.

  As shown in the conversion table T01, the physical address space is divided into micropartitions each having a size of 0x0800 (this size is an example and other sizes may be used). Each micropartition has an ID indicating which application is being used, and has a physical address and a corresponding logical address value.

  For example, regarding the micropartition used in the application with ID = 2, as shown in the conversion table T11, the micropartition number = 1 is the first micropartition with ID = 2, and the link destination pointer is the next conversion. Table T31 shows micropartition number = 3, and the next shows micropartition number = 6.

  In this way, the conversion unit M19 can convert the physical addresses of the real memory allocated in the physical address space by the physical partition management unit M17 into continuous logical addresses. Furthermore, the logical partition management unit M15 can assign the converted continuous logical addresses acquired from the conversion unit M19 to the virtual memory space.

  FIG. 6A shows a case of real memory batch release by ID designation. In this case, the micro partition 2 is occupied by the graphics application. However, since the graphics application is terminated, the real memory is not required. Therefore, the physical partition management unit M17 designates ID = graphics and releases the memory all at once. In this case, it is possible to release all the real memory allocated to ID = graphics by using the link destination pointer as shown in T11 to T61 of the conversion table. The released micropartition can be used by other applications.

  FIG. 6B is a diagram showing the case of reallocating the partition of the real memory that is initially allocated. When the physical memory space allocated by the physical partition management unit M17 is insufficient at first, the unused micro partition 5 is allocated for ID = graphics. In this case, the physical address space exists in a discrete manner, but the logical address space exists continuously.

  FIG. 6C illustrates a case where a plurality of new micropartitions are assigned. If the address space required for allocation is larger than one micropartition size, for example, three micropartitions 3, 4, and 5 may be allocated as shown in the figure.

  With reference to FIG. 7, it will be described that a continuous logical address space can be obtained even when the micropartition usage space is distributed in the physical address space. In FIG. 7, for example, an ID = interpreter application has its actual memory distributed in micropartitions 1, 6, and 9. However, since the conversion unit M19 performs address conversion between a physical address and a logical address using the conversion table M13, the logical partition management unit M21 can always be accessed with a logical address to a continuous memory space. It is. Memory management is similarly performed for graphics and rendering applications.

  An example in which a specific micropartition is designated as a fixed memory area will be described with reference to FIG. In the real memory address space, there are cases where the memory space is accessed directly from hardware such as DMA (Direct Memory Access). However, even if there is such hardware-dependent access in this memory management system, there is a problem. Work without. In this case, the conversion unit M19 puts a mark such as ID = hardware dependency on the corresponding micropartition in the conversion table M13. Since the micro partition having the ID is a fixed area, the physical partition management unit M17 does not allocate to the corresponding part (fixed area) even if a memory allocation request is received from the logical partition management unit M21. As shown in FIG. 8, the interpreter, graphics, and rendering of the application requested to be allocated to the logical partition management unit M21 all avoid the ID = hardware-dependent micropartition area (fixed area) and the physical address of the memory. Therefore, contention with the area accessed by these DMAs does not occur.

[Effect of Example]
The memory management system according to the embodiment of the present invention enables the following.

  It becomes possible to avoid fragmentation efficiently.

  A plurality of partitions, which are means for avoiding fragmentation, can be used.

  It becomes possible to dynamically change the partitioning position of the partition, which is a means for avoiding fragmentation.

  It is possible to release from the memory that is no longer needed without restricting the memory release order.

It is explanatory drawing which shows the difference of the partition of a prior art example and this invention Example. It is a figure of the memory allocation of the partition of a prior art example. It is a figure of the memory allocation of the partition of a present Example. It is a functional block diagram of a memory management system of an embodiment of the present invention. It is an example of the conversion table of the Example of this invention. It is explanatory drawing of the usage example of the micro partition of this invention Example. It is explanatory drawing of the example of the size ensuring of the micro partition of this invention Example. It is explanatory drawing of the fixed area | region of the micro partition of this invention Example.

Explanation of symbols

M10 Memory management unit (memory management system)
M13 conversion table M17 physical partition management unit M19 conversion unit M21 logical partition management unit

Claims (6)

A logical partition manager that manages allocation and release of virtual memory used by applications in the logical address space;
A physical partition manager that manages allocation and release of the real memory by dividing the real memory into small sizes in the physical address space;
A memory management system comprising: a conversion unit that performs address conversion between the logical address space and the physical address space. The memory management system of claim 1,
The memory management system, wherein the conversion unit generates or deletes a conversion table that associates the logical address space with the physical address space. The memory management system according to claim 1 or 2, wherein
The logical partition management unit secures allocation of the virtual memory in a continuous logical address space for each application. The memory management system according to any one of claims 1 to 3,
The physical partition management unit sets a hardware-dependent access area as a fixed area, and does not perform allocation to the fixed area in response to virtual memory allocation by the application from the logical partition management unit. Management system. An electronic apparatus comprising the memory management system according to claim 1. On the computer,
A logical partition management function for managing allocation and release of virtual memory used by applications in the logical address space;
A physical partition management function that manages allocation and release of the real memory by dividing the real memory into small sizes in the physical address space;
A memory management program for realizing a conversion function for performing address conversion between the logical address space and the physical address space based on a conversion table.

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