WO2014030213A1

WO2014030213A1 - Mac address management device and method

Info

Publication number: WO2014030213A1
Application number: PCT/JP2012/071104
Authority: WO
Inventors: 田中敏彰
Original assignee: 富士通株式会社
Priority date: 2012-08-21
Filing date: 2012-08-21
Publication date: 2014-02-27

Abstract

A system in which the present invention is applied has: a communication means enabling communication over a network; a memory means storing address group information representing allocatable media access control (MAC) addresses; and a management means for referencing the address group information stored in the memory means, selecting a MAC address to be allocated to a first external device connected to the network, and communicating the selected MAC address to the first external device using the communication means, when the communication means has received request information requesting allocation of a MAC address from the first external device.

Description

MAC address management apparatus and method

The present invention relates to a technique for managing a MAC (Media Access Control) address used for transmitting and receiving data between devices connected via a network.

The device connected to the network transmits and receives data using communication hardware such as NIC (Network Interface Card). An address called a MAC address is assigned to the communication hardware. This MAC address is a physical address assigned to uniquely identify communication hardware. For this reason, by using the MAC address, data specifying the communication partner can be transmitted and received.

Some communication hardware includes a plurality of communication resources each functioning as one communication hardware. In order to use each communication resource included in the communication hardware, a MAC address is required. However, in communication hardware provided with a plurality of communication resources, the number of communication resources actually used may not be specified in advance, and generally MAC addresses are not assigned to all communication resources in advance.

The communication hardware is equipped with a storage device for storing address data representing the assigned MAC address. When exchanging the communication hardware, the same MAC address is used by newly writing the address data stored in the storage device of the communication hardware to be removed to the storage device of the newly installed communication hardware. be able to. At that time, the address data stored in the storage device of the communication hardware to be removed is deleted.

When exchanging with communication hardware having a larger number of communication resources, even if the address data is written as described above, MAC addresses are not always assigned to all communication resources of the communication hardware after the exchange. For example, the number of communication resources of the communication hardware before replacement is 1, the number of communication resources of the communication hardware after replacement is 8, and the number of MAC addresses assigned in advance to the communication hardware after replacement is 1. In this case, the MAC address of 6 communication resources is insufficient. Even when communication hardware in which MAC addresses are not assigned to all communication resources is newly installed in the apparatus, all communication resources cannot be used due to lack of MAC addresses.

On the other hand, there is no shortage of MAC addresses when the communication hardware is replaced with a smaller number of communication resources and when the communication hardware is removed. However, an unused MAC address is generated. Therefore, the resource MAC address is wasted.

Most of the devices capable of communication can attach and detach communication hardware. Therefore, an increase or decrease in the number of necessary MAC addresses can occur at any time. In addition, the addition of servers equipped with communication hardware is also performed as needed. In the added server, the number of MAC addresses corresponding to the installed communication hardware is required. For this reason, it may be desirable for an apparatus that requires MAC addresses to easily cope with fluctuations in the number of necessary MAC addresses.

JP 2003-134118 A JP 2005-293110 A Japanese Patent Laid-Open No. 9-130421

In one aspect, an object of the present invention is to provide a technique for enabling a device equipped with communication hardware to easily cope with a change in the number of required MAC addresses.

One system to which the present invention is applied includes a communication unit that enables communication via a network, a storage unit that stores address group information representing an assignable MAC (Media Access Control) address, and a first unit connected to the network. When the communication unit receives request information for requesting assignment of a MAC address from one external device, refer to the address group information stored in the storage unit, select the MAC address to be assigned to the first external device, and Management means for notifying the selected MAC address to the first external device by means of communication means.

In one system to which the present invention is applied, a device equipped with communication hardware can easily cope with fluctuations in the number of necessary MAC addresses.

It is a figure showing the example of a structure of the data processing system to which the MAC address management apparatus by this embodiment was applied. It is a figure explaining the more detailed structure of a mainframe apparatus. It is a figure explaining the communication environment which an ONA card provides. It is a figure explaining an example of functional composition concerning management of a MAC address of a MAC address management server and a mainframe device. It is a figure explaining the structural example of a MAC address management table, and the example of the content (initial state). It is a figure explaining the structural example of a MAC address management table, and the example of the content (at the time of acquisition command processing). It is a figure explaining the structural example of a MAC address management table, and the example of the content (at the time of a movement registration command process). It is a figure explaining the structural example of a MAC address management table, and the example of the content (at the time of a movement acquisition command process). It is a figure explaining the structural example of a MAC address management table, and the example of the content (at the time of a return command process). It is a figure explaining the structural example of an own apparatus information table. It is a flowchart of a MAC address management process. It is a flowchart of a MAC address allocation process. It is a flowchart of a MAC address movement registration process. It is a flowchart of a MAC address movement allocation process. It is a flowchart of a MAC address return process. 10 is a flowchart illustrating an example of a flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits an acquisition command. 10 is a flowchart illustrating an example of a flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits a movement registration command. 10 is a flowchart illustrating an example of a flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits a movement acquisition command. It is a flowchart showing the example of the flow of the process which each of a console, its mainframe apparatus, and a MAC address management server performs when a mainframe apparatus transmits a return command.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a diagram illustrating a configuration example of a data processing system to which a MAC address management device according to the present embodiment is applied.

As shown in FIG. 1, the data processing system has a configuration in which a MAC address management server 1 and a plurality of mainframe devices 2 (2-1, 2-2) are connected to a network 3. The mainframe devices 2 are connected by a network 4, and each mainframe device 2 can be connected to a console 5. The MAC address management device according to the present embodiment is realized as the MAC address management server 1.

The MAC address management server 1 is a single computer (data processing device). As shown in FIG. 1, a CPU (Central Processing Unit) 11, a memory 12, a hard disk device 13, and an interface card (indicated as “I / F” in FIG. 1) 14 are provided. The memory 12 is, for example, one or more memory modules.

The hard disk device 13 stores a MAC address management table 13a, which will be described later, in addition to a program 13b executed by the CPU 11. The MAC address management server 1 which is a MAC address management device according to the present embodiment is realized by the CPU 11 executing the program 13b. The interface card 14 is, for example, a NIC (Network Interface Card).

Each mainframe device 2 includes a SVP (SerVice Processor) 21 and a plurality of PCI (Peripheral Components Interconnect) boxes 22. In FIG. 1, three PCI boxes 22-0 to 22-2 are shown for each mainframe device 2.

The SVP 21 is a dedicated device for controlling and monitoring the mounted mainframe device 2. The SVP 21 of each mainframe device 2 and the interface card 14 of the MAC address management server 1 are connected to the network 3.

The PCI box 22 is a device for adding a PCI slot. In FIG. 1, an ONA (Open Network Adapter) card 25 is shown as a PCI express card connected to the PCI slot of the PCI box 22. The ONA card 25 is a type of NIC and enables communication via the network 4. Thereby, the ONA card 25 mounted on each mainframe device 2 is connected to the network 4.

There are other hardware than the ONA card 25 as communication hardware realized as a PCI Express card. However, here, in order to avoid confusion, only the ONA card 25 is assumed as communication hardware. The communication hardware may be a device other than the ONA card 25.

As shown in FIG. 1, “GS21 1600” and “Serial 00001” are written on the mainframe device 2-1. “GS21 1600” represents model type data that is the type data of the mainframe device 2-1, and “Serial 00001” represents that the device serial number that is identification information is “00001”. The same applies to “GS21 200A” and “Serial 00002” written on the mainframe device 2-2. Each mainframe device 2 can be uniquely identified by the model type data and the device serial number.

FIG. 2 is a diagram illustrating a more detailed configuration of the mainframe device. In FIG. 2, for the sake of convenience, more detailed configurations of the SVP 21 and the ONA card 25 are shown.
Each mainframe device 2 includes a main body 200 as shown in FIG. The main body 200 has, for example, a system board that is a data processing device including one or more CPUs, and at least one I / O (Input / Output) unit that is a data input / output device. . Thereby, the main body 200 is an environment in which a plurality of VMs (Virtual Machines) can be created. Each PCI box 22 is connected to any I / O unit.

Each PCI box 22 has one or more PCI express switches. One or more such PCI express switches also exist in the I / O unit. Thereby, the main body 200 and the SVP 21 are connected to the ONA card 25 via one or more switches. A switch group 27 shown in FIG. 2 represents a group of switches used for data transmission / reception between the SVP 21 and the ONA card 25.

As shown in FIG. 2, the ONA card 25 includes an ONA main body 251, an SDRAM (Synchronous Dynamic Random Access Memory) 252, a CPU 253, and a ROM (Read Only Memory) 254. The ROM 254 stores a program 256 executed by the CPU 253.

FIG. 3 is a diagram for explaining a communication environment provided by the ONA card. Here, the communication environment provided by the ONA card 25 will be described in detail with reference to FIG.
The ONA card 25 is a single card. However, the ONA card 25 can be recognized as a plurality of cards by the OS (Operating System). Each communication resource 258 (258-0 to 258-7) shown in FIG. 3 is recognized by the OS as one card. In FIG. 3, “060” to “06F” represent virtual port numbers. Two virtual port numbers are assigned to each communication resource. Thereby, in the example shown in FIG. 3, the ONA card 25 can be used as eight cards by using the virtual port of the corresponding number.

In the example shown in FIG. 3, a total of four VMs 202 (202-1 to 202-4) are created on the main body 200. Each VM 202 operates communication software (indicated as “communication software” in FIG. 3) 204 that supports the OSI (Open Systems Interconnection) standard and TCP / IP (Transmission Control Protocol / Internet Protocol). The ONA card 25 can allocate communication resources 258 for each VM 202 and for each communication method.

A MAC address is required for communication using each communication resource 258. The SDRAM 252 is used for storing address data representing a MAC address assigned to each communication resource 258. In FIG. 3, an arrow from the switch group 27 to the SDRAM 252 is shown, but the access to the SDRAM 252 is actually performed by the CPU 253. The CPU 253 accesses the SDRAM 252 according to the instruction from the SVP 21, that is, writes or erases address data.

The ONA body 251 provides a plurality of communication resources 258 using a MAC address in which address data is stored in the SDRAM 252. As a result, the ONA card 25 needs to assign a MAC address to provide the communication resource 258.

The SVP 21 includes a CPU 211, a recording medium 212, a hard disk device (denoted as “SVP-HDD” in FIG. 2) 213, and two interface cards (denoted as “I / F” in FIG. 2) 214, 215.

The recording medium 212 is a storage device in which a program 217 executed by the CPU 211 is stored. The CPU 211 reads and executes the program 217 stored in the storage medium 212, thereby controlling and managing the own mainframe device 2. One of the two

interface cards

214 and 215 is connected to the network 3 and the other is used to connect to the console 5. Here, it is assumed that the interface card 214 is used for connection with the console 5 and the interface card 215 is used for communication with the network 3.

The PCI box 22 is a device that is added as necessary. The number of ONA cards 25 mounted on the PCI box 22 can be arbitrarily increased or decreased. There are a large number of mainframe devices 2 on which the PCI boxes 22 are mounted, and expansion is performed as needed. These mean that an enormous number of MAC addresses may be used as a whole system, and the number of MAC addresses actually used may greatly increase or decrease. For this reason, in the present embodiment, the MAC address management server 1 is installed in order to centrally manage the MAC addresses used in each mainframe device 2. The SVP 21 of each mainframe device 2 manages the MAC address used by the mainframe device 2 itself.

By connecting the MAC address management server 1 to each mainframe device 2 via the network 3, each mainframe device 2 can acquire a newly required MAC address at any time. Each mainframe device 2 can cancel the assignment of the MAC address that is no longer necessary. For this reason, each mainframe device 2 can quickly and easily respond to an increase or decrease in the number of necessary MAC addresses without wasting MAC addresses.

FIG. 4 is a diagram illustrating an example of a functional configuration related to MAC address management of the MAC address management server and the mainframe device.
Management of the MAC address in each mainframe device 2 is performed by the SVP 21. Therefore, in the mainframe device 2, only the SVP 21 represents a functional configuration example.

The MAC address management server 1 centrally manages target MAC addresses in response to requests from the SVP 21 of each mainframe device 2. For this purpose, an allocation determination unit 100, a data transmission / reception unit 110, and a storage unit 120 are provided.

The data transmission / reception unit 110 corresponds to the interface card 14 shown in FIG. The assignment determination unit 100 is realized by the CPU 11 reading the program 13b stored in the hard disk device 13 into the memory 12 and executing it. Therefore, the assignment determination unit 100 corresponds to, for example, the CPU 11 and the memory 12 from which the program 13b is read. The storage unit 120 corresponds to the hard disk device 13.

The MAC address management server 1 performs MAC address allocation, MAC address deallocation, or MAC address migration in response to a request from the SVP 21 of each mainframe device 2. The movement of the MAC address is to cancel the assignment of the MAC address used in a certain mainframe device 2 and newly assign the released MAC address to another designated mainframe device 2. . By enabling the movement of the MAC address, the movement of the VM 202 between the mainframe devices 2, that is, the load division and the like can be performed more easily.

The hard disk device 13 stores a MAC address management table 13a. The MAC address management table 13a is configured as shown in FIGS. 5A to 5E. Each entry (record) of the MAC address management table 13a stores data of a MAC address, a model type, a device serial number, a model type of the destination device, and a device serial number of the destination device.

The model type and device serial number are data for uniquely identifying the mainframe device 2 to which the corresponding MAC address is assigned. Therefore, there is no corresponding data in an entry to which no MAC address is assigned. In FIG. 5A to FIG. 5E, a column in which no data exists is described as “unused (usable)”. “Unused (usable)” written as the model type of the destination device and the device serial number of the destination device also indicates that there is no corresponding data. In FIG. 5A to FIG. 5E, “1” to “3” written at the head of each entry represent entry (record) numbers.

5A to 5E show examples of operations of the MAC address management table 13a in the case where the contents shown in FIG. 5A are in an initial state, and MAC address assignment, MAC address movement, and MAC address deallocation are sequentially performed. ing. The operation of the MAC address management table 13a, that is, the update of the contents is performed by the assignment determination unit 100 in response to a request from the mainframe device 2.

As shown in FIG. 4, the SVP 21 of each mainframe device 2 includes a data transmission / reception unit 221, a MAC address management unit 222, a command instruction unit 223, a MAC address notification unit 224, and a storage unit 225 as functional configurations.

The data transmission / reception unit 221 is a function for communicating with the MAC address management server 1 via the network 3, and is actually an interface card 215. The storage unit 225 is a hard disk device 213. The storage unit 225 stores a local apparatus information table 226 used for managing the MAC address in the local mainframe apparatus 2.

FIG. 6 is a diagram illustrating a configuration example of the own device information table. As shown in FIG. 6, the own device information table stores model type, device serial number, ONA serial number, number of MAC addresses, MAC address, and ONA mounting position data.

The model type and device serial number are data assigned to the main frame device 2 itself. The ONA serial number is identification data of the ONA card 25, and “000001” to “000004” shown in FIG.

The number of MAC addresses represents the maximum number of MAC addresses that can be assigned to the corresponding ONA card 25. The MAC address represents a MAC address actually assigned to the corresponding ONA card 25. For example, “00-0A-E4-9F-00 to 00-0A-E4-9F-00-07” shown in FIG. 6 is “00-0A-E4” in the ONA card 25 whose ONA serial number is “000001”. This indicates that a total of eight MAC addresses of “-9F-00” to “00-0A-E4-9F-00-07” are allocated. The ONA mounting position is data representing a place where the corresponding ONA card 25 is mounted. As an example of the data, “PCIBox # 0 Slot 0” shown in FIG. 6 represents a slot whose slot number is 0 in the PCI box 22-0 whose box number is 0.

When the ONA card 25 is newly connected to an empty slot of the PCI box 22, the ONA card 25 connected to the PCI express switch mounted in the PCI box 22 is recognized. The PCI express switch outputs the recognition result together with data representing the connection location of the ONA card, that is, ONA mounting position data. These data are input to the SVP 21 via the switch group 27 and processed by the MAC address management unit 222. As a result, the MAC address management unit 222 adds an entry for one ONA card 25 to the own device information table 226, and stores the ONA serial number, the number of MAC addresses, and the ONA mounting position data in the added entry. To do.

When the ONA card 25 is removed, the removal is recognized by the PCI express switch of the PCI box 22 and notified to the SVP 21. The notification includes ONA mounting position data. In response to the notification, the MAC address management unit 222 updates, for example, deletes the data of the ONA mounting position of the corresponding entry in the own device information table 226. The removal of the ONA card 25 does not cancel the assignment of the MAC address assigned to the ONA card 25 because it is assumed that the ONA card 25 is temporarily removed.

In the present embodiment, operations related to the MAC address, such as assignment of MAC addresses and release of the assignment, are performed according to instructions from the console 5. The command instruction unit 223 is an interface function that realizes execution of a command corresponding to the operation content of the operator performed on the console 5. The MAC address management unit 222 issues a command in accordance with an instruction from the command instruction unit 223. Here, four types of commands to be issued are assumed: an acquisition command, a movement registration command, a movement acquisition command, and a return command. Each of these commands is for the following requests:

The acquisition command is a command for requesting assignment of a MAC address. In the present embodiment, the command is used to acquire all the MAC addresses required by the mainframe device 2. This is because it is assumed that the mainframe device 2 is newly installed (added). The acquisition command may be a command for requesting allocation of a necessary number of MAC addresses in accordance with attachment / detachment of the ONA card 25 or the like.

The movement registration command and movement acquisition command are commands related to movement of the MAC address. The movement registration command is a command for requesting registration (reservation) of a MAC address to be moved, and the movement acquisition command is a command for requesting assignment of a registered MAC address. The return command is a command for requesting the deallocation of the MAC address. Hereinafter, the movement registration command and the movement acquisition command are collectively referred to as “movement command”.

As shown in FIGS. 5A to 5E, the MAC address management server 1 manages each mainframe device 2 by model type and device serial number. Therefore, each command created by the MAC address management unit 221 includes a command code indicating a command type, a model type, and a device serial number. In addition, the acquisition command includes the number of MAC addresses for which allocation is requested (hereinafter referred to as “necessary MAC number”). In addition, the movement registration command includes a MAC address to be moved, a model type for designating a movement destination of the MAC address, and a device serial number. In addition, the movement acquisition command includes the number of MAC addresses for which allocation is requested among the registered MAC addresses (hereinafter referred to as “necessary MAC number”). In addition, the return command includes a MAC address for requesting deallocation. Since it is only necessary to specify the MAC address to be deallocated, the return command does not need to store the model type and device serial number.

The command issued by the MAC address management unit 222 is transmitted to the MAC address management server 1 via the data transmission / reception unit 221. The MAC address management server 1 processes the command received from the mainframe device 2 and transmits the processing result. The MAC address management unit 222 receives the processing result via the data transmission / reception unit 221 and updates the own device information table 226.

When an acquisition command or a movement acquisition command is issued, the number of MAC addresses requested by the command is newly assigned. Therefore, in the corresponding entry of the own device information table 226, the newly assigned MAC address Is stored as data. When a movement registration command or a return command is issued, the MAC address specified by the command must not be used. For this reason, the specified MAC address is deleted from the corresponding entry in the own device information table 226.

The change result of the usable MAC address is notified from the MAC address management unit 222 to the MAC address notification unit 224. When the VM 202 is created on the main body 200, a host OS or a supervisor is executed on the main body 200. When the host OS 201 is executed on the main body 200, the MAC address notification unit 225 notifies the host OS 201 of the change contents of the usable MAC address. Thereby, each VM 202 created on the main body 200 can perform communication using an available MAC address. Reference numeral 206 in FIG. 4 denotes communication management software that operates on the host OS 201.

As described above, assuming that the interface card 214 is used for connection with the console 5, the command instruction unit 223 is realized by the CPU 211, the recording medium 212, and the interface card 214, for example. The MAC address management unit 222 and the MAC address notification unit 224 are realized by the CPU 211 and the recording medium 212, for example.

When the SVP 21 of each mainframe device 2 transmits the four types of commands as described above as necessary, the assignment determination unit 100 of the MAC address management server 1 processes the received command to obtain a MAC address management table. 13a is updated. As a result, the assignment determining unit 100 enables the MAC address management table 13a to be updated from the initial state of FIG. 5A to the states shown in FIGS. 5B to 5E. As a result, each mainframe device 2 can use only a necessary number of MAC addresses even if the number of mounted ONA cards 25 is increased or decreased.

FIG. 5B shows two MAC addresses “00-01-E4-9F-00-00” and “00-01-E4-9F-00-10” from the initial state shown in FIG. 5A. The model type is “GS21 1600”. ”, After the device serial number is assigned to the mainframe device 2 with“ 0001 ”. This assignment is performed by receiving an acquisition command.

FIG. 5C shows a state in which, in the state shown in FIG. 5B, a transition is made by receiving a movement registration command targeting the MAC address “00-01-E4-9F-00-10”. “GS21 1600” and “0002” stored in the movement registration command are written as the model type of the movement destination apparatus of the entry of the MAC address and the apparatus serial number of the movement destination apparatus.

FIG. 5D shows a state where the state shown in FIG. 5C is shifted to by receiving a movement acquisition command targeting the MAC address “00-01-E4-9F-00-10”. The model type of the destination device and the device serial number of the destination device in FIG. 5C are stored as the model type and the device serial number of the entry of the MAC address. The model type of the destination device at this time, the destination device Each device serial number data is erased and does not exist.

FIG. 5E shows a state in which the state shown in FIG. 5D is shifted by receiving a return command for the MAC address “00-01-E4-9F-00-00”. When the return command is received, the assignment of the MAC address is released, so that the model type and device serial number data of the entry are erased and do not exist.

As described above, the MAC address management table 13a is sequentially updated according to the command received from each mainframe device 2. Through this update, the MAC address management server 1 centrally manages the assignable MAC addresses.

In the present embodiment, the SVP 21 of each mainframe device 2 transmits a command to be transmitted to the MAC address management server 1 in accordance with an operator instruction using the console 5. May be automatically determined and transmitted. The command to be transmitted may be determined when the ONA card 25 is mounted or removed. Since it is necessary for the operator to determine whether or not to move the MAC address, the movement registration command and the movement acquisition command may be transmitted in accordance with the instruction of the operator.

Next, the operation of the MAC address management server 1 will be described in detail with reference to the flowcharts shown in FIGS.
FIG. 7 is a flowchart of the MAC address management process. This MAC address management process is a process for managing the MAC address used by each mainframe apparatus 2 through the process of the command transmitted from the mainframe apparatus 2, and the CPU 11 stores a program stored in the hard disk apparatus 13. This is realized by executing 13b. The assignment determination unit 100 illustrated in FIG. 4 is realized by the CPU 11 executing the MAC address management process. For convenience of explanation, FIG. 7 shows a flow of processing executed by receiving one command from the mainframe device 2, that is, a series of processing executed when receiving one command.

First, the CPU 11 receives a received command from the interface card 14 and determines whether or not the command is an acquisition command (S1). When the interface card 14 receives the acquisition command, the determination in S1 is Yes and the process proceeds to S2. When the interface card 14 receives a command other than the acquisition command, the determination in S1 is No and the process proceeds to S3.

In S2, the CPU 11 executes a MAC address assignment process. This MAC address allocation process is a process for newly allocating the number of MAC addresses requested by the acquisition command to the mainframe device 2 that has transmitted the acquisition command. After executing the MAC address assignment process, the MAC address management process ends.

Here, the MAC address assignment processing will be described in detail with reference to the flowchart shown in FIG.
As described above, the acquisition command stores information such as the model type, the device serial number, and the required number of MACs of the mainframe device 2 that has transmitted the acquisition command. In this MAC address assignment process, first, the CPU 11 extracts information from the acquisition command received from the interface card 14 and assigns 1 as an initial value to a variable for counting the number of assigned MAC addresses. (S11). The variable is hereinafter referred to as “number of addresses”.

In S12 to S18 after S11, processing for selecting the MAC address to be used by the mainframe device 2 that has transmitted the acquisition command is performed while sequentially changing the target entry in the MAC address management table 13a. .

In the present embodiment, as described above, the acquisition command is a command for acquiring all the MAC addresses required by the mainframe device 2. The MAC address management server 1 notifies the mainframe device 2 that has transmitted the acquisition command of the number of MAC addresses specified by the acquisition command as a processing result. For this reason, already assigned MAC addresses are also subject to notification.

In S12, the CPU 11 determines whether or not it has searched up to the end entry of the MAC address management table 13a. If the target entry does not remain in the MAC address management table 13a, the determination in S12 is Yes and the process proceeds to S19. If the target entry remains in the MAC address management table 13a, the determination in S12 is No and the process proceeds to S13.

In S13, the CPU 11 determines whether or not the model type of the target entry matches the model type extracted in S11. If they match, the determination in S13 is Yes and the process proceeds to S14. If they do not match, the determination in S13 is No and the process proceeds to S15.

In S14, the CPU 11 determines whether or not the device serial number of the target entry matches the device serial number extracted in S11. If they match, the determination in S14 is Yes and the process proceeds to S17. If they do not match, the determination in S14 is No and the process proceeds to S15. The determination of Yes in S14 means that the MAC address stored in the target entry has already been assigned to the mainframe device 2 that has transmitted the acquisition command.

In S15, the CPU 11 determines whether or not there is model type data of the target entry. If the data of the model type does not exist, that is, if the data of the model type is the content described as “unused (can be used)” in FIG. 5A or the like, the determination in S15 is Yes and the process proceeds to S16. To do. If there is data of that model type, the determination in S15 is No, the target entry is changed to the next entry, and the process returns to S12. The determination of No in S15 means that the MAC address stored in the target entry is assigned to another mainframe device 2.

In S16, the CPU 11 assigns the MAC address stored in the target entry to the mainframe device 2 that has transmitted the acquisition command. For this purpose, the CPU 11 updates the target entry, and stores the model type and device serial number data acquired in S11 as the model type and device serial number data. Thereafter, the process proceeds to S17.

In S17, the CPU 11 reads out the MAC address stored in the target entry as a MAC address to be notified to the mainframe device 2 that has transmitted the acquisition command, and increments the number of addresses as the variable. Next, the CPU 11 determines whether or not the value of the incremented address number is larger than the necessary MAC number (S18). Since the initial value of the number of addresses is 1, when the assignment of the number of MAC addresses requested by the acquisition command is completed, the value of the number of addresses becomes larger than the necessary number of MACs. Thereby, when the assignment of the MAC address is completed, the determination in S18 is Yes and the process proceeds to S19. If the assignment of the MAC address is not completed, the determination in S18 is No, the target entry is changed to the next entry, and the process returns to S12.

In S19, the CPU 11 causes all the MAC addresses read in S17 to be transmitted to the SVP 21 of the mainframe device 2 as the processing result of the acquisition command. The MAC address assignment process ends thereafter. The shift from S12 to S19 means that all the MAC addresses requested by the acquisition command have not been allocated.

Returning to the description of FIG.
In S3 in which the determination in S1 is No and the process proceeds, the CPU 11 determines whether or not the command received from the interface card 14 is a movement command. When the interface card 14 receives the movement command, the determination in S3 is Yes and the process proceeds to S4. When the interface card 14 receives a command other than the movement command, that is, a return command, the determination in S3 is No and the process proceeds to S7.

In S4, the CPU 11 determines whether or not the movement command is a movement registration command. If the movement command received from the interface card 14 is a movement registration command, the determination in S4 is Yes, and the MAC address movement registration process is executed in S5. If the movement command is a movement acquisition command, the determination in S4 is No, and the MAC address movement allocation process is executed in S6. After executing the MAC address movement registration process of S5 or the MAC address movement allocation process of S6, the MAC address management process ends.

Here, the MAC address movement registration process and the MAC address movement allocation process will be described in detail with reference to the flowcharts of FIGS. 9 and 10.
FIG. 9 is a flowchart of the MAC address movement registration process. This MAC address movement registration process is a process performed to identify the MAC address to be moved and the mainframe device 2 to which the MAC address is moved. Update of the MAC address management table 13a from the state shown in FIG. 5B to the state shown in FIG. 5C is realized by executing this MAC address movement registration process.

As described above, information such as the MAC address to be moved, the model type of the mainframe device 2 to which the MAC address is moved, and the device serial number are stored in the movement registration command. In the MAC address movement registration process, first, the CPU 11 extracts the information from the received movement registration command (S31).

In S32 to S34 after S31, the entry that stores the MAC address specified by the movement registration command is specified while sequentially changing the target entry in the MAC address management table 13a, and the specified entry is updated. Processing is performed.

In S32, the CPU 11 determines whether or not it has searched up to the end entry of the MAC address management table 13a. If the target entry does not remain in the MAC address management table 13a, the determination in S32 is Yes, after notifying the SVP 21 of the mainframe device 2 that has transmitted the movement registration command that the designated MAC address does not exist. Then, the MAC address movement registration process is terminated. If the target entry remains in the MAC address management table 13a, the determination in S32 is No and the process proceeds to S33.

In S33, the CPU 11 determines whether or not the MAC address stored in the target entry matches the MAC address extracted in S31. If they match, the determination in S33 is Yes and the process proceeds to S34. If they do not match, the determination in S33 is No, the target entry is changed to the next entry, and the process returns to S32.

In S34, the CPU 11 updates the target entry, and uses the model type and device serial number data extracted in S31 as the model type and device serial number data of the destination device of the target entry. Store. The mainframe apparatus 2 that has transmitted the movement registration command is notified that the reservation for movement of the designated MAC address has been completed (S34). Thereafter, the MAC address movement management process ends.

FIG. 10 is a flowchart of the MAC address movement allocation process. This MAC address movement allocation registration process is a process for allocating the MAC address designated by the movement registration command to the mainframe device 2 designated by the movement registration command. The update of the MAC address management table 13a from the state shown in FIG. 5C to the state shown in FIG. 5D is realized by executing this MAC address movement allocation process.

As described above, the movement assignment command stores information such as the required number of MACs, the model type of the mainframe device 2 that transmitted the movement assignment command, and the device serial number. In the MAC address move assignment process, first, the CPU 11 extracts information from the received move assignment command, and substitutes 1 as an initial value for a variable for counting the number of assigned MAC addresses (S41). ). The variable is denoted as “number of addresses” here.

In S42 to S48 after S41, a process for allocating a reserved MAC address is performed while sequentially changing the target entry in the MAC address management table 13a.

In S42, the CPU 11 determines whether or not the end entry of the MAC address management table 13a has been searched. If the target entry does not remain in the MAC address management table 13a, the determination in S42 is Yes and the process proceeds to S49. If the target entry remains in the MAC address management table 13a, the determination in S42 is No and the process proceeds to S43.

In S43, the CPU 11 determines whether or not the model type of the destination device of the target entry matches the model type extracted in S41. If they match, the determination in S43 is Yes and the process proceeds to S44. If they do not match, the determination in S43 is No, the target entry is changed to the next entry, and the process returns to S42.

In S44, the CPU 11 determines whether or not the device serial number of the destination device of the target entry matches the device serial number extracted in S41. If they match, the determination in S44 is Yes and the process proceeds to S45. If they do not match, the determination in S44 is No, the target entry is changed to the next entry, and the process returns to S42. The determination of Yes in S44 means that the MAC address stored in the target entry is the MAC address to be assigned to the mainframe device 2 that has transmitted the movement assignment command.

In S45, the CPU 11 updates the model type and device serial number data of the target entry with the model type and device serial number data extracted in S41. In the next S46, the CPU 11 updates the target entry by deleting the data of the model type and device serial number of the destination device of the entry. Thereafter, the process proceeds to S47.

In S47, the CPU 11 reads the MAC address stored in the target entry as a MAC address to be notified to the mainframe device 2 that has transmitted the movement acquisition command, and increments the number of addresses as the variable. Next, the CPU 11 determines whether or not the value of the incremented address number is larger than the necessary MAC number (S48). Since the initial value of the number of addresses is 1, when the assignment of the number of MAC addresses requested by the movement acquisition command is completed, the value of the number of addresses becomes larger than the necessary number of MACs. Thereby, when the assignment of the MAC address is completed, the determination in S48 is Yes and the process proceeds to S49. If the assignment of the MAC address is not completed, the determination in S48 is No, the target entry is changed to the next entry, and the process returns to S42.

In S49, the CPU 11 transmits all the MAC addresses read in S47 to the SVP 21 of the mainframe device 2 as the processing result of the movement acquisition command. The MAC address movement assignment process ends thereafter. The shift from S42 to S49 means that all the MAC addresses requested by the movement acquisition command have not been allocated.

Returning to the description of FIG.
In S7, in which the determination in S3 is No and the process proceeds, the CPU 11 executes a MAC address return process. After executing the MAC address return process, the MAC address management process ends.

The MAC address return process is a process for deallocating the MAC address designated by the return command upon receipt of the return command. Here, the MAC address return process will be described in detail with reference to the flowchart shown in FIG.

As described above, the return command stores the MAC address that requests the deallocation. In the MAC address return process, first, the CPU 11 extracts information such as a MAC address from the received return command (S61).

In S62 to S64 after S61, in order to specify the entry storing the MAC address specified by the return command while sequentially changing the target entry in the MAC address management table 13a, and to update the specified entry. Is performed.

In S62, the CPU 11 determines whether or not the search has been performed up to the end entry of the MAC address management table 13a. If the target entry does not remain in the MAC address management table 13a, the determination in S62 is Yes, and after notifying the SVP 21 of the mainframe device 2 that transmitted the return command that the designated MAC address does not exist, The MAC address return process is terminated. When the target entry remains in the MAC address management table 13a, the determination in S62 is No and the process proceeds to S63.

In S63, the CPU 11 determines whether or not the MAC address stored in the target entry matches the MAC address extracted in S61. If they match, the determination in S63 is Yes and the process proceeds to S64. If they do not match, the determination in S63 is No, the target entry is changed to the next entry, and the process returns to S62.

In S64, the CPU 11 updates the target entry and deletes the data of the model type of the target entry and the device serial number. The mainframe device 2 that has transmitted the return command is notified that the deassignment of the designated MAC address has been completed (S64). Thereafter, the MAC address return process ends.

The CPU 11 of the MAC address management server 1 responds to the request of each mainframe device 2 by executing the MAC address management process. Hereinafter, with reference to FIGS. 12 to 15, the operations of the console, the mainframe device, and the MAC address management server when transmitting the command for each type of command transmitted by the mainframe device 2 will be described in detail. explain. In FIG. 12 to FIG. 15, for convenience, it is assumed that the operator who operates the console 5 also performs the attaching / detaching work of the ONA card 25 in the mainframe device 2, and the work performed by the operator is also represented as the operation of the console 5. .

FIG. 12 is a flowchart showing an example of the flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits an acquisition command. First, with reference to FIG. 12, a description will be given including the operation of the console 5 for transmitting the acquisition command to the mainframe device 2 or the operation of the operator operating the console 5.

When the operator newly installs the ONA card 25, the operator performs an operation of mounting the ONA card 25 on the mainframe device 2 on which the ONA card 25 is to be mounted (SA1). After the operation is performed, the operator operates the console 5 in the state where the SVP 21 of the mainframe device 2 on which the ONA card 25 is newly mounted and the console 5 are connected to instruct acquisition of the MAC address (SA2 ).

The data for the instruction is received by the interface card 214 of the SVP 21 and passed to the CPU 211. The CPU 211 reads the number of MAC addresses for each ONA card 25 according to the instruction represented by the data, calculates the necessary number of MACs by accumulating the number of read MAC addresses. (SB1). After that, the CPU 211 creates an acquisition command storing the model type and device serial number in addition to the calculated required number of MACs, and transmits the created acquisition command to the interface card 215 (SB2).

In the mainframe device 2 in which the ONA card 25 is newly mounted, the ONA card 25 is recognized, and the CPU 211 of the SVP 21 updates the own device information table 226 according to the recognition result. For this reason, the acquisition command transmitted by SB1 also requests the assignment of the MAC address to be assigned to the newly installed ONA card 25.

The acquisition command transmitted from the SVP 21 of the mainframe device 2 is received by the interface card 14 of the MAC address management server 1 and passed to the CPU 11. Thereby, the CPU 11 executes the MAC address assignment process of S2 in the MAC address management process shown in FIG. As a result of executing the MAC address assignment processing, the CPU 11 transmits all assigned MAC addresses to the SVP 21 of the mainframe device 2 (SC1).

The MAC address transmitted from the MAC address management server 1 is received by the interface card 215 of the SVP 21 of the mainframe device 2 and passed to the CPU 211 (SB3). The CPU 211 updates the own apparatus information table 226 using the MAC address received from the MAC address management server 1. The update is performed by storing a MAC address that is not stored in the own device information table 226 among the received MAC addresses as the MAC address of the ONA card 25 to which no MAC address is assigned. Thereby, the newly acquired MAC address is assigned to the newly installed ONA card 25 by transmitting the acquisition command. The MAC address actually assigned to the ONA card 25 is sent from the CPU 211 of the SVP 21 to the CPU 253 of the ONA card 25 via the switch group 27 and stored in the SDRAM 252.

FIG. 13 is a flowchart illustrating an example of a flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits a movement registration command. Next, with reference to FIG. 13, a description will be given including the console 5 for transmitting the movement registration command to the mainframe device 2 and the operation of the operator who operates the console 5.

The movement of the MAC address is performed when the MAC address becomes unnecessary in the main frame device 2 as the movement source. A typical example of the situation in which the MAC address is unnecessary is removal of the ONA card 25. Therefore, when moving the MAC address, the operator performs an operation of removing one or more ONA cards 25 from the mainframe device 2 that is the movement source of the MAC address (SA11). After performing the work, the operator operates the console 5 to instruct to move the MAC address in a state where the SVP 21 of the mainframe apparatus 2 from which the ONA card 25 is removed and the console 5 are connected (SA12).

The data for the instruction includes the model type of the mainframe device 2 to which the MAC address is moved and the device serial number. This data is received by the interface card 214 of the SVP 21 and passed to the CPU 211. The CPU 211 refers to its own device information table 226 according to the instruction represented by the data, identifies the MAC address to be moved, and identifies the specified MAC address and the model type of the mainframe device 2 designated as the movement destination. Then, a movement registration command storing the device serial number is created. The created movement registration command is transmitted to the MAC address management server 1 via the interface card 215 (SB11).

In the mainframe device 2 from which the ONA card 25 has been removed, the removal is recognized, and the data of the ONA mounting position is erased in the entry of the removed ONA card 25 in the own device information table 226. The specified MAC address is each MAC address of the entry in which the data of the ONA mounting position is erased and the MAC address is stored. When a plurality of MAC addresses are stored in the entry, movement registration commands are created and transmitted for the number of MAC addresses.

The movement registration command transmitted from the SVP 21 of the mainframe device 2 is received by the interface card 14 of the MAC address management server 1 and passed to the CPU 11. Thereby, the CPU 11 executes the MAC address movement registration process of S5 in the MAC address management process shown in FIG. As a result of executing the MAC address movement registration process, the CPU 11 shifts the MAC address designated by the movement registration command to a reservation state as shown in FIG. 5C. The CPU 11 notifies the SVP 21 of the mainframe apparatus 2 that has transmitted the movement registration command that the command has been processed (SC11).

The notification from the MAC address management server 1 is received by the interface card 215 of the SVP 21 of the mainframe device 2 and passed to the CPU 211. In response to the notification, the CPU 211 deletes the corresponding MAC address from the own device information table 226 (SB12).

FIG. 14 is a flowchart illustrating an example of a flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits a movement acquisition command. Next, with reference to FIG. 14, a description will be given including the operation of the console 5 for transmitting the movement acquisition command to the mainframe device 2 or the operation of the operator operating the console 5.

The operator performs an operation of newly installing the ONA card 25 in the destination mainframe device 2 to which the MAC address is to be moved (SA21). After performing the work, the operator operates the console 5 in a state where the SVP 21 of the mainframe device 2 on which the ONA card 25 is newly mounted and the console 5 are connected, and obtains an already reserved MAC address. (SA22).

The data for the instruction is received by the interface card 214 of the SVP 21 and passed to the CPU 211. In accordance with the instruction represented by the data, the CPU 211 refers to the own device information table 226, identifies the ONA card 25 in which no MAC address is stored, and reads the number of MAC addresses of the ONA card 25 (SB21). Thereafter, the CPU 211 uses the read MAC address number as the required MAC number, creates a movement acquisition command that stores the necessary MAC number, model type, and device serial number, and transmits the generated movement acquisition command to the interface card 215. (SB22).

The movement acquisition command transmitted from the SVP 21 of the mainframe device 2 is received by the interface card 14 of the MAC address management server 1 and passed to the CPU 11. Thereby, the CPU 11 executes the MAC address movement allocation process of S6 in the MAC address management process shown in FIG. As a result of executing the MAC address movement assignment process, the CPU 11 transmits the assigned MAC address from among the reserved MAC addresses to the SVP 21 of the mainframe device 2 (SC21).

The MAC address transmitted from the MAC address management server 1 is received by the interface card 215 of the SVP 21 of the mainframe device 2 and passed to the CPU 211 (SB23). The CPU 211 updates the own apparatus information table 226 using the MAC address received from the MAC address management server 1. The update is performed by storing the received MAC address as the MAC address of the ONA card 25 to which no MAC address is assigned. As a result, the newly installed ONA card 25 is assigned the MAC address assigned to another mainframe device 2 by transmitting the movement acquisition command.

FIG. 15 is a flowchart illustrating an example of a flow of processing executed by each of the console, the mainframe device, and the MAC address management server when the mainframe device transmits a return command. Finally, with reference to FIG. 15, the console 5 that transmits the return command to the mainframe device 2 and the operation of the operator who operates the console 5 will be described.

The return of the MAC address is performed by removing the ONA card 25. Therefore, when returning the MAC address, the operator performs an operation of removing the ONA card 25 to which the MAC address is assigned from the mainframe device 2 (SA31). After performing the work, the operator operates the console 5 and instructs the return of the MAC address while the console 5 is connected to the SVP 21 of the mainframe device 2 from which the ONA card 25 is removed (SA32).

The data for the instruction is received by the interface card 214 of the SVP 21 and passed to the CPU 211. In accordance with the instruction represented by the data, the CPU 211 refers to the own device information table 226, identifies the MAC address to be returned, and creates a return command storing the identified MAC address. The created return command is transmitted to the MAC address management server 1 via the interface card 215 (SB31). The MAC address to be returned is the MAC address of the entry that does not store the ONA mounting position data. When a plurality of MAC addresses are stored in the entry, return commands are created and transmitted for the number of MAC addresses.

The return command transmitted from the SVP 21 of the mainframe device 2 is received by the interface card 14 of the MAC address management server 1 and passed to the CPU 11. Thereby, the CPU 11 executes the MAC address return process of S7 in the MAC address management process shown in FIG. As a result of executing the MAC address return processing, the CPU 11 shifts the entry of the MAC address designated by the return command from the state shown in FIG. 5D to the state shown in FIG. 5E. The CPU 11 notifies the SVP 21 of the mainframe device 2 that has transmitted the return command that the command has been processed (SC31).

In the present embodiment, the MAC address management device is realized as one MC address management server 1, but may be realized using a plurality of servers. For example, you may provide the MAC address management apparatus which processes the command according to the kind of command. In addition, the MAC address management device, for example, installs one or more MAC address management devices for each data center, and installs a higher-level MAC address management device that assigns MAC addresses to be managed by the MAC address management device of each data center As such, a plurality of units may be installed.

The various commands are transmitted from the mainframe device 2 in which the required number of MAC addresses fluctuates, but may be transmitted from devices other than the mainframe device 2. This is because if the mainframe device 2 in which the number of necessary MAC addresses fluctuates and the contents of the fluctuation can be specified, the management of the MAC address in the mainframe device 2 can be performed appropriately. Thereby, various commands may be transmitted from a device operated by an operator, for example.

Claims

A communication means for enabling communication via a network;
Storage means for storing address group information representing an assignable MAC (Media Access Control) address;
When the communication means receives request information for requesting assignment of a MAC address from a first external device connected to the network, the address group information stored in the storage means is referred to, and the first Management means for selecting a MAC address to be assigned to an external device, and notifying the selected MAC address to the first external device by the communication means;
A MAC address management device comprising:
The management unit, when the communication unit receives address information indicating an unnecessary MAC address from a second external device connected to the network, the MAC address represented by the address information is assigned to the assignable MAC Updating the address group information as an address;
The MAC address management device according to claim 1, wherein:
When the communication unit receives device information representing a third external device which is an external device to which a MAC address represented by the address information is to be newly assigned together with the address information, the management unit receives the third external device. A MAC address represented by the address information is assigned to the third external device by receiving the request information from
The MAC address management device according to claim 2, wherein:
A communication means for enabling communication via a network;
Storage means for storing address group information representing an assignable MAC (Media Access Control) address;
When the communication unit receives address information indicating an unnecessary MAC address from the first external device connected to the network, the MAC address indicated by the address information is used as the assignable MAC address as the address group. A management means for updating the information;
A MAC address management device comprising:
Connect a MAC address management device that manages MAC (Media Access Control) addresses to the network,
When a change occurs in the number of MAC addresses required by the data processing device connected to the network, the MAC address management device processes a request associated with the change,
Causing the data processing device in which the number of necessary MAC addresses fluctuates to use a necessary number of MAC addresses;
And a MAC address management method.