JP2010103316A - Solid state imaging device, method of manufacturing same, and electronic information equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a solid state imaging device capable of reducing crosstalk caused by electronic diffusion between adjacent pixel areas. <P>SOLUTION: The solid state imaging device 100 having a pixel array formed by arranging a plurality of pixels 100a on an SOI substrate 101a includes a received light sensor section 110a provided on a surface region of the substrate 101a to constitute each pixel and photoelectrically converting incident light, an SiO<SB>2</SB>film (a bottom block layer) 102 positioned in the substrate to block signal charges generated from the received light sensor section and a DTI (Deep Trench Isolation) section (a side block section) 120 formed to extend from the substrate surface region to the SiO<SB>2</SB>film 102 surrounding the received light sensor section and blocking signal charges generated from the received light sensor section. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, a manufacturing method thereof, and an electronic information device, and in particular, a solid-state imaging device having a structure that reduces crosstalk caused by signal charges (electrons) diffusing between adjacent pixel regions. And a method of manufacturing such a solid-state imaging device, and an electronic information device including the solid-state imaging device as described above.

  In recent years, in the solid-state imaging device, it is necessary to make the pixels finer with the demand for a larger number of pixels and a reduction in size, and a cross caused mainly by electron diffusion between adjacent pixels (light receiving sensors). Talk has become a problem.

  For this reason, in the conventional solid-state imaging device, with respect to crosstalk caused by electron diffusion, an N substrate is used so as not to diffuse the photoelectric conversion component to the surface in the deep part of the substrate, and the substrate and wells formed in the substrate are used. The device has been devised to reduce the diffusion length of electrons by controlling the impurity concentration.

  Further, in order to efficiently collect electrons generated deep in the substrate, a device such as forming a deep well has been devised. That is, by deepening the well, signal charges (electrons) generated on the surface are less likely to enter the photoelectric conversion portion of the adjacent pixel.

  FIG. 5 is a diagram for explaining a conventional solid-state imaging device. FIG. 5 (a) shows a layout pattern of members constituting one pixel of the solid-state imaging device, and FIG. 5 (b) shows its Va. The structure of the -Va line cross section is shown.

  The solid-state imaging device 200 is a CMOS image sensor having a pixel array in which a plurality of pixels are arranged on a substrate. FIG. 5A shows a portion corresponding to one pixel in the CMOS image sensor (hereinafter referred to as “pixel image”). , Also referred to as a pixel portion.) 200a is shown.

  Here, the pixel unit 200a includes a light receiving sensor unit 210a including a photodiode (photoelectric conversion unit) that photoelectrically converts incident light, a charge storage unit 210b that stores signal charges obtained by the light receiving sensor unit, And a transistor portion 210c including a transistor for reading out signal charges accumulated in the charge accumulation portion 210b.

  That is, the diffusion layer constituting the pixel portion 200a extends along the rectangular diffusion layer 211a constituting the light receiving sensor portion 210a as a photodiode and the long side of the rectangular diffusion layer 211a of the light receiving sensor portion 210a. Charge accumulation for accumulating the signal charge connecting the band-shaped diffusion layer 210c constituting the portion 210c, one end side of the diffusion layer 211c of the transistor portion, and one end side of the diffusion layer 211a of the photoelectric conversion portion corresponding thereto It is comprised from the accumulation | storage diffused layer 211b which comprises the part 210b.

  Here, each of the diffusion layers 211a to 211c is formed in the surface region of the N well 203 formed on the substrate 201 via the P well 202, and around the three diffusion layers 211a, 211b, and 211c. As shown in FIG. 5B, a trench 220 in which an insulating material is embedded is formed so as to surround each diffusion layer, and signal charges (electrons) generated in the diffusion layer 211a of the light receiving sensor portion are formed. ) Does not enter the diffusion layer 211a of the adjacent light receiving sensor.

  The depth of the trench 220 is shallower than the depth of the N well. Therefore, the lower end portions of the three diffusion layers 211 a, 211 b, and 211 c do not reach the P well 202 below the N well 203.

  Further, a gate electrode (transfer gate) G1 of a transfer transistor for transferring the signal charge generated in the light receiving sensor unit to the charge storage unit 210b is disposed on the storage diffusion layer 211b, and on the band-shaped diffusion layer 211c. The gate electrode (reset gate) G2 of the reset transistor, the gate electrode (amplification gate) G3 of the amplification transistor, and the gate electrode (selection gate) G4 of the selection transistor are arranged.

  One end of the metal wiring layer W2 is connected to the diffusion layer 211b of the charge storage unit 210b through the contact hole C1, and the other end of the metal wiring layer W2 is connected to the gate G3 of the amplification transistor through the contact hole C2. It is connected. A metal wiring layer W1 is disposed along each pixel column, and a part of the metal wiring layer W1 is connected to the source of the amplification transistor through a contact hole C3.

  Next, the operation will be described.

  In such a solid-state imaging device 200, photoelectric conversion of incident light is performed by the light receiving sensor unit 210a of each pixel, and signal charges obtained by the photoelectric conversion are transferred to the charge storage unit 210b by the transfer gate G1. Then, the signal voltage generated by the accumulation in the signal charge in the charge accumulation unit 210b is amplified by the amplification transistor, and read out to the metal wiring layer W1 as a read signal through the selection transistor.

Patent Document 1 also devises a method of forming a deep well in order to efficiently collect electrons generated deep in the substrate. That is, by deepening the well, signal charges (electrons) generated on the surface are less likely to enter the photoelectric conversion portion of the adjacent pixel.
JP 2002-57318 A

  However, in the conventional solid-state imaging device 200, signal charges (electrons) between adjacent pixel regions (pixel portions) wrap around under the buried trench 220 due to diffusion or the like, from one side to the other side. It will leak. Further, as described in Patent Document 1, in order to efficiently collect electrons generated deep in the substrate, signal charges (electrons) generated in the pixel region wrap around the bottom of the well even in the case where a deep well is formed. Will diffuse into adjacent pixel areas. As a result, the conventional solid-state imaging device has a problem that crosstalk caused by electron diffusion between pixel regions cannot be sufficiently prevented.

  The present invention has been made in order to solve the above-described problems, and sufficiently prevents crosstalk caused by the diffusion of signal charges (electrons) obtained by photoelectric conversion between adjacent pixel portions. It is an object of the present invention to obtain a solid-state imaging device and a method for manufacturing the same, and an electronic information device using such a solid-state imaging device.

  A solid-state image pickup device according to the present invention is a solid-state image pickup device having a pixel array in which a plurality of pixels are arranged on a substrate, and is provided on the surface region of the substrate so as to constitute each pixel. A light receiving sensor unit that performs photoelectric conversion, a bottom flock layer that is positioned below the surface region of the substrate and blocks signal charges generated by the light receiving sensor unit, and reaches the bottom block layer from the substrate surface region And a side block portion that is formed so as to surround each of the light receiving sensor portions and blocks signal charges generated by the light receiving sensor portions, thereby achieving the above object.

  In the solid-state imaging device according to the present invention, it is preferable that the substrate is an SOI substrate in which a silicon layer is formed on a silicon substrate via a silicon oxide film.

  According to the present invention, in the solid-state imaging device, the silicon oxide film preferably constitutes the bottom block layer.

  In the solid-state imaging device according to the aspect of the invention, it is preferable that the side block portion is a trench embedded portion in which an insulating layer is embedded in a trench portion formed to reach the silicon substrate in the silicon layer.

  According to the present invention, in the solid-state imaging device, the insulating layer embedded in the trench portion is formed so as to be in contact with the inner side surface and the bottom surface portion of the trench portion and is non-doped silicon oxide not doped with impurities. It is preferable to have a two-layer structure including a film and an impurity-doped silicon oxide film doped with impurities formed so as to fill the trench portion on the surface of the non-doped silicon oxide film.

  In the solid-state imaging device according to the present invention, the impurity-doped silicon oxide film may be a BPSG film formed by implanting phosphorus and boron into a silicon oxide film so that the meltability of the impurity-doped silicon oxide film is increased. preferable.

  According to the present invention, in the solid-state imaging device, the silicon oxide film constituting the bottom block layer preferably has a thickness of 0.005 microns or more and 10 microns or less.

  In the solid-state imaging device according to the present invention, the silicon layer formed on the silicon oxide film constituting the bottom block layer preferably has a thickness of 2 microns or more and 10 microns or less.

  According to the present invention, in the solid-state imaging device, each of the pixels preferably has a pixel structure constituting a CMOS image sensor.

  According to the present invention, in the solid-state imaging device, each of the pixels preferably has a pixel structure constituting a CCD image sensor.

  The method for manufacturing a solid-state imaging device according to the present invention uses a solid-state imaging device having a pixel array in which a plurality of pixels are arranged, and an SOI substrate in which a silicon layer is disposed on a silicon substrate via a silicon oxide film. A silicon oxide layer that selectively etches the silicon layer of the SOI substrate and surrounds a light receiving region in which the light receiving sensor portion constituting each pixel is to be disposed. A step of forming a trench reaching the film, a step of filling the trench with silicon oxide, and a step of selectively forming a diffusion layer so that a photodiode is formed as the light receiving sensor in the light receiving region. Yes, and the above objective is achieved.

  In the method of manufacturing a solid-state imaging device according to the present invention, the step of embedding a silicon oxide film in the trench includes a non-doped silicon oxide film that is not doped with impurities so as to cover the inner side surface and the bottom surface of the trench. And a step of depositing an impurity-doped silicon oxide film doped with impurities on the entire surface of the non-doped silicon oxide film so as to fill the trench.

  In the method of manufacturing the solid-state imaging device according to the present invention, it is preferable that the step of burying the silicon oxide film in the trench further includes a step of melting the deposited impurity-doped silicon oxide film by heat treatment.

  According to the present invention, in the method of manufacturing the solid-state imaging device, the step of embedding the silicon oxide film in the trench includes the step of chemically treating the impurity-doped silicon oxide film after heat-treating the deposited impurity-doped silicon oxide film. It is preferable to include a step of etching back the entire surface by a polishing method to expose the surface region of the substrate in a region other than the trench portion.

  In the method for manufacturing a solid-state imaging device according to the present invention, after forming a diffusion layer so that a photodiode is formed as the light receiving sensor, a process of forming a wiring layer through an interlayer insulating film is repeated a predetermined number of times, A step of forming a multilayer wiring structure on the substrate, a step of forming a color filter on the uppermost wiring layer via an additional interlayer insulating film so as to correspond to each pixel, Forming a microlens to correspond to each pixel.

  An electronic information device according to the present invention is an electronic information device including an imaging unit that images a subject, and the imaging unit is the above-described solid-state imaging device, thereby achieving the above-described object.

  Hereinafter, the operation of the present invention will be described.

  In the present invention, each pixel is provided on the surface region of the substrate, and the light receiving sensor unit that performs photoelectric conversion of incident light is positioned below the surface region of the substrate and is generated by the light receiving sensor unit. A bottom flock layer that blocks generated signal charges, and a side that reaches the bottom block layer from the substrate surface region and surrounds each light receiving sensor unit and blocks the signal charges generated by the light receiving sensor unit Since the light receiving sensor portion is surrounded by a block layer that blocks signal charges, the light receiving sensor portion can be electrically separated from other light receiving sensor portions adjacent thereto. Thereby, crosstalk due to electron diffusion or the like in the substrate in the entire effective pixel region can be reduced.

  In addition, the insulating layer embedded in the trench part includes a non-doped silicon oxide film not doped with impurities formed along and in contact with the inner side surface and the bottom surface part of the trench part, and the non-doped silicon oxide film. A two-layer structure comprising an impurity-doped impurity-doped silicon oxide film formed so as to fill the trench portion on the surface, and the impurity-doped silicon oxide film is meltable with the impurity-doped silicon oxide film Since the BPSG film is formed by injecting phosphorus and boron into the silicon oxide film so as to increase the thickness, the highly meltable BPSG film can be embedded in the trench without any gap, and the impurities in the BPSG film are epitaxially grown. Leakage into the layer can be prevented by the non-doped silicon oxide film.

  As described above, according to the present invention, each pixel is provided on the surface region of the substrate, and the light receiving sensor unit that performs photoelectric conversion of incident light is positioned below the surface region of the substrate, A bottom flock layer that blocks signal charges generated by the light receiving sensor unit, and is formed to reach the bottom block layer from the substrate surface region and surround each light receiving sensor unit, and is generated by the light receiving sensor unit The side block portion that blocks signal charges is included, so that an element isolation layer such as an oxide film layer as the block portion separates adjacent pixel portions, thereby causing electron diffusion as a main factor. Crosstalk that occurs can be reduced.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a diagram for explaining a solid-state imaging device according to Embodiment 1 of the present invention. FIG. 1 (a) shows a layout pattern of members constituting one pixel, and FIG. 1 (b) shows its Ia- The structure of the Ia line cross section is shown.

  The solid-state imaging device 100 according to the first embodiment is a CMOS image sensor having a pixel array in which a plurality of pixels are arranged on an SOI substrate 101a. FIG. 1A shows one pixel in the CMOS image sensor 100. A portion (hereinafter also referred to as a pixel portion) 100a corresponding to is shown. This SOI substrate 101a has an N-type silicon substrate 101, a silicon oxide film 102 formed on the N-type silicon substrate, and an N-type silicon layer 103 formed on the silicon oxide film 102 by epitaxial growth. ing.

  Here, the pixel unit 100a includes a light receiving sensor unit 110a including a photodiode (photoelectric conversion unit) that photoelectrically converts incident light, a charge storage unit 110b that stores signal charges obtained by the light receiving sensor unit 110a, And a transistor portion 110c including a transistor for reading out signal charges accumulated in the charge accumulation portion 110b.

  The diffusion layer constituting the pixel portion 100a includes a rectangular diffusion layer 111a constituting a light receiving sensor portion 110a as a photodiode and a long side of the rectangular diffusion layer 111a of the light receiving sensor portion 110a. A charge for accumulating the signal charge connecting the band-shaped diffusion layer 111c constituting the portion 110c, one end side of the diffusion layer 111c of the transistor portion 110c and the corresponding one end side of the diffusion layer 111a of the light receiving sensor portion 110a. It is comprised from the accumulation | storage diffused layer 111b which comprises the storage part 110b.

  Each of the diffusion layers 111a to 111c is formed in the surface region of the epitaxial layer 103a of the SOI substrate 101, and around the three diffusion layers 111a, 111b, and 111c, as shown in FIG. In addition, a trench (deep trench isolation part (DTI part)) 120 embedded with an insulating material is formed so as to surround these three diffusion layers, and is generated in the diffusion layer 111a of one light receiving sensor part 110a. The signal charge (electrons) is prevented from entering the diffusion layer of the adjacent light receiving sensor unit.

The trench portion 120 reaches the insulating layer (SiO ₂ film) 102 of the SOI substrate. Therefore, the three diffusion layers 111a, 111b, and 111c are completely adjacent to the trench 120 and the SiO ₂ film 102. It is electrically separated from that in the part.

  Further, a gate electrode (transfer gate) G1 of a transfer transistor for transferring the signal charge generated in the light receiving sensor unit to the charge storage unit FD is disposed on the storage diffusion layer 111b, and on the band-shaped diffusion layer 111c. The gate electrode (reset gate) G2 of the reset transistor, the gate electrode (amplification gate) G3 of the amplification transistor, and the gate electrode (selection gate) G4 of the selection transistor are arranged.

  One end of the metal wiring layer W2 is connected to the diffusion layer 111b of the charge storage unit 110b through the contact hole C1, and the other end of the metal wiring layer W2 is connected to the gate G3 of the amplification transistor through the contact hole C2. It is connected. A signal wiring (metal wiring layer) W1 is arranged along each pixel column, and a part of the signal wiring W1 is connected to the source of the amplification transistor through a contact hole C3.

  Next, the operation will be described.

  In such a solid-state imaging device 100, photoelectric conversion of incident light is performed by the light receiving sensor unit 110a of each pixel, and signal charges obtained by the photoelectric conversion are transferred to the charge storage unit 110b by the transfer gate G1. Then, the signal voltage generated by the accumulation in the signal charge in the charge accumulation unit 110b is amplified by the amplification transistor and read out to the metal wiring layer W1 as a read signal through the selection transistor.

  Next, a manufacturing method will be described.

  FIG. 2 is a cross-sectional view for explaining a method of manufacturing the solid-state imaging device of the first embodiment. FIGS. 2A to 2F show the first layer metal from the step of forming a trench on the SOI substrate. The process up to the step of forming the second interlayer insulating film on the layer is shown.

  FIG. 3 is a cross-sectional view illustrating a method for manufacturing the solid-state imaging device of the first embodiment, and FIGS. 3A to 3C illustrate the formation of a second metal layer on the second interlayer insulating film. 1 to the process of forming a color filter and a microlens.

First, a silicon oxide film (SiO ₂ film) 102 is formed on the SOI substrate 101a, that is, the silicon substrate 101, and a silicon layer (hereinafter also referred to as an epitaxial growth layer) 103 is formed on the silicon oxide film 102 by epitaxial growth. A substrate 101a is prepared (see FIG. 2A). Here, the film thickness _tSiO2 of the silicon oxide film 102 is 1 [mu] m (micron), and the film thickness _tN-Ep of the epitaxial growth layer 103 is 2 [mu] m (micron). However, the film thickness _tSiO2 of the silicon oxide film 102 may be 0.005 μm (micron) or more and 10 μm (micron) or less. Further, the film thickness t _N-Ep of the epitaxial growth layer 103 may be 2 μm (micron) or more and 10 μm (micron) or less.

  Here, an SOI substrate in which an N-type epitaxial layer (N-Epi layer) 103 is formed on a silicon oxide film 102 on a silicon substrate 101 is used. However, an SOI substrate is formed on a silicon substrate 101. Although an N-type epitaxial layer (N-Epi layer) 103 formed on a silicon oxide film 102 is used, an SOI substrate is replaced with an N-type epitaxial layer (N-Epi layer) 103 and a P-type epitaxial layer ( P-Epi layer) may be used.

  Next, after patterning a photoresist film on the epitaxial layer 103 to produce an etching mask, the epitaxial growth layer 103 is selectively etched using the etching mask, and each pixel of the epitaxial growth layer 103 is etched. A trench 121 reaching the silicon oxide film 102 below the epitaxial layer 103b is formed so as to surround a region to be formed (light receiving region) (FIG. 2B).

  Next, a silicon oxide film is deposited on the entire surface of the substrate as an insulating material, and the trench 121 is filled with the insulating material. Specifically, a non-doped silicon oxide film 120a that is not doped with impurities is formed on the inner side surface and the bottom surface of the trench 121 so as to cover them, and then, on the surface of the non-doped silicon oxide film 120a, An impurity-doped silicon oxide film 120b doped with impurities is deposited on the entire surface so that the trench 121 is embedded.

  Here, as the impurity-doped silicon oxide film 120b doped with impurities, a PBSG film in which phosphorus and boron are implanted into silicon glass is used so as to improve the meltability. Here, a BPSG film is used as a highly meltable insulating film embedded in the trench. However, the present invention is not limited to this, and other insulating materials may be used as long as they have a high meltability.

  Subsequently, the impurity-doped silicon oxide film embedded in the trench is melted by heat treatment. Then, after heat-treating the deposited impurity-doped silicon oxide film, the entire surface of the impurity-doped silicon oxide film is etched back by a chemical mechanical polishing method in a region other than the trench, and the epitaxial layer 103a of the substrate and 103b is exposed.

  Thereby, the region 103a in which the pixel is to be formed in the epitaxial layer 103 is electrically isolated from the surrounding region 103b by the trench isolation part 120 (FIG. 2C).

  Next, selective ion implantation is performed on a portion 103a surrounded by the trench isolation portion 120 of the epitaxial layer 103 to form an N-type diffusion layer 111a constituting a photodiode (FIG. 2D). .

Thereafter, a first metal wiring layer 141 constituting a gate electrode or the like is formed on the epitaxial layer 103 via a first interlayer insulating film (SiO ₂ film) 131 (FIG. 2E). Further, after a second interlayer insulating film (SiO ₂ film) 132 is formed on the first interlayer insulating film 131 (FIG. 2F), a second layer is formed on the second interlayer insulating film 132. An eye metal wiring layer 142 is formed (FIG. 3A). Subsequently, a third interlayer insulating film is formed on the second metal wiring layer 42 (FIG. 3B). Here, the process of forming the metal wiring layer through the interlayer insulating film may be repeated a predetermined number of times, so that the wiring structure in the solid-state imaging device may be a multilayer wiring structure of three or more layers.

  Then, a color filter 152 is formed on the third interlayer insulating film 133 via the fourth interlayer insulating film 151 so as to correspond to each pixel, and further on the color filter so as to correspond to each pixel. The microlens 153 is formed to complete the solid-state imaging device (FIG. 3C).

  As described above, in the first embodiment, the SOI substrate 101a is used, and the light receiving sensor unit 110a formed in the epitaxial layer of the SOI substrate 101a is made to have a trench portion (from the surface of the SOI substrate to the SiO film 102 inside the substrate ( Since it is surrounded by deep trench isolation (120), the light receiving sensor portion can be electrically separated from other light receiving sensor portions adjacent thereto, thereby crosstalk due to electron diffusion or the like inside the substrate in the entire effective pixel region. Can be reduced.

  In addition, the insulating layer embedded in the trench portion 120 includes a non-doped silicon oxide film 120a that is not doped with impurities and is formed in contact with the inner side surface and the bottom surface portion of the trench portion, and the non-doped silicon oxide layer. A two-layer structure comprising an impurity-doped impurity-doped silicon oxide film 120b formed so as to fill the trench is formed on the surface of the film, and the impurity-doped silicon oxide film 120b is converted to the impurity-doped silicon oxide film. Since the BPSG film is formed by injecting phosphorus and boron into the silicon oxide film so as to improve the meltability of the film, the highly meltable BPSG film can be embedded in the trench 121 without any gaps. , Impurities in the BPSG film leak into the epitaxial layer, non-doped silicon It can be prevented by monolayer 120a.

In the above embodiment, a CMOS type image sensor (a solid state imaging device having a pixel structure in which each pixel constitutes a CMOS type image sensor) is shown as an example of the solid state imaging device, but the solid state imaging device is a CCD type image sensor. (A solid-state imaging device having a pixel structure in which each pixel constitutes a CCD type image sensor), and in such a solid-state imaging device as well, as a substrate constituting the solid-state imaging device, which is the basic principle of the present invention. By using an SOI substrate and surrounding the light-receiving sensor portion constituting the pixel with a trench portion formed around it and reaching the SiO ₂ film inside the SOI substrate, crosstalk due to electron diffusion or the like inside the substrate is reduced. Technology can be applied.

Further, although not particularly described in the first embodiment, a digital camera such as a digital video camera or a digital still camera using the solid-state imaging device of the first embodiment as an imaging unit, an image input camera, a scanner, An electronic information device having an image input device such as a facsimile or a camera-equipped cellular phone will be briefly described below.
(Embodiment 2)
FIG. 4 is a block diagram illustrating a schematic configuration example of an electronic information device using the solid-state imaging device of Embodiment 1 as an imaging unit as Embodiment 2 of the present invention.

  An electronic information device 90 according to Embodiment 2 of the present invention shown in FIG. 4 includes the solid-state imaging device according to Embodiment 1 of the present invention as an imaging unit 91 that captures a subject, and such an imaging unit. Memory unit 92 such as a recording medium for recording data after high-definition image data obtained by photographing with a predetermined signal processing for recording, and a liquid crystal display screen after a predetermined signal processing for display of this image data A display unit 93 such as a liquid crystal display device that displays on the display screen, a communication unit 94 such as a transmission / reception device that performs communication processing after the image data is subjected to predetermined signal processing for communication, and prints (prints) the image data. And an image output unit 95 that outputs (prints out).

  As mentioned above, although this invention has been illustrated using preferable embodiment of this invention, this invention should not be limited and limited to this embodiment. It is understood that the scope of the present invention should be construed only by the claims. It is understood that those skilled in the art can implement an equivalent range based on the description of the present invention and the common general technical knowledge from the description of specific preferred embodiments of the present invention. It is understood that the patent documents cited in the present specification should be incorporated by reference into the present specification in the same manner as the content itself is specifically described in the present specification.

  The present invention can reduce crosstalk caused by diffusion of signal charges (electrons) obtained by photoelectric conversion between adjacent pixel regions in the field of a solid-state imaging device, a manufacturing method thereof, and an electronic information device. It can be done.

FIG. 1 is a diagram for explaining a solid-state imaging device according to Embodiment 1 of the present invention. FIG. 1 (a) shows a layout pattern of members constituting one pixel, and FIG. 1 (b) shows its Ia- The structure of the Ia line cross section is shown. FIG. 2 is a cross-sectional view for explaining a method of manufacturing the solid-state imaging device of the first embodiment. FIGS. 2A to 2F show the first layer metal from the step of forming a trench on the SOI substrate. The process up to the step of forming the second interlayer insulating film on the layer is shown. FIG. 3 is a cross-sectional view illustrating a method for manufacturing the solid-state imaging device according to the first embodiment. FIGS. 2A to 2C illustrate a second metal layer formed on the second interlayer insulating film. 1 to the process of forming a color filter and a microlens. FIG. 4 is a block diagram illustrating a schematic configuration example of an electronic information device using the solid-state imaging device of Embodiment 1 as an imaging unit as Embodiment 2 of the present invention. FIG. 5 is a diagram for explaining a conventional solid-state imaging device. FIG. 5 (a) shows a layout pattern of members constituting one pixel, and FIG. 5 (b) shows the structure of the Va-Va line cross section. Is shown.

Explanation of symbols

90 electronic information device 91 imaging unit 92 memory unit 93 display means 94 communication means 95 image outputting means 100 solid-state imaging device 100a pixel portion 102 SOI substrate of the insulating layer (SiO ₂ film)
103a Epitaxial layer 110a Light receiving sensor unit 110b Charge storage unit 110c Transistor unit 111a Rectangular diffusion layer 111b Storage diffusion layer 111c Stripe diffusion layer 120 Trench isolation unit 121 Trench FD charge storage unit C1, C2 Contact hole G1 Transfer gate G2 Reset gate G3 Amplification gate G4 selection gate W1, W2 signal wiring

Claims (16)

A solid-state imaging device having a pixel array in which a plurality of pixels are arranged on a substrate,
A light receiving sensor unit that is provided on the surface region of the substrate to constitute each pixel, and performs photoelectric conversion of incident light;
A bottom flock layer located below the surface region of the substrate and blocking signal charges generated by the light receiving sensor unit;
A solid-state imaging device comprising: a side block portion that is formed so as to reach the bottom block layer from the substrate surface region and surround each light receiving sensor portion, and blocks signal charges generated by the light receiving sensor portion. The solid-state imaging device according to claim 1,
The solid-state imaging device, wherein the substrate is an SOI substrate formed by forming a silicon layer on a silicon substrate via a silicon oxide film. The solid-state imaging device according to claim 2,
The silicon oxide film is a solid-state imaging device that constitutes the bottom block layer. The solid-state imaging device according to claim 3,
The side block portion is
A solid-state imaging device which is a trench embedded portion in which an insulating layer is embedded in a trench portion formed to reach the silicon substrate in the silicon layer. The solid-state imaging device according to claim 4,
The insulating layer embedded in the trench part is
A non-doped silicon oxide film not doped with impurities, formed in contact with the inner surface and the bottom surface of the trench portion, and
A solid-state imaging device having a two-layer structure including an impurity-doped silicon oxide film doped with impurities formed on the surface of the non-doped silicon oxide film so as to be embedded in the trench portion. The solid-state imaging device according to claim 5,
The solid-state imaging device, wherein the impurity-doped silicon oxide film is a BPSG film formed by injecting phosphorus and boron into a silicon oxide film so that the meltability of the impurity-doped silicon oxide film is enhanced. The solid-state imaging device according to claim 3,
The silicon oxide film constituting the bottom block layer has a thickness of 0.005 microns or more and 10 microns or less. The solid-state imaging device according to claim 3,
A solid-state imaging device, wherein a silicon layer formed on a silicon oxide film constituting the bottom block layer has a thickness of 2 microns or more and 10 microns or less. The solid-state imaging device according to claim 1,
Each of the pixels is a solid-state imaging device having a pixel structure constituting a CMOS image sensor. The solid-state imaging device according to claim 1,
Each of the pixels is a solid-state imaging device having a pixel structure constituting a CCD image sensor. A method of manufacturing a solid-state imaging device having a pixel array in which a plurality of pixels are arranged using an SOI substrate in which a silicon layer is disposed on a silicon substrate via a silicon oxide film,
Selectively etching the silicon layer of the SOI substrate to form a trench reaching the silicon oxide film surrounding the light receiving region in the silicon layer in which the light receiving sensor portion constituting each pixel is to be disposed When,
Filling the trench with silicon oxide;
And a step of selectively forming a diffusion layer so that a photodiode is formed as the light receiving sensor in the light receiving region. In the manufacturing method of the solid-state imaging device according to claim 11,
The step of embedding a silicon oxide film in the trench includes
Forming a non-doped silicon oxide film not doped with impurities on the inner side surface and bottom surface of the trench so as to cover them;
Depositing an impurity-doped silicon oxide film doped with impurities on the entire surface of the non-doped silicon oxide film so as to fill the trench. In the manufacturing method of the solid-state imaging device according to claim 12,
The step of filling the trench with a silicon oxide film further includes:
A method of manufacturing a solid-state imaging device, comprising: melting the deposited impurity-doped silicon oxide film by heat treatment. In the manufacturing method of the solid-state imaging device according to claim 13,
The step of burying the silicon oxide film in the trench is performed by heat-treating the deposited impurity-doped silicon oxide film and then etching back the entire surface of the impurity-doped silicon oxide film by a chemical mechanical polishing method. A method for manufacturing a solid-state imaging device, comprising the step of exposing a surface region of the substrate in the region. In the manufacturing method of the solid-state imaging device according to claim 11,
A step of forming a multilayer wiring structure on the substrate by repeating a process of forming a wiring layer through an interlayer insulating film after forming a diffusion layer so that a photodiode is formed as the light receiving sensor, a predetermined number of times;
Forming a color filter on the uppermost wiring layer so as to correspond to each pixel through a further interlayer insulating film;
Forming a microlens on the color filter so as to correspond to each pixel. An electronic information device having an imaging unit for imaging a subject,
The electronic imaging device is the solid-state imaging device according to claim 1.

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