JP2010080719A

JP2010080719A - Semiconductor light-emitting element and method for manufacturing the same

Info

Publication number: JP2010080719A
Application number: JP2008248201A
Authority: JP
Inventors: Kazuyuki Tadatomo; 一行只友; Narihito Okada; 成仁岡田; Naohisa Iwamoto; 直久岩本; Yukinobu Tokunaga; 行伸徳永
Original assignee: Japan Fine Steel Co Ltd; Yamaguchi University NUC
Current assignee: Japan Fine Steel Co Ltd; Yamaguchi University NUC
Priority date: 2008-09-26
Filing date: 2008-09-26
Publication date: 2010-04-08

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element having high light extraction efficiency. <P>SOLUTION: In the configuration of a semiconductor light-emitting element 10, where a semiconductor layer 12 is laminated on the surface of a substrate 11, at least one side-surface 11a of the substrate 11 has an area of which the range of the center line average roughness (Ra) is 50 to 1,000 nm. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、基板の表面に半導体層が積層されて構成された半導体発光素子及びその製造方法に関する。 The present invention relates to a semiconductor light emitting device configured by laminating a semiconductor layer on the surface of a substrate and a method for manufacturing the same.

半導体発光素子では、光取り出し効率が高いことが望まれる。 A semiconductor light emitting device is desired to have high light extraction efficiency.

特許文献１には、サファイア基板の半導体層が積層されたのとは反対側の裏面を粗面化した半導体発光素子が開示されており、これにより光取り出し効率の向上を図ることができる、と記載されている。また、特許文献１には、その製造方法として、複数の半導体発光素子が作り込まれたサファイアウエハの裏面の分割すべき箇所にダイヤモンドスクライブ法又はレーザスクライブ法により溝を形成し、その溝を含むサファイアウエハの裏面にサンドブラスト法により粗面化した後、機械的に個々の半導体発光素子に劈開して分割することが開示されている。 Patent Document 1 discloses a semiconductor light emitting device having a roughened back surface opposite to the side on which a semiconductor layer of a sapphire substrate is laminated, which can improve light extraction efficiency. Are listed. Further, Patent Document 1 includes, as a manufacturing method thereof, a groove is formed by a diamond scribe method or a laser scribe method at a portion to be divided on the back surface of a sapphire wafer in which a plurality of semiconductor light emitting elements are formed, and the groove is included. It is disclosed that the back surface of a sapphire wafer is roughened by a sandblasting method and then mechanically cleaved into individual semiconductor light emitting elements.

一方、ソーワイヤによりシリコンインゴットをスライスしてシリコンウエハを得る技術は広く知られている（例えば、特許文献２〜７）。
特開２００６−２４５０６６号公報特開２０００−７１１６０号公報特開２００１−１０５２９５号公報特開２００１−２８７１４６号公報特開２００６−１７９６７７号公報特開２００７−１９６３１２号公報特開２００７−２０３４１７号公報 On the other hand, techniques for obtaining a silicon wafer by slicing a silicon ingot with saw wires are widely known (for example, Patent Documents 2 to 7).
JP 2006-245066 A JP 2000-71160 A JP 2001-105295 A JP 2001-287146 A JP 2006-179677 A JP 2007-19631 A JP 2007-203417 A

本発明の目的は、光取り出し効率の高い半導体発光素子及びその製造方法を提供することである。 An object of the present invention is to provide a semiconductor light emitting device with high light extraction efficiency and a method for manufacturing the same.

本発明の半導体発光素子は、基板の表面に半導体層が積層されて構成されたものであって、
上記基板は、少なくとも１つの基板側面が中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分を有する。 The semiconductor light emitting device of the present invention is configured by laminating a semiconductor layer on the surface of a substrate,
In the substrate, at least one substrate side surface has a portion having a center line average roughness (Ra) of 50 to 1000 nm.

本発明の半導体発光素子の製造方法は、複数の半導体発光素子が作り込まれたウエハを、間隔をおいて並行して走行するソーワイヤでマルチ切断することにより個々の半導体発光素子に分割する工程を含む。 The method of manufacturing a semiconductor light emitting device according to the present invention includes a step of dividing a wafer on which a plurality of semiconductor light emitting devices are formed into individual semiconductor light emitting devices by multi-cutting with a saw wire that runs in parallel at intervals. Including.

本発明では、基板の少なくとも１つの基板側面が中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分を有する。半導体発光素子（基板及び半導体層）の屈折率と素子外部の屈折率との差異に起因する全反射角の制約から、発光した光の多くは素子内部に閉じ込められる。そして、その素子内部に閉じ込められた光の一部は、基板内を通過し、中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである基板の基板側面の部分と素子外部との界面に入射したとき、種々の反射角で界面から基板（半導体発光素子）側に反射される。種々の反射角で反射された光の一部は、全反射角の制約から解放され、素子内部に閉じ込められずに素子外部に出射する確率が高められることとなり、その結果、高い光取り出し効率を得ることができる。 In the present invention, at least one substrate side surface of the substrate has a portion having a center line average roughness (Ra) of 50 to 1000 nm. Most of the emitted light is confined inside the device due to the restriction of the total reflection angle caused by the difference between the refractive index of the semiconductor light emitting device (substrate and semiconductor layer) and the refractive index outside the device. A part of the light confined in the element passes through the substrate and enters the interface between the substrate side surface of the substrate whose center line average roughness (Ra) is 50 to 1000 nm and the outside of the element. When reflected from the interface to the substrate (semiconductor light emitting element) side at various reflection angles. A part of the light reflected at various reflection angles is released from the restriction of the total reflection angle, and the probability of being emitted outside the element without being confined inside the element is increased, and as a result, a high light extraction efficiency is achieved. Obtainable.

以下、実施形態を図面に基づいて詳細に説明する。 Hereinafter, embodiments will be described in detail with reference to the drawings.

（実施形態１）
図１は実施形態１に係る半導体発光素子１０を示す。 (Embodiment 1)
FIG. 1 shows a semiconductor light emitting device 10 according to the first embodiment.

実施形態１に係る半導体発光素子１０は、基板１１の表面に半導体層１２が積層されて構成され、例えば発光ダイオード等として使用されるものである。 The semiconductor light emitting device 10 according to Embodiment 1 is configured by laminating a semiconductor layer 12 on the surface of a substrate 11, and is used as, for example, a light emitting diode.

基板１１は、矩形板状に形成されている（つまり、半導体発光素子１０として矩形板状に分割形成されている）。基板１１は、縦及び横の寸法が厚さよりも大きい薄板状であってもよく、また、縦及び横の寸法が厚さよりも小さい厚板状であってもよい。後者の場合、後述のソーワイヤを用いてウエハを切断する特徴を生かすことができる。定量的には、基板１１は、例えば、縦及び横が１００〜１０００μｍ、並びに厚さが５０〜２００μｍであり、最大側辺の長さの基板厚さに対する比であるアスペクト比が０．３〜３０であることが好ましい。なお、半導体層１２の厚さは基板１１の厚さに比べて非常に小さいので、このアスペクト比が半導体発光素子１０にも相当する。 The substrate 11 is formed in a rectangular plate shape (that is, divided into a rectangular plate shape as the semiconductor light emitting element 10). The substrate 11 may have a thin plate shape whose vertical and horizontal dimensions are larger than the thickness, or may be a thick plate shape whose vertical and horizontal dimensions are smaller than the thickness. In the latter case, it is possible to take advantage of the feature of cutting the wafer using a saw wire described later. Quantitatively, the substrate 11 has, for example, a length and width of 100 to 1000 μm and a thickness of 50 to 200 μm, and an aspect ratio that is a ratio of the length of the maximum side to the substrate thickness is 0.3 to 0.3. 30 is preferable. Since the thickness of the semiconductor layer 12 is much smaller than the thickness of the substrate 11, this aspect ratio corresponds to the semiconductor light emitting element 10.

基板１１としては、例えば、サファイア基板、ＳｉＣ基板、及びＧａＮ基板等が挙げられる。なお、サファイアはＡｌ_２Ｏ_３のコランダム構造の単結晶である。 Examples of the substrate 11 include a sapphire substrate, a SiC substrate, and a GaN substrate. Note that sapphire is a single crystal of Al ₂ O ₃ corundum structure.

基板１１は、表面及び裏面の法線方向がａ軸方向（ａ面＜｛１１−２０｝面＞の面方位）、ｃ軸方向（ｃ面＜｛０００１｝面＞の面方位）、ｍ軸方向（ｍ面＜｛１−１００｝面＞の面方位）、若しくはｒ軸方向（ｒ面＜｛１−１０２｝面＞の面方位）であってもよく、又は他の結晶面の面方位であってもよい。基板１１は、各基板側面１１ａの法線方向がａ軸方向（ａ面＜｛１１−２０｝面＞の面方位）、ｃ軸方向（ｃ面＜｛０００１｝面＞の面方位）、ｍ軸方向（ｍ面＜｛１−１００｝面＞の面方位）、若しくはｒ軸方向（ｒ面＜｛１−１０２｝面＞の面方位）であってもよく、又は他の結晶面の面方位であってもよい。 The normal direction of the front surface and the back surface of the substrate 11 is the a-axis direction (a-plane <{11-20} plane> plane orientation), the c-axis direction (c-plane <{0001} plane> plane orientation), and the m-axis Direction (plane orientation of m-plane <{1-100} plane>), r-axis direction (plane orientation of r-plane <{1-102} plane>), or plane orientation of other crystal planes It may be. In the substrate 11, the normal direction of each substrate side surface 11a is the a-axis direction (a-plane <{11-20} plane> plane orientation), the c-axis (c-plane <{0001} plane> plane orientation), m It may be in the axial direction (m-plane <{1-100} plane> plane orientation), r-axis direction (r-plane <{1-102} plane> plane orientation), or other crystal planes It may be an azimuth.

基板１１は、少なくとも１つの基板側面１１ａが中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである粗面化した部分を有する（図１では基板側面１１ａの全面）。ここで、中心線平均粗さ（Ｒａ）は、レーザー顕微鏡非接触式粗さ測定機によりＪＩＳＢ０６０１−２００１規定に基づいて測定される。 The substrate 11 has a roughened portion in which at least one substrate side surface 11a has a center line average roughness (Ra) of 50 to 1000 nm (the entire surface of the substrate side surface 11a in FIG. 1). Here, the center line average roughness (Ra) is measured based on JIS B 0601-2001 regulations by a laser microscope non-contact type roughness measuring machine.

このように、基板１１の少なくとも１つの基板側面１１ａが中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分を有する。半導体発光素子１０（基板１１及び半導体層１２）の屈折率と素子外部の屈折率との差異に起因する全反射角の制約から、発光した光の多くは素子内部に閉じ込められる。そして、その素子内部に閉じ込められた光の一部は、基板１１内を通過し、中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである基板１１の基板側面１１ａの部分と素子外部との界面に入射したとき、種々の反射角で界面から基板１１（半導体発光素子１０）側に反射される。種々の反射角で反射された光の一部は、全反射角の制約から解放され、素子内部に閉じ込められずに素子外部に出射する確率が高められることとなり、その結果、高い光取り出し効率を得ることができる。 Thus, at least one substrate side surface 11a of the substrate 11 has a portion having a center line average roughness (Ra) of 50 to 1000 nm. Most of the emitted light is confined inside the device due to the restriction of the total reflection angle caused by the difference between the refractive index of the semiconductor light emitting device 10 (the substrate 11 and the semiconductor layer 12) and the refractive index outside the device. A part of the light confined inside the element passes through the substrate 11, and the interface between the portion of the substrate side surface 11a of the substrate 11 whose center line average roughness (Ra) is 50 to 1000 nm and the outside of the element. Is reflected from the interface toward the substrate 11 (semiconductor light emitting element 10) at various reflection angles. A part of the light reflected at various reflection angles is released from the restriction of the total reflection angle, and the probability of being emitted outside the element without being confined inside the element is increased, and as a result, a high light extraction efficiency is achieved. Obtainable.

このような観点からは、基板１１は、基板側面１１ａの中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分が、当該基板側面１１ａの面積の１０％以上であることが好ましく、５０％以上であることがより好ましく、１００％であること、つまり、当該基板側面１１ａの全面であることが最も好ましい。また、基板１１は、全ての基板側面１１ａが中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分を有することが好ましく、全ての基板側面１１ａの全面の中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍであることが最も好ましい。基板側面１１ａの全面の中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである場合、基板側面１１ａは、不規則であるが均一な単一の表面態様が表面に現れる。 From such a viewpoint, it is preferable that the portion of the substrate 11 whose center line average roughness (Ra) is 50 to 1000 nm is 10% or more of the area of the substrate side surface 11a. More preferably, it is 100%, that is, the entire surface of the substrate side surface 11a is most preferable. Moreover, it is preferable that the board | substrate 11 has a part whose centerline average roughness (Ra) is 50-1000 nm on all the board | substrate side surfaces 11a, and the centerline average roughness (Ra) of the whole surface of all the board | substrate side surfaces 11a. Most preferably, it is 50-1000 nm. When the center line average roughness (Ra) of the entire surface of the substrate side surface 11a is 50 to 1000 nm, the substrate side surface 11a appears irregular but uniform on the surface.

かかる中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分の具体的態様としては、例えば、当該基板側面１１ａにおいて横方向に帯状あるいは筋状に延びる部分が挙げられ、また、ソーワイヤ２３による切断面がそれに相当する。 Specific examples of the portion having the center line average roughness (Ra) of 50 to 1000 nm include, for example, a portion extending in a strip shape or a stripe shape in the lateral direction on the substrate side surface 11 a, and cutting with the saw wire 23. The face corresponds to that.

半導体層１２は、例えば、バッファ層、ｎ型ＧａＮ層、発光層である多重量子井戸層、ｐ型ＧａＮ層、及び電極が積層された構成を有する。半導体層１２は、厚さが例えば４〜１０μｍである。 The semiconductor layer 12 has, for example, a configuration in which a buffer layer, an n-type GaN layer, a multiple quantum well layer that is a light emitting layer, a p-type GaN layer, and an electrode are stacked. The semiconductor layer 12 has a thickness of, for example, 4 to 10 μm.

半導体層１２は、より高い光取り出し効率を得ることができる観点から、基板１１における中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分を有する基板側面１１ａに対応した層側面１２ａが、基板１１のその部分に連続して中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍであることが好ましい。 From the viewpoint of obtaining higher light extraction efficiency, the semiconductor layer 12 has a layer side surface 12a corresponding to the substrate side surface 11a having a portion having a center line average roughness (Ra) of 50 to 1000 nm in the substrate 11. It is preferable that centerline average roughness (Ra) is 50 to 1000 nm continuously from that portion of 11.

次に、実施形態１に係る半導体発光素子１０の製造方法について説明する。なお、半導体発光素子１０は、基板１１の全ての基板側面１１ａの全面及び半導体層１２の全ての層側面１２ａの全面の中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである構成のものである。 Next, a method for manufacturing the semiconductor light emitting element 10 according to Embodiment 1 will be described. The semiconductor light emitting element 10 has a configuration in which the center line average roughness (Ra) of all the substrate side surfaces 11a of the substrate 11 and all the layer side surfaces 12a of the semiconductor layer 12 is 50 to 1000 nm. .

まず、有機金属気相成長法（Metal Organic Ｖapor Phase Epitaxy：ＭＯＶＰＥ）、ＣＶＤ（Chemical Vapor Deposition）等の技術を組み合わせて公知の方法によりウエハ１１’の表面に半導体層１２を形成し、電子ビーム蒸着装置、ドライエッチングなどの公知のウエハプロセスを使って複数の半導体発光素子１０をマトリクス状に作り込む。 First, the semiconductor layer 12 is formed on the surface of the wafer 11 ′ by a known method by combining techniques such as metal organic vapor phase epitaxy (MOVPE) and CVD (Chemical Vapor Deposition), and electron beam evaporation is performed. A plurality of semiconductor light emitting elements 10 are formed in a matrix using a known wafer process such as an apparatus or dry etching.

ここで、ウエハ１１’は、例えば、厚さが０．３〜３．０ｍｍ、及び直径が５０〜３００ｍｍである。そして、直径５０ｍｍのウエハ１１’の場合で、１枚のウエハ１１’には５０００〜１２０００個の半導体発光素子１０を作り込むことができる。 Here, the wafer 11 ′ has, for example, a thickness of 0.3 to 3.0 mm and a diameter of 50 to 300 mm. In the case of a wafer 11 ′ having a diameter of 50 mm, 5000 to 12000 semiconductor light emitting elements 10 can be formed on one wafer 11 ′.

続いて、マルチワイヤソー装置２０のワーク取付部２１に粘着シート２２でウエハ１１’を貼設し、図２に示すように、ワーク取付部２１を半導体発光素子１０の１つ分の間隔をおいて並行して走行するソーワイヤ２３に近づけてウエハ１１’を当接させる。このとき、ウエハ１１’及び半導体層１２は、各々、半導体発光素子１０間に延びる複数の切断部がストライプ状に形成され、粘着シート２２に貼設された状態で、複数の半導体発光素子１０が一列の並んだ短冊状にマルチ切断されて分割される。図３に示すように、ソーワイヤ２３による切断面は半導体発光素子１０の基板１１の基板側面１１ａ及び半導体層１２の層側面１２ａとなるが、それらの基板側面１１ａ及び層側面１２ａは中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍとなる。なお、ワーク取付部２１には、半導体層１２が構成された表面側が粘着シート２２に貼り付けられるようにウエハ１１’を設けてもよく、また、その裏面側が粘着シート２２に貼り付けられるようにウエハ１１’を設けてもよい。また、ウエハ１１’の厚さが例えば８０〜２００μｍとなるように、事前に裏面側に研削加工を施してもよい。なお、図２及び３に示すようなウエハ１１’を走行するソーワイヤ２３の列に対して下降させる方式とは逆に、ウエハ１１’をソーワイヤ２３の列に対して上昇させる方式であってもよく、また、静止支持されたウエハ１１’に対して走行するソーワイヤ２３の列を上方から降下させる又は下方から上昇させる方式であってもよい。 Subsequently, the wafer 11 ′ is pasted to the work attachment portion 21 of the multi-wire saw device 20 with the adhesive sheet 22, and the work attachment portion 21 is spaced by one semiconductor light emitting element 10 as shown in FIG. The wafer 11 ′ is brought into contact with the saw wire 23 running in parallel. At this time, in the wafer 11 ′ and the semiconductor layer 12, each of the plurality of semiconductor light emitting elements 10 is formed in a state where a plurality of cut portions extending between the semiconductor light emitting elements 10 are formed in a stripe shape and attached to the adhesive sheet 22. It is divided into multiple strips in a line. As shown in FIG. 3, the cut surface by the saw wire 23 becomes the substrate side surface 11 a of the substrate 11 of the semiconductor light emitting element 10 and the layer side surface 12 a of the semiconductor layer 12, and these substrate side surface 11 a and layer side surface 12 a are centerline average roughness. The thickness (Ra) is 50 to 1000 nm. The workpiece attachment portion 21 may be provided with a wafer 11 ′ so that the surface side on which the semiconductor layer 12 is formed is attached to the adhesive sheet 22, and the back side thereof is attached to the adhesive sheet 22. A wafer 11 ′ may be provided. In addition, the back surface may be ground in advance so that the thickness of the wafer 11 ′ is, for example, 80 to 200 μm. 2 and 3, the method of raising the wafer 11 ′ relative to the row of saw wires 23 may be opposite to the method of lowering the row of saw wires 23 traveling on the wafer 11 ′. In addition, a system in which the row of saw wires 23 traveling with respect to the stationary wafer 11 ′ is lowered from above or raised from below is also possible.

ここで、このソーワイヤ２３によるウエハ１１’の切断加工は、遊離砥粒方式及び固定砥粒方式のいずれで行ってもよい。前者の場合、例えば、ソーワイヤ２３として、ピアノ線、硬鋼線等のＦｅ系金属線、或いは、タングステン線、インコネル（Ｎｉ−Ｃｒ−Ｆｅ系合金）等の金属線を用い、砥粒メディアとして、人工研磨石、ケイ石、砂、金属球等を用いればよい。後者の場合、例えば、ソーワイヤ２３として、例えば、上記金属線にダイヤモンド砥粒等を固定したものを用いればよい。ソーワイヤ２３の外径は例えば５０〜２００μｍである。また、加工時におけるソーワイヤ２３の張力は例えば３〜５０Ｎ、線速は例えば１００〜１０００ｍ／ｍｉｎ、及びウエハ１１’の厚さ方向の移動速度は例えば５０〜１０００μｍ／ｍｉｎである。 Here, the cutting processing of the wafer 11 ′ by the saw wire 23 may be performed by either the free abrasive grain method or the fixed abrasive grain method. In the former case, for example, as the saw wire 23, an Fe-based metal wire such as a piano wire or a hard steel wire, or a metal wire such as a tungsten wire or Inconel (Ni-Cr-Fe-based alloy) is used as an abrasive medium. Artificial polished stones, silica stones, sand, metal balls, etc. may be used. In the latter case, for example, as the saw wire 23, for example, a metal wire fixed with diamond abrasive grains or the like may be used. The outer diameter of the saw wire 23 is, for example, 50 to 200 μm. Further, the tension of the saw wire 23 during processing is, for example, 3 to 50 N, the linear velocity is, for example, 100 to 1000 m / min, and the moving speed in the thickness direction of the wafer 11 ′ is, for example, 50 to 1000 μm / min.

そして、ワーク取付部２１に設けたウエハ１１’をその法線方向を軸として９０°回転させ、上記と同様にワーク取付部２１を並行して走行するソーワイヤ２３に近づけてウエハ１１’を当接させる。このとき、ウエハ１１’は、各々、半導体発光素子１０間に延びる複数の切断部がストライプ状に形成され、その結果、縦横に複数の切断部が格子状に形成され、粘着シート２２に貼設された状態でマルチ切断されて、複数の半導体発光素子１０が個々に分割される。 Then, the wafer 11 ′ provided on the workpiece attachment portion 21 is rotated by 90 ° about the normal direction as an axis, and the wafer 11 ′ is brought into contact with the workpiece attachment portion 21 close to the saw wire 23 traveling in parallel as described above. Let At this time, in the wafer 11 ′, a plurality of cut portions extending between the semiconductor light emitting elements 10 are formed in a stripe shape, and as a result, a plurality of cut portions are formed in a lattice shape in the vertical and horizontal directions, and are attached to the adhesive sheet 22. The plurality of semiconductor light emitting elements 10 are individually divided by being multi-cut in the state of being performed.

なお、上記のようにソーワイヤ２３によりウエハ１１’の全厚さを切断せず、ソーワイヤ２３によりウエハ１１’の中間厚さまでを切断して、複数の半導体発光素子１０を個々に分割するように格子状に溝部を形成し、その後、その溝部で機械的に劈開して分割するようにしてもよい。但し、この場合は、基板側面１１ａの一部だけがソーワイヤ２３による切断面となる。 In addition, as described above, the entire thickness of the wafer 11 ′ is not cut by the saw wire 23, and the intermediate thickness of the wafer 11 ′ is cut by the saw wire 23, so that the plurality of semiconductor light emitting elements 10 are individually divided. A groove portion may be formed in a shape, and thereafter, the groove portion may be mechanically cleaved and divided. However, in this case, only a part of the substrate side surface 11 a becomes a cut surface by the saw wire 23.

（実施形態２）
図４は実施形態２に係る半導体発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 (Embodiment 2)
FIG. 4 shows a semiconductor light emitting device 10 according to the second embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

実施形態２に係る半導体発光素子１０では、基板１１の一方の対向する一対の基板側面１１ａが基板１１の表面の法線方向に対して同じ角度だけ傾斜した平面に形成されている。そして、それらの一対の基板側面１１ａ及びそれらに対応した半導体層１２の層側面１２ａの中心線平均粗さ（Ｒａ）は５０〜１０００ｎｍである。この傾斜角度は基板１１の表面の法線方向に対して例えば４〜６０°である。 In the semiconductor light emitting device 10 according to the second embodiment, one pair of opposing substrate side surfaces 11 a of the substrate 11 is formed on a plane inclined by the same angle with respect to the normal direction of the surface of the substrate 11. The center line average roughness (Ra) of the pair of substrate side surfaces 11a and the layer side surface 12a of the semiconductor layer 12 corresponding to them is 50 to 1000 nm. This inclination angle is, for example, 4 to 60 ° with respect to the normal direction of the surface of the substrate 11.

この半導体発光素子１０では、上記の構成により他方の対向する一対の基板側面１１ａが非矩形の平行四辺形に形成されている。光取り出し効率の向上の観点からは、このように半導体発光素子１０が非矩形の面を有すことが好ましい。従って、一方の対向する一対の基板側面１１ａに加えて他方の対向する一対の基板側面１１ａもが基板１１の表面の法線方向に対して同じ角度だけ傾斜した平面であって、全ての基板側面１１ａが非矩形の平行四辺形に形成された構成、或いは、一方の対向する一対の基板側面１１ａに加えて表面及び裏面の形状もが非矩形の平行四辺形に形成された構成であることが好ましく、表面、裏面、及び全ての基板側面１１ａのいずれもが非矩形の平行四辺形に形成された構成であることがより好ましい。 In the semiconductor light emitting device 10, the other pair of opposing substrate side surfaces 11a is formed in a non-rectangular parallelogram by the above configuration. From the viewpoint of improving the light extraction efficiency, it is preferable that the semiconductor light emitting element 10 has a non-rectangular surface as described above. Accordingly, in addition to the pair of opposing substrate side surfaces 11a, the other pair of opposing substrate side surfaces 11a is also a plane inclined at the same angle with respect to the normal direction of the surface of the substrate 11, and all the substrate side surfaces 11a may be configured to be a non-rectangular parallelogram, or the front and back surfaces may be configured to be a non-rectangular parallelogram in addition to a pair of opposing substrate side surfaces 11a. It is more preferable that the front surface, the back surface, and all the substrate side surfaces 11a are formed in a non-rectangular parallelogram.

この半導体発光素子１０を製造するには、図５に示すように、ソーワイヤ２３とウエハ１１’とを横方向に所定の相対移動をさせながら、ソーワイヤ２３によりウエハ１１’及び半導体層１２を厚さ方向に切断すればよい。 In order to manufacture the semiconductor light emitting device 10, as shown in FIG. 5, the thickness of the wafer 11 ′ and the semiconductor layer 12 is increased by the saw wire 23 while the saw wire 23 and the wafer 11 ′ are moved relative to each other in a predetermined direction. Cut in the direction.

その他の構成、製造条件、及び作用効果は実施形態１と同一である。 Other configurations, manufacturing conditions, and operational effects are the same as those of the first embodiment.

（実施形態３）
図６は実施形態３に係る半導体発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 (Embodiment 3)
FIG. 6 shows a semiconductor light emitting device 10 according to the third embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

実施形態３に係る半導体発光素子１０では、基板１１の対向する一対の基板側面１１ａの一方が断面くの字に突出し且つ他方が断面くの字に没入して形成されている。そして、それらの一対の基板側面１１ａ及びそれらに対応した半導体層１２の層側面１２ａの中心線平均粗さ（Ｒａ）は５０〜１０００ｎｍである。なお、もう１つの対向する一対の基板側面１１ａ及び層側面１２ａも同様の構成を有していてもよい。 In the semiconductor light emitting device 10 according to the third embodiment, one of a pair of substrate side surfaces 11a opposed to the substrate 11 protrudes into a cross-sectional shape, and the other immerses into the cross-sectional shape. The center line average roughness (Ra) of the pair of substrate side surfaces 11a and the layer side surface 12a of the semiconductor layer 12 corresponding to them is 50 to 1000 nm. The other pair of opposing substrate side surfaces 11a and layer side surfaces 12a may have the same configuration.

この半導体発光素子１０を製造するには、図７に示すように、ソーワイヤ２３とウエハ１１’とを横方向に所定の相対移動をさせながら、ソーワイヤ２３によりウエハ１１’を厚さ方向に切断すればよい。 To manufacture the semiconductor light emitting device 10, as shown in FIG. 7, the wafer 11 ′ is cut in the thickness direction by the saw wire 23 while the saw wire 23 and the wafer 11 ′ are moved in the horizontal direction by a predetermined relative movement. That's fine.

（実施形態４）
図８は実施形態４に係る半導体発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 (Embodiment 4)
FIG. 8 shows a semiconductor light emitting device 10 according to the fourth embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

実施形態４に係る半導体発光素子１０では、基板１１の対向する一対の基板側面１１ａの一方が断面円弧状に突出し且つ他方が断面円弧状に没入した曲面に形成されている。そして、それらの一対の基板側面１１ａ及びそれらに対応した半導体層１２の層側面１２ａの中心線平均粗さ（Ｒａ）は５０〜１０００ｎｍである。なお、もう１つの対向する一対の基板側面１１ａ及び層側面１２ａも同様の構成を有していてもよい。 In the semiconductor light emitting device 10 according to the fourth embodiment, one of the pair of substrate side surfaces 11a opposed to the substrate 11 protrudes in a circular arc shape and the other is formed in a curved surface immersed in the circular arc shape. The center line average roughness (Ra) of the pair of substrate side surfaces 11a and the layer side surface 12a of the semiconductor layer 12 corresponding to them is 50 to 1000 nm. The other pair of opposing substrate side surfaces 11a and layer side surfaces 12a may have the same configuration.

この半導体発光素子１０を製造するには、図９に示すように、ソーワイヤ２３とウエハ１１’とを横方向に所定の相対移動をさせながら、ソーワイヤ２３によりウエハ１１’を厚さ方向に切断すればよい。 In order to manufacture the semiconductor light emitting device 10, as shown in FIG. 9, the wafer 11 ′ is cut in the thickness direction by the saw wire 23 while the saw wire 23 and the wafer 11 ′ are moved relative to each other in the horizontal direction. That's fine.

（実施形態５）
図１０は実施形態５に係る半導体発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 (Embodiment 5)
FIG. 10 shows a semiconductor light emitting device 10 according to the fifth embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

実施形態５に係る半導体発光素子１０では、基板１１の各基板側面１１ａは、半導体層１２が構成された表面側の部分が基板１１の法線方向と平行に延びる垂直面と、それに続く部分が曲率半径が例えば５０〜１０００μｍの断面円弧状に内側に没入した曲面と、さらにそれに続く部分が裏面側に向かって基板１１の法線方向と平行に延びる垂直面とで構成されている。そして、表面側の垂直面は平坦であり、曲面及び裏面側の垂直面は中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである。基板側面１１ａにおける表面側の垂直面と曲面及び裏面側の垂直面との面積割合は、前者よりも後者の方が多いことが好ましい。 In the semiconductor light emitting device 10 according to the fifth embodiment, each substrate side surface 11a of the substrate 11 has a vertical surface in which a portion on the surface side on which the semiconductor layer 12 is configured extends in parallel with the normal direction of the substrate 11, and a portion subsequent thereto. For example, a curved surface immersing inward in a circular arc shape with a radius of curvature of 50 to 1000 μm, for example, and a subsequent surface extending toward the back surface side in parallel with the normal direction of the substrate 11. The vertical surface on the front surface side is flat, and the vertical surface on the curved surface and the back surface side has a center line average roughness (Ra) of 50 to 1000 nm. In the substrate side surface 11a, the area ratio between the vertical surface on the front surface side and the curved surface and the vertical surface on the back surface side is preferably larger in the latter than in the former.

この半導体発光素子１０を製造するには、図１１に示すように、ソーワイヤ２３によりウエハ１１’を裏面側からの中間厚さ（例えば全厚さの１０〜９０％）まで切断して、複数の半導体発光素子１０を個々に分割するように格子状に溝部を形成し、その後、その溝部で機械的に劈開して分割すればよい。 In order to manufacture the semiconductor light emitting device 10, as shown in FIG. 11, the wafer 11 ′ is cut to an intermediate thickness (for example, 10 to 90% of the total thickness) from the back surface side by the saw wire 23, and a plurality of the semiconductor light emitting devices 10 are manufactured. Grooves may be formed in a lattice shape so that the semiconductor light emitting element 10 is divided into individual pieces, and then the grooves are mechanically cleaved and divided.

（実施形態６）
図１２は実施形態６に係る半導体発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 (Embodiment 6)
FIG. 12 shows a semiconductor light emitting device 10 according to the sixth embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

実施形態６に係る半導体発光素子１０では、基板１１の各基板側面１１ａは、半導体層１２が構成された表面側の周縁の部分が曲率半径が例えば５０〜１０００μｍの断面円弧状の曲面と、それに続く部分が裏面側に向かって基板１１の法線方向と平行に延びる垂直面とで構成されている。また、半導体層１２の各層側面１２ａは、基板側面１１ａの曲面に連続した断面円弧状の曲面に形成されている。そして、基板側面１１ａ及び層側面１２ａの曲面は中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍであり、基板側面１１ａの垂直面は平坦である。 In the semiconductor light emitting device 10 according to the sixth embodiment, each substrate side surface 11a of the substrate 11 has a curved surface with an arcuate cross section with a radius of curvature of, for example, 50 to 1000 μm, on the surface side periphery where the semiconductor layer 12 is formed. The subsequent portion is composed of a vertical surface extending in parallel with the normal direction of the substrate 11 toward the back surface side. Further, each layer side surface 12a of the semiconductor layer 12 is formed in a curved surface having an arcuate cross section that is continuous with the curved surface of the substrate side surface 11a. The curved surfaces of the substrate side surface 11a and the layer side surface 12a have a center line average roughness (Ra) of 50 to 1000 nm, and the vertical surface of the substrate side surface 11a is flat.

この半導体発光素子１０を製造するには、図１３に示すように、ソーワイヤ２３によりウエハ１１’及び半導体層１２を表面側からの中間厚さ（例えば全厚さの１０〜８０％）まで切断して、複数の半導体発光素子１０を個々に分割するように格子状に溝部を形成し、その後、その溝部で機械的に劈開して分割すればよい。 In order to manufacture the semiconductor light emitting device 10, as shown in FIG. 13, the wafer 11 ′ and the semiconductor layer 12 are cut to an intermediate thickness (for example, 10 to 80% of the total thickness) from the surface side by the saw wire 23. Thus, the groove portions may be formed in a lattice shape so as to divide the plurality of semiconductor light emitting elements 10 individually, and thereafter, the grooves may be mechanically cleaved and divided.

（その他の実施形態）
上記実施形態１〜６では、平面視で四角形の半導体発光素子１０としたが、特にこれに限定されるものではなく、並行して走行するソーワイヤーの切断する方向の二つ以上の組み合わせで分割できればよく、平行四辺形、菱形、三角形等の平面視で非矩形の形状に形成されたものであってもよい。ソーワイヤ２３により半導体発光素子１０を分割する場合、ダイヤモンドスクライブやレーザスクライブの後に劈開して半導体発光素子１０を分割する場合のように結晶方位によって分割方向の制約を受けないので、デザインの自由度が高くなる。 (Other embodiments)
In the said Embodiment 1-6, although it was set as the rectangular semiconductor light-emitting device 10 by planar view, it is not limited to this in particular, It divides | segments by the combination of two or more of the cutting direction of the saw wire which drive | works in parallel What is necessary is just to be able to form, and the thing formed in the non-rectangular shape by planar view, such as a parallelogram, a rhombus, and a triangle, may be sufficient. When the semiconductor light emitting device 10 is divided by the saw wire 23, since the semiconductor light emitting device 10 is cleaved after diamond scribe or laser scribe to divide the semiconductor light emitting device 10, the crystal orientation does not restrict the dividing direction. Get higher.

上記実施形態１〜６では、ソーワイヤ２３を用いて半導体発光素子１０を製造したが、特にこれに限定されるものではなく、ダイシング加工、バンドソー加工等の方法により、基板１１の基板側面１１ａに中心線平均粗さ（Ｒａ）が５０〜１０００ｎｍである部分を形成加工することができる。 In the said Embodiment 1-6, although the semiconductor light-emitting device 10 was manufactured using the saw wire 23, it is not limited to this in particular, It is centered on the board | substrate side surface 11a of the board | substrate 11 by methods, such as a dicing process and a band saw process. A portion having a line average roughness (Ra) of 50 to 1000 nm can be formed and processed.

本発明は、基板の表面に半導体層が積層されて構成された半導体発光素子及びその製造方法について有用である。 INDUSTRIAL APPLICABILITY The present invention is useful for a semiconductor light emitting device configured by laminating a semiconductor layer on the surface of a substrate and a manufacturing method thereof.

実施形態１の半導体発光素子の側面図である。1 is a side view of a semiconductor light emitting element according to Embodiment 1. FIG. ソーワイヤによるウエハの切断方法を示す説明図である。It is explanatory drawing which shows the cutting method of the wafer by a saw wire. 実施形態１の半導体発光素子の製造方法を示す説明図である。FIG. 6 is an explanatory view showing the method for manufacturing the semiconductor light emitting element of the first embodiment. 実施形態２の半導体発光素子の側面図である。FIG. 6 is a side view of the semiconductor light emitting element of Embodiment 2. 実施形態２の半導体発光素子の製造方法を示す説明図である。FIG. 6 is an explanatory view showing a method for manufacturing the semiconductor light emitting element of Embodiment 2. 実施形態３の半導体発光素子の側面図である。It is a side view of the semiconductor light emitting element of Embodiment 3. 実施形態３の半導体発光素子の製造方法を示す説明図である。It is explanatory drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 3. 実施形態４の半導体発光素子の側面図である。It is a side view of the semiconductor light emitting element of Embodiment 4. 実施形態４の半導体発光素子の製造方法を示す説明図である。It is explanatory drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 4. 実施形態５の半導体発光素子の側面図である。FIG. 10 is a side view of the semiconductor light emitting element of Embodiment 5. 実施形態５の半導体発光素子の製造方法を示す説明図である。It is explanatory drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 5. 実施形態６の半導体発光素子の側面図である。It is a side view of the semiconductor light emitting element of Embodiment 6. 実施形態６の半導体発光素子の製造方法を示す説明図である。It is explanatory drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 6.

Explanation of symbols

１０半導体発光素子
１１基板
１１’ ウエハ
１１ａ基板側面
１２半導体層
１２ａ層側面
２０マルチワイヤソー装置
２１ワーク取付部
２２粘着シート
２３ソーワイヤ DESCRIPTION OF SYMBOLS 10 Semiconductor light-emitting element 11 Substrate 11 'Wafer 11a Substrate side surface 12 Semiconductor layer 12a Layer side surface 20 Multi-wire saw apparatus 21 Work attachment part 22 Adhesive sheet 23 Saw wire

Claims

A semiconductor light emitting device configured by laminating a semiconductor layer on the surface of a substrate,
The above-mentioned substrate is a semiconductor light emitting device in which at least one substrate side surface has a portion having a center line average roughness (Ra) of 50 to 1000 nm.

The semiconductor light emitting device according to claim 1,
A semiconductor light emitting device in which a portion having a center line average roughness (Ra) of 50 to 1000 nm on the side surface of the substrate is a cut surface by a saw wire.

In the semiconductor light-emitting device according to claim 1 or 2,
A semiconductor light emitting device wherein a portion having a center line average roughness (Ra) of 50 to 1000 nm on the side surface of the substrate is the entire surface of the side surface of the substrate.

The semiconductor light-emitting device according to claim 1,
The said board | substrate is a semiconductor light-emitting device which has a part whose centerline average roughness (Ra) is 50-1000 nm on all the substrate side surfaces.

The semiconductor light-emitting device according to claim 1,
A semiconductor light emitting element comprising a plane in which a portion having a center line average roughness (Ra) of 50 to 1000 nm on the side surface of the substrate is inclined with respect to a normal direction of the substrate.

The semiconductor light emitting device according to any one of claims 1 to 5,
The semiconductor light emitting element in which the part whose center line average roughness (Ra) on the side surface of the substrate is 50 to 1000 nm includes a plurality of planes.

The semiconductor light-emitting device according to claim 1,
The semiconductor light emitting element in which the part whose center line average roughness (Ra) of the said substrate side surface is 50-1000 nm contains a curved surface.

The semiconductor light-emitting device according to claim 1,
The substrate is a semiconductor light emitting device having an aspect ratio of 0.3 to 30 which is a ratio of the length of the maximum side to the substrate thickness.

The semiconductor light-emitting device according to claim 1,
The substrate is a semiconductor light emitting device having a non-rectangular substrate side surface.

The semiconductor light-emitting device according to claim 1,
The substrate is a semiconductor light emitting element formed in a non-rectangular shape in plan view.

The semiconductor light-emitting device according to claim 1,
A semiconductor light emitting device, wherein the substrate is a sapphire substrate, a SiC substrate, or a GaN substrate.

The semiconductor light-emitting device according to claim 1,
The semiconductor layer has a layer side surface corresponding to a substrate side surface having a portion having a center line average roughness (Ra) of 50 to 1000 nm in the substrate, and a center line average roughness (Ra ) Is a semiconductor light emitting device having a thickness of 50 to 1000 nm.

A method of manufacturing a semiconductor light emitting device, comprising: dividing a wafer in which a plurality of semiconductor light emitting devices are formed into individual semiconductor light emitting devices by multi-cutting with a saw wire that runs in parallel at intervals.