JP2010060482A - Semiconductor testing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform the calibration of an applied voltage of a voltage applying circuit in a short time. <P>SOLUTION: This semiconductor testing apparatus comprises a plurality of voltage applying circuits 2 for applying voltages to a DUT1 and performing a test. A calibration section for measuring the applied voltage of each of the plurality of voltage applying circuits 2 in parallel comprises an ADC 4 that is disposed for each of the plurality of voltage applying circuits 2 and measures the applied voltages of the voltage applying circuits 2, a digital comparator 10 for comparing the applied voltages with reference voltages used as references applied by the voltage applying circuits 2, a corrective voltage control section 11 that is disposed for each of the plurality of voltage applying circuits 2 and corrects the applied voltages of the voltage applying circuits 2 based on the comparison result by a voltage comparing section, and a DAC 7 whose corrective voltage is controlled by the corrective voltage control section 11. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor test apparatus that performs a test by applying a voltage to a device under test, and more particularly to a semiconductor test apparatus that includes a calibration unit that corrects an applied voltage of a voltage application circuit.

  2. Description of the Related Art Conventionally, a semiconductor test apparatus that performs a test by applying a predetermined voltage to a device under test is known. In this type of semiconductor test apparatus, a predetermined voltage (referred to as a reference voltage) is applied to the device under test. However, the voltage characteristics inherent in the voltage application circuit for applying the voltage to the device under test are As a factor, an error occurs between the voltage actually applied to the device under test and the reference voltage. Therefore, the applied voltage of the voltage application circuit is measured, and so-called calibration for correcting the error is performed. A technique for performing calibration is disclosed in, for example, Patent Document 1 and the like.

  A conventional semiconductor test apparatus for performing calibration will be described with reference to FIG. In FIG. 3, a conventional semiconductor test apparatus includes n DUTs 101-1 to 101-n (collectively referred to as DUT 101) and n voltage application circuits 102-1 to 102-n (collectively referred to as voltage application circuits). 102), n relay switches 103-1 to 103-n (collectively referred to as relay switch 103), ADC 104, REF voltage 105, CPU 106, voltage control unit 107, and n DACs 108-1 to 108-. n (generically referred to as DAC 108).

  The DUT 101 is a device under test to be tested such as an IC or LSI. The voltage application circuit 102 is a circuit for applying a test voltage to the DUT 101, and includes n voltage (n) voltage application circuits 102 for simultaneously testing a plurality of DUTs 101. The relay switch 103 is provided on the output side of the voltage application circuit 102 and is provided to selectively output the application voltage from the voltage application circuit 102 to either the ADC 104 or the DUT 101. An ADC (analog / digital converter) 104 is connected to n voltage application circuits 102 and receives an applied voltage of each voltage application circuit 102 to convert analog data into digital data. The ADC 104 measures the applied voltage, and uses the measured applied voltage as the measured voltage. The REF voltage 105 is provided to limit the measurement voltage range of the ADC 104 to a certain range.

  The CPU 106 is connected to the ADC 104 and inputs the measurement voltage output from the ADC 104. The CPU 106 stores in advance the voltage to be applied by the voltage application circuit 102, and compares this reference voltage with the measured voltage output from the ADC 104 as digital data. The ADC 104 outputs measurement voltages corresponding to the n voltage application circuits 102, and the CPU 106 compares each measurement voltage with a reference voltage. The voltage control unit 107 inputs the comparison result from the CPU 106 for each voltage application circuit 102 and controls the DAC (digital analog converter) 108.

  The voltage control unit 107 linearly changes the applied voltage of the DAC 108 until the measured voltage and the reference voltage match each DAC 108 provided corresponding to each voltage application circuit 102. By changing the voltage applied to the DAC 108, the measurement voltage of the ADC 104 changes, and the measurement voltage that the CPU 106 compares with the reference voltage changes. When the comparisons coincide, the applied voltage of the DAC 108 is fixed, and the applied voltage of the DAC 108 at this time becomes a correction voltage to be calibrated.

  The operation in the above configuration will be described. Applied voltages respectively output from the n-channel voltage applying circuit 102 are applied to the DUT 101. When correcting the applied voltage, each relay switch 103 is controlled to switch the connection from the DUT 101 to the ADC 104. The ADC 104 is connected to n voltage application circuits 102 and inputs n applied voltages in order. The ADC 104 changes the measurement voltage from analog data to digital data, and outputs the generated digital data to the CPU 106. Since the ADC 104 sequentially converts the measurement voltages of the n voltage application circuits 102 into digital data, the conversion process of the measured application voltage into digital data is performed serially for each voltage application circuit 102.

The CPU 106 serially compares the n measurement voltages with the reference voltage, and the voltage control unit 107 changes the applied voltage for each of the n DACs 108. That is, for the voltage application circuit 102-1, the CPU 106 compares the measured voltage with the reference voltage, and the voltage control unit 107 changes the applied voltage of the DAC 108-1. Thereafter, for the voltage application circuit 102-n, the CPU 106 compares the measurement voltage with the reference voltage in a serial manner, and the voltage control unit 107 changes the application voltage of the DAC 108-n.
Japanese Patent Laid-Open No. 10-227837

  As shown in FIG. 3, the conventional semiconductor test apparatus includes one ADC 104 for measuring voltages and n CPUs 106 for calculating correction data for n voltage application circuits 102. . For this reason, the measurement of voltage, which is a process necessary for calibration, the comparison between the measurement voltage and the reference voltage, and the control of the DAC 108 are executed serially for each of the n voltage application circuits 102.

  In recent years, demands for increasing the test speed of semiconductor test equipment have increased, and the number of channels of the voltage application circuit 102 provided in the semiconductor test equipment has also increased dramatically. On the other hand, the processing necessary for calibration is performed serially by one ADC 104 and CPU 106, and when the number of channels of the voltage application circuit 102 increases, the time required for calibration processing executed serially increases. To increase. As a result, the test speed is greatly reduced.

  Therefore, an object of the present invention is to perform calibration of an applied voltage of a voltage application circuit in a short time.

  In order to solve the above problems, a semiconductor test apparatus according to claim 1 of the present invention is a semiconductor test apparatus including a plurality of voltage application circuits for applying a voltage to a device under test and performing a test. And a calibration unit that measures the applied voltages of the plurality of voltage applying circuits in parallel and corrects the applied voltages of the plurality of voltage applying circuits in parallel based on the measured applied voltages.

  According to this semiconductor test apparatus, since the calibration unit measures and corrects the applied voltage of each voltage application circuit in parallel, the time required for the calibration process can be greatly reduced.

  A semiconductor test apparatus according to a second aspect of the present invention is the semiconductor test apparatus according to the first aspect, wherein the calibration unit is provided for each voltage application circuit, and the applied voltage of the voltage application circuit and the voltage application circuit are A voltage comparison unit that compares a reference voltage to be applied, a voltage correction unit that is provided for each voltage application circuit, and that corrects an application voltage of the voltage application circuit based on a comparison result compared by the voltage comparison unit; It is provided with.

  According to this semiconductor test apparatus, the voltage comparison unit and the voltage correction unit are provided for each voltage application circuit, so that calibration can be performed in parallel for each voltage application circuit.

  A semiconductor test apparatus according to a third aspect of the present invention is the semiconductor test apparatus according to the second aspect, wherein the voltage comparison unit inputs an applied voltage of the voltage application circuit and converts the analog data into digital data. A conversion unit, and a digital comparator that compares the applied voltage output from the A / D conversion unit and the reference voltage as digital data are provided.

  According to this semiconductor test apparatus, since the measurement range of the voltage measurement unit is limited to a certain range by the measurement range limitation unit, the amount of data to be compared by the voltage comparison unit can be reduced, and with high resolution. Calibration can be performed.

  A semiconductor test apparatus according to a fourth aspect of the present invention is the semiconductor test apparatus according to the third aspect, further comprising a measurement range limiting unit that limits a range in which the A / D conversion unit inputs the applied voltage and performs measurement, The measurement range is determined based on an error width of an applied voltage of the voltage application circuit.

  According to this semiconductor test apparatus, the applied voltage of the voltage applying circuit output from the A / D converter can be compared with the reference voltage as digital data.

  The semiconductor test apparatus according to claim 5 of the present invention is the semiconductor test apparatus according to claim 2, wherein the voltage comparison unit includes an analog comparator that compares the applied voltage of the voltage application circuit and the reference voltage as analog data. It is characterized by having.

  According to this semiconductor test apparatus, the applied voltage of the voltage applying circuit and the reference voltage can be compared as analog data.

  In the present invention, since the applied voltage is calibrated in parallel according to the number of channels of the voltage application circuit, the time required for the calibration process can be greatly reduced, and the test speed can be increased. Become.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. As shown in FIG. 1, the semiconductor test apparatus of the present invention includes n DUTs 1-1 to 1-n (collectively referred to as DUT1) and n voltage application circuits 2-1 to 2-n (collectively referred to as DUT1). Voltage application circuit 2), n relay switches 3-1 to 3-n (collectively referred to as relay switch 3), and n ADCs 4-1 to 4-n (collectively referred to as ADC4). And n REF voltages 5-1 to 5-n (collectively referred to as REF voltage 5), CPU 6, n DACs 7-1 to 7-n (collectively referred to as DAC 7), and voltage control unit 8 It has a general configuration. The voltage control unit 8 includes n digital comparators 10-1 to 10-n (collectively referred to as digital comparators 10) and n correction voltage control units 11-1 to 11-n (collectively referred to as corrections). Voltage control unit 11).

  The DUT 1 is a device under test that is a test target such as an IC or an LSI. The voltage application circuit 2 applies a test voltage to the DUT 1 and includes a plurality of (n-channel) voltage application circuits 2. By providing the voltage application circuit 2 of a plurality of channels, it becomes possible to test n DUTs 1 in parallel, and the test speed can be increased. The relay switch 3 is provided corresponding to the n-channel voltage application circuit 2 and controls the application voltage to be selectively output to either the ADC 4 or the DUT 1. The above is the same as described in the prior art.

  An ADC (analog / digital converter: A / D converter) 4 receives an applied voltage output from the voltage application circuit 2 and converts the applied voltage from analog data to digital data. The ADC 4 measures the applied voltage, and uses the measured voltage as the measurement voltage. The ADC 4 is composed of n pieces, and the voltage application circuit 2 and the ADC 4 are provided in a one-to-one relationship. Each ADC 4 outputs a measurement voltage as digital data to the voltage controller 8.

  The REF voltage 5 is provided to limit the range of the applied voltage measured by the ADC 4, and is provided corresponding to each ADC 4. The REF voltage 5 stores the range of the applied voltage that the ADC 4 measures, and the ADC 4 measures the applied voltage only within this range. The applied voltage range limited by the REF voltage 5 will be described later.

  The CPU 6 controls the voltage control unit 8. This control is an on / off operation of the voltage control unit 8. In addition, the CPU 6 outputs a voltage (reference voltage) that should be output by the voltage application circuit 2 to the voltage control unit 8 as digital data. The reference voltage may be stored in advance in the voltage control unit 8. The DAC 7 applies a voltage to the voltage application circuit 2, and changes the voltage to be applied under the control of the voltage control unit 8. This voltage is a correction voltage for calibration, and a correction voltage is individually applied to each of the n DACs 7 for each voltage application circuit 2.

  An n-channel digital comparator 10 (shown as Digital CMP in FIG. 1) provided in the voltage controller 8 corresponds to the voltage application circuit 2 on a one-to-one basis. The digital comparator 10 individually inputs the measurement voltage from the n-channel ADC 4 and the reference voltage output from the CPU 6 as digital data for comparison. The comparison result is output to the correction voltage control unit 11.

  The correction voltage control unit 11 linearly changes the correction voltage applied by the DAC (digital analog converter) 7 based on the comparison result of the digital comparator 10. The ADC 4 measures the applied voltage of the applied voltage circuit 2, and when the correction voltage of the DAC 7 is changed linearly, the measured voltage of the ADC 4 also changes linearly. The correction voltage is linearly changed until the measurement voltage matches the reference voltage, and when the measurement voltage matches, the correction voltage control unit 11 fixes the correction voltage of the DAC 7. This is a correction voltage to be corrected by the voltage application circuit 2, and calibration is performed thereby.

  As a method for determining the correction voltage, for example, a method such as binary search may be used in addition to the method of linearly changing the voltage of the DAC 7. Further, the digital comparator 10 calculates the difference between the measurement voltage and the reference voltage, inputs the difference data to the DAC 7, and the DAC 7 applies a voltage corresponding to the difference to the voltage application circuit 2 as a correction voltage. May be. In this case, the correction voltage can be directly output from the digital comparator 10 to the DAC 7. Further, the correction voltage may be not only a positive voltage but also a negative voltage.

  As described above, the calibration unit that performs calibration of the voltage application circuit 2 is roughly configured by the ADC 4, the digital comparator 10, the correction voltage control unit 11, and the DAC 7. Further, the voltage comparison unit is schematically configured by the ADC 4 and the digital comparator 10, and the voltage correction unit is generally configured by the correction voltage control unit 11 and the DAC 7.

  The operation in the above configuration will be described. When the test of DUT 1 is performed, the connection of the relay switch 3 is switched to the DUT 1 side, but when the applied voltage of the voltage application circuit 2 is corrected, the connection of the relay switch 3 is switched to the ADC 4 side. In addition, you may make it perform switching control of each relay switch 3 by CPU1, for example.

  By switching the relay switch 3, the applied voltage from the n-channel voltage application circuit 2 is input to the corresponding ADC 4. The n-channel voltage application circuit 2 outputs an applied voltage different from the reference voltage (referred to as VB) due to inherent voltage characteristics or the like (there may be the same applied voltage as the reference voltage VB if there is no error). Each ADC 4 measures the applied voltage of the corresponding voltage application circuit 2, and the measurement voltage (VM) is generated corresponding to the number of channels of the voltage application circuit 2 (that is, n). The measurement voltages of the ADCs 4-1 to 4-n are referred to as VM-1 to VM-n, respectively. The ADCs 4-1 to 4-n and the digital comparators 10-1 to 10-n have a one-to-one correspondence, and the measurement voltages VM-1 to VM-n are respectively applied to the digital comparators 10-1 to 10-n. Entered.

  Each of the digital comparators 10-1 to 10-n receives the reference voltage VB from the CPU 6, and each of the digital comparators 10-1 to 10-n compares the reference voltage VB with the measured voltages VM-1 to VM-n. In parallel. When an error inherent in the voltage application circuits 2-1 to 2-n occurs, the corresponding digital comparator 10 outputs a signal indicating that it does not match to the corresponding correction voltage control unit 11, and corrects the correction voltage. The control unit 11 linearly changes the corresponding DAC 7. As a result, the correction voltage is applied to the voltage application circuit 2, the applied voltage changes linearly, and the measurement voltage also changes linearly. Then, the correction voltage (referred to as VC) applied by the DAC 7 is fixed when VB and VM match. With this correction voltage VC, the voltage application circuit 2 having an error can be calibrated to appropriately adjust based on the actually measured applied voltage.

  The voltage comparison by the digital comparator 10 and the control of the DAC 7 by the correction voltage controller 11 are performed in parallel. Therefore, the digital comparator 10, the correction voltage control unit 11, and the DAC 7 are provided with numbers corresponding to the number of channels of the voltage application circuit 2. Also, since the ADC 4 has a number corresponding to the number of channels of the voltage application circuit 2, all the processes necessary for calibration can be executed in parallel.

  As described above, since the plurality of voltage application circuits 2 are calibrated in parallel in the present invention as compared with the conventional technique in which the calibration of the plurality of voltage application circuits is performed serially, the voltage is theoretically reduced. It can be performed at a speed (n) times the number of channels of the application circuit 2. Therefore, the test speed can be greatly increased.

  Here, the measurement voltage VM of the ADC 4 is digital data, but the data amount of the measurement voltage VM increases as the measurement range of the ADC 4 becomes wider. In this case, it takes a lot of time to measure the voltage in the ADC 4, compare the voltage in the digital comparator 10, and control the DAC 7 by the correction voltage control unit 11. In recent years, the measurement voltage of the ADC 4 is desired to have a high resolution from the viewpoint that the voltage applied to the DUT 1 is finely controlled to perform a highly accurate test. For this reason, when trying to measure a wide range of voltages with high resolution, calibration requires a huge amount of time, and the test speed is greatly reduced.

  On the other hand, even if an error occurs in the applied voltage due to the inherent voltage characteristics of the voltage application circuit 2, the error range is not so large, and the error range is determined by the type of the voltage application circuit 2. Therefore, based on the error width generated by the voltage application circuit 2, the width to be limited by the REF voltage 5 is determined in advance.

  For example, when the error width is ± 50 millivolts depending on the type of the voltage application circuit 2, it is not necessary to measure the applied voltage exceeding the error width. In the case where the width of the applied voltage that can be measured by the ADC 4 is ± 10 volts, only ± 50 millivolts may be set as the measurement range. Therefore, it is possible to perform calibration with high resolution and at high speed by measuring within the required range of ± 50 millivolts. Since the REF voltage 5 is provided for each voltage application circuit 2, the ADC 4 can measure a measurement voltage with a small amount of data and a high resolution, and this measurement voltage is input to the digital comparator 10 in parallel. As a result, the digital comparator 10 can compare voltages in parallel at high speed and with high resolution.

  In the above, the digital comparator 10 and the correction voltage control unit 11 must each include n in accordance with the number of channels of the voltage application circuit 2. The digital comparator 10 performs voltage comparison and correction voltage calculation, and has a relatively large circuit scale. Similarly, the correction voltage control unit 11 also has a large circuit scale for controlling the DAC 7, and the voltage control unit 8 including the n digital comparators 10 and the correction voltage control unit 11 is a complicated and large circuit. Become. Therefore, by configuring each digital comparator 10 and the correction voltage control unit 11 with an FPGA (Field Programmable Gate Array), the circuit configuration can be made simple and small, and can be operated at high speed.

  Next, a modified example in the case of performing correction using analog data will be described with reference to FIG. In FIG. 2, DUT 1, voltage application circuit 2, relay switch 3, CPU 6, and DAC 7 are the same as those described above. On the other hand, the reference voltage holding unit 20 and the analog comparators 21-1 to 21-n (collectively referred to as analog comparator 21) are newly provided. Further, the voltage control unit 8 of the present modification is different in that it does not include a digital comparator.

  The reference voltage holding unit 20 holds the reference voltage VB of the applied voltage of each voltage applying circuit 2 as analog data. For this reason, for example, the CPU 6 and the reference voltage holding unit 20 may be connected, and the digital data of the reference voltage VB input from the CPU 6 may be converted into analog data and held. The reference voltage holding unit 20 is connected to analog comparators 21 respectively corresponding to the n-channel voltage application circuits 2. Each analog comparator 21 receives a reference voltage from the reference voltage holding unit 20 and receives an applied voltage from the voltage application circuit 2.

  Each analog comparator 21 (shown as Analog CMP in FIG. 2) compares the reference voltage and the applied voltage as analog data. If they do not match, the correction voltage control unit 11 is notified accordingly. Output a signal. The correction voltage control unit 11 linearly changes the correction voltage of the DAC 7 until the input of the signal indicating that they do not match from the analog comparator 11 stops, and controls to fix the correction voltage VC of the DAC 7 when the signal input stops. I do. Thereby, the applied voltage of each voltage application circuit 2 is appropriately corrected and calibration is performed.

  In this modification, the analog comparator 21 inputs the applied voltage of the voltage application circuit 2 and directly compares it as analog data, so that the analog comparator 21 exhibits a function as a voltage comparison unit. On the other hand, in the above-described embodiment, the ADC 4 measures the applied voltage of the voltage application circuit 2 and the digital comparator 10 compares the voltages. Therefore, the ADC 4 and the digital comparator 10 function as a voltage comparator. Demonstrating. For this reason, in this modification, since the voltage comparison unit can be configured by one analog comparator 21, the entire apparatus can be reduced in size and simplified.

It is a block diagram which shows schematic structure of this invention. It is a block diagram which shows schematic structure of a modification. It is a block diagram which shows schematic structure in a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 DUT 2 Voltage application circuit 4 ADC 5 REF voltage 7 DAC 8 Voltage control part 10 Digital comparator 11 Correction voltage control part 20 Reference voltage holding part 21 Analog comparator

Claims (5)

A semiconductor test apparatus comprising a plurality of voltage application circuits for applying a voltage to a device under test for testing.
A calibration unit that measures the applied voltages of the plurality of voltage applying circuits in parallel and corrects the applied voltages of the plurality of voltage applying circuits in parallel based on the measured applied voltages is provided. Semiconductor test equipment. The calibration unit
A voltage comparison unit that is provided for each voltage application circuit and compares an application voltage of the voltage application circuit and a reference voltage to be applied by the voltage application circuit;
A voltage correction unit that is provided for each voltage application circuit and corrects the applied voltage of the voltage application circuit based on a comparison result compared by the voltage comparison unit;
The semiconductor test apparatus according to claim 1, further comprising: The voltage comparison unit
An A / D converter for inputting an applied voltage of the voltage applying circuit and converting the analog data into digital data;
A digital comparator that compares the applied voltage output from the A / D converter and the reference voltage as digital data;
The semiconductor test apparatus according to claim 2, further comprising: The A / D conversion unit includes a measurement range limiting unit that limits a range in which measurement is performed by inputting the applied voltage,
4. The semiconductor test apparatus according to claim 3, wherein the measurement range is determined based on an error width of an applied voltage of the voltage application circuit.   The semiconductor test apparatus according to claim 2, wherein the voltage comparison unit includes an analog comparator that compares an application voltage of the voltage application circuit and the reference voltage as analog data.

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