JP2010057263A - Gate drive circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make reference potential higher than bus voltage having a simple circuitry, especially of a high-side gate drive circuit in an inverter adopting a bidirectional switch, in which when gate drive circuits are formed, reference potential is different between respective gate terminals. <P>SOLUTION: The gate drive circuit is applied to a half bridge circuit in which bidirectional switches 1 having four operation modes, by respectively turning on and off a first gate terminal 2 and a second gate terminal 3 that are connected in series; and the gate drive circuit includes a hold circuit 19 that keeps on the first gate terminal 2. It is possible to realize a gate drive circuit of simple circuitry, in which the first gate terminal 2 is kept on and the second gate terminal 3 is PWM-controlled, and low-loss driving can be implemented at low cost. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a gate drive circuit when a half-bridge circuit in which bidirectional switches having four states are connected in series to a gate signal is configured.

  In recent years, the spread of electronic devices has tended to expand further. At the same time, however, the power consumption of electronic devices has increased, and global warming has occurred, which is recognized as a social problem. Due to this social background, there is an increasing demand for low power consumption of electronic devices. Standby power, such as actuators for realizing the main functions of the main power supply circuit or electronic devices, and power for operation Any power consumption is expected to be reduced by technological innovation.

  Conventionally, as a technology for reducing the power consumption of this type, there is a power conversion circuit using a bidirectional switch as a new semiconductor device, depending on a voltage to be used. Proposed. Under such circumstances, various power supply circuits have been proposed for reducing the power supply for driving in the gate drive circuit in the power conversion circuit using the bidirectional switch.

  Hereinafter, the gate drive circuit will be described using Patent Document 1 as an example.

  As shown in FIG. 8, in the gate drive circuit applied to the power converter in Patent Document 1, current paths are formed according to switching of the switching elements T1 to T15, and the capacitors C1 to C12 are charged. Has been. Specifically, the capacitors C1, C3, C5, C7, C9, and C11 are charged from the power supply Edrv through the diodes D1, D3, D5, D7, D9, and D11 when the switching elements T5, T10, and T15 are turned on. Will do. The capacitors C2, C4, C6, C8, C10, and C12 are diodes from the capacitors C1, C3, C5, C7, C9, and C11 when the switching elements T2, T4, T7, T9, T12, and T14 are turned on. Charging is performed via D2, D4, D6, D8, D10, and D12.

Other than Patent Document 1, the gate terminal of each bidirectional switch is formed with an insulated power supply to supply driving power, or a bootstrap circuit is configured with the DC terminal voltage as a reference. For example, there has been proposed a device that uses only a charge pump circuit to drive only the gate terminal for driving.
JP 2006-246617 A

  In such a conventional gate drive circuit of a power conversion circuit, the balance between consumption and charging due to the gate drive of the switching element is lost, the voltage of the gate power supply section fluctuates, and the characteristics of the switching element change at that time There existed a subject that it will lead to the increase in an output ripple and the increase in the loss of a switching element. In addition, when charging the capacitor for driving the switching element in the reverse direction from the capacitor of the bootstrap circuit, it is configured to be connected directly via a diode, a steep charging current flows, and the gate terminal of the switching element is connected. There has been a problem of causing an unintended turn-on, causing a short-circuit failure, or affecting an external noise disturbance.

  In addition, the drive power supply that employs an insulating power supply other than Patent Document 1 or the configuration that combines the bootstrap circuit and the charge pump circuit has a large circuit scale, and the entire apparatus has a large printed wiring board due to an increase in the number of electronic components. There was a problem of increasing the size.

  The present invention solves such a conventional problem, suppressing the voltage fluctuation of the gate power supply unit, and relaxing the rush current from the capacitor of the bootstrap circuit to the driving capacitor of the switching element in the reverse direction, In the simplification of the circuit configuration, the only control power source is used, and the object is to provide a low-cost, small and light gate drive circuit.

  The gate drive circuit of the present invention includes a semiconductor layer stack having a channel formed on a substrate, a first ohmic electrode and a second ohmic formed on the semiconductor layer stack at a distance from each other. A first gate electrode and a second gate electrode formed in order from the first ohmic electrode side between the electrode, the first ohmic electrode and the second ohmic electrode; and the semiconductor layer A first p-type semiconductor layer formed between the stacked body and the first gate electrode; and a second p-type semiconductor formed between the semiconductor layer stacked body and the second gate electrode. A first gate terminal for inputting a gate drive signal between the first ohmic electrode and the first gate electrode; and a gate between the second ohmic electrode and the second gate electrode. Second gate to input drive signal A drain terminal connected to the first ohmic electrode, and a source terminal connected to the second ohmic electrode. When only the first gate terminal is turned on, the drain terminal is connected to the source terminal. A first mode in which a bidirectional device that is turned on and a reverse diode operate as a semiconductor connected in series, and when only the second gate terminal is turned on, a forward diode from the drain terminal toward the source terminal And the second mode in which the bidirectional device in the on state operates as a semiconductor connected in series, when the first gate terminal and the second gate terminal are turned on, the diode does not pass between the drain terminal and the source terminal In order to turn off the first gate terminal and the second gate terminal. A half-bridge circuit is configured by connecting a bidirectional switch having a fourth mode that cuts off current in both directions in series as a high-side switch connected to the high potential side and a low-side switch connected to the low voltage side. A gate drive circuit for the bidirectional switch of a single-phase or three-phase inverter in which bridge circuits are arranged in parallel, the first gate terminal having a holding circuit for holding an on-voltage so as to be always on It is a configuration.

  By this means, the gate signal for driving the two gate terminals of the bidirectional switch can be the only signal, and the ON signal can be held. The bidirectional switch can be driven with a simple configuration without requiring a special signal output.

  The holding circuit is configured to include a parallel circuit of a constant voltage diode and a capacitor.

  By this means, since a general-purpose component configuration and a combination of passive components, no external signal is required, and the bidirectional switch can be easily driven.

  Furthermore, the power to the holding circuit of the high side switch is supplied from a power storage unit that stores the driving power of the second gate terminal of the high side switch.

  This means eliminates the need for a dedicated power source for the holding circuit of the high-side switch, which normally requires a higher voltage than the high-potential side voltage, making it cheaper and reducing the overall size and weight of the apparatus.

  Further, the power to the holding circuit of the high side switch is supplied during the period when the second gate terminal of the high side switch is turned on.

  By this means, since the supply is performed during the ON period of the second gate terminal that is normally performing PWM control, the supply is not interrupted for a long time, so a large-capacity power storage element is not required, and space saving can be achieved. The entire apparatus can be reduced in size and weight.

  Further, the power to the holding circuit of the low side switch is directly supplied from the control power source converted from the AC power source.

  By this means, loss during power transfer to the holding circuit can be reduced, and at the same time, an intermediate circuit is not required, so that space can be saved and the entire apparatus can be reduced in size and weight. .

  Further, the power to the holding circuit of the low side switch is supplied during the period when the second gate terminal of the low side switch is turned on.

  By this means, since the supply is performed during the ON period of the second gate terminal that is normally performing PWM control, the supply is not interrupted for a long time, so a large-capacity power storage element is not required, and space saving can be achieved. The entire apparatus can be reduced in size and weight.

  Further, the driving power for the second gate terminal of the low-side switch is always supplied.

  By this means, it is possible to sequentially start from the second gate terminal of the low-side switch at the time of starting or restarting the device.

  The driving power for the second gate terminal of the high side switch is supplied when the second gate terminal of the low side switch is in the ON state.

  By this means, the driving power for the gate terminals of the high-side switch and the low-side switch can be supplied from a single power source, space can be saved, and the entire apparatus can be reduced in size and weight.

  In addition, a limiting unit that limits power supply to the holding circuit is provided.

  By this means, it is possible to avoid a rush current to the power storage element at the time of starting up the apparatus, and the entire apparatus can start up more stably.

  Further, the limiting portions of the high side switch and the low side switch are configured to have different limiting values.

  By this means, it is possible to limit the capacity according to the capacity of the power storage element of the holding circuit and the modulation method of the high-side switch and the low-side switch, it is possible to limit the supply according to the application of the inverter, and to minimize the loss of the limiting unit Can be achieved.

  Furthermore, the storage capacitors of the power storage unit of the holding circuit and the power storage unit of the second gate terminal of the high-side switch are configured to have different capacities.

  By this means, even if the power supply cycle to the holding circuit and the power supply cycle to the power storage unit of the second gate terminal of the high-side switch are different, it is possible to store power according to the cycle, More stable driving of the gate terminal can be performed.

  The limiting unit is configured to be limited by resistance.

  By this means, it is possible to configure without using a special active element or passive element, a simpler configuration and space saving can be achieved, and the entire apparatus can be reduced in size and weight.

  Furthermore, the limiting unit is configured to have a limiting value that can supply power for constantly driving the first gate terminal.

  By this means, a stable stop sequence can be performed with a simple configuration even during the period from when a voltage dip occurs on the commercial power supply side until the microprocessor detects and each gate terminal is turned off. Can be configured at a lower cost.

  Further, the power storage unit of the holding circuit of the high side switch is configured to have a storage capacitor capable of holding the first gate terminal of the high side switch in the ON state during the OFF period of the high side switch. .

  By this means, the minimum necessary power storage can be achieved, and the power storage element can be further miniaturized, so that space can be saved during mounting, and the entire apparatus can be reduced in size and weight. Become.

  Further, the power storage unit of the holding circuit of the low side switch is configured to be a storage capacitor capable of holding the first gate terminal of the low side switch in the ON state during the OFF period of the low side switch.

  By this means, the minimum necessary power storage can be achieved, and the power storage element can be further miniaturized, so that space can be saved during mounting, and the entire apparatus can be reduced in size and weight. Become.

  In addition, the storage capacity of the power storage unit of the second gate terminal of the high side switch is a storage capacity necessary to always turn on at least the first gate terminal of the high side switch and drive the second gate terminal. It is a thing.

  By this means, since the capacity takes into account the amount of carrier power to the power storage unit for always turning on the first gate terminal, more stable switching is possible when performing PWM control of the second gate terminal. be able to.

  Furthermore, it is set as the structure provided with the charge limiting part which restrict | limits the electric power supply to the electric power storage part of the 2nd gate terminal of a high side switch.

  By this means, when energization of the entire apparatus is started, a rush current to the power storage unit of the second gate terminal can be avoided, and a more stable apparatus can be configured.

  In addition, a backflow prevention unit for preventing a backflow of current from the power storage unit of the second gate terminal of the high side switch to the control power supply is provided.

  By this means, even when the potential on the negative side of the power storage unit rises according to the switching of the bidirectional switch, it is possible to prevent the current from flowing backward and to enable more stable switching. .

  In addition, a second backflow prevention unit that prevents backflow from the holding circuit of the high side switch to the power storage unit of the second gate terminal of the high side switch is provided.

  By this means, when the second gate terminal of the high-side switch is turned off, backflow from the holding circuit to the power storage unit of the second gate terminal can be prevented, and the power storage element of the holding circuit of the first gate terminal Can be maintained, and more stable switching can be achieved.

  In addition, a third backflow prevention unit for preventing backflow from the holding circuit of the low side switch to the control power supply is provided.

  By this means, when the second gate terminal of the low-side switch is turned off, backflow from the holding circuit to the control power supply can be prevented, and the potential of the power storage element of the holding circuit of the first gate terminal can be held. And more stable switching can be achieved.

  According to the present invention, a semiconductor layer stack having a channel formed on a substrate, and a first ohmic electrode and a second ohmic electrode formed on the semiconductor layer stack at a distance from each other; A first gate electrode and a second gate electrode formed in order from the first ohmic electrode side between the first ohmic electrode and the second ohmic electrode, and the semiconductor layer stack And a first p-type semiconductor layer formed between the semiconductor layer stack and the second gate electrode. , A first gate terminal for inputting a gate drive signal between the first ohmic electrode and the first gate electrode, and a gate drive signal between the second ohmic electrode and the second gate electrode. Input the second gate terminal and the front A drain terminal connected to the first ohmic electrode; and a source terminal connected to the second ohmic electrode; when only the first gate terminal is turned on, the drain terminal is turned on between the source terminals. The first mode in which the bidirectional device in the state and the reverse diode operate as a semiconductor connected in series, when only the second gate terminal is turned on, the forward diode and the on-state are turned from the drain terminal to the source terminal A second mode in which the bidirectional device operates as a semiconductor connected in series, and when the first gate terminal and the second gate terminal are turned on, the bidirectional connection is established between the drain terminal and the source terminal without a diode. The third mode that operates in the forward and reverse directions when the first gate terminal and the second gate terminal are turned off A half-bridge circuit is formed by connecting a bidirectional switch having a fourth mode that cuts off the current in series as a high-side switch connected to the high-potential side and a low-side switch connected to the low-voltage side. A gate driving circuit for the bidirectional switch of a single-phase or three-phase inverter arranged in parallel, wherein the first gate terminal includes a holding circuit for holding an on-voltage so that the on-voltage is always on. Therefore, the gate signal for driving the two gate terminals of the bidirectional switch can be the only signal, and the ON signal can be held. Therefore, a gate drive circuit that can drive the bidirectional switch with a simple configuration without requiring a simple signal output can be provided.

  In addition, the holding circuit has a configuration including a parallel circuit of a constant voltage diode and a capacitor, and since it is a general-purpose component configuration and a combination of passive components, no external signal is required, and the bidirectional switch can be easily Can be provided.

  Further, the power to the holding circuit of the high side switch is supplied from the power storage unit that stores the driving power of the second gate terminal of the high side switch, so that it is usually higher than the voltage on the high potential side. A dedicated power source for the holding circuit of the high-side switch that requires voltage is not necessary, and a gate driving circuit that can be reduced in price and reduced in size and weight of the entire device can be provided.

  In addition, the power to the holding circuit of the high-side switch is supplied during the period when the second gate terminal of the high-side switch is turned on, so that the second gate terminal that normally performs PWM control is turned on. Since supply is not interrupted for a long time, a large-capacity power storage element is not required, space saving can be achieved, and a gate drive circuit capable of reducing the size and weight of the entire apparatus can be provided.

  In addition, the power to the holding circuit of the low-side switch is supplied directly from the control power supply converted from the AC power supply, so that loss during power transfer to the holding circuit can be reduced and no intermediate circuit is required. Therefore, it is possible to provide a gate drive circuit that can save space and can be reduced in size and weight of the entire apparatus.

  In addition, the power to the holding circuit of the low-side switch is supplied during the period when the second gate terminal of the low-side switch is turned on, so that the power is supplied during the ON period of the second gate terminal that is normally performing PWM control. Since the supply is not interrupted for a long time, a large-capacity power storage element is not required, space can be saved, and a gate drive circuit capable of reducing the size and weight of the entire apparatus can be provided.

  Furthermore, the drive power for the second gate terminal of the low-side switch is always supplied, so that the device can be started sequentially from the second gate terminal of the low-side switch when the device is started or restarted. A gate driving circuit that can be provided can be provided.

  In addition, the driving power for the second gate terminal of the high-side switch is supplied when the second gate terminal of the low-side switch is on, so that the driving power for each gate terminal of the high-side switch and the low-side switch is unique. Thus, it is possible to provide a gate drive circuit that can be supplied from a power source, can save space, and can reduce the size and weight of the entire device.

  Furthermore, by providing a configuration that includes a limiting unit that limits power supply to the holding circuit, a rush current to the power storage element can be avoided at the time of startup of the device, and the entire device can be more stably started up. A gate drive circuit that can be performed can be provided.

  In addition, each limiter of the high-side switch and low-side switch is configured to have a different limit value, so that it can be limited according to the capacity of the power storage element of the holding circuit and the modulation method of the high-side switch and low-side switch. Thus, it is possible to provide a gate drive circuit that can perform supply restriction according to the use of the inverter and can minimize loss of the restriction unit.

  Furthermore, the storage capacity of the power storage unit of the holding circuit and the power storage unit of the second gate terminal of the high-side switch are configured to be different from each other, so that the power supply cycle to the holding circuit and the high-side switch Even when the power supply cycle to the power storage unit of the second gate terminal is different, it is possible to store power according to the cycle, and therefore a gate drive circuit capable of more stable driving of each gate terminal is provided. Can be provided.

  In addition, the limiting unit can be configured without using a special active element or passive element by limiting the resistance with a resistor. The simpler configuration and space saving can be achieved, and the entire device can be reduced in size and weight. A gate driving circuit capable of achieving the above can be provided.

  Furthermore, the limiting unit is configured to have a limiting value that can supply power for constantly driving the first gate terminal, so that a voltage dip or the like is generated on the commercial power source side and is detected by the microprocessor. Even during the period until each gate terminal is turned off, a stable stop sequence can be performed with a simple configuration, and a gate drive circuit capable of configuring the entire apparatus at a lower cost can be provided.

  In addition, the power storage unit of the holding circuit of the high side switch is configured to be a storage capacitor that can hold the first gate terminal of the high side switch in the on state during the off period of the high side switch. Provided with a gate drive circuit that can achieve the minimum required power storage and the power storage element can be made smaller, saving space during mounting and reducing the overall size and weight of the device. it can.

  Further, the power storage unit of the holding circuit of the low side switch is configured to be a storage capacitor capable of holding the first gate terminal of the low side switch in the ON state during the OFF period of the low side switch. Since the power storage element can be further miniaturized, a space can be saved at the time of mounting, and a gate driving circuit capable of reducing the size and weight of the entire device can be provided.

  In addition, the storage capacity of the power storage unit of the second gate terminal of the high side switch is a storage capacity necessary to always turn on at least the first gate terminal of the high side switch and drive the second gate terminal. As a result, the capacity takes into account the amount of carrier power to the power storage unit for always turning on the first gate terminal, so that more stable switching is possible when performing PWM control of the second gate terminal. A gate driving circuit that can be provided can be provided.

  Furthermore, the power storage unit of the second gate terminal is configured to include a charge limiting unit that limits power supply to the power storage unit of the second gate terminal of the high-side switch when the entire apparatus is energized. A gate drive circuit that can avoid a rush current and can constitute a more stable device can be provided.

  In addition, by including a backflow prevention unit that prevents backflow from the power storage unit of the second gate terminal of the high-side switch to the control power supply, the potential on the negative side of the power storage unit according to switching of the bidirectional switch Even when the voltage rises, it is possible to prevent a reverse flow, and it is possible to provide a gate drive circuit capable of more stable switching.

  Further, the second gate terminal of the high side switch includes a second backflow prevention unit that prevents backflow from the holding circuit of the high side switch to the power storage unit of the second gate terminal of the high side switch. When the device is turned off, backflow from the holding circuit to the power storage unit of the second gate terminal can be prevented, the potential of the power storage element of the holding circuit of the first gate terminal can be held, and more stable A gate driving circuit capable of switching can be provided.

  In addition, when the second gate terminal of the low-side switch is turned off, the third reverse-flow prevention unit that prevents the back-flow from the holding circuit of the low-side switch to the control power supply is provided. A backflow can be prevented, the potential of the power storage element of the holding circuit of the first gate terminal can be held, and a gate drive circuit that can enable more stable switching can be provided.

  According to a first aspect of the present invention, there is provided a semiconductor layer stack having a channel formed on a substrate, a first ohmic electrode and a first ohmic electrode formed on the semiconductor layer stack at a distance from each other. A first gate electrode and a second gate electrode formed in order from the first ohmic electrode side between the two ohmic electrodes, the first ohmic electrode, and the second ohmic electrode; A first p-type semiconductor layer formed between the semiconductor layer stack and a first gate electrode; and a second p-type formed between the semiconductor layer stack and a second gate electrode. A first gate terminal that inputs a gate drive signal between the first ohmic electrode and the first gate electrode, and the second ohmic electrode and the second gate electrode. The second gate that inputs the gate drive signal between A drain terminal connected to the first ohmic electrode, and a source terminal connected to the second ohmic electrode, when only the first gate terminal is turned on, the drain terminal to the source terminal A first mode in which a bidirectional device that is in an on state and a reverse diode operate as a semiconductor connected in series, and when only the second gate terminal is turned on, forward direction from the drain terminal to the source terminal A second mode in which a diode and an on-state bidirectional device operate as a semiconductor connected in series, and when both the first gate terminal and the second gate terminal are turned on, no diode is interposed between the drain terminal and the source terminal The third mode operating to conduct in the direction, turning off the first gate terminal and the second gate terminal A half-bridge circuit is constructed by connecting a bidirectional switch having a fourth mode that cuts off current in both forward and reverse directions in series as a high-side switch connected to the high potential side and a low-side switch connected to the low voltage side. A gate driving circuit for the bidirectional switch of a single-phase or three-phase inverter in which half-bridge circuits are arranged in parallel, and a holding circuit for holding an on-voltage so that the first gate terminal is always on. Since the gate signal for driving the two gate terminals of the bidirectional switch can be the only signal and the ON signal can be held, a period from the microprocessor can be maintained. A special signal output according to the phase is not required, and the bidirectional switch can be driven with a simple configuration.

  In addition, the holding circuit has a configuration including a parallel circuit of a constant voltage diode and a capacitor, and since it is a general-purpose component configuration and a combination of passive components, no external signal is required, and it is easily bidirectional. The switch can be driven.

  Further, the power to the holding circuit of the high-side switch is supplied from a power storage unit that stores the driving power of the second gate terminal of the high-side switch, which is usually higher than the voltage on the high potential side. There is no need for a dedicated power supply for the holding circuit of the high-side switch that requires a high voltage, so that it is more inexpensive and the entire device can be reduced in size and weight.

  Further, the power to the holding circuit of the high side switch is supplied during the period when the second gate terminal of the high side switch is turned on, and the on period of the second gate terminal that is normally performing PWM control. Therefore, a large-capacity power storage element is not necessary, space can be saved, and the entire apparatus can be reduced in size and weight.

  Furthermore, the power to the holding circuit of the low-side switch is directly supplied from the control power source converted from the AC power source, and at the same time the loss during the power transfer to the holding circuit can be reduced. Since it becomes unnecessary, space saving can be achieved and the entire apparatus can be reduced in size and weight.

  The power to the holding circuit of the low-side switch is supplied during the period when the second gate terminal of the low-side switch is turned on, and is supplied during the ON period of the second gate terminal that is normally performing PWM control. Therefore, since the supply is not interrupted for a long time, a large-capacity power storage element is not required, space can be saved, and the entire apparatus can be reduced in size and weight.

  Furthermore, the drive power of the second gate terminal of the low side switch is configured to be constantly supplied, and can be started in order from the second gate terminal of the low side switch at the time of starting or restarting the device. It has the effect of being able to.

  The driving power of the second gate terminal of the high side switch is configured to be supplied when the second gate terminal of the low side switch is in the ON state. The driving power of each gate terminal of the high side switch and the low side switch is Since it can be supplied from a single power source, space can be saved, and the entire apparatus can be reduced in size and weight.

  In addition, it has a configuration that includes a limiting unit that limits the power supply to the holding circuit, so that the rush current to the power storage element can be avoided at the start-up of the device, etc. It has the effect | action that can be performed.

  The limiting parts of the high-side switch and the low-side switch are configured to have different limiting values, and there are restrictions depending on the capacity of the power storage element of the holding circuit and the modulation method of the high-side switch and the low-side switch. This makes it possible to limit the supply according to the use of the inverter and to minimize the loss of the limiting portion.

  Furthermore, the storage capacity of the power storage unit of the holding circuit and the power storage unit of the second gate terminal of the high-side switch are configured to have different capacities, and the power supply cycle to the holding circuit and the high-side switch Even when the power supply cycle to the power storage unit of the second gate terminal is different, it is possible to store power according to the cycle, so that each gate terminal can be driven more stably. Have.

  In addition, the limiting unit is configured to be limited by resistance, and can be configured without using special active elements and passive elements. It is simpler and can save space, and the entire device is small and lightweight. It has the effect | action that can be achieved.

  Furthermore, the limiting unit is configured to have a limiting value that can supply power for constantly driving the first gate terminal. A voltage dip or the like occurs on the commercial power source side, and is detected by the microprocessor. Even during the period until each gate terminal is turned off, a stable stop sequence can be performed with a simple configuration, and the entire apparatus can be configured at a lower cost.

  The power storage unit of the holding circuit of the high-side switch is configured to have a storage capacitor that can hold the first gate terminal of the high-side switch in the ON state during the OFF period of the high-side switch. The power storage element can be reduced to the minimum necessary, and the power storage element can be further reduced in size, so that space can be saved during mounting, and the entire apparatus can be reduced in size and weight. .

  Further, the power storage unit of the holding circuit of the low side switch is configured to have a storage capacity capable of holding the first gate terminal of the low side switch in the ON state during the OFF period of the low side switch, and the minimum necessary Since the power storage element can be limited, and the power storage element can be further reduced in size, space can be saved at the time of mounting, and the entire apparatus can be reduced in size and weight.

  In addition, the storage capacity of the power storage unit of the second gate terminal of the high side switch is a storage capacity necessary to always turn on at least the first gate terminal of the high side switch and drive the second gate terminal. This is a capacity that takes into account the amount of carrier power to the power storage unit for always turning on the first gate terminal, so that more stable switching is possible when PWM control of the second gate terminal is performed. It has the effect of being able to.

  Furthermore, it is configured to include a charge limiting unit that limits power supply to the power storage unit of the second gate terminal of the high-side switch, and when the entire apparatus starts energization, the power storage of the second gate terminal A rush current to the part can be avoided, and a more stable device can be configured.

  The high-side switch has a backflow prevention unit that prevents backflow from the power storage unit of the second gate terminal of the high-side switch to the control power source, and the negative side of the power storage unit is switched according to the switching of the bidirectional switch. Even when the potential rises, it is possible to prevent backflow, and to perform more stable switching.

  And a second backflow prevention unit for preventing backflow from the holding circuit of the high side switch to the power storage unit of the second gate terminal of the high side switch. When the terminal is turned off, backflow from the holding circuit to the power storage unit of the second gate terminal can be prevented, and the potential of the power storage element of the holding circuit of the first gate terminal can be held, making it more stable Switching can be performed.

  In addition, it is configured to include a third backflow prevention unit that prevents backflow from the holding circuit of the low-side switch to the control power supply, and when the second gate terminal of the low-side switch is turned off, the holding circuit to the control power supply. Backflow can be prevented, the potential of the power storage element of the holding circuit of the first gate terminal can be held, and more stable switching can be achieved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
First, the configuration of the bidirectional switch 1 will be described with reference to FIG. As shown in FIG. 1, the bidirectional switch 1 includes a first gate terminal 2, a second gate terminal 3, a drain terminal 4, and a source terminal 5. The bidirectional switch 1 has a thickness of 1 μm formed by alternately laminating 10 nm thick aluminum nitride (AlN) and 10 nm thick gallium nitride (GaN) on a substrate 6 made of silicon (Si). A buffer layer 7 is formed, and a semiconductor layer stack 8 is formed thereon. In the semiconductor layer stacked body 8, a first semiconductor layer and a second semiconductor layer having a band gap larger than that of the first semiconductor layer are sequentially stacked from the substrate side. The first semiconductor layer is a GaN (undoped gallium nitride) layer 9 having a thickness of 2 μm, and the second semiconductor layer is an n-type AlGaN (aluminum gallium nitride) layer 10 having a thickness of 20 nm. In the vicinity of the hetero interface between the GaN layer 9 and the AlGaN layer 10, charges are generated due to spontaneous polarization and piezoelectric polarization. Accordingly, and mobility 1 × 1013cm- ² or sheet carrier concentration channel region is generated a 1000 cm ² V / sec or more two-dimensional electron gas (2DEG) layer. On the semiconductor layer stacked body 8, a first ohmic electrode 11A and a second ohmic electrode 11B are formed at a distance from each other. The first ohmic electrode 11A and the second ohmic electrode 11B are formed by stacking titanium (Ti) and aluminum (Al), and form an ohmic junction with the channel region. Further, in order to reduce the contact resistance, a part of the AlGaN layer 10 is removed and the GaN layer 9 is dug down by about 40 nm, so that the first ohmic electrode 11A and the second ohmic electrode 11B become the AlGaN layer 10 and the GaN layer 9. The example formed so that it may contact | connect an interface with is shown. Note that the first ohmic electrode 11 </ b> A and the second ohmic electrode 11 </ b> B may be formed on the AlGaN layer 10. In the region between the first ohmic electrode 11A and the second ohmic electrode 11B on the n-type AlGaN layer 10, the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B are spaced from each other. And selectively formed. A first gate electrode 13A is formed on the first p-type semiconductor layer 12A, and a second gate electrode 13B is formed on the second p-type semiconductor layer 12B. The first gate electrode 13A and the second gate electrode 13B are each formed by stacking palladium (Pd) and gold (Au), and the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B. Ohmic contact. A protective film 14 made of silicon nitride (SiN) is formed so as to cover the AlGaN layer 10, the first p-type semiconductor layer 12A, and the second p-type semiconductor layer 12B. By forming the protective film 14, it is possible to ensure a defect that causes so-called current collapse and to improve current collapse. The first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B each have a thickness of 300 nm and are made of p-type GaN doped with magnesium (Mg). The first p-type semiconductor layer 12A, the second p-type semiconductor layer 12B, and the AlGaN layer 10 form PN junctions. As a result, when the voltage between the first ohmic electrode 11A and the first gate electrode 13A is 0 V, for example, the depletion layer spreads from the first p-type GaN layer into the channel region, so that the current flowing through the channel is cut off. Similarly, when the voltage between the second ohmic electrode 11B and the second gate electrode 13B is, for example, 0 V or less, a depletion layer spreads from the second p-type GaN layer into the channel region. Thus, a semiconductor element capable of interrupting a current flowing through the channel and performing a so-called normally-off operation is realized. The potential of the first ohmic electrode 11A is V1, the potential of the first gate electrode 13A is V2, the potential of the second gate electrode 13B is V3, and the potential of the second ohmic electrode 11B is V4. In this case, if V2 is higher than V1 by 1.5V or more, the depletion layer extending from the first p-type semiconductor layer 12A into the channel region is reduced, so that a current can flow in the channel region. Similarly, if V3 is higher than V4 by 1.5V or more, the depletion layer extending from the second p-type semiconductor layer 12B into the channel region is reduced, and current can flow through the channel region. That is, the so-called threshold voltage of the first gate electrode 13A and the so-called threshold voltage of the second gate electrode 13B are both 1.5V. In the following, the threshold voltage of the first gate electrode 13A at which the depletion layer extending in the channel region below the first gate electrode 13A is reduced and current can flow through the channel region is set to the first threshold voltage. The threshold voltage is set to the second gate electrode 13B so that the depletion layer extending in the channel region on the lower side of the second gate electrode 13B is reduced and current can flow in the channel region. The threshold voltage is used. The distance between the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B can withstand the maximum voltage applied to the first ohmic electrode 11A and the second ohmic electrode 11B. Constitute. A gate drive signal (that is, a control signal to the first gate terminal 2) is input between the first ohmic electrode 11A and the first gate electrode 13A. Similarly, a gate drive signal (that is, a control signal to the second gate terminal 3) is input between the second ohmic electrode 11B and the second gate electrode 13B. The source terminal 5 is connected to the first ohmic electrode 11A, the drain terminal 4 is connected to the second ohmic electrode 11B, the first gate terminal 2 is connected to the first gate electrode 13A, and the second gate terminal. 3 is connected to the second gate electrode 13B.

  Next, the operation of the bidirectional switch 1 will be described. For explanation, the potential of the first ohmic electrode 11A is set to 0V, the voltage applied to the first gate terminal 2 is Vg1, the voltage applied to the second gate terminal 3 is Vg2, and the second ohmic electrode 11B and the first The voltage between the ohmic electrode 11A is Vs2s1, and the current flowing between the second ohmic electrode 11B and the first ohmic electrode 11A is Is2s1.

  When V4 is higher than V1, for example, when V4 is + 100V and V1 is 0V, the input voltages Vg1 and Vg2 of the first gate terminal 2 and the second gate terminal 3 are set to the first threshold voltage and the first threshold voltage, respectively. The voltage is equal to or lower than the threshold voltage of 2, for example, 0V. As a result, the depletion layer extending from the first p-type semiconductor layer 12A extends in the channel region toward the second p-type GaN layer, so that the current flowing through the channel can be blocked. Therefore, even when V4 is a positive high voltage, it is possible to realize a cut-off state in which a current flowing from the second ohmic electrode 11B to the first ohmic electrode 11A is cut off. On the other hand, when V4 is lower than V1, for example, even when V4 is −100 V and V1 is 0 V, the depletion layer extending from the second p-type semiconductor layer 12B is in the channel region in the first p-type semiconductor layer. The current spreads in the direction of 12A and can flow through the channel. For this reason, even when a negative high voltage is applied to the second ohmic electrode 11B, the current flowing from the first ohmic electrode 11A to the second ohmic electrode 11B can be blocked. That is, the bidirectional current of the bidirectional switch 1 can be cut off.

  In the structure and operation as described above, the first gate electrode 13A and the second gate electrode 13B share a channel region for ensuring a withstand voltage. In this device, the bidirectional switch 1 can be realized with the area of the channel region for one device. Considering the entire bidirectional switch 1, two diodes and two normally-off type AlGaN / GaN-HFETs are provided. The chip area can be reduced as compared with the case where it is used, and the bidirectional switch 1 can be reduced in cost and size.

  Next, when the input voltages Vg1 and Vg2 of the first gate terminal 2 and the second gate terminal 3 are higher than the first threshold voltage and the second threshold voltage, respectively, for example, 5V, the first voltage Both of the voltages applied to the gate electrode 13A and the second gate electrode 13B are higher than the threshold voltage. Accordingly, since the depletion layer does not extend from the first p-type semiconductor layer 12A and the second p-type semiconductor layer 12B to the channel region, the channel region is also formed below the first gate electrode 13A. It is not pinched off on the lower side of 13B. As a result, it is possible to realize a conductive state in which a current flows bidirectionally between the first ohmic electrode 11A and the second ohmic electrode 11B.

  Next, the operation when Vg1 is higher than the first threshold voltage and Vg2 is equal to or lower than the second threshold voltage will be described. When the bidirectional switch 1 having the first gate terminal 2 and the second gate terminal 3 is represented by an equivalent circuit, a first transistor 15 and a second transistor 16 are connected in series as shown in FIG. It can be regarded as a circuit. In this case, the source (S) of the first transistor 15 corresponds to the first ohmic electrode 11A, the gate (G) of the first transistor 15 corresponds to the first gate electrode 13A, and the source ( S) corresponds to the second ohmic electrode 11B, and the gate (G) of the second transistor 16 corresponds to the second gate electrode 13B. In such a circuit, for example, when Vg1 is 5V and Vg2 is 0V, the fact that Vg2 is 0V is equivalent to the state where the gate and the source of the second transistor 16 are short-circuited. Can be regarded as a circuit as shown in FIG.

  Further, description will be made assuming that the source (S) of the second transistor 16 shown in FIG. 2B is the A terminal, the drain (D) is the B terminal, and the gate (G) is the C terminal. When the potential of the B terminal shown in the figure is higher than the potential of the A terminal, it can be regarded as a transistor in which the A terminal is a source and the B terminal is a drain. In such a case, the C terminal (gate) and the A terminal Since the voltage between the source and the source is 0 V and is equal to or lower than the threshold voltage, no current flows from the B terminal (drain) to the A terminal (source). On the other hand, when the potential of the A terminal is higher than the potential of the B terminal, the transistor can be regarded as a transistor in which the B terminal is a source and the A terminal is a drain. In such a case, since the potentials of the C terminal (gate) and the A terminal (drain) are the same, when the potential of the A terminal is equal to or lower than the threshold voltage with respect to the B terminal, the A terminal (drain) to the B terminal Do not supply current to the (source). When the potential of the A terminal becomes equal to or higher than the threshold voltage with reference to the B terminal, a voltage higher than the threshold voltage is applied to the gate with reference to the B terminal (source), and current flows from the A terminal (drain) to the B terminal (source). be able to. That is, when the gate and the source of the transistor are short-circuited, the transistor functions as a diode having a drain as a cathode and a source as an anode, and the forward rising voltage becomes the threshold voltage of the transistor. Therefore, the portion of the second transistor 16 shown in FIG. 2A can be regarded as a diode, and an equivalent circuit as shown in FIG. In the equivalent circuit shown in FIG. 2C, when the potential of the drain terminal 4 of the bidirectional switch 1 is higher than the potential of the source terminal 5, 5 V is applied to the first gate terminal 2 of the first transistor 15. In this case, the first transistor 15 is in an on state, and a current can flow from S2 to S1. However, an on-voltage is generated due to the forward rising voltage of the diode. Further, when the potential of S1 of the bidirectional switch 1 is higher than the potential of S2, the voltage is carried by the diode composed of the second transistor 16, and the current flowing from S1 to S2 of the bidirectional switch 1 is blocked. That is, by applying a voltage equal to or higher than the threshold voltage to the first gate terminal 2 and applying a voltage equal to or lower than the threshold voltage to the second gate terminal 3, a so-called bidirectional device is turned on and the cathode side of the diode is connected in series to the drain side. A switch capable of connected operation can be realized.

  FIG. 3 shows the relationship between Vs2s1 and Is2s1 of the bidirectional switch 1. FIG. 3A shows a case where Vg1 and Vg2 are changed simultaneously, and FIG. 3B shows a case where Vg2 is 0 V that is equal to or lower than the second threshold voltage. (C) shows a case where Vg2 is changed with Vg1 being 0 V which is equal to or lower than the first threshold voltage. In FIG. 3, the horizontal axis S2-S1 voltage (Vs2s1) is a voltage based on the first ohmic electrode 11A, and the vertical axis S2-S1 current (Is2s1) is the second ohmic voltage. The current flowing from the electrode 11B to the first ohmic electrode 11A is positive. As shown in FIG. 3A, when Vg1 and Vg2 are 0 V and 1 V, Is2s1 does not flow regardless of whether Vs2s1 is positive or negative, and the bidirectional switch 1 is cut off. . Further, when both Vg1 and Vg2 become higher than the threshold voltage, a conductive state in which Is2s1 flows bidirectionally according to Vs2s1 is established. On the other hand, as shown in FIG. 3B, when Vg2 is set to 0 V that is equal to or lower than the second threshold voltage and Vg1 is set to 0 V that is equal to or lower than the first threshold voltage, Is2s1 is blocked in both directions. However, when Vg1 is 2V to 5V that is equal to or higher than the first threshold voltage, Is2s1 does not flow when Vs2s1 is less than 1.5V, but Is2s1 flows when Vs2s1 becomes 1.5V or higher. That is, a reverse blocking state is reached in which current flows only from the second ohmic electrode 11B to the first ohmic electrode 11A, and no current flows from the first ohmic electrode 11A to the second ohmic electrode 11B. When Vg1 is set to 0 V and Vg2 is changed, as shown in FIG. 3C, a current flows only from the first ohmic electrode 11A to the second ohmic electrode 11B, and the second ohmic electrode A reverse blocking state in which no current flows from 11B to the first ohmic electrode 11A is obtained.

  As described above, the bidirectional switch 1 has a function of interrupting and energizing the bidirectional current according to the gate bias condition, and can also operate as a diode, and can also switch the direction in which the current of the diode is energized. As described above, the operation can be performed in the four operation modes shown in FIG. 4 according to the ON or OFF condition of the first gate terminal 2 and the second gate terminal 3 of the bidirectional switch 1. That is, when only the first gate terminal 2 is turned on, the first mode operates as a semiconductor in which a bidirectional device and a reverse diode are connected in series from the drain terminal 4 to the source terminal 5; When only the second gate terminal 3 is turned on, the first gate operates as a semiconductor in which a forward diode and an on-state bidirectional device operate in series from the drain terminal 4 to the source terminal 5. When the terminal 2 and the second gate terminal 3 are turned on, the third mode operates so as to conduct in a bidirectional manner without a diode between the drain terminal 4 and the source terminal 5, the first gate terminal 2 and the first gate terminal 3. When the two-gate terminal 3 is turned off, it has a fourth mode in which current is cut off in both forward and reverse directions. This structure is similar to a JFET, but operates on a completely different operating principle from a JFET that performs carrier modulation in a channel region by a gate electric field in that carrier injection is intentionally performed. Specifically, it operates as a JFET up to a gate voltage of 3V. However, when a gate voltage of 3V or more exceeding the built-in potential of the pn junction is applied, holes are injected into the gate, and the current flows through the mechanism described above. Increases, and a large current and low on-resistance operation becomes possible.

  In the bidirectional switch 1, the first gate electrode 13A is formed on the first p-type semiconductor layer 12A having p-type conductivity, and the second gate electrode 13B has p-type conductivity. It is formed on the second p-type semiconductor layer 12B. For this reason, a forward bias is applied from the first gate electrode 13A and the second gate electrode 13B to the channel region generated in the interface region between the first semiconductor layer and the second semiconductor layer. Thus, holes can be injected into the channel region. In a nitride semiconductor, the mobility of holes is much lower than the mobility of electrons, so that holes injected into the channel region hardly contribute as carriers for passing current. For this reason, holes injected from the first gate electrode 13A and the second gate electrode 13B generate the same amount of electrons in the channel region, so that the effect of generating electrons in the channel region is increased, and the donor is increased. It functions like an ion. That is, since the carrier concentration can be modulated in the channel region, it is possible to realize a normally-off type nitride semiconductor layer bidirectional switch with a large operating current.

  Next, a single-phase inverter 17 using the bidirectional switch 1 will be described with reference to FIG. As shown in the figure, the single-phase inverter 17 is connected in series as a high-side switch 1a and 1c connected to the high-potential side of the bidirectional switch 1 shown in FIGS. 1 and 2 and a low-side switch 1b and 1d connected to the low-voltage side. Half-bridge circuits 18a and 18b connected to each other.

  Further, a holding circuit 19a to 19d is provided so that the first gate terminals 2a to 2d of the bidirectional switch 1 are always turned on, and a microprocessor as a control means for PWM modulating the second gate terminals 3a to 3d. 20 is provided. Moreover, the control power supply 21 for driving the second gate terminals 3a to 3d is provided. A single-phase motor is connected to the intermediate connection points 18c and 18d of the half bridge circuits 18a and 18b, for example, as a load. Further, in the case of a three-phase inverter provided with one half-bridge circuit 18 (not shown), a three-phase motor is connected. Further, holding circuits 19a to 19d having parallel circuits of constant voltage diodes 22a to 22d and capacitors 23a to 23d will be described. The power to the holding circuits 19a and 19c of the high-side switches 1a and 1c is supplied from capacitors 24a and 24b as power storage units that store the driving power of the second gate terminals 3a and 3c of the high-side switches 1a and 1c. Is arranged.

  Next, the power supply of the holding circuits 19a to 19d and the charging of the capacitors 24a and 24b for turning on the second gate terminals 3a and 3c of the high-side switches 1a and 1c will be described with reference to FIG. FIG. 6 shows a period in which the low-side switch 1b and the high-side switch 1c are turned on. Of the high-side switches 1a and 1c and the low-side switches 1b and 1d, the period in which the low-side switch 1d is turned on is symmetrical. Detailed description will be omitted. When the second gate terminal 3b of the low side switch 1b is turned on, the low side switch 1b can flow a current from the intermediate connection point 18c to the GND side. At this time, the potential of the intermediate connection point 18c is substantially equal to the GND potential, and accordingly, the resistor 25a serving as a charge limiting unit that restricts the supply of power from the control power supply 21 and the backflow preventing diode serving as a backflow preventing unit. The capacitor 24a is charged via 26a. On the other hand, the capacitor 23b for turning on the first gate terminal 2b of the low-side switch 1b similarly has the potential of the intermediate connection point 18c substantially equal to the GND potential, so that the charging current ib is supplied with power from the control power source 21. A resistor 25a serving as a limiting charging unit, a backflow preventing diode 26a serving as a backflow preventing unit, a resistor 25c serving as a limiting unit limiting the current to the capacitor 23a, and a backflow preventing diode 26f serving as a third backflow preventing unit. The capacitor 23b is charged via the via. The power supply to the holding circuit 19c of the high side switch 1c is because the potential of the intermediate connection point becomes Vdc when the high side switch 1c is turned on, and the potential of the capacitor 24b is added to the potential. The capacitor 24b is charged via a resistor 25d and the capacitor 23c is charged via a backflow prevention diode 26g as a second backflow prevention unit for preventing backflow from the capacitor 24b to the capacitor 24b as a power storage unit for storing the driving power of the second gate terminal 3c. The current ic is charged in the capacitor 24c. Further, the driving power for the second gate terminals 3 b and 3 d of the low-side switches 1 b and 1 d is configured to be constantly supplied from the control power supply 21.

  As described above, in the gate drive circuit for driving the bidirectional switch 1, the gate signal for driving the two gate terminals of the bidirectional switch 1 can be the only signal, and the ON signal can be held. Therefore, the bidirectional switch 1 can be driven with a simple configuration without requiring a special signal output from the microprocessor 20 according to the period and phase.

  In addition, since the holding circuits 19a to 19d are formed by the combination of the constant voltage diodes 22a to 22d and the capacitors 23a to 23d, it is a general-purpose component configuration and a combination of passive components, and an external signal is not required. The bidirectional switch 1 can be driven.

  Furthermore, a holding circuit 19a for the first gate terminals 2a and 2c of the high-side switches 1a and 1c is provided from the capacitors 24a and 24b as power storage units for storing the driving power of the second gate terminals 3a and 3c of the high-side switches 1a and 1c. , 19c is configured to supply power to the holding circuits 19a, 19c of the high-side switches 1a, 1c, which normally require a higher voltage than the high potential side voltage, It is cheaper and the entire apparatus can be reduced in size and weight.

  In addition, the driving power for the first gate terminals 2a to 2d and the second gate terminals 3a to 3d of the high side switches 1a and 1c and the low side switches 1b and 1d can be supplied from a single power source, thereby saving space. Thus, the entire apparatus can be reduced in size and weight.

  Although the constant voltage diodes 22a to 22d are used to hold the voltages of the holding circuits 19a to 19d, other methods such as using a shunt regulator may be used.

  Further, although a dedicated IC for driving the upper / lower switch is used as the gate driving IC, there is no difference in operation and effect even when other parts such as discrete parts are generated in combination.

(Embodiment 2)
Hereinafter, the second embodiment will be described with reference to FIG.

  In addition, what has the same function as Embodiment 1 attaches | subjects the same code | symbol, and abbreviate | omits detailed description.

  As shown in FIG. 7, a resistor 25e is inserted between the resistor 25c and the backflow prevention diode 26d. In the single-phase inverter 17 and the three-phase inverter, the upper and lower bidirectional switches 1 are often not PWM-controlled. In particular, the low-side switches 1b and 1d (another bidirectional switch 1 for three-phase) are matched to the load phase. For example, a control method such as turning on 120 degrees is adopted. For example, since the second gate terminals 3a and 3c of the high-side switches 1a and 1c cannot be turned on for a time of one third of the frequency, the holding circuit for the first gate terminals 2a and 2c of the high-side switches 1a and 1c. The power supply to 19a and 19c will be interrupted. Conversely, the second gate terminals 3b and 3d of the low-side switches 1b and 1d are not turned on during the two-thirds of the time, so that the holding circuits 19b and 19d of the first gate terminals 2b and 2d of the low-side switches 1b and 1d are I can't charge. Therefore, the charging frequency is relatively low in the holding circuits 19b and 19d of the first gate terminals 2b and 2d of the low-side switches 1b and 1d. Therefore, it is necessary to lower the charge limit level and increase the capacitance of the capacitors 23b and 23d with respect to the capacitance of the capacitors 23a and 23c so that the voltage of the capacitors 23b and 23d does not decrease. That is, in order to tighten the limit values of the holding circuits 19a and 19c on the high side switches 1a and 1c, the resistor 25e is inserted after branching to the low side switches 1b and 1d, and the capacitances of the capacitors 23b and 23d are changed to the capacitor 23a. , 23c (for example, supplying power for constant driving to the holding circuit of the first gate terminals 2a to 2d, or turning off the second gate terminals 3a to 3d of the high-side switches 1a and 1c) 10Ω as a resistance value for keeping the first gate terminals 2a and 2c in the ON state during this period, the capacitances of the capacitors 23b and 23d are set to 47 μF, and the capacitances of the capacitors 23a and 23c are set to 22 μF. The capacitances of the capacitors 24a and 24b of the second gate terminals 3a and 3c of the high-side switches 1a and 1c drive the first gate terminals 2a and 2c and the second gate terminals 3a and 3c of the high-side switches 1a and 1c. Therefore, it is set to 100 μF or the like.

  As described above, it is possible to limit the capacity according to the capacitance of the capacitors 23a to 23d of the holding circuits 19a to 19d and the modulation method of the high side switches 1a and 1c and the low side switches 1b and 1d. ) Can be restricted according to the application.

  Even if the power supply cycle to the holding circuits 19a to 19d and the power supply cycle to the capacitors 24a and 24c of the second gate terminals 3a and 3c of the high-side switches 1a and 1c are different, the power corresponding to the cycle Accumulation can be possible.

  The present invention can be applied to a gate drive circuit of a converter device with high efficiency and low cost as a power conversion circuit using a bidirectional switch having four states by controlling the gate signal.

Configuration diagram of bidirectional switch according to Embodiment 1 of the present invention Equivalent circuit diagram of the bidirectional switch Correlation diagram of voltage and current of the bidirectional switch Diagram showing the operation mode of the bidirectional switch Configuration diagram of the same single-phase inverter Operation explanatory diagram of the gate drive circuit Configuration diagram of single-phase inverter according to Embodiment 2 of the present invention The figure which shows the gate drive circuit in the conventional patent document 1

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Bidirectional switch 1a High side switch 1b Low side switch 1c High side switch 1d Low side switch 2 1st gate terminal 2a-2d 1st gate terminal 3 2nd gate terminal 3a-3d 2nd gate terminal 4 Drain terminal 5 Source terminal 6 Substrate 7 buffer layer 8 semiconductor layer stack 9 GaN layer 10 AlGaN layer 11A first ohmic electrode 11B second ohmic electrode 12A first p-type semiconductor layer 12B second p-type semiconductor layer 13A first gate electrode 13B first 2 gate electrode 14 protective film 15 first transistor 16 second transistor 17 single phase inverter 18a, 18b half bridge circuit 18c, 18d intermediate connection point 19a-19d holding circuit 20 microprocessor 21 control power supply 22a-22d constant voltage diode De 23a~23d capacitor 24a~24b capacitor 25a~25e resistance 26a~26h blocking diode

Claims (20)

A semiconductor layer stack having a channel formed on a substrate; a first ohmic electrode and a second ohmic electrode formed on the semiconductor layer stack spaced apart from each other; and the first ohmic electrode. A first gate electrode, a second gate electrode, and the semiconductor layer stack and the first gate electrode, which are sequentially formed from the first ohmic electrode side between the electrode and the second ohmic electrode; And a first p-type semiconductor layer formed between the semiconductor layer stack and the second gate electrode, and the first ohmic contact. A first gate terminal for inputting a gate drive signal between an electrode and the first gate electrode; and a second gate for inputting a gate drive signal between the second ohmic electrode and the second gate electrode A terminal and the first ohmic A drain terminal connected to the electrode and a source terminal connected to the second ohmic electrode, and when only the first gate terminal is turned on, the bidirectional state is turned on between the drain terminal and the source terminal A first mode in which a device and a reverse diode operate as a semiconductor connected in series, when only the second gate terminal is turned on, a forward diode and an on-state bidirectional device from the drain terminal to the source terminal A second mode that operates as a semiconductor connected in series, and when the first gate terminal and the second gate terminal are turned on, the second mode operates to conduct in both directions without a diode between the drain terminal and the source terminal. When the three-mode, the first gate terminal and the second gate terminal are turned off, the current is cut off in both forward and reverse directions. A half-bridge circuit is formed by connecting a bidirectional switch having a mode in series as a high-side switch connected to the high-potential side and a low-side switch connected to the low-voltage side, and this half-bridge circuit is arranged in parallel A gate driving circuit for the bidirectional switch of a single-phase or three-phase inverter, wherein the first gate terminal includes a holding circuit for holding an on-voltage so that the first-gate terminal is always on. . 2. The gate drive circuit according to claim 1, wherein the holding circuit includes a parallel circuit of a constant voltage diode and a capacitor. 3. The gate driving circuit according to claim 1, wherein power to the holding circuit of the high side switch is supplied from a power storage unit that stores driving power of the second gate terminal of the high side switch. 4. The gate driving circuit according to claim 1, wherein power to the holding circuit of the high side switch is supplied during a period in which the second gate terminal of the high side switch is turned on. 5. The gate drive circuit according to claim 1, wherein power to the holding circuit of the low side switch is directly supplied from a control power source converted from an AC power source. 6. The gate drive circuit according to claim 1, wherein power to the holding circuit of the low side switch is supplied during a period in which the second gate terminal of the low side switch is turned on. The gate drive circuit according to claim 1, wherein drive power for the second gate terminal of the low-side switch is constantly supplied. 8. The gate driving circuit according to claim 1, wherein the driving power of the second gate terminal of the high side switch is supplied when the second gate terminal of the low side switch is in an ON state. The gate drive circuit according to claim 1, further comprising a limiting unit that limits power supply to the holding circuit. The gate driving circuit according to claim 1, wherein the limiting parts of the high-side switch and the low-side switch have different limiting values. 11. The gate drive circuit according to claim 3, wherein the storage capacitors of the power storage unit of the holding circuit and the power storage unit of the second gate terminal of the high-side switch are different from each other. The gate drive circuit according to claim 9, wherein the limiter is limited by a resistance. The gate driving circuit according to claim 10, wherein the limiting unit is a limiting value capable of supplying power for constantly turning on the first gate terminal. 12. The power storage unit of the holding circuit of the high side switch is a storage capacitor capable of holding the first gate terminal of the high side switch in an on state during the off period of the high side switch. 14. The gate drive circuit according to any one of. 15. The storage capacitor of the low-side switch holding circuit is a storage capacitor capable of holding the first gate terminal of the low-side switch in an ON state during an OFF period of the low-side switch. A gate drive circuit according to claim 1. The storage capacity of the power storage unit of the second gate terminal of the high-side switch is at least the storage capacity necessary for always turning on the first gate terminal of the high-side switch and driving the second gate terminal. The gate drive circuit according to claim 3. 17. The gate drive circuit according to claim 3, further comprising a charge limiting unit that limits power supply to the power storage unit of the second gate terminal of the high-side switch. 18. The gate drive circuit according to claim 3, further comprising a backflow prevention unit that prevents backflow of current from the power storage unit of the second gate terminal of the high-side switch to the control power source. The second backflow prevention unit for preventing the backflow of current from the holding circuit of the high side switch to the power storage unit of the second gate terminal of the high side switch is provided. The gate drive circuit described. The gate drive circuit according to any one of claims 3 to 19, further comprising a third backflow prevention unit that prevents backflow of current from the low-side switch holding circuit to the control power supply.

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