JP2010041196A - Sound output circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a sound output circuit capable of being used for a single-ended system and a BTL (Bridged Transless) system with a relatively simple circuit structure. <P>SOLUTION: The sound output circuit is provided with: first and second power amplifiers which drive a first and a second speakers in the case of the single-ended system and drive a common speaker in the case of the BTL system; a first connection terminal used to connect the first speaker or the common speaker; a second connection terminal used to connect the second speaker or the common speaker; a first load impedance detection circuit to which voltage of the first connection terminal and first detected threshold voltage are inputted; a second load impedance detection circuit to which voltage of the second connection terminal and prescribed voltage are inputted; and a reference switch circuit for switching to supply the second load impedance detection circuit with the second detected threshold voltage as the prescribed voltage or voltage equivalent to a sum of the voltage of the first connection terminal and the second detected threshold voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an audio output circuit.

  A BTL (Bridge Tied Load) method is widely used as a method for connecting a speaker and a power amplifier. In the BTL system, two outputs of a stereo amplifier are connected to one speaker, and the stereo amplifier is used as a monaural amplifier. As a connection method between the speaker and the power amplifier, a single end method is widely known.

  There are categories of power amplifiers, such as class A power amplifiers, class B power amplifiers, class AB power amplifiers, class D power amplifiers, and the like. In recent years, particularly in connection with a class D power amplifier, a method of switching between a single-ended method and a BTL method for the purpose of selecting an external component or high power has attracted attention.

  By the way, when the speaker and the power amplifier are connected, an erroneous connection of the power amplifier or a failure during assembly of the speaker may occur. Examples of erroneous connection include a power fault that erroneously brings the output of the power amplifier into contact with the battery terminal, a ground fault that mistakenly contacts the output of the power amplifier with the ground terminal, and the like. Examples of defective assembly include a short circuit in the speaker and an open speaker. In order to avoid such erroneous connection and assembly failure, the power amplifier generally has a self-diagnosis function for diagnosing its own output state. Hereinafter, among the self-diagnosis functions, a function for detecting a short state or an open state will be mentioned.

  In order to diagnose whether the connection is short-circuited or whether the connection is open, it is necessary to measure the impedance of the speaker. However, the mainstream of the power amplifier is the BTL system, and the load impedance detection circuit added to the power amplifier is also the BTL system. Therefore, when switching between the single-end method and the BTL method, the impedance in the case of the single-end method cannot be measured in many cases.

  In order to cope with both the single-end method and the BTL method, it is necessary to provide both a load impedance detection circuit for the single-end method and a load impedance detection circuit for the BTL method on the chip for the power amplifier. However, this results in a significant increase in chip area.

Patent Document 1 discloses a BTL amplifier circuit having a first amplifier circuit having first and second power detection circuits, and a second amplifier circuit having third and fourth power detection circuits; An example of a power amplifying apparatus including a first comparator that compares output values of the first and fourth power detection circuits and a second comparator that compares output values of the second and third power detection circuits. Is described.
JP 2008-92293 A

  An object of the present invention is to realize an audio output circuit capable of dealing with a single-end system and a BTL system with a relatively simple circuit configuration.

  One aspect of the present invention includes, for example, first and second power amplifiers that drive the first and second speakers, respectively, in the case of the single-end system, and that drive a common speaker in the case of the BTL system, A first connection terminal connected to an output terminal of the first power amplifier, and used to connect the first speaker or the common speaker in a single-ended system or a BTL system, respectively; A second connection terminal used for connecting the second speaker or the common speaker by a single-end method or a BTL method, respectively, A first measurement current supply circuit connected between an output terminal of the power amplifier and the first connection terminal; an output terminal of the second power amplifier; and the second connection. A second measurement current supply circuit connected between the first connection terminal, a first input terminal to which a voltage of the first connection terminal is input, and a second to which a first detection threshold voltage is input. A first load impedance detection circuit having an input terminal; a first input terminal to which a voltage of the second connection terminal is input; a second detection threshold voltage; or a voltage of the first connection terminal. A second load impedance detection circuit having a second input terminal to which a voltage corresponding to the sum of the second detection threshold voltage and the second input terminal of the second load impedance detection circuit is input; A reference switching circuit for switching whether to supply the second detection threshold voltage or to supply a voltage corresponding to the sum of the voltage of the first connection terminal and the second detection threshold voltage; And a second clamp voltage to generate a single error A clamp voltage generation circuit that sets a voltage difference between the first clamp voltage and the second clamp voltage to different values in the case of the BTL method and the case of the BTL method, and the first clamp voltage are supplied. A first clamp circuit that clamps a voltage at the first connection terminal; and an input unit connected to the output terminal of the first power amplifier. And a second clamp circuit that clamps a voltage of the second connection terminal, the input section being supplied and an output section connected to the output terminal of the second power amplifier. Is an audio output circuit.

  Other aspects of the invention include, for example, first and second power amplifiers that drive the first and second speakers, respectively, in the case of the single-end system, and drive a common speaker in the case of the BTL system, A first connection terminal connected to an output terminal of the first power amplifier, and used to connect the first speaker or the common speaker in a single-ended system or a BTL system, respectively; A second connection terminal used for connecting the second speaker or the common speaker by a single-end method or a BTL method, respectively, A first measurement current supply circuit connected between an output terminal of the power amplifier and the first connection terminal; an output terminal of the second power amplifier; and the second connection. A second measurement current supply circuit connected between the first connection terminal, a first input terminal to which a voltage of the first connection terminal is input, and a second to which a first detection threshold voltage is input. A first load impedance detection circuit having an input terminal; a first input terminal to which a voltage of the second connection terminal is input; and a second input terminal to which a second detection threshold voltage is input. A second load impedance detection circuit having a voltage supplied to the second input terminal of the first load impedance detection circuit, or a voltage supplied to the second input terminal of the second load impedance detection circuit. And a reference switching circuit for switching between.

  According to the present invention, it is possible to realize an audio output circuit capable of dealing with a single-end system and a BTL system with a relatively simple circuit configuration.

  Embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a circuit configuration diagram of the audio output circuit 101 of the first embodiment. FIG. 1 shows various circuit blocks for measuring the impedance of a speaker and diagnosing the connection state of the speaker. The audio output circuit 101 in FIG. 1 is configured to be used by switching between a single end system and a BTL system. Here, it is assumed that the audio output circuit 101 of FIG. 1 is composed of one chip.

  The audio output circuit 101 of FIG. 1 includes a first power amplifier 111A, a second power amplifier 111B, a first connection terminal 112A, a second connection terminal 112B, and a first measurement current supply circuit 113A. The second measurement current supply circuit 113B, the first load impedance detection circuit 114A, the second load impedance detection circuit 114B, and the reference switching circuit 115 are provided.

  The first and second power amplifiers 111A and B are amplifiers for driving a speaker, respectively. The first and second power amplifiers 111A and B drive the first and second speakers 201A and 201B, respectively, in the case of the single end system (FIGS. 3 and 6), and are common in the case of the BTL system. The speaker 202 is driven (FIGS. 4 and 7).

  In the case of the BTL method, one of the first and second power amplifiers 111A and B performs in-phase output with respect to the input signal, and the other performs reverse-phase output with respect to the input signal. In the present embodiment, even if the first power amplifier 111A has an in-phase output and the second power amplifier 111B has an anti-phase output, or the first power amplifier 111A has an anti-phase output and the second power amplifier 111B has an in-phase output. I do not care.

  The first and second connection terminals 112A and B are terminals for connecting a speaker, respectively. The first connection terminal 112A is connected to the output terminal (A) of the first power amplifier 111A, and is used to connect the first speaker 201A or the common speaker 202 by the single end system or the BTL system, respectively. (FIGS. 3, 4, 6, and 7). On the other hand, the second connection terminal 112B is connected to the output terminal (B) of the second power amplifier 111B to connect the second speaker 201B or the common speaker 202 by the single-end method or the BTL method, respectively. (FIGS. 3, 4, 6, and 7).

  The first and second measurement current supply circuits 113A and 113B are circuits for supplying a direct current for impedance measurement, respectively. The first measurement current supply circuit 113A is connected between the output terminal of the first power amplifier 111A and the first connection terminal 112A. On the other hand, the second measurement current supply circuit 113B is connected between the output terminal of the second power amplifier 111B and the second connection terminal 112B. The direct current for impedance measurement is supplied when the first and second power amplifiers 111A and B are stopped. The rising slope when the DC current is supplied and the falling slope when the DC current is not supplied are controlled so as to be gentle for the purpose of reducing pop noise.

The first and second load impedance detection circuits 114A and B are circuits for detecting the load impedance, respectively. The first load impedance detection circuit 114A has a first input terminal (A ₁ ) to which the voltage V _{A of} the first connection terminal 112A is input and a first detection threshold voltage −Vref-A to be input. 2 input terminals (A ₂ ) and an output terminal (A ₃ ) for outputting the detection result of the load impedance. On the other hand, the second load impedance detection circuit 114B receives the first input terminal (B ₁ ) to which the voltage V _{B of} the second connection terminal 112B is input and the second detection threshold voltage −Vref-B. A second input terminal (B ₂ ) and an output terminal (B ₃ ) for outputting a detection result of the load impedance. The first and second load impedance detection circuits 114A and B operate when the first and second power amplifiers 111A and B are stopped.

Here, the first load impedance detection circuit 114A is a comparator. Thus, the first load impedance detection circuit 114A compares the first input terminal A voltage input to ₁ and a second voltage input to the input terminal A _2, outputs the comparison result of the voltages Output from terminal A ₃ .

Similarly, the second load impedance detection circuit 114B is also a comparator here. The second load impedance detection circuit 114B compares the voltage input to the first input terminal B ₁ with the voltage input to the second input terminal B ₂ , and compares the comparison result of these voltages with the output terminal B. Output from ₃ .

  The reference switching circuit 115 is a circuit that switches a voltage supplied to the second input terminal of the first load impedance detection circuit 114A or a voltage supplied to the second input terminal of the second load impedance detection circuit 114B. That is, the reference switching circuit 115 switches the reference voltage supplied to the first or second load impedance detection circuit 114A or B.

  Note that the value of the first detection threshold voltage -Vref-A and the value of the second detection threshold voltage -Vref-B may be the same value or different values. The value of the first detection threshold voltage −Vref−A is a negative value here, but may be a positive value. Further, the value of the second detection threshold voltage −Vref−B is also a negative value here, but may be a positive value.

  The audio output circuit 101 in FIG. 1 further includes a clamp voltage generation circuit 121, a first clamp circuit 122A, and a second clamp circuit 122B.

The clamp voltage generation circuit 121 is a circuit that generates first and second clamp voltages V _A0 and V _B0 . The first clamp voltage V _A0 is supplied to the first clamp circuit 122A, and the second clamp voltage V _B0 is supplied to the second clamp circuit 122B. The first clamp voltage V _A0 may be supplied as it is to the first clamp circuit 122A, or may be supplied to the first clamp circuit 122A via a voltage source. Similarly, the second clamp voltage V _B0 may be supplied to the second clamp circuit 122B as it is, or may be supplied to the second clamp circuit 122B via a voltage source.

The first clamp circuit 122A supplies a reference voltage for impedance measurement to the voltage V _A of the first connection terminal 112A at the time of BTL diagnosis, or the voltage V _A of the first connection terminal 112A at a voltage higher than a certain voltage at the time of single-end diagnosis Or it is a circuit which clamps so that it may not become below a certain voltage. The first clamp circuit 122A has an input part Ain to which the first clamp voltage V _A0 is supplied and an output part Aout connected to the output terminal of the first power amplifier 111A.

The second clamp circuit 122B is a circuit that clamps the voltage V _{B of} the second connection terminal 112B so that it does not exceed a certain voltage or less than a certain voltage. The second clamp circuit 122B has an input part Bin to which the second clamp voltage V _B0 is supplied and an output part Bout connected to the output terminal of the second power amplifier 111B.

  The audio output circuit 101 in FIG. 1 further includes a control circuit 131.

  The control circuit 131 is a circuit that outputs various control signals. FIG. 1 shows first to fifth control signals as examples of such control signals.

  The first control signal is a signal for controlling ON / OFF of the first measurement current supply circuit 113A. The second control signal is a signal for controlling ON / OFF of the second measurement current supply circuit 113B. The third control signal is a signal for controlling ON / OFF of the first load impedance detection circuit 114A. The fourth control signal is a signal for controlling ON / OFF of the second load impedance detection circuit 114B. The fifth control signal is a signal for switching whether to apply the SE (single end) method or the BTL method. The fifth control signal is supplied to the reference switching circuit 115 and the clamp voltage generation circuit 121 as shown in FIG. The fifth control signal is an example of a switching control signal.

The control circuit 131 has a time constant control terminal T ₁ connected to the time constant circuit, and an SE / BTL terminal T ₂ to which a signal indicating the SE mode or the BTL mode is input.

The time constant control terminal T ₁ is used for reducing pop sounds. Specifically, upon entry into the impedance measurement, control circuit 131, when start charging of constant control terminal T _1, to generate a charging waveform having a gentle inclination based on the time constant circuit. As a result, the potential of the time constant control terminal T ₁ changes from the _first potential V ₁ to the second potential V ₂ . When the potential of the time constant control terminal T ₁ reaches V ₂ , the control circuit 131 outputs a high level signal to the third and fourth control signals that determine the timing for performing impedance measurement. When the timing for finishing the impedance measurement is entered, the control circuit 131 outputs a low level signal to the third and fourth control signals that determine the timing for completing the impedance measurement. Further, the control circuit 131 starts discharging the time constant control terminal T ₁ and generates a gentle discharge waveform having a slope based on the time constant circuit. As a result, the potential of the time constant control terminal T ₁ changes from the _second potential V ₂ to the first potential V ₁ . Then, the control circuit 131 generates first and second control signals reflecting these charge / discharge waveforms, and supplies these control signals to the first and second measurement current supply circuits 113A and B. A bias current having a gentle slope depending on charging / discharging of the time constant control terminal T ₁ is generated. Thereby, the pop sound at the time of speaker connection is reduced.

As described above, the input from the time constant control terminal T ₁ is used for controlling the first to fourth control signals. Further, the input from the SE / BTL terminal T ₂ is used for controlling the first to fifth control signals.

  As described above, in this embodiment, the circuit configuration for the single-end system and the circuit configuration for the BTL system are shared with respect to the circuit configuration for diagnosis. Thereby, the audio output circuit 101 capable of dealing with the single end system and the BTL system is realized with a relatively simple circuit configuration. According to the present embodiment, the audio output circuit 101 capable of dealing with the single-end system and the BTL system can be realized while suppressing an increase in the chip area.

  A more detailed configuration example and operation example of the audio output circuit 101 will be described in the later-described embodiments.

  Hereinafter, the audio output circuit 101 of the second embodiment will be described. The second embodiment is a modification of the first embodiment, and the second embodiment will be described focusing on the differences from the first embodiment. Further, the operation of the audio output circuit 101 in the case of the single end system will be described in the third embodiment, and the operation of the audio output circuit 101 in the case of the BTL system will be described in the fourth embodiment.

(Second embodiment)
FIG. 2 is a circuit configuration diagram of the audio output circuit 101 of the second embodiment.

  The audio output circuit 101 of FIG. 2 includes a first power amplifier 111A, a second power amplifier 111B, a first connection terminal 112A, a second connection terminal 112B, and a first measurement current supply circuit 113A. The second measurement current supply circuit 113B, the first load impedance detection circuit 114A, the second load impedance detection circuit 114B, and the reference switching circuit 115 are provided.

Reference switching circuit 115 of FIG. 2, a switch SW _SE and SW _BTL. Switch SW _SE is connected between the positive terminal and ground of the second detection threshold voltage -Vref-B. The switch SW _BTL is connected between the + terminal of the second detection threshold voltage −Vref−B and the first connection terminal 112A. The reference switching circuit 115 in FIG. 2 can turn on one of these switches and turn off the other.

When the switch SW _SE is ON, the second input terminal B ₂ of the second load impedance detection circuit 114B, a second detection threshold voltage -Vref-B is supplied. Thereby, impedance measurement in the case of a single end system becomes possible (FIG. 3).

On the other hand, when the switch SW _BTL is ON, the voltage V _{A of} the first connection terminal 112A and the second detection threshold voltage −Vref− are connected to the second input terminal B ₂ of the second load impedance detection circuit 114B. A voltage corresponding to the sum of B is supplied. That is, the voltage V _A -Vref-B is supplied. This enables impedance measurement in the case of the BTL method (FIG. 4).

As described above, the reference switching circuit 115 in FIG. 2 supplies the second detection threshold voltage −Vref−B to the second input terminal B ₂ of the second load impedance detection circuit 114B, Whether to supply a voltage corresponding to the sum of the voltage V _A of the connection terminal 112A and the second detection threshold voltage −Vref−B can be switched. Thereby, it is possible to switch between impedance measurement in the case of the single-end method and impedance measurement in the case of the BTL method.

  The function of the reference switching circuit 115 as described above may be realized by a circuit configuration different from the circuit configuration of FIG.

  The audio output circuit 101 of FIG. 2 further includes a clamp voltage generation circuit 121, a first clamp circuit 122A, and a second clamp circuit 122B.

2 includes a voltage source V that supplies a reference voltage Vref, a first switch SW ₁ , a first resistor R ₁ , a current mirror circuit C, and a current source S such as a resistor. The second switch SW ₂ and the second resistor R ₂ are provided. The current mirror circuit C includes a first transistor T ₁ and a second transistor T ₂ . Each of the first and second transistors T ₁ and T ₂ is a bipolar transistor.

These circuit elements are connected as follows. The negative terminal of the voltage source V is connected to the ground. The + terminal of the voltage source V is connected to the first switch SW ₁ . The first resistor R ₁ is connected to the voltage source V via the first switch SW ₁ .

The collector of the first transistor T ₁ is connected to the voltage source V via the first switch SW ₁ and the first resistor R ₁ . The emitter of the first transistor T ₁ is connected to the ground. The base of the first transistor T ₁ is connected to the base and collector of the second transistor T ₂ . Second emitter of the transistor T ₂ are, are connected to ground.

The current source S is connected to the second base and the collector of the transistor T _2. The second switch SW ₂ is connected between the current source S and the power source. The current source S supplies current from the reference potential to the collector of the second transistor T ₂ via the second switch SW ₂ . The second resistor R ₂ is connected between the node N between the first switch SW ₁ and the first resistor R ₁ and the ground. Note that a relationship of R ₁ << R ₂ is established between the first resistor R ₁ and the second resistor R ₂ in this embodiment.

2 shows, the first node N _A and the second node N _B in the clamping voltage generating circuit 121 is shown. The first node N _A is located between the first switch SW ₁ and the first resistor R ₁ . The second node N _B is located between the first resistor R ₁ and the first collector of transistor T _1. The clamp voltage generation circuit 121 supplies the voltage of the first node N _A as the first clamp voltage V _{A0 to} the first clamp circuit 122A, and also supplies the second clamp voltage to the second clamp circuit 122B. as V _B0, it supplies a voltage of the second node N _B.

In the case of the single end system, the clamp voltage generation circuit 121 turns off both the _first and _second switches SW ₁ and SW ₂ (FIG. 3). Accordingly, the voltage and the voltage of the second node N _B of the first node N _A are both zero. As a result, in the case of the single end method, both the first clamp voltage V _A0 and the second clamp voltage V _B0 are zero.

On the other hand, in the case of the BTL method, the clamp voltage generation circuit 121 turns on both the _first and _second switches SW ₁ and SW ₂ (FIG. 4). Accordingly, the voltage of the first node N _A becomes Vref, the voltage of the second node N _B becomes Vref-V _BTL. However, V _BTL is a voltage across the first resistor R ₁ , and Vref> V _BTL > 0 holds. As a result, in the case of the BTL method, the first clamp voltage V _A0 becomes Vref, and the second clamp voltage V _B0 becomes Vref−V _BTL .

As described above, the clamp voltage generation circuit 121 in FIG. 2 sets the first clamp voltage V _A0 and the second clamp voltage V _B0 to the same value in the case of the single end method, and in the case of the BTL method. Set a different value for. Thus, in this embodiment, the voltage difference between the first clamp voltage V _A0 and the second clamp voltage V _B0 can be set to a different value between the single-end method and the BTL method. In the case of the single end method, the voltage difference is 0, and in the case of the BTL method, the voltage difference is V _BTL (> 0). As a result, in the present embodiment, in the case of the BTL method, the voltage difference between the first clamp voltage V _A0 and the second clamp voltage V _B0 can be set to a desired value.

  The function of the clamp voltage generation circuit 121 as described above may be realized by a circuit configuration different from the circuit configuration of FIG.

In the present embodiment, the first clamp circuit 122A includes transistors T _A, the second clamp circuit 122B includes a transistor T _B. Transistors T _A and T _B are bipolar transistors. The bases of the transistors T _A and T _B correspond to the input parts Ain and Bin, respectively. The emitters of the transistors T _A and T _B correspond to the output portions Aout and Bout, respectively. The collectors of the transistors T _A and T _B are connected to a power source.

Further, in this embodiment, the first clamp voltage V _A0 is, n _A number (n _A is an integer of 1 or more) through a diode D _A of, is supplied to the first clamp circuit 122A. Therefore, the voltage obtained by subtracting the voltage drop n _A × Vf of n _A-number of the diode D _A from the first clamp voltage V _A0 is supplied to the input Ain. As a result, for the voltage supplied to the output part Aout, the voltage drop n _A × Vf of the diode D _A and the base-emitter voltage V _{BE of the} transistor T _A are subtracted from the first clamp voltage V _A0 . It is prevented that the voltage becomes lower than the voltage.

Similarly, second clamp voltage V _B0 is, n _B-number (n _B is an integer of 1 or more) through a diode D _B of, is supplied to the second clamp circuit 122B. Therefore, the voltage obtained by subtracting the voltage drop n _B × Vf of n _B-number of the diode D _B of the transistor T _B from the second clamp voltage V _B0 is supplied to the input Bin. Thus, for the voltage supplied to the output unit Bout, the second clamp voltage V _B0, minus the voltage drop across n _B × Vf of the diode D _B, a base-emitter voltage V _BE of the transistor T _B It is prevented that the voltage becomes lower than the voltage.

n _A number of diode D _A is connected in series with each other, provided between the input portion Ain a first node N _A. Further, n _B-number of the diode D _B is connected in series with each other, provided between the second node N _B input unit Bin. Here, n _A and n _B are the same number. In this embodiment, a diode D _A and a diode D _B may be absent provided.

FIG. 8 shows the relationship between the clamp voltages V _A0 and V _B0 and the voltages V _A and V _B of the connection terminals 112A and 112B. FIG. 8A shows these voltages in SE mode. FIG. 8B shows these voltages in the BTL mode. The vertical axis in FIG. 8A represents the voltages V _A and V _B, and the vertical axis in FIG. 8B represents the voltage V _B. In the self-diagnosis of this embodiment, in addition to the diagnosis of an assembly failure by impedance measurement, it is possible to diagnose a faulty connection such as a power fault or a ground fault. In order to avoid erroneous detection, it is necessary to set each detection threshold voltage for impedance measurement so as not to fall within the detection threshold range for erroneous connection diagnosis as shown in FIG.

  The audio output circuit 101 in FIG. 2 further includes a control circuit 131.

  The control circuit 131 shown in FIG. 2 outputs a Bias1 signal, a Bias2 signal, a Diag_run1 signal, a Diag_run2 signal, and a BTL_en signal. The Bias1 signal is a signal corresponding to the first control signal, and controls ON / OFF of the first measurement current supply circuit 113A. The Bias2 signal is a signal corresponding to the second control signal, and controls ON / OFF of the second measurement current supply circuit 113B. The Diag_run1 signal is a signal corresponding to the third control signal, and controls ON / OFF of the first load impedance detection circuit 114A. The Diag_run2 signal is a signal corresponding to the fourth control signal, and controls ON / OFF of the second load impedance detection circuit 114B. The Diag_run2 signal is also supplied to switches provided in the output units Aout and Bout of the clamp circuits 122A and B.

BTL_en signal is a signal corresponding to the fifth control signal is based on the High / Low level SE / BTL terminal T _2. The BTL_en signal is supplied to the switches SW _SE and SW _BTL of the reference switching circuit 115 and the first and second switches SW ₁ and SW ₂ of the clamp voltage generation circuit 121 as shown in FIG.

When the single-end method is applied, the control circuit 131 outputs a BTL_en signal at a low level. Thus, the switch SW _SE in the reference switching circuit 115 is turned ON, the voltage -Vref-B is supplied to the second input terminal B _2. In the clamp voltage generation circuit 121, the first and second switches SW ₁ and SW ₂ are turned OFF, and the first and second clamp voltages V _A0 and V _B0 are both zero.

On the other hand, when the BTL method is applied, the control circuit 131 outputs a high level BTL_en signal. Thus, the switch SW _BTL The reference switching circuit 115 is turned ON, the voltage V _A -Vref-B is supplied to the second input terminal B _2. Further, both turned ON the clamp voltage generating circuit switch SW ₁ in the first and second 121 and SW _2, the first and second clamp voltages V _A0 and V _B0 becomes Vref and Vref-V _BTL respectively.

As described above, the reference switching circuit 115 in FIG. 2 switches the voltage supplied to the _second input terminal B ₂ of the second load impedance detection circuit 114B according to the BTL_en signal. The clamp voltage generation circuit 121 in FIG. 2 controls the voltage difference between the first clamp voltage V _A0 and the second clamp voltage V _B0 according to the BTL_en signal.

  As described above, in this embodiment, the reference switching circuit 115 and the clamp voltage generation circuit 121 can be controlled by the common control signal (BTL_en signal).

(Third embodiment)
FIG. 3 is a circuit configuration diagram of the audio output circuit 101. In the third embodiment, the operation of the audio output circuit 101 in the case of the single end system will be described. The circuit configuration of the audio output circuit 101 in FIG. 3 is the same as the circuit configuration of the audio output circuit 101 in FIG.

  The power amplifiers 111A and B are in a stopped state in advance.

When performing a single-end diagnosis, the control circuit 131 outputs a BTL_en signal at a low level. Thus, the switch SW _SE in the reference switching circuit 115 is turned ON, the voltage -Vref-B is supplied to the second input terminal B _2. In the clamp voltage generation circuit 121, the first and second switches SW ₁ and SW ₂ are turned OFF, and the first and second clamp voltages V _A0 and V _B0 are both 0 (GND level).

When the impedance measurement is started, the control circuit 131 starts charging the time constant control terminal T ₁ . Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly charged from the first potential V1 to the second potential V2. Further, the Bias1 signal and the Bias2 signal obtained by performing VI conversion on the potential corresponding to the potential of the time constant control terminal T ₁ are output to the measurement current supply circuits 113A and 113B. Then, the measurement current supply circuits 113A and 113B supply the first and second DC currents I _A and I _B to the speakers 201A and B via the connection terminals 112A and B, respectively. When the potential of the time constant control terminal T ₁ reaches the second potential V 2, the control circuit 131 sends the high-level Diag_run 1 signal and Diag_run 2 signal (these are the impedance measurement start signals) to the load impedance detection circuit 114 A and Output to B.

At this time, the first load impedance detection circuit 114A compares the voltage V _A of the first connection terminal 112A with the first detection threshold voltage −Vref-A, and outputs a comparison result of these voltages. The comparison result corresponds to the measurement result of the impedance of the first speaker 201A. The measurement start and measurement end of the impedance of the first speaker 201A are controlled by the rise and fall of the Diag_run1 signal.

Similarly, the second load impedance detection circuit 114B compares the voltage V _B of the second connection terminal 112B with the second detection threshold voltage −Vref-B, and outputs a comparison result of these voltages. The comparison result corresponds to the measurement result of the impedance of the second speaker 201B. The measurement start and measurement end of the impedance of the second speaker 201B are controlled by the rise and fall of the Diag_run2 signal.

When the measurement period has elapsed, the control circuit 131, when starts discharging constant control terminal T _1, the Diag_run1 signal and Diag_run2 Low signal level, and outputs to the load impedance detection circuit 114A and B. Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly discharged from the second potential V2 to the first potential V1. Further, reduction of Bias1 signal obtained when corresponding to the potential of the constant control terminal T ₁ potential to convert V-I and Bias2 signal also proceeds slowly. When the time constant control terminal T ₁ reaches the first potential V1, the measurement is completed.

  As described above, in the case of the single end system, the audio output circuit 101 measures the impedance of the first and second speakers 201A and B using the first and second load impedance detection circuits 114A and B. To do. Since the audio output circuit 101 is provided with two measurement current supply circuits 112A and B in addition to the two load impedance detection circuits 114A and B, the impedance of the two speakers 201A and B can be measured simultaneously. it can.

At the time of diagnosis, when the first speaker 201A is not connected to the first connection terminal 112A, if the voltage V _A of the first connection terminal 112A is lowered more than necessary, the first measurement current is supplied. There is a possibility that a high voltage exceeding the operation range of the circuit 112A or a high voltage exceeding the input range of the first load impedance detection circuit 114A may occur. However, in the present embodiment, such a situation is prevented by the first clamp circuit 122A. The same applies to the second speaker 201B and the second clamp circuit 122B. In this embodiment, it is possible to prevent V _A and V _{B from} becoming − (n _A × Vf + V _BE ) and − (n _B × Vf + V _BE ) or less, respectively.

(Fourth embodiment)
FIG. 4 is a circuit configuration diagram of the audio output circuit 101. In the fourth embodiment, the operation of the audio output circuit 101 in the case of the BTL method will be described. The circuit configuration of the audio output circuit 101 in FIG. 4 is the same as the circuit configuration of the audio output circuit 101 in FIG.

  The power amplifiers 111A and B are in a stopped state in advance.

When performing the diagnosis of the BTL method, the control circuit 131 outputs a High level BTL_en signal. As a result, in the reference switching circuit 115, the switch SW _BTL is turned on, and the voltage V _A −Vref−B is supplied to the second input terminal B ₂ of the second load impedance detection circuit 114B. Further, both turned ON the clamp voltage generating circuit switch SW ₁ in the first and second 121 and SW _2, the first and second clamp voltages V _A0 and V _B0 becomes Vref and Vref-V _BTL respectively.

When the impedance measurement is started, the control circuit 131 starts charging the time constant control terminal T ₁ . Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly charged from the first potential V1 to the second potential V2. Furthermore, Bias2 signals obtained when corresponding to the potential of the constant control terminal T ₁ potential to convert V-I is output to the measuring current supply circuit 113B. Then, the measurement current supply circuit 113B supplies the direct current I to the speaker 202 via the connection terminals 112A and 112B. When the potential of the time constant control terminal T ₁ is reaches the second potential V2, the control circuit 131, Diag_run2 High signal level (which is the start signal for impedance measurement) to the load impedance detection circuit 114B. At the time of BTL diagnosis, the Bias1 signal and the Diag_run1 signal are always at a low level, and both the first bias current supply circuit 113A and the first load impedance detection circuit 114A are inactive.

At this time, the second load impedance detection circuit 114B compares the voltage V _{B of} the second connection terminal 112B with the voltage V _A −Vref−B, and outputs a comparison result of these voltages. That is, a comparison result between the voltage V _A -V _B and the voltage Vref-B is output. The comparison result corresponds to the measurement result of the impedance of the speaker 202. The measurement start and measurement end of the impedance of the speaker 202 are controlled by the rise and fall of the Diag_run2 signal.

When the measurement period has elapsed, the control circuit 131, when starts discharging constant control terminal T _1, the Diag_run2 signal of Low level is output to the load impedance detection circuit 114B. Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly discharged from the second potential V2 to the first potential V1. Further, reduction of Bias2 signals obtained when corresponding to the potential of the constant control terminal T ₁ potential to convert V-I also proceed gradually. When the time constant control terminal T ₁ reaches the first potential V1, the measurement is completed.

  Thus, in the case of the BTL method, the audio output circuit 101 measures the impedance of the speaker 202 using the second load impedance detection circuit 114B. In this way, the audio output circuit 101 uses the two connection terminals 112A and B, one of the two measurement current supply circuits 112A and B, and one of the two load impedance detection circuits 114A and B. Thus, diagnosis of the BTL method can be performed. For example, the audio output circuit 101 of FIG. 1 uses the first and second connection terminals 112A and 112B, the first measurement current supply circuit 112A, and the first load impedance detection circuit 114A, and uses the BTL method. It is also possible to realize a circuit configuration that performs the diagnosis.

At the time of diagnosis, the first clamp circuit 122A applies a voltage V _A that serves as a measurement reference. Further, at the time of diagnosis, when the speaker 202 is not connected to the first and second connection terminals 112A and 112B, if the voltage V _B of the second connection terminal 112B is lowered more than necessary, the second measurement is performed. There is a possibility that a high voltage exceeding the operating range of the current supply circuit 112B or a high voltage exceeding the input range of the second load impedance detection circuit 114B may occur. However, in this embodiment, such a situation is prevented by the second clamp circuit 122B. In the present embodiment, V _B is prevented from becoming Vref− (V _BTL + n _B × Vf + V _BE ) or less.

Further, in the present embodiment, for the purpose of avoiding misdiagnosis, the first and second clamp voltages V _A0 and V _B0 are used as the reference voltage Vref, the BTL voltage V _BTL , and the first and second clamp circuits 122A and B, respectively. Etc. are set appropriately.

(5th Example)
FIG. 5 is a circuit configuration diagram of the audio output circuit 101 of the fifth embodiment, which is a modification of FIG.

  The audio output circuit 101 of FIG. 5 includes a first power amplifier 111A, a second power amplifier 111B, a first connection terminal 112A, a second connection terminal 112B, and a first measurement current supply circuit 113A. The second measurement current supply circuit 113B, the first load impedance detection circuit 114A, the second load impedance detection circuit 114B, and the reference switching circuit 115 are provided.

Reference switching circuit 115 of FIG. 5, a switch SW _SE and SW _BTL. Switch SW _SE is the second detection threshold voltage Vref-B - is connected between the terminals and ground. The switch SW _BTL is connected between the negative terminal of the second detection threshold voltage Vref-B and the first connection terminal 112A. The reference switching circuit 115 in FIG. 5 can turn on one of these switches and turn off the other.

When the switch SW _SE is ON, the second input terminal B ₂ of the second load impedance detection circuit 114B, a second detection threshold voltage Vref-B is supplied. Thereby, impedance measurement in the case of a single end system becomes possible (FIG. 6).

On the other hand, when the switch SW _BTL is ON, the second input terminal B ₂ of the second load impedance detection circuit 114B, and the voltage _{V A} of the first connection terminal 112A second detection threshold voltage Vref-B A voltage corresponding to the sum of is supplied. That is, the voltage V _A + Vref−B is supplied. This enables impedance measurement in the case of the BTL method (FIG. 7).

As described above, the reference switching circuit 115 in FIG. 5 supplies the second detection threshold voltage Vref-B to the second input terminal B ₂ of the second load impedance detection circuit 114B or the second connection. Whether to supply a voltage corresponding to the sum of the voltage _VA of the terminal 112A and the second detection threshold voltage Vref-B can be switched. Thereby, it is possible to switch between impedance measurement in the case of the single-end method and impedance measurement in the case of the BTL method.

  Note that the function of the reference switching circuit 115 as described above may be realized by a circuit configuration different from the circuit configuration of FIG.

  The audio output circuit 101 of FIG. 5 further includes a clamp voltage generation circuit 121, a first clamp circuit 122A, and a second clamp circuit 122B.

5 includes a voltage source V that supplies a reference voltage Vref, a first switch SW ₁ , a first resistor R ₁ , a current mirror circuit C, and a current source S such as a resistor. The second switch SW ₂ and the second resistor R ₂ are provided. The current mirror circuit C includes a first transistor T ₁ and a second transistor T ₂ . Each of the first and second transistors T ₁ and T ₂ is a bipolar transistor.

These circuit elements are connected as follows. The negative terminal of the voltage source V is connected to the ground. The + terminal of the voltage source V is connected to the first switch SW ₁ . The first resistor R ₁ is connected to the voltage source V via the first switch SW ₁ .

The collector of the first transistor T ₁ is connected to the voltage source V via the first switch SW ₁ and the first resistor R ₁ . The emitter of the first transistor T ₁ is connected to the reference potential. The base of the first transistor T ₁ is connected to the base and collector of the second transistor T ₂ . Second emitter of the transistor T ₂ are, is connected to a reference potential.

The current source S is connected to the second base and the collector of the transistor T _2. The second switch SW ₂ is connected between the current source S and the ground. The second resistor R ₂ is connected between a node N between the collector of the first transistor T ₁ and the first resistor R ₁ and the ground. Note that a relationship of R ₁ << R ₂ is established between the first resistor R ₁ and the second resistor R ₂ in this embodiment.

FIG. 5 shows a first node N _A and the second node N _B in the clamp voltage generation circuit 121. The first node N _A is located between the first switch SW ₁ and the first resistor R ₁ . The second node N _B is located between the first resistor R ₁ and the first collector of transistor T _1. The clamp voltage generation circuit 121 supplies the voltage of the first node N _A as the first clamp voltage V _{A0 to} the first clamp circuit 122A, and also supplies the second clamp voltage to the second clamp circuit 122B. as V _B0, it supplies a voltage of the second node N _B.

In the case of the single end system, the clamp voltage generation circuit 121 turns off both the _first and _second switches SW ₁ and SW ₂ (FIG. 6). Accordingly, the voltage and the voltage of the second node N _B of the first node N _A are both zero. As a result, in the case of the single end method, both the first clamp voltage V _A0 and the second clamp voltage V _B0 are zero.

On the other hand, in the case of the BTL method, the clamp voltage generation circuit 121 turns on both the _first and _second switches SW ₁ and SW ₂ (FIG. 7). Accordingly, the voltage of the first node N _A becomes Vref, the voltage of the second node N _B becomes Vref + V _BTL. However, V _BTL is a voltage across the first resistor R ₁ . As a result, in the case of the BTL method, the first clamp voltage V _A0 becomes Vref, and the second clamp voltage V _B0 becomes Vref + V _BTL .

As described above, the clamp voltage generation circuit 121 in FIG. 5 sets the first clamp voltage V _A0 and the second clamp voltage V _B0 to the same value in the case of the single end method, and in the case of the BTL method. Set a different value for. Thus, in this embodiment, the voltage difference between the first clamp voltage V _A0 and the second clamp voltage V _B0 can be set to a different value between the single-end method and the BTL method. In the case of the single end method, the voltage difference is 0, and in the case of the BTL method, the voltage difference is V _BTL (> 0). As a result, in the present embodiment, in the case of the BTL method, the voltage difference between the first clamp voltage V _A0 and the second clamp voltage V _B0 can be set to a desired value.

  Note that the function of the clamp voltage generation circuit 121 as described above may be realized by a circuit configuration different from the circuit configuration of FIG.

In the present embodiment, the first clamp circuit 122A includes transistors T _A, the second clamp circuit 122B includes a transistor T _B. Transistors T _A and T _B are bipolar transistors. The bases of the transistors T _A and T _B correspond to the input parts Ain and Bin, respectively. The emitters of the transistors T _A and T _B correspond to the output portions Aout and Bout, respectively. The collectors of the transistors T _A and T _B are connected to a reference potential (≦ 0).

Further, in this embodiment, the first clamp voltage V _A0 is, n _A number (n _A is an integer of 1 or more) through a diode D _A of, is supplied to the first clamp circuit 122A. Therefore, the voltage obtained by adding the voltage drop n _A × Vf of n _A-number of the diode D _A to the first clamp voltage V _A0 is supplied to the input Ain. As a result, for the voltage supplied to the output part Aout, the voltage drop n _A × Vf of the diode D _A and the base-emitter voltage V _{BE of the} transistor T _A are added to the first clamp voltage V _A0 . It is prevented that the voltage becomes higher than the voltage.

Similarly, second clamp voltage V _B0 is, n _B-number (n _B is an integer of 1 or more) through a diode D _B of, is supplied to the second clamp circuit 122B. Therefore, the voltage obtained by adding the voltage drop n _B × Vf of n _B-number of the diode D _B of the transistor T _B to a second clamp voltage V _B0 is supplied to the input Bin. Thus, for the voltage supplied to the output unit Bout, the second clamp voltage V _B0, plus the voltage drop across n _B × Vf of the diode D _B, a base-emitter voltage V _BE of the transistor T _B It is prevented that the voltage becomes higher than the voltage.

n _A number of diode D _A is connected in series with each other, provided between the input portion Ain a first node N _A. Further, n _B-number of the diode D _B is connected in series with each other, provided between the second node N _B input unit Bin. Here, n _A and n _B are the same number. In this embodiment, a diode D _A and a diode D _B may be absent provided.

FIG. 9 shows the relationship between the clamp voltages V _A0 and V _B0 and the voltages V _A and V _B of the connection terminals 112A and 112B. FIG. 9A shows these voltages in SE mode. FIG. 9 shows these voltages in the BTL mode. The vertical axis in FIG. 9A represents the voltages V _A and V _B, and the vertical axis in FIG. 9B represents the voltage V _B. In the self-diagnosis of this embodiment, in addition to the diagnosis of an assembly failure by impedance measurement, it is possible to diagnose a faulty connection such as a power fault or a ground fault. In order to avoid erroneous detection, it is necessary to set each detection threshold voltage for impedance measurement so as not to fall within the detection threshold range for erroneous connection diagnosis as shown in FIG.

  The audio output circuit 101 in FIG. 5 further includes a control circuit 131.

  The control circuit 131 in FIG. 5 outputs a Bias1, Bias2, Diag_run1, Diag_run2, and BTL_en signals. The Bias1 signal is a signal corresponding to the first control signal, and controls ON / OFF of the first measurement current supply circuit 113A. The Bias2 signal is a signal corresponding to the second control signal, and controls ON / OFF of the second measurement current supply circuit 113B. The Diag_run1 signal is a signal corresponding to the third control signal, and controls ON / OFF of the first load impedance detection circuit 114A. The Diag_run2 signal is a signal corresponding to the fourth control signal, and controls ON / OFF of the second load impedance detection circuit 114B. The Diag_run2 signal is also supplied to switches provided in the output units Aout and Bout of the clamp circuits 122A and B.

BTL_en signal is a signal corresponding to the fifth control signal is based on the High / Low level SE / BTL terminal T _2. The BTL_en signal is supplied to the switches SW _SE and SW _BTL of the reference switching circuit 115 and the first and second switches SW ₁ and SW ₂ of the clamp voltage generation circuit 121 as shown in FIG.

When the single-end method is applied, the control circuit 131 outputs a BTL_en signal at a low level. Thus, the switch SW _SE in the reference switching circuit 115 is turned ON, the voltage Vref-B is supplied to the second input terminal B _2. In the clamp voltage generation circuit 121, the first and second switches SW ₁ and SW ₂ are turned OFF, and the first and second clamp voltages V _A0 and V _B0 are both zero.

On the other hand, when the BTL method is applied, the control circuit 131 outputs a high level BTL_en signal. As a result, in the reference switching circuit 115, the switch SW _BTL is turned on, and the voltage V _A + Vref−B is supplied to the second input terminal B ₂ . Further, both turned ON the clamp voltage generating circuit switch SW ₁ in the first and second 121 and SW _2, the first and second clamp voltages V _A0 and V _B0 becomes Vref and Vref + V _BTL respectively.

As described above, the reference switching circuit 115 in FIG. 5 switches the voltage supplied to the _second input terminal A2 of the first load impedance detection circuit 114A according to the BTL_en signal. The clamp voltage generation circuit 121 in FIG. 5 controls the voltage difference between the first clamp voltage V _A0 and the second clamp voltage V _B0 according to the BTL_en signal.

  As described above, in this embodiment, the reference switching circuit 115 and the clamp voltage generation circuit 121 can be controlled by the common control signal (BTL_en signal).

(Sixth embodiment)
FIG. 6 is a circuit configuration diagram of the audio output circuit 101, which is a modification of FIG. In the sixth embodiment, the operation of the audio output circuit 101 in the case of the single end system will be described. The circuit configuration of the audio output circuit 101 in FIG. 6 is the same as the circuit configuration of the audio output circuit 101 in FIG.

  The power amplifiers 111A and B are in a stopped state in advance.

When performing a single-end diagnosis, the control circuit 131 outputs a BTL_en signal at a low level. Thus, the switch SW _SE in the reference switching circuit 115 is turned ON, the voltage Vref-B is supplied to the second input terminal B _2. In the clamp voltage generation circuit 121, the first and second switches SW ₁ and SW ₂ are turned OFF, and the first and second clamp voltages V _A0 and V _B0 are both 0 (GND level).

When the impedance measurement is started, the control circuit 131 starts charging the time constant control terminal T ₁ . Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly charged from the first potential V1 to the second potential V2. Further, the Bias1 signal and the Bias2 signal obtained by performing VI conversion on the potential corresponding to the potential of the time constant control terminal T ₁ are output to the measurement current supply circuits 113A and 113B. The measurement current supply circuits 113A and B supply the first and second DC currents I _A and I _B to the speakers 201A and B via the connection terminals 112A and B, respectively. When the potential of the time constant control terminal T ₁ reaches the second potential V 2, the control circuit 131 sends a high-level Diag_run 1 signal and a Diag_run 2 signal (these are impedance measurement start signals) to the load impedance detection circuit 114 A and Output to B.

At this time, the first load impedance detection circuit 114A compares the voltage V _A of the first connection terminal 112A with the first detection threshold voltage Vref-A, and outputs a comparison result of these voltages. The comparison result corresponds to the measurement result of the impedance of the first speaker 201A. The measurement start and measurement end of the impedance of the first speaker 201A are controlled by the rise and fall of the Diag_run2 signal.

Similarly, the second load impedance detection circuit 114B compares the voltage V _B of the second connection terminal 112B with the second detection threshold voltage Vref-B, and outputs a comparison result of these voltages. The comparison result corresponds to the measurement result of the impedance of the second speaker 201B. The measurement start and measurement end of the impedance of the second speaker 201B are controlled by the rise and fall of the Diag_run1 signal.

When the measurement period has elapsed, the control circuit 131, when to start discharging constant control terminal T _1, the Diag_run1 signal and Diag_run2 Low signal level and outputs the load impedance detecting circuit 114A and B. Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly discharged from the second potential V2 to the first potential V1. Further, reduction of Bias1 signal obtained when corresponding to the potential of the constant control terminal T ₁ potential to convert V-I and Bias2 signal also proceeds slowly. When the time constant control terminal T ₁ reaches the first potential V1, the measurement is completed.

  As described above, in the case of the single end system, the audio output circuit 101 measures the impedance of the first and second speakers 201A and B using the first and second load impedance detection circuits 114A and B. To do. Since the audio output circuit 101 is provided with two measurement current supply circuits 112A and B in addition to the two load impedance detection circuits 114A and B, the impedance of the two speakers 201A and B can be measured simultaneously. it can.

At the time of diagnosis, when the first speaker 201A is not connected to the first connection terminal 112A, if the voltage V _A of the first connection terminal 112A is increased more than necessary, the first measurement current is supplied. There is a possibility that a high voltage exceeding the operation range of the circuit 112A or a high voltage exceeding the input range of the first load impedance detection circuit 114A may occur. However, in the present embodiment, such a situation is prevented by the first clamp circuit 122A. The same applies to the second speaker 201B and the second clamp circuit 122B. In this embodiment, it is possible to prevent V _A and V _B from exceeding (n _A × Vf + V _BE ) and (n _B × Vf + V _BE ), respectively.

(Seventh embodiment)
FIG. 7 is a circuit configuration diagram of the audio output circuit 101, which is a modification of FIG. In the seventh embodiment, the operation of the audio output circuit 101 in the case of the BTL method will be described. The circuit configuration of the audio output circuit 101 in FIG. 7 is the same as the circuit configuration of the audio output circuit 101 in FIG.

  The power amplifiers 111A and B are in a stopped state in advance.

When performing the diagnosis of the BTL method, the control circuit 131 outputs a High level BTL_en signal. As a result, in the reference switching circuit 115, the switch SW _BTL is turned ON, and the voltage V _A + Vref−B is supplied to the second input terminal B ₂ of the second load impedance detection circuit 114B.

Further, both turned ON the clamp voltage generating circuit switch SW ₁ in the first and second 121 and SW _2, the first and second clamp voltages V _A0 and V _B0 becomes Vref and Vref + V _BTL respectively.

When the impedance measurement is started, the control circuit 131 starts charging the time constant control terminal T ₁ . Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly charged from the first potential V1 to the second potential V2. Furthermore, Bias2 signals obtained when corresponding to the potential of the constant control terminal T ₁ potential to convert V-I is output to the measuring current supply circuit 113B. Then, the measurement current supply circuit 113B supplies the direct current I to the speaker 202 via the connection terminals 112A and 112B. When the potential of the time constant control terminal T ₁ is reaches the second potential V2, the control circuit 131, Diag_run2 High signal level (which is the start signal for impedance measurement) to the load impedance detection circuit 114B. At the time of BTL diagnosis, the Bias1 signal and the Diag_run1 signal are always at a low level, and both the first bias current supply circuit 113A and the first load impedance detection circuit 114A are inactive.

At this time, the second load impedance detection circuit 114B compares the voltage V _{B of} the first connection terminal 112B with the voltage V _A + Vref−B, and outputs a comparison result of these voltages. That is, a comparison result between the voltage V _B -V _A and the voltage Vref-B is output. The comparison result corresponds to the measurement result of the impedance of the speaker 202. The measurement start and measurement end of the impedance of the speaker 202 are controlled by the rise and fall of the Diag_run2 signal.

When the measurement period has elapsed, the control circuit 131, when starts discharging constant control terminal T _1, the Diag_run2 signal of Low level is output to the load impedance detection circuit 114B. Since the time constant control terminal T ₁ is connected to the time constant circuit, the time constant control terminal T ₁ is slowly discharged from the second potential V2 to the first potential V1. Further, reduction of Bias2 signals obtained when corresponding to the potential of the constant control terminal T ₁ potential to convert V-I also proceeds slowly. When the time constant control terminal T ₁ reaches the first potential V1, the measurement is completed.

  Thus, in the case of the BTL method, the audio output circuit 101 measures the impedance of the speaker 202 using the second load impedance detection circuit 114B. In this way, the audio output circuit 101 uses the two connection terminals 112A and B, one of the two measurement current supply circuits 112A and B, and one of the two load impedance detection circuits 114A and B. Thus, diagnosis of the BTL method can be performed.

Note that, at the time of diagnosis, the first clamp circuit 122A provides a voltage _VA that serves as a measurement reference. Further, in time of diagnosis, when the speaker 202 is not coupled to the first and second connection terminals 112A and B, when pulled more than necessary voltage V _B of the second connection terminal 112B, the second measurement There is a possibility that a high voltage exceeding the operating range of the current supply circuit 112B or a high voltage exceeding the input range of the second load impedance detection circuit 114B may occur. However, in this embodiment, such a situation is prevented by the second clamp circuit 122B. In this embodiment, V _B is prevented from becoming Vref + (V _BTL + n _B × Vf + V _BE ) or more.

Further, in the present embodiment, for the purpose of avoiding misdiagnosis, the first and second clamp voltages V _A0 and V _B0 are used as the reference voltage Vref, the BTL voltage V _BTL , and the first and second clamp circuits 122A and B, respectively. Etc. are set appropriately.

(Load impedance detection circuit)
Hereinafter, the first and second load impedance detection circuits 114A and B in the first to seventh embodiments will be described in more detail.

  FIG. 10 is a circuit configuration diagram illustrating a configuration example of the first and second load impedance detection circuits 114A and 114B.

The first load impedance detection circuit 114 </ b> A includes a first comparator 301 and a third comparator 303. The first comparator 301 includes a first input terminal (A ₁ ) to which the voltage V _{A of} the first connection terminal 112A is input, and a second input to which the first detection threshold voltage −Vref-A is input. It has an input terminal (A ₂ ) and an output terminal (A ₃ ) for outputting the comparison result of these voltages. The third comparator 303 has a first input terminal (A ₁ ′) to which the voltage V _{A of} the first connection terminal 112A is input and a third input to which the third detection threshold voltage −Vref-A ′ is input. 2 input terminals (A ₂ ′) and an output terminal (A ₃ ′) for outputting a comparison result of these voltages.

The second load impedance detection circuit 114B includes a second comparator 302 and a fourth comparator 304. The second comparator 302 includes a first input terminal (B ₁ ) to which the voltage V _{B of} the second connection terminal 112B is input, and a second input to which the second detection threshold voltage −Vref-B is input. It has an input terminal (B ₂ ) and an output terminal (B ₃ ) that outputs a comparison result of these voltages. The fourth comparator 304 has a first input terminal (B ₁ ′) to which the voltage V _{B of} the first connection terminal 112B is input, and a fourth input to which the fourth detection threshold voltage −Vref−B ′ is input. 2 input terminals (B ₂ ′) and an output terminal (B ₃ ′) for outputting a comparison result of these voltages.

  As described above, each of the first and second load impedance detection circuits 114A and B may include a plurality of comparators.

  The first comparator 301 is provided for diagnosing whether or not the connection of the first speaker 201A is short-circuited. The first detection threshold voltage -Vref-A is set to a value that can diagnose whether or not the connection is in a short circuit state. Similarly, the second comparator 302 is provided for diagnosing whether or not the connection of the second speaker 201B is short-circuited. The second detection threshold voltage -Vref-B is set to a value that can diagnose whether or not the connection is in a short circuit state. Note that one of the first and second comparators 301 and 302 is also used to diagnose whether or not the connection of the speaker 202 is short-circuited.

  The third comparator 303 is provided for diagnosing whether or not the connection of the first speaker 201A is open. The third detection threshold voltage −Vref−A ′ is set to a value that can diagnose whether or not the connection is in an open state. Similarly, the fourth comparator 304 is provided for diagnosing whether or not the connection of the second speaker 201B is open. The fourth detection threshold voltage −Vref−B ′ is set to a value that can diagnose whether or not the connection is in an open state. Note that one of the third and fourth comparators 303 and 304 is also used to diagnose whether or not the connection of the speaker 202 is open.

  The reference switching circuit 115 in FIG. 10 switches the voltage supplied to the second input terminal of the first comparator 301 or the voltage supplied to the second input terminal of the second comparator 302. The reference switching circuit 115 in FIG. 10 further switches the voltage supplied to the second input terminal of the third comparator 303 or the voltage supplied to the second input terminal of the fourth comparator 304.

  As described above, according to the circuit configuration of FIG. 10, both the short state diagnosis and the open state diagnosis can be performed. Further, according to the circuit configuration of FIG. 10, these diagnoses can be executed both in the case of the single end system and in the case of the BTL system.

FIG. 11 is a diagram for explaining a diagnosis method of a short state and an open state. The vertical axis in FIG. 11 indicates the voltage V _A −V _B in the case of the BTL method. FIG. 11 shows the relationship between the voltage V _A -V _B and the diagnosis result on the assumption that the configuration of FIG. 10 is applied to the audio output circuit 101 of FIG.

FIG. 11 shows the voltages Vref-B and Vref-B ′ shown in FIG. The voltage Vref-B is a threshold value for diagnosing whether or not the connection is in a short state. Therefore, when V _A −V _B <Vref−B, it is diagnosed that the connection of the speaker 202 is short-circuited. On the other hand, the voltage Vref-B ′ is a threshold value for diagnosing whether or not the connection is in an open state. Therefore, when V _A −V _B > Vref−B ′, it is diagnosed that the connection of the speaker 202 is open. And, otherwise, i.e., when the _{Vref-B <V A -V B} <Vref-B ' is diagnosed with connected speakers 202 is normal. In the case of the single end method, similarly, it is possible to diagnose a short state and an open state.

  In the case of FIG. 10, if the connection of the speaker 202 is short-circuited, the output of the second comparator 302 is at the high level and the output of the fourth comparator 304 is at the low level. If the connection of the speaker 202 is open, the output of the second comparator 302 is at the low level and the output of the fourth comparator 304 is at the high level. If the connection of the speaker 202 is normal, both the output of the second comparator 302 and the output of the fourth comparator 304 are at the low level. As described above, in the case of FIG. 10, the connection state of the speaker 202 can be diagnosed by the combination of the output of the second comparator 302 and the output of the fourth comparator 304.

  The audio output circuit 101 in FIGS. 1 to 7 can perform simultaneous diagnosis of a maximum of two speakers. In order to enable simultaneous diagnosis of a maximum of 2 × N speakers, N circuit configurations as shown in FIGS. 1 to 7 may be provided in one audio output circuit 101. N is an arbitrary integer of 1 or more.

  As mentioned above, although the example of the specific aspect of this invention was demonstrated by the 1st-7th Example, this invention is not limited to these Examples.

It is a circuit block diagram of the audio | voice output circuit of 1st Example. It is a circuit block diagram of the audio | voice output circuit of 2nd Example. It is a circuit block diagram of the audio | voice output circuit for demonstrating 3rd Example. It is a circuit block diagram of the audio | voice output circuit for demonstrating 4th Example. It is a circuit block diagram of the audio | voice output circuit of 5th Example. It is a circuit block diagram of the audio | voice output circuit for demonstrating 6th Example. It is a circuit block diagram of the audio | voice output circuit for demonstrating 7th Example. It is the figure which showed the relationship between a clamp voltage and the voltage of a connection terminal. It is the figure which showed the relationship between a clamp voltage and the voltage of a connection terminal. It is the figure which showed the structural example of the 1st and 2nd load impedance detection circuit. It is a figure for demonstrating the diagnostic method of a short state and an open state.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Audio | voice output circuit 111A 1st power amplifier 111B 2nd power amplifier 112A 1st connection terminal 112B 2nd connection terminal 113A 1st measurement current supply circuit 113B 2nd measurement current supply circuit 114A 1st load impedance Detection circuit 114B Second load impedance detection circuit 115 Reference switching circuit 121 Clamp voltage generation circuit 122A First clamp circuit 122B Second clamp circuit 131 Control circuit 201A First speaker 201B Second speaker 202 Common speaker 301 First 1 comparator 302 second comparator 303 third comparator 304 fourth comparator

Claims (5)

First and second power amplifiers for driving the first and second speakers, respectively, in the case of the single-end system, and driving a common speaker in the case of the BTL system,
A first connection terminal connected to the output terminal of the first power amplifier, and used to connect the first speaker or the common speaker by a single-ended method or a BTL method, respectively;
A second connection terminal connected to the output terminal of the second power amplifier, and used to connect the second speaker or the common speaker by a single-ended method or a BTL method, respectively;
A first measurement current supply circuit connected between an output terminal of the first power amplifier and the first connection terminal;
A second measurement current supply circuit connected between the output terminal of the second power amplifier and the second connection terminal;
A first load impedance detection circuit having a first input terminal to which a voltage of the first connection terminal is input, and a second input terminal to which a first detection threshold voltage is input;
The first input terminal to which the voltage of the second connection terminal is input and the second detection threshold voltage, or a voltage corresponding to the sum of the voltage of the first connection terminal and the second detection threshold voltage A second load impedance detection circuit having a second input terminal to which
The second detection threshold voltage is supplied to the second input terminal of the second load impedance detection circuit, or corresponds to the sum of the voltage of the first connection terminal and the second detection threshold voltage. A reference switching circuit for switching whether to supply a voltage to be
Clamp voltage generation that generates first and second clamp voltages and sets a voltage difference between the first clamp voltage and the second clamp voltage to different values in the case of the single-end method and the case of the BTL method. Circuit,
A first clamp that clamps the voltage of the first connection terminal, the input section being supplied with the first clamp voltage, and an output section connected to the output terminal of the first power amplifier. Circuit,
A second clamp for clamping the voltage of the second connection terminal, having an input section to which the second clamp voltage is supplied and an output section connected to the output terminal of the second power amplifier And an audio output circuit. The clamp voltage generation circuit includes:
A voltage source;
A first switch connected to the voltage source;
A resistor connected to the voltage source via the first switch;
A first transistor having a collector connected to the voltage source via the first switch and the resistor, an emitter connected to a reference potential or ground, and connected to a base of the first transistor. A current mirror having a second transistor having a different base;
A second switch;
A current source for supplying a current from a reference potential to the collector of the second transistor via the second switch;
The clamp voltage generation circuit includes:
Supplying a voltage at a node between the first switch and the resistor as the first clamp voltage to the first clamp circuit;
The audio output circuit according to claim 1, wherein a voltage of a node between the resistor and the collector is supplied to the second clamp circuit as the second clamp voltage. A first control signal for controlling ON / OFF of the first measurement current supply circuit;
A second control signal for controlling ON / OFF of the second measurement current supply circuit;
A third control signal for controlling ON / OFF of the first load impedance detection circuit;
A fourth control signal for controlling ON / OFF of the second load impedance detection circuit;
A fifth control signal for switching whether to apply a single-ended scheme or a BTL scheme;
And a control circuit for outputting
The reference switching circuit switches a voltage supplied to the second input terminal of the second load impedance detection circuit according to the fifth control signal,
The said clamp voltage generation circuit controls the voltage difference of a said 1st clamp voltage and a said 2nd clamp voltage according to a said 5th control signal, The Claim 1 or 2 characterized by the above-mentioned. Audio output circuit. In the case of the single-ended method, the impedances of the first and second speakers are measured using the first and second load impedance detection circuits,
4. The audio output circuit according to claim 1, wherein, in the case of a BTL method, the impedance of the common speaker is measured using the second load impedance detection circuit. 5. . First and second power amplifiers for driving the first and second speakers, respectively, in the case of the single-end system, and driving a common speaker in the case of the BTL system,
A first connection terminal connected to the output terminal of the first power amplifier, and used to connect the first speaker or the common speaker by a single-ended method or a BTL method, respectively;
A second connection terminal connected to the output terminal of the second power amplifier, and used to connect the second speaker or the common speaker by a single-ended method or a BTL method, respectively;
A first measurement current supply circuit connected between an output terminal of the first power amplifier and the first connection terminal;
A second measurement current supply circuit connected between the output terminal of the second power amplifier and the second connection terminal;
A first load impedance detection circuit having a first input terminal to which a voltage of the first connection terminal is input, and a second input terminal to which a first detection threshold voltage is input;
A second load impedance detection circuit having a first input terminal to which the voltage of the second connection terminal is input, and a second input terminal to which a second detection threshold voltage is input;
A reference switching circuit for switching a voltage supplied to the second input terminal of the first load impedance detection circuit or a voltage supplied to the second input terminal of the second load impedance detection circuit. A featured audio output circuit.

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