JP2010040745A - Semiconductor light-emitting element, silicon laser and methods of manufacturing them, and optoelectric integrated circuit using them - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a silicon laser element that includes, as a basic component, a group-IV semiconductor such as silicon and germanium based thereupon on a substrate of silicon etc., in a method for easy formation using a normal silicon process; and to provide a method of manufacturing the same. <P>SOLUTION: A semiconductor light-emitting element includes a first electrode for implanting electrons, a second electrode for implanting holes, a light-emitting portion electrically connected to the first and second electrodes and emitting light, and a waveguide for transmitting the light from the light-emitting portion, wherein the first electrode, second electrode, and light-emitting portion are made of single-crystal silicon, the light-emitting portion is a silicon extremely thin wire having its surface covered with a silicon dioxide layer, and the light-emitting portion is covered with the waveguide having a higher refractive index than silicon dioxide and also arranged side by side in a light traveling direction at a cycle of λ/2n, where (n) is the effective refractive indexes of insulating films disposed above and below the light-emitting element at a light emission wavelength λ. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a light-emitting element using silicon and an optoelectronic integrated circuit using the same, and in particular, a high-intensity light-emitting diode, a structure array of light-emitting elements suitable as a silicon laser, a light-receiving element, and electrical signal processing The present invention relates to an optoelectronic integrated circuit mixed with a semiconductor integrated circuit performing the above.

  Patent Document 1 describes a structure that can be easily formed on a substrate such as silicon using a normal silicon process and that can obtain a light-emitting element that emits light with high efficiency.

  Patent Document 2 describes a structure for laser oscillation by combining a waveguide type diffraction grating with a pn junction to which a rare earth element is added.

  Japanese Patent Application Laid-Open No. H10-228667 describes a structure for laser oscillation by combining a light emitting diode using silicon and a mirror of a film laminated in a direction perpendicular to the substrate.

  Non-Patent Document 1 describes a transistor laser element in which a laser using a compound semiconductor with high emission efficiency is driven by a bipolar transistor made of the compound semiconductor.

  Non-Patent Document 2 describes that when silicon anodized in a hydrofluoric acid solution is in a porous state, it emits light at room temperature and in the visible light wavelength band.

  Non-Patent Document 3 describes that a light-emitting diode (LED) serving as a light-emitting element could be fabricated by implanting Er ions into a pn junction formed on a Si substrate.

  In Non-Patent Document 4 and Non-Patent Document 5, the above-described quantum size effect and the idea of Er ions were combined, and by injecting Er ions into silicon nanoparticles, light could be emitted with increased efficiency. Are listed.

Non-Patent Document 6 describes a method in which a resonator including a compound semiconductor as a light source, a waveguide, and a mirror is made of silicon.
JP 2007-294628 JP 2004-319668 A JP 2002-536850 A R. Chan, M. Feng, N. Holonyak, Jr., A. James, and G. Walter, Applied Phys. Lett., 2006, 88, pp. 143508-1 143508-3 LT Canham, Applied Physics Letters (Appl. Phys. Lett.), 1990, 57, pp. 1046-1048 S. Coffa, G. Franzo, and F. Priolo, Applied Physics Letters (1996), 69, pp. 2077-2079 F. Iacona, G. Franzo, EC Moreira, and F. Priolo, Journal of Applied Physics (2001), 89, pp. 8354-8356 S. Coffa, IEEE Spectrum, 2005, Oct., pp.44-49 AW Fang, H. Park, R. Jones, O. Cohen, MJ Paniccia, JE Bowers, Photonics Technology Letters, 2006, 18, pp. 1143–1145

  Broadband networks that support the Internet industry employ optical communications. Lasers using compound semiconductors such as III-V and II-VI groups are used for transmission and reception of light in this optical communication.

  Various structures have been proposed for compound semiconductor lasers, but double heterostructures are common. The double hetero structure has a structure in which a compound semiconductor having a small band gap is sandwiched between compound semiconductors having a large band gap using two different types of compound semiconductors. In order to fabricate a double heterostructure, compound semiconductors of conductivity type n-type, undoped i-type, and p-type are continuously epitaxially grown on a substrate and stacked vertically. At that time, it is necessary to pay attention to the band structure of the undoped i-type compound semiconductor sandwiched between them. The band gap is smaller than each of the n-type and p-type compound semiconductors, and the i-type conduction band. It is important that the level is lower than the n-type conduction band level and the i-type valence band level is higher than the p-type valence level. That is, both electrons and holes are confined in the i-type region. Therefore, since electrons and holes are likely to be in the same region, the probability that electrons and holes collide and annihilate increases, and as a result, the luminous efficiency can be increased. In addition, since the refractive index tends to increase as the band gap becomes smaller, light can be obtained by selecting a material in which the refractive index of the i-type compound semiconductor is larger than that of each of the n-type and p-type compound semiconductors. It will be trapped in an i-type compound semiconductor. The confined light efficiently induces recombination of electrons and holes that form an inversion distribution, leading to laser oscillation.

  As described above, a large amount of long-distance information communication is instantaneously performed by optical communication using a compound semiconductor that emits light efficiently. That is, information processing and storage are performed on an LSI based on silicon, and information transmission is performed by a laser based on a compound semiconductor. If silicon can emit light with high efficiency, it is possible to integrate both an electronic device and a light emitting element on a silicon chip, and its industrial value is enormous. Therefore, a great deal of research has been done to make silicon emit light.

  However, it is difficult to emit silicon with high efficiency. This is because silicon has an indirect transition type band structure. The indirect transition type band structure refers to a band structure in which the momentum at which the conduction band energy is the lowest or the momentum at which the energy of the valence band is the lowest is not zero. In the case of silicon, the minimum energy point of the valence band is the Γ point where the momentum becomes 0, but the minimum energy point of the conduction band is not between the Γ point but between the Γ point and the X point, and more specifically. Specifically, if the lattice constant is defined as a and defined as k0 = 0.85 * π / a, (0, 0, ± k0), (0, ± k0, 0), (± k0, 0, 0) Degenerates to 6 points. This is shown in FIG. 1A.

  On the other hand, many compound semiconductors are called direct transition type semiconductors because the conduction band and the valence band both have a minimum energy point at the Γ point.

  Next, the reason why the indirect transition type semiconductor has low luminous efficiency and the direct transition type semiconductor has high luminous efficiency will be described. As described above, in order for the semiconductor element to emit light, electrons and holes collide and disappear, and the energy difference between the two must be extracted as light. At that time, both energy and momentum conservation laws must be satisfied. Electrons have energy levels in the conduction band, and holes have energy levels in the valence band where there are no electrons. The difference between the two becomes the energy of light, and the wavelength varies depending on the energy. Therefore, the energy difference between the conduction band and the valence band, that is, the size of the band gap determines the wavelength of light, that is, the color. In this way, no particular difficulty can be found in the establishment of the law of conservation of energy.

  On the other hand, since the collision phenomenon of electrons and holes is involved in light emission, the momentum must also be preserved. According to quantum mechanics, the rule governing the microscopic world, electrons, holes, and photons (light quanta) are all scattered in the form of waves, but the law of conservation of momentum holds. Momentum is qualitatively a measure that quantifies how quickly particles are blown off during a collision. From the light dispersion relationship (ω = ck, where ω is the angular frequency of the light, c is high speed, k is the momentum of the photon) and energy, it can be seen that the momentum of the photon in the crystal is almost zero. This means that even if there is a phenomenon that the material is bounced off by the collision of light, the effect of scattering the material is very small, which is consistent with our intuition.

  On the other hand, holes have almost no momentum because the minimum point of energy is at the Γ point. However, in silicon, which is an indirect transition type semiconductor, electrons hardly exist at the Γ point and exist at the minimum energy point near the X point, and therefore have a large momentum of k0 = 0.85 * π / a. is doing.

  Therefore, in silicon, the momentum conservation law and the energy conservation law cannot be satisfied at the same time in a process in which electrons and holes simply collide. Therefore, only electron-hole pairs that somehow satisfy the momentum conservation law and the energy conservation law at the same time by absorbing or emitting phonons, which are the quantum of photon oscillation in the crystal, are converted into light. Such a process is not physically absent, but it is a high-order scattering process in which electrons, holes, photons, and phonons collide at the same time. Accordingly, it is known that silicon, which is an indirect transition type semiconductor, has extremely poor luminous efficiency.

  On the other hand, many direct transition type compound semiconductors have both a momentum conservation law and an energy conservation law because the conduction band and the valence band have a minimum energy point at the Γ point. Therefore, the luminous efficiency is high in the compound semiconductor. Non-Patent Document 1 below reports a transistor laser element that drives a laser using a compound semiconductor with high luminous efficiency by a bipolar transistor made of the compound semiconductor.

  As described above, silicon is extremely poor in light emission efficiency in the bulk state, but it is known that the light emission efficiency is increased by setting it to a porous state or a nanoparticle state. For example, in Non-Patent Document 2 below, it has been reported that silicon anodized in a hydrofluoric acid solution emits light at room temperature and in the visible light wavelength band due to the porous state. Although the mechanism has not been fully elucidated, it is thought that the quantum size effect generated due to the presence of silicon confined in a narrow region due to the formation of a porous layer is important. In small silicon, the position of electrons is confined in that region, and the momentum is not fixed due to the uncertainty principle of quantum mechanics, so recombination of electrons and holes is likely to occur. It is thought that.

  As another method using silicon, for example, in Non-Patent Document 3 below, a light emitting diode (LED) serving as a light emitting element can be manufactured by implanting Er ions into a pn junction formed on a Si substrate. It is stated that. When Er ions are implanted into the Si substrate, Er creates an impurity level, and the impurity level is a spatially localized level, so the electrons in the Si conduction band become the impurity level created by the Er ion. When trapped, the momentum effectively becomes zero, and it becomes possible to recombine with holes in the valence band and emit light. Since the light emitted through the Er ions has a wavelength of 1.54 μm, light can be propagated without being absorbed by surrounding silicon. In addition, since the wavelength is such that the loss is reduced when using an existing optical fiber, even if Si-based LEDs using Er ions are put into practical use due to future technological innovation, the existing optical fiber network should be used. Therefore, it is expected that there will be no need for large-scale capital investment.

  Further, as another method using silicon, for example, the following Non-Patent Document 4 and Non-Patent Document 5 described below, Er ions are implanted into silicon nanoparticles by combining the above quantum size effect and the idea of Er ions. It is described that it was possible to emit light with increased efficiency.

  In the above prior art, in order to make silicon emit light, the band structure of the conduction band of silicon is changed to a bulk band structure, and according to the uncertainty principle, the momentum is separated from the point of k0 by the quantum size effect. It has been thought that silicon should be in a porous state or a nanoparticle state. However, for example, when silicon having a structure like a nanoparticle is formed, there is a problem that the surface of the silicon nanoparticle is oxidized and silicon dioxide is formed on the surface because the silicon surface is very easily oxidized. . Since silicon dioxide is an insulator having an extremely large band gap, when silicon dioxide is formed on the surface, there arises a problem that electrons and holes cannot be injected efficiently. Therefore, in the conventional silicon light emitting device, even if high intensity is obtained by photoluminescence, there is a problem that efficiency is extremely lowered by electroluminescence. In addition, when emitting light, the crystallinity of the material that becomes the light-emitting layer is important. However, the structure is a structure in which nanoparticles are formed by CVD (Chemical Vapor Deposition) or anodized and a large number of holes are formed on the surface. Then, there exists a problem that crystallinity worsens compared with a single crystal. If the crystallinity is poor, light emission through the defect level occurs. However, since light emission using defects is inefficient, there is a problem that an element that can withstand practical use such as information communication cannot be manufactured.

  As described above, efforts have been made to make silicon emit light by various techniques such as porous silicon, nanoparticles, and Er doping, but the luminous efficiency has not been high to a practical level.

  We have a first electrode part for injecting electrons, a second electrode part for injecting holes, and a light emitting part electrically connected to the first electrode part and the second electrode part, The light emitting portion has a first surface (upper surface) and a second surface (lower surface) opposite to the first surface, and the surface orientation of the first and second surfaces is (100 ) And the thickness of the light emitting portion in the direction perpendicular to the first and second surfaces is reduced, so that it can be easily formed on a substrate such as silicon using a normal silicon process. It has been reported that a light-emitting element that emits light efficiently can be obtained (Patent Document 1). This is because when electrons are confined in an extremely narrow region typified by an ultrathin single crystal silicon film, even if the electrons in the bulk electronic state are silicon-like substances that do not exist at the Γ point. It can be understood that it cannot effectively move in the vertical direction of the thin film. This qualitatively indicates that the direction perpendicular to the thin film disappears, so that electrons cannot move in the direction perpendicular to the thin film. In other words, it is considered that an indirect transition type semiconductor is effectively changed to a direct transition in the bulk due to the quantum confinement effect (two-dimensional confinement effect) even when the silicon is made extremely thin. The principle of light emission and its verification results are shown below.

  The principle for efficiently illuminating a group IV semiconductor such as silicon or germanium that conforms to it will be described with reference to the drawings.

The wave function Ψ (r) representing the state of electrons in a crystal such as silicon can be expressed as (Equation 1) with a very good approximation.

Where k0 is the momentum giving the valley of the conduction band, r = (x, y, z) represents the position in space, and Φk0 (r) is the valley of the conduction band. Bloch function is given, and ξ (r) represents the envelope function. Φk0 (r) can be expressed as (Equation 2) using the periodic function uk0 (r + a) = uk0 (r) reflecting the periodicity with respect to the unit cell vector a in the crystal.

As is clear from this, it vibrates violently as a function of atomic scale distance. On the other hand, the envelope function ξ (r) represents a component that gradually changes on the atomic scale, and represents the physical shape of the semiconductor and the response to the external field applied from the surroundings. Here, considering the case where Ψ (r) is a wave function in a semiconductor structure having a finite size, which is not necessarily a bulk crystal, a satisfactory expression for ξ (r) is 3) can be led.

Here, ε = ε (k) represents the band structure in the bulk of the conduction band electrons having momentum k, and ε () is obtained by substituting the sum of -i ▽ and momentum k0 for the differential operator into momentum k. k0-i ▽). V = V (r) is the potential felt by the electrons.For example, when an insulator or another type of semiconductor is in contact with the boundary of the semiconductor, a potential barrier is provided and a field effect is applied from the outside. By applying an electric field, the value of V = V (r) can be adjusted. Here, for the sake of simplicity, we focus only on the change of V in the z direction.

Here, in order to facilitate understanding, specifically, assuming, for example, silicon on the (100) plane as a semiconductor, the bulk has a band structure as shown in FIG. 1A as described above. Therefore, the valley of the conduction band existing at (0, 0, ± k0) in the kz direction can be approximated as (Equation 4).

Here, m * t and m * l represent effective masses in the silicon crystal obtained from the curvature of the minor axis and major axis direction of the valley of the conduction band having a spheroid shape. Then, (Equation 3) is expressed as (Equation 5).

By setting the direction parallel to the (100) plane as (x, y), the width as W, the length as L, and the envelope function as (Equation 6), (Equation 5) becomes (Equation 7). ).

Here, ΔE represents the energy in the z direction, and the total energy of electrons measured from the bottom of the conduction band is expressed as (Equation 8).

First, we confirm that (Equation 7) reproduces the bulk electronic state. For that purpose, a solution in a continuous state when V (r) = 0 is obtained. This can be confirmed by assuming that the thickness in the z direction is t, the envelope wave function is (Equation 9), and ΔE is (Equation 10).

That is, the wave function oscillates violently with the wave function continuously spreading throughout the bulk crystal. At this time, it is natural that the quantum mechanical expectation value of the momentum in the z direction becomes (Equation 11) with the momentum operator in the z direction as kz.

In other words, in an indirect transition type semiconductor such as silicon, most of the electrons are moving with a very large momentum because the probability of being far from the Γ point in the momentum space is overwhelmingly high. Is also shown from the top of the formula.

  The basic principle of the present invention is that in the case of an ultra-thin film having a very small thickness t in the z direction, an indirect transition type semiconductor is effectively changed into a direct transition type in the bulk due to the quantum confinement effect. use. Hereinafter, this point will be described in detail.

In order to explain the story concretely and clearly, taking silicon as an example, an insulator with a large band gap such as SiO2 adjacent to the upper and lower sides of the z direction is extremely small in thickness z in the z direction. Also assume that the energy barrier is in contact with a large vacuum or atmosphere. As a system that can be expected to have the same effect, for example, the same effect can be expected if electrons are confined in a narrow region by a field effect or the like. In these cases, the wave function of electrons in silicon becomes zero at the upper and lower interfaces in the z direction. Strictly speaking, there is exudation of a quantum mechanical wave function, but since the energy barrier is large, the exudation becomes exponentially small with respect to the distance in the z direction, and the approximation is zero at the interface. Is almost strictly correct. Therefore, even if the potential V (r) = 0 applied from the outside, the envelope wave function is completely different from the case where t is thick. In fact, the envelope wave function of electrons and holes confined in such a quantum well is n, where n is an index representing the discrete energy level, and n is an even number. (Equation 12) can be solved, and when n = 1, 3, 5,... Is odd, (Equation 13) is obtained, and the value of the energy level is (Equation 12) regardless of whether n is even or odd. 14).

It goes without saying that the lowest energy state is n = 0. In showing the envelope wave function, the origin of the z-axis is set to the center of the thin film silicon, and an interface with a high energy barrier exists at z = ± t / 2. Here, the property of the envelope wave function χ n (z) will be described. When n is 0 or an even number, the wave function is symmetric with respect to the sign change of z and has the property χ n (z) = χ n (−z). This is called parity even. On the other hand, when n is an odd number, it has a property of χ n (z) = − χ n (−z), and the parity is odd.

Since it has a structure reflecting such symmetry, when the contribution to the momentum by the envelope wave function is evaluated, (Equation 15) is obtained.

This is a very common case that if χn (z) is differentiated with respect to the z direction, it will change from the parity originally possessed by χn (z), so if the integral is taken with respect to the z direction, it becomes zero. It shows the nature. That is, since the electrons are strongly bound in the z-axis direction, the envelope wave function becomes a standing wave, and it can be seen that the electrons do not move. This is exponential as the envelope wave function in the bulk state is given by (Equation 9), and is in sharp contrast to the fact that electrons move around the entire bulk crystal with momentum. However, the total wave function considering the existence of the Bloch function is obtained by substituting (Equation 2), (Equation 6), and (Equation 13) or (Equation 14) into (Equation 1). It should be noted that the quantum mechanical expectation of the momentum in the direction becomes (Equation 16).

In other words, as a property of the original semiconductor material, when it is bulk, there is no valley bottom of the conduction band at the Γ point, and there is a valley bottom at (0, 0, ± k0). Reflects. In this way, even though it was a thin film, it seemed that electrons were moving around with a momentum of ± k0, but I noticed that there was a need for caution. That is, for example, in a material having inversion symmetry as a crystal such as silicon, the valley of (0, 0, + k0) and the valley of (0, 0, -k0) are energetically equal and degenerate. It is necessary to pay attention to it. As described above, when quantum mechanical states having energy levels that are generally degenerated are confined in the same region in space, hybridization occurs between these states. In other words, if there are very few energetic couplings between the valleys of (0, 0, + k0) and (0, 0, -k0), the two discrete levels are Form antibonding orbitals. For example, a Coulomb interaction between electrons that are not sufficiently included in the band calculation may work strongly between electrons confined in a narrow region. The interaction between electrons is called electron correlation, and has become a major problem in many transition metal oxides including high-temperature superconductivity. In bulk silicon, the sp orbit of the original silicon atom is not sufficient. Reflecting the fact that it has a large orbit, it has never been a big problem. However, when confined in a very narrow region where the quantum mechanical effect is important, the Coulomb interaction works so strongly that the Coulomb interaction between electrons cannot be ignored. If we take the Coulomb interaction properly and calculate the matrix elements of the Hamiltonian, there is a hybrid that connects the (0, 0, + k0) valley and the (0, 0, -k0) valley. And, if the Hamiltonian is diagonalized, it can be seen that it is split into bond orbitals. This is similar to the process by which hydrogen molecules are formed when two hydrogen atoms are brought close to each other, and the method for evaluating such a system is about 70 years before quantum mechanics was formed by Heitler-London. It was understood from. We noticed for the first time that the formation of bonding states understood by Heitler-London is also important for valley coupling when a group IV semiconductor such as silicon is confined in a narrow region. Also, even if there is no such energy coupling, a standing wave that does not move in the z-axis direction can be constructed from the unitary transformation of the two states. This will be explained more specifically. Since the Bloch state has the property of u-k0 (r) = uk0 (r) due to the inversion symmetry of the crystal, the (0,0, + k0) valley and the (0,0, -k0) valley Bloch wave functions can be expressed as φk0 (r) = uk0 (r) eik0z and φ-k0 (r) = uk0 (r) e-ik0z, respectively. Therefore, it can be understood that attention should be paid to the part of e ± ik0z. In order to construct a new ground state from the sum and difference of these wave functions, it is only necessary to convert (Equation 17) by unitary transformation U.

Therefore, it can be seen that the change of the wave function at the atomic level can be described by two standing wave wave functions of 21 / 2uk0 (r) cos (k0z) and 21 / 2uk0 (r) sin (k0z). The entire wave function can be expressed as (Equation 18) and (Equation 19).

The expected value of the momentum in the z-axis direction in the state of (Expression 18) or (Expression 19) is expressed by (Expression 20) reflecting the fact that it is a standing wave.

That is, it can be seen that electrons do not move at all in the z-axis direction. Note that just changing the base may cause misunderstanding that the expected value of momentum appears to change. Actually, the basis wave functions like (Equation 18) and (Equation 19) are not eigenstates of momentum. That is, the matrix elements of the momentum operator are (Expression 21) using (Expression 18) and (Expression 19), the diagonal matrix element is zero, and the non-diagonal matrix element is a pure imaginary number.

Whether such a basis is physically appropriate depends on the properties of the target system. We assume an ultra-thin single-crystal silicon film, but in such a case, the translational symmetry with respect to the z-axis direction collapses, so the momentum eigenstate uk0 (r) e ± ik0z Rather than using √2, it is more appropriate to use √2uk0 (r) cos (k0z) or √2uk0 (r) sin (k0z), which are standing waves. Conversely, when dealing with the bulk state, it is better to use uk0 (r) e ± ik0z because of the translational symmetry. Also, in the bulk state, electrons with momentum ± k0 move violently in the crystal, and at that time, they are strongly scattered by phonons that are the quantum of lattice vibration in the crystal, and the phase of the wave function Since is changing dynamically, the state of momentum + k0 and the state of momentum -k0 cannot be expected to form a coherent combination. In contrast to this, when electrons are confined in a very narrow region, such as an ultrathin single crystal silicon film, which is thinner than the mean free path l that characterizes scattering, even at room temperature. A sufficient wave derivative can form a standing wave with a fixed phase. Qualitatively, it means that while an electron wave travels through a narrow area at high speed, it becomes a steady wave that fits the size of that area.

  As described above, as described in detail using simple mathematical formulas, when electrons are confined in an extremely narrow region typified by an ultrathin single crystal silicon film, electrons in the conduction band in the bulk electronic state. It can be seen that even if it is a silicon-like substance that does not exist at the Γ point, it does not effectively move in the direction perpendicular to the thin film. This qualitatively indicates that the direction perpendicular to the thin film disappears, so that electrons cannot move in the direction perpendicular to the thin film. In other words, even if the bulk moves in the crystal at high speed, the thin film loses the direction to move in the first place, which means that the electrons have to stop.

  FIG. 1B illustrates this state using a band diagram. Since movement in the z-axis direction is no longer possible, FIG. 1A, which is a bulk band structure, is projected onto the surface of kz = 0, and when a thin film or a field effect is applied, the band structure as shown in FIG. 1B is obtained. Become. The band structure as shown in FIG. 1B is the basis for designing a field effect transistor with silicon, and can be said to be the basis for device physics. Such a system confined in two dimensions is called a two-dimensional electron system. In addition, if an ultrafine line structure such as a nanowire is used instead of a thin film, the dimension can be further reduced and a one-dimensional electron system can be formed.

  Assuming the band structure as shown in FIG. 1B, as described above, in the bulk, the state corresponding to the valley bottom (0, 0, ± k0) in FIG. 1A comes to the Γ point in FIG. 1B. . As described above, the electrons in this state are not moving in the z-axis direction.

  Returning to the basics of such device physics, the idea is that the electron existing at the Γ point in FIG. 1B should recombine efficiently with the hole and be used as a light emitting element. In other words, by confining the electrons, the electrons cannot move freely, so when they collide with a hole with a small momentum because they are also at the Γ point, the momentum and energy conservation laws are broken. It can be released without any problems. As described above, momentum is a measure of how much impact a particle scatters when it collides with another particle. We have realized that if we make an electron immobile by confining it in a small area, the momentum of the electron will be lost. If the momentum of electrons is reduced, it becomes possible to satisfy the law of conservation of momentum at the time of scattering, which was difficult in the conventional method, so that even a group IV semiconductor such as silicon can shine efficiently.

  Based on such an idea, actually, an ultrathin Si film was partially formed on a substrate with a size of 1 cm square, and the photoluminescence measurement results are shown in FIG. 2, FIG. 3, and FIG. 4B. 2 and 4B show the intensity of light emission by photoluminescence. This shows that a very strong emission intensity was observed from the ultra-thin Si film. This intensity is several orders of magnitude greater than light emission due to indirect transition of bulk silicon. In other words, by confining electrons in a narrow region, we believe that a group IV semiconductor such as silicon effectively changes to a direct transition type. FIG. 3 shows the wavelength of the peak of the spectrum obtained during this experiment. From this, it was confirmed that a wavelength larger than the band gap of silicon by the energy indicated by (Equation 14) was obtained. This reflects the fact that the band gap is large as the energy becomes discrete due to the quantum confinement effect, which indicates that the above principle is correct. The result of calculating how much the emission wavelength changes as a result of the increased band gap is shown in FIG. 4A.

  As described above, it is possible to effectively make the valley of energy a Γ point by thinning the silicon.

  As described above, long-distance information communication is performed by optical communication, and a compound semiconductor is used for the optical element for that purpose. Lasers made of compound semiconductors are very efficient, but there are problems that integration is not progressing because they are expensive materials and difficult to control because the materials are composed of a plurality of elements. For example, if the yield when a single laser or light-receiving element is made of a compound semiconductor is 70%, the combination of the two will result in a problem of 50%. Although the term optical integrated circuit (abbreviated as OptoElectronic IC, OEIC) exists, in the case of an optical element using a compound semiconductor, it is difficult to realize OEIC in practice.

  On the other hand, in the case of LSI using silicon, in the case of products with the most advanced microfabrication, there are already over 100 million field-effect transistors (Metal-Insulator-Semiconductor Field-Effect-Transistor). Integrated and mass produced as a product. In other words, in the case of an element using silicon, since a high-quality single crystal silicon substrate is easily available, a plurality of elements can be manufactured with a yield close to 100%. Even if the elements are integrated, it is possible to increase the yield as a chip to an economically realistic level. Therefore, there is a problem of realizing a light-emitting element with high efficiency based on a group IV semiconductor such as silicon and germanium.

  Furthermore, considering the realization of high-speed communication using light, it is necessary to connect a silicon chip or between chips using a waveguide. For this purpose, it is not sufficient to simply emit light as an LED, and it is necessary to produce a laser diode (LD) that is excellent in monochromaticity, straightness and coherence, and capable of modulating intensity and phase at high speed. In order to obtain such an LD, it is necessary to find a structure in which a light source, a waveguide, and a mirror composed of a pn diode or the like can be easily formed using a normal silicon process.

  For example, Patent Document 2 discloses a structure for causing laser oscillation by combining a waveguide type diffraction grating with a pn junction to which a rare earth element is added. This element is characterized by using light emission from a rare earth element. Patent Document 3 discloses a structure for laser oscillation by combining a light emitting diode using silicon and a mirror of a film laminated in a direction perpendicular to the substrate. This element is characterized in that the pn junction of the light emitting part is formed in a direction perpendicular to the substrate. However, as described above, when silicon is used as the main material for the light source, there is a problem that it is difficult to cause laser oscillation because the light emission efficiency is not sufficient.

  Therefore, as a method of forming an LD on a silicon chip, for example, Non-Patent Document 6 discloses a method of making a resonator in which a compound semiconductor as a light source, a waveguide, and a mirror are combined with silicon. This element has a hybrid structure that uses a compound semiconductor as the light source and silicon as the resonator, and the evanescent seepage of light confined in the silicon overlaps with the compound semiconductor that is the gain medium. It is characterized by laser oscillation. However, since this LD has a structure in which a compound semiconductor is bonded on a silicon waveguide, it cannot be manufactured only by a normal silicon process, and it is difficult to reduce the cost because an expensive compound semiconductor material is used. There is a problem.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide silicon or germanium conforming thereto on a substrate such as silicon by a method that can be easily formed using a normal silicon process. And the like, and a manufacturing method thereof.

  Of the inventions disclosed in the present invention, the outline of typical ones will be briefly described as follows.

  A light emitting device according to the present invention includes a first insulating film provided on a semiconductor substrate, such as a silicon dioxide film, and a first electrode for injecting electrons provided on the first insulating film, A second electrode for injecting holes is electrically connected to the first and second electrodes. By applying a voltage to both electrodes, electrons and holes are injected and light is emitted. Each of the light-emitting portions includes a light-emitting portion and a waveguide for transmitting light from the light-emitting portion. The light-emitting portion includes a plurality of ultrafine lines of single crystal silicon whose surface is covered with a second insulating film, such as a silicon dioxide film When a waveguide and a cavity are formed by covering the surface with an insulating film having a higher refractive index than that of the second insulating film, for example, a silicon nitride film, and the emission wavelength from the ultrafine line is λ, When the effective refractive index of the insulating film covering n is n, λ It is a silicon laser characterized in that ultrafine lines are arranged in parallel along the light traveling direction at a period of / 2n.

  The above-described configuration is merely an example, and the present invention can be modified as appropriate without departing from the technical idea. Further, examples of the configuration of the present invention other than the above-described configuration will be clarified from the entire description of the present specification or the drawings.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  According to the present invention, a silicon laser that can be easily formed on a substrate such as silicon using a normal silicon process can be provided at low cost.

  Other effects of the present invention will become apparent from the description of the entire specification.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof is omitted. In addition to the method introduced in this embodiment, it goes without saying that many changes are possible, such as changing the combination of materials and manufacturing processes.

<Example 1>
In the present invention, a silicon laser manufactured by a method that can be easily formed using a normal silicon process and a manufacturing method thereof are disclosed.

Here, FIGS. 5A to 5P are cross-sectional views in the horizontal direction of FIGS. 6A to 6P, respectively. For example, FIG. 5M represents a structure taken along a cross-section AA ′ in FIG. 6M.

  The manufacturing process will be described in the following order.

  First, as shown in FIG. 5A, a silicon substrate 1, a buried oxide (hereinafter abbreviated as “BOX”) 2 and a silicon on insulator (hereinafter abbreviated as “SOI”) layer 3 are stacked as support substrates from the bottom. Prepare an SOI substrate. As shown in FIG. 6A, the SOI 3 is present on the outermost surface when viewed from the top of the substrate. However, when the SOI substrate is thin, the lower substrate may be seen through when actually prototyped. Here, as the single crystal silicon constituting the SOI 3, a substrate having a (100) plane on the surface was used. The initial film thickness of the SOI 3 prototyped in this example before the process was 55 nm. The film thickness of BOX2 was about 1 μm. Since light has a property of gathering where the dielectric constant (refractive index) is large, a structure in which the silicon substrate 1 and the BOX 2 are adjacent to each other has a property that light is easily absorbed by silicon. Therefore, in order to efficiently confine the light emitted from the SOI 3 and facilitate laser oscillation, it is desirable that the thickness of the BOX 2 be thicker. However, when the BOX 3 is thick, there is a problem that the film thickness variation generated in the SOI 3 becomes relatively large. If an SOI substrate with a BOX 2 film thickness of 1 μm or more with little variation is difficult to obtain, it is possible to confine light and oscillate by adding a step of partially removing the silicon substrate 1.

  In addition to this embodiment, silicon having a surface crystal structure of (111) plane is prepared as the plane orientation of the silicon on insulator (SOI) layer 3, and a substrate on which silicon / germanium is epitaxially grown is prepared. There is no problem. In that case, only the silicon dioxide layer is formed by forming the thin film silicon-germanium pattern and then performing the oxidation treatment in the same manner as the oxidation treatment after the thin film silicon pattern formation shown below. The concentration of germanium is increased at the central portion of the thin film pattern, and a single-crystal germanium fine wire can be formed. As a result, light can be emitted with high efficiency as in the case of single crystal silicon.

  Next, after applying the resist, the resist is left only in a desired region by mask exposure by photolithography, and then anisotropic dry etching is performed to form SOI 3 with a mesa shape as shown in FIGS. 5B and 6B. It was processed into. In the figure, for simplicity, only one element is shown, but it goes without saying that many elements are formed on the substrate at the same time. Since the silicon process is used, many devices can be integrated with a high yield.

  Although not shown in the figure, a process of rounding the corners of SOI 3 processed into a mesa shape may be performed by performing isotropic dry etching following the above-described process. By performing the process of rounding the corners in this manner, when the oxidation process is performed in the subsequent process, it is avoided that stress is concentrated only on the edge portion and the oxidation does not proceed. In other words, if the corner rounding process is not performed, the SOI 3 around the corner becomes thicker than the surrounding area. Therefore, when a current is applied, the current concentrates in this region and the luminous efficiency decreases. Problems arise. In this embodiment, it is possible to take measures against this point in advance. In addition to the isotropic dry etching performed in the present embodiment, other manufacturing methods such as high temperature hydrogen annealing and wet etching can also be applied to round the SOI3 corner. . Further, element isolation may be performed by a shallow trench isolation (STI) process or a local oxidation of Si (LOCOS) process instead of processing the SOI 3 into a mesa shape as in the present embodiment.

  Subsequently, in order to protect the surface, the surface of SOI 3 is oxidized to about 15 nm to form silicon dioxide 4 having a thickness of about 30 nm as shown in FIGS. 5C and 6C. Silicon dioxide formed on the back surface was removed by back surface cleaning. The silicon dioxide film 4 serves not only to reduce damage to the substrate caused by ion implantation introduced in the subsequent process, but also to prevent impurities from being released into the atmosphere by the activation heat treatment. The silicon dioxide 4 is not necessarily formed by a thermal oxidation process, and a process of depositing only on the surface using an apparatus such as a chemical vapor deposition (CVD) may be used.

  Next, as shown in FIGS. 5D and 6, after silicon nitride 5 is deposited to a thickness of 100 nm on the entire surface, the resist is left only in a desired region by resist patterning using photolithography. The silicon nitride 5 was processed using anisotropic dry etching to obtain the states shown in FIGS. 5E and 6E. The remaining silicon nitride 5 is used as a mask material for the oxidation process in the next step. Subsequently, after removing silicon dioxide 4 on the surface existing in the opening by a cleaning process and wet etching using hydrofluoric acid, a thin film in which a desired region of SOI 3 is thinned to a predetermined thickness by performing oxidation treatment Silicon 6 was formed, and simultaneously a thermal oxide film 7 was formed on the surface. Here, the oxidation time and temperature were adjusted so that the thickness of the thin film silicon was 21 nm, and the states shown in FIGS. 5F and 6F were obtained. Since the thick unoxidized SOI 3 is 40 nm in the state of FIG. 5F, the thickness ratio between the thick SOI 3 and the thin film silicon 6 is about 2: 1. With such a film thickness ratio, the stress-induced strain on the edge portion of the local oxidation where the film thickness changes abruptly does not matter. Here, the reason why the silicon dioxide 4 on the surface was partially removed before the oxidation was because damage caused to the silicon dioxide 4 through a cleaning process or the like was taken into consideration. This is because if the oxidation process is performed with the damaged film left, silicon is oxidized non-uniformly and the film thickness tends to vary.

  Subsequently, the silicon nitride 5 was removed by a cleaning process and wet etching with hot phosphoric acid to obtain the states shown in FIGS. 5G and 6G. Subsequently, impurities are introduced into the desired region in SOI3 by ion implantation. At that time, by utilizing the film thickness difference between the silicon dioxide 4 and the thermal oxide film 7, impurities are hardly implanted into the thin film silicon 6 below the thermal oxide film 7. This is because, if a high concentration of impurities remains in the light emitting portion, the impurity becomes a non-radiative recombination center and lowers the light emission efficiency. As a result, the impurity concentration of the thin film silicon 6 was about 1 × 10 15 / cm 3.

  In the impurity implantation, first, the resist is left only in a desired region by patterning the resist using photolithography, and then BF2 ions are ion-implanted at an acceleration energy of 15 keV and a dose of 1 × 10 15 / cm 2. A p-type Si electrode 8 was formed in SOI3. Subsequently, after removing the resist, after leaving the resist only in a desired region by resist patterning using photolithography, P ions are ion-implanted at an acceleration energy of 10 keV and a dose of 1 × 10 15 / cm 2. Thus, an n-type Si electrode 9 was formed in the SOI layer 3. By doing so, the state of FIG. 5H and FIG. 6H (1) was obtained. FIG. 6H (a) is a view showing the outermost film as viewed from above, and since it is not known how ions are implanted, what is shown below the silicon dioxide film 4 is shown in FIG. ). Actually, during the manufacturing process, when an inspection was performed using an optical microscope, it was confirmed that the silicon dioxide film 4 was made of glass, so that it could be seen through, and the region into which different impurities were implanted looked slightly different. .

  In this ion implantation step, SOI 3 in the portion where the ions are implanted becomes amorphous, so that the crystallinity is deteriorated. Therefore, although not shown in the figure, it is important that only the surface of the SOI 3 is made amorphous so that crystalline silicon remains in a region where the SOI 3 is adjacent to the BOX 2. If the acceleration voltage for ion implantation is set too high, all of the SOI3 in the ion-implanted region will be made amorphous. The problem of becoming. Under the ion implantation conditions set in this example, crystalline silicon remains in the region adjacent to BOX 2, and crystallinity can be recovered by activation heat treatment after ion implantation. . In order to emit light efficiently, it is extremely important that the single crystallinity is good.

  Subsequently, an activation heat treatment may be performed to activate the impurities and to recover the single crystallinity of the region of the SOI layer 3 damaged by the ion implantation process. However, in this embodiment, in order to simplify the number of processes, a manufacturing process is employed in which the activation process is not performed here and the impurity is activated simultaneously with the oxidation process as shown below. As a result, the number of steps can be reduced, so that the manufacturing cost can be reduced. However, here, there is no problem even if activation and single crystal heat treatment are performed.

  Next, silicon dioxide on the surface and thin film silicon was removed by a cleaning process and wet etching using hydrofluoric acid to obtain the states shown in FIGS. 5I and 6I.

  Further, a resist for electron beam lithography was applied and prebaked at a predetermined temperature to obtain the states shown in FIGS. 5J and 6J. In patterning, the width and height of the fine pattern are important in order to form silicon ultrafine lines in silicon dioxide with good dimensional control in the following silicon pattern oxidation process. On the thick oxide film BOX2, since the oxidation of the silicon pattern proceeds from the interface (bottom surface) between the BOX2 and the silicon pattern, it is preferable that the aspect ratio (height / width) of the silicon pattern is large.

  Here, as shown in FIGS. 5K and 6K, a resist pattern 11 having a width of 40 nm is formed by electron beam lithography, and a thin film silicon pattern 12 having a width of 40 nm is formed using the resist pattern as an etching mask. And it was set as the state of FIG. 6L. Since the thickness of the thin film silicon is 21 nm, the aspect ratio is 0.5 or more, and high controllability and reproducibility can be ensured in a normal oxidation process.

  Further, the resist pattern 11 was formed at an interval such that the interval d between the silicon fine lines was λ (light emission wavelength) / 2n (n is an effective refractive index of the insulating film covering the ultra fine lines). Here, in order to determine d, it is necessary to obtain the refractive index n. The refractive index n is a two-dimensional effective refractive index of the insulating film in a direction perpendicular to the substrate. The emission wavelength is 850 nm, the thickness of the silicon dioxide formed in the oxidation process of the thin film silicon pattern is about 40 nm (the refractive index of silicon dioxide at the emission wavelength is 1.47), and further covers the silicon dioxide, The thickness of the silicon nitride is set to 250 nm (the refractive index of silicon nitride at the emission wavelength is 1.98), and the thickness of the BOX 2 which is the lower layer of the silicon ultrafine line is 1 μm. The two-dimensional effective refractive index n is estimated to be 1.77. As a result, the distance d between the silicon ultrafine lines was found to be 240 nm, and the silicon ultrafine lines were formed at the center of the resist pattern having a width of 40 nm. Therefore, the distance from the adjacent resist pattern was set to 200 nm. In this embodiment, an electron beam is used for lithography, but photolithography, which is the mainstream of semiconductor microfabrication, for example, ArF (light source wavelength λ = 193 nm), EUV (light source wavelength λ = 13.5 nm) that can be expected to be further miniaturized, etc. Can also be used. Further, when it is necessary to change the distance d between the silicon fine lines according to the thickness of the insulating film and the BOX 2 and the emission wavelength λ, it can be easily performed by changing the design of the resist pattern.

  Next, the thin film silicon pattern 12 was oxidized to obtain the states shown in FIGS. 5M and 6M. Here, the conditions for the oxidation are very important. As a result of forming the silicon ultrafine line 14 by adjusting the processing temperature and time of 1000 ° C. or less, which is often used in a normal silicon process, we were able to obtain an ultrafine line having a diameter of about 2 nm. It was confirmed that ultrafine lines having a diameter of 5 nm and 1 nm were obtained by the same process. On the other hand, it was confirmed that when the processing temperature was 1000 ° C. or higher, the oxidation proceeded completely and fine lines could not be obtained. It was also found that when the oxidation was performed down to 800 ° C., ultrafine lines having a diameter of 10 nm or less could not be obtained. In FIG. 6M, for simplification, only about 10 silicon fine lines 14 are shown, but in reality, much more silicon fine lines were formed. More specifically, since the formation region of the thin film silicon pattern was 100 μm, about 100 ÷ 0.24≈420 lines were formed.

  Subsequently, after silicon nitride is deposited on the entire surface, the resist is left only in a desired region by resist patterning using photolithography, and then the silicon nitride is processed using anisotropic dry etching. The state was 5N and FIG. 6N. The silicon nitride film 16 functions as an optical resonator serving as a waveguide / mirror. By adopting a structure in which the silicon nitride film 16 and the silicon dioxide film 13 are placed in the horizontal direction of the silicon ultrafine line 14 which is a light emitting element, light is confined in the waveguide and proceeds while reflecting between the silicon nitride films. . Therefore, the silicon nitride film can function efficiently as a mirror by designing the distance between the silicon ultrafine lines 14 to be 1 / 2n of the light wavelength λ. The lateral width of the silicon nitride film 16 in the direction perpendicular to the waveguide direction was 1 μm. In addition, the said silicon | silicone fine wire 14 has shown the case where the cross section is formed in dot shape (diameter 10nm or less), such as a circle. However, the present invention is not limited to this. For example, the same effect can be obtained even in the case of a planar shape such as a rectangle having a long side in the vertical direction of the silicon substrate I. The silicon nitride film deposition structure of the present embodiment may be a structure in which a step is formed such that a convex portion is formed on the top of the silicon ultrafine line and a concave portion is formed between the silicon ultrafine lines. By forming such a periodic concavo-convex structure, strong light confinement can be performed using the difference in refractive index between the silicon nitride film and the atmosphere in the horizontal direction of the silicon ultrafine line 14. In that case, after depositing the silicon dioxide film 17 on the entire surface in the Al electrode forming step shown below, it is left as an etching mask in a desired region by resist patterning using lithography, and then by wet etching using hydrofluoric acid. If the silicon dioxide on the silicon nitride film is removed, it can be manufactured. Subsequently, by using a CVD apparatus, silicon dioxide 17 was deposited on the surface of the substrate by 1 μm over the entire surface to obtain the state shown in FIGS. 5O and 6O. Subsequently, after leaving the resist only in a desired region by resist patterning using photolithography, an opening 18 is formed in a part of silicon dioxide by wet etching using hydrofluoric acid. The state was 6P.

  Subsequently, after TiN and Al are deposited on the entire surface, the resist is left only in a desired region by resist patterning using photolithography, and then Al is wet using an etching solution containing phosphoric acid, acetic acid, and nitric acid. Etching was performed, and then TiN was wet etched using an etching solution containing ammonia and hydrogen peroxide (hydrogen peroxide solution). As a result, the TiN electrode 19 and the Al electrode 20 were patterned and processed into the states shown in FIGS. 5Q and 6Q. After that, a hydrogen annealing process was performed at a temperature of 400 ° C., and a process for terminating defects generated during the process with hydrogen was performed.

  As described above, when the thickness of the BOX 2 is 1 μm or more, this completes the element formation process. However, if the thickness of the BOX 2 is thinner than about 1 μm, it is necessary to add a process for removing the supporting silicon substrate 1 locally. The process example is disclosed below.

  As shown in FIG. 5R, after depositing a silicon nitride film 21 with a thickness of 100 nm on the back surface, a protective film made of an organic material is applied to the surface (not shown). The resist was left only in a desired region by resist patterning using photolithography, and then the silicon nitride film 21 was patterned by anisotropic etching using dry etching. At this time, in order to locally remove the silicon substrate 1 existing immediately below the silicon nitride film, alignment with the pattern on the front surface was performed, and then photolithography was performed on the back surface side. Such processing is a general method used when creating Micro Electro Mechanical Systems (MEMS) or the like. Thereafter, the opening 22 is formed in a desired portion of the silicon substrate 1 by anisotropic etching using an alkaline etching solution, and then the surface is subjected to organic cleaning using acetone and methanol, whereby the above-described organic protective film ( By removing (not shown), it was processed into the state of FIG. 5S. In FIG. 6S, the position of the back surface opening is also indicated by a dotted line. .

  As in this embodiment, instead of removing a part of the support substrate using anisotropic wet etching, an annealing process or hydrogen in a hydrogen atmosphere, which is a known technique for forming a silicon-on-nothing substrate, is performed. The supporting silicon substrate may be partially removed using a process such as ion implantation.

In this embodiment, the distance between the silicon ultrafine lines is designed to be ½n of the light wavelength λ. However, a plurality of silicon fine lines are densely handled as one group, and the distance between the groups is defined as the light wavelength. After designing and patterning to be ½n of λ, a light emitting element may be formed by performing the same process as described above.

  In addition to this embodiment, a normal silicon process is performed so that fin-shaped thin film silicon having a film thickness of 10 nm or less is formed inside silicon dioxide, and the interval between the plurality of fins is 1 / of the wavelength λ of light. A light emitting element of 2n may be formed.

  When an optical integrated circuit is formed, a desired wiring step is performed thereafter, and a step of connecting the formed silicon laser element and the CMOS integrated circuit formed on the same substrate may be given. Further, when creating a CMOS circuit, the CMOS circuit may be created in advance before producing the silicon laser disclosed in this embodiment. Conversely, a CMOS circuit may be created after a silicon laser device is created. Furthermore, the wiring process disclosed in this embodiment may be performed simultaneously with the wiring process of the CMOS circuit. Needless to say, many variations can be made with respect to the order of the production steps when creating an integrated circuit.

  The fabricated silicon laser oscillated at a design wavelength of about 850 nm and was in a single mode according to spectral analysis. This is because the Si laser according to the present invention has a distributed feed-back structure and selectively enhances the wavelength determined from the periodic structure of the mirror. Since laser light is emitted horizontally with respect to the silicon substrate 1, it has also been demonstrated that it is optimal for applications such as on-chip optical wiring.

<Example 2>
In this embodiment, a structure of a silicon laser using a distributed Bragg reflector (abbreviated as DBR) as a mirror structure and a manufacturing method thereof will be described.

  5A to FIG. 5M and FIG. 7N to FIG. FIGS. 6A to 6M and FIGS. 8N to 8P are schematic views showing the order of the manufacturing steps as viewed from the top of the substrate.

  First, the device is manufactured according to the manufacturing steps similar to those of the first embodiment, that is, the manufacturing steps shown in FIGS. 5A to 5M and FIGS. 6A to 6M. As a result, after forming an ultrafine silicon line and depositing silicon nitride on the entire surface, the resist is left only in a desired region by resist patterning using photolithography, and then anisotropic dry etching is used. Pattern silicon nitride. Thus, the silicon nitride waveguide 16 and the distributed Bragg reflector (DBR) mirror 23 are formed. As a result, the states shown in FIGS. 7N and 8N were obtained. FIG. 7N shows a structure taken along the AA ′ cross section of FIG. 8N. Here, as shown in FIG. 8N, when viewed from above, the DBR mirror 23 was patterned into an island shape. The light travels along the waveguide as in the first embodiment, but is reflected by the DBR mirror 23 disposed on the end face, so that the waveguide 16 and the DBR mirror 23 together function as an optical resonator. The width of the silicon nitride in the DBR mirror 23 was designed to be about 1/4 of the wavelength of light in the silicon nitride. More specifically, the emission wavelength is 850 nm, and the refractive index of silicon nitride is estimated to be 1.98. Therefore, the width of the island is set to 107 nm.

  The space between the silicon nitride islands was designed to be 1/4 of the wavelength of light in the silicon dioxide 17 to be deposited later. More specifically, assuming that the emission wavelength is 850 nm and the refractive index of the portion buried in silicon dioxide is estimated to be 1.47, the spacing between the silicon nitride islands when the emission wavelength is 850 nm. Was 145 nm. The width of the island made of silicon nitride in the direction perpendicular to the waveguide direction was 1 μm. In FIG. 8N, only a few islands made of silicon nitride are shown for simplification, but in reality, 100 islands were formed. The length of the waveguide 16 serving as the resonance length was 100 μm and the width was 1 μm.

  Subsequently, using a CVD apparatus, 1 μm of silicon dioxide 17 was deposited on the entire surface of the substrate to obtain the states shown in FIGS. 7O and 8O. As described above, the space between the islands of silicon nitride in the DBR mirror 23 was filled with silicon dioxide 17.

  Subsequently, after TiN and Al are deposited on the entire surface, the resist is left only in a desired region by resist patterning using photolithography, and then Al is wet using an etching solution containing phosphoric acid, acetic acid, and nitric acid. Etching was performed, and then TiN was wet etched using an etching solution containing ammonia and superwater. As a result, the TiN electrode and the Al electrode were patterned and processed into the states shown in FIGS. 7P and 8P. Thereafter, a hydrogen annealing process was performed at a temperature of 400 ° C., and a process for terminating defects generated during the process with hydrogen was performed. .

  As described above, when the thickness of the BOX 2 is 1 μm or more, this completes the element formation process. However, when the thickness of the BOX 2 is thinner than about 1 μm, a light emitting element can be obtained by adding a step of locally removing the supporting silicon substrate 1 as in the first embodiment.

  In this embodiment, the distance between the silicon ultrafine lines is designed to be ½n of the light wavelength λ, but a plurality of silicon thin lines are densely handled as one group, and the distance between the groups is defined as the light wavelength λ. The light emitting element may be formed by performing the same process as described above after designing and patterning to 1 / 2n.

  6M, for example, the distance between the silicon ultrafine lines is about 1 / 20n of the light wavelength λ, or 1 / 40n if a resist pattern can be formed. It is suitable to obtain a higher-power laser element by designing the same and performing the same process as above to form a waveguide and a DBR mirror.

  In addition to this embodiment, a normal silicon process is performed so that fin-shaped thin film silicon having a film thickness of 10 nm or less is formed inside silicon dioxide, and the interval between the plurality of fins is 1 / of the wavelength λ of light. A light emitting element in which dense fins are arranged so as to be 2n or about 1 / 20n and 1 / 40n as described above may be formed.

  The produced silicon laser oscillated at a design wavelength of about 850 nm, and it was a single mode according to the spectrum analysis. This is because the wavelength determined from the periodic structure of the DBR mirror is selectively enhanced. Such a DBR mirror can be easily manufactured because it is originally a planar technology in silicon process technology. In fact, as disclosed in the present embodiment, a high-efficiency DBR mirror can be formed by a simple process of silicon nitride patterning and subsequent silicon dioxide deposition.

<Example 3>
In this embodiment, the structure of a DFB type silicon laser and the manufacturing method thereof will be described.

  5A to FIG. 5M and FIG. 9N to FIG. FIGS. 6A to 6M and FIGS. 10N to 10P are schematic views showing the order of the manufacturing steps as viewed from the top of the substrate.

  First, the device is manufactured according to the manufacturing steps similar to those of Example 1, that is, in the order of the manufacturing steps shown in FIGS. 5A to 5J and FIGS. 6A to 6J. As a result, after a silicon thin film is formed and a resist is applied to the entire surface, a resist pattern is formed so that the distance between the silicon ultrafine lines is about 1 / 20n of the light wavelength λ (see FIGS. 5K and 6K). More specifically, the width of the resist pattern was 20 nm, and the distance from the adjacent resist pattern was 5 nm. Furthermore, a thin film silicon pattern 12 having a width of 20 nm was formed using this resist pattern as an etching mask, and the states shown in FIGS. 5L and 6L were obtained.

  Next, the thin film silicon pattern 12 was oxidized to obtain the states shown in FIGS. 5M and 6M. Here, the processing temperature and time were adjusted so that a 1 nm silicon ultrafine line was formed inside the silicon dioxide, and a gap was not formed between the silicon dioxide due to the volume expansion of the silicon dioxide. Such an oxidation step can be easily performed by a normal oxidation treatment.

  Subsequently, after silicon nitride is deposited on the entire surface, the resist is left only in a desired region by resist patterning using photolithography, and then silicon nitride 23 is patterned using anisotropic dry etching. And it was set as the state of FIG. 10N. The silicon nitride 23 is an optical resonator that functions as a waveguide and mirror. Here, the length of the silicon nitride 23 serving as the resonance length was 100 μm. The silicon nitride 23 has a structure like a backbone in which a thick portion and a thin portion are alternately repeated. The thick portion of the silicon nitride 23 is 2 μm and the thin portion is 1 μm. Further, the lengths of the thick and thin portions of the silicon nitride 23 with respect to the traveling direction of the light confined in the waveguide are designed to be 1/4 of the wavelength in the waveguide. More specifically, since it is estimated that the emission wavelength is 850 nm and the effective refractive index of the waveguide portion of the silicon nitride 23 is about 1.77, the lengths of the thick and thin portions of the silicon nitride 23 are both 120 nm. It was made to become.

  Subsequently, using a CVD apparatus, silicon dioxide 17 was deposited on the surface of the substrate by 1 μm over the entire surface to obtain the states shown in FIGS. 9O and 10O. The space between the islands of silicon nitride in the silicon nitride 23 that becomes the DBR mirror was filled with silicon dioxide 17.

  Subsequently, after TiN and Al are deposited on the entire surface, the resist is left only in a desired region by resist patterning using photolithography, and then Al is wet using an etching solution containing phosphoric acid, acetic acid, and nitric acid. Etching was performed, and then TiN was wet etched using an etching solution containing ammonia and superwater. As a result, the TiN electrode and the Al electrode were patterned and processed into the states of FIGS. 9P and 10P. Thereafter, a hydrogen annealing process was performed at a temperature of 400 ° C., and a process for terminating defects generated during the process with hydrogen was performed.

  As described above, when the thickness of the BOX 2 is 1 μm or more, this completes the element formation process.

  The produced silicon laser oscillated at a design wavelength of about 850 nm, and was in a single mode according to the spectrum analysis. This is because the silicon laser selectively enhances the wavelength determined from the periodic structure such as the backbone in which the thick and thin portions of the silicon nitride 23 are alternately repeated.

Thus, when the silicon nitrides 23 having different thicknesses are alternately connected, the refractive index in the waveguide can be effectively changed.

  Further, when the side surface of the silicon nitride 23 is adjacent to air, a large refractive index of about 1.0 is secured between silicon nitride having a refractive index of about 2.0 and air having a refractive index of about 1.0. Therefore, a large modulation can be given to the light in the waveguide. There is an effect similar to that of periodically arranging mirrors in the waveguide, and a large distributed feedback effect can be provided. Therefore, the silicon dioxide 17 around the silicon nitride 23 can be easily manufactured by removing the silicon dioxide 17 by a normal silicon process and adjoining it with air.

<Example 4>
In this embodiment, a structure of a silicon laser having a region (i region) where no ion implantation is performed in the light emitting portion and a manufacturing method thereof will be described. By forming the i region, both electrons and holes can be confined, so that the probability that the electrons and holes collide and annihilate increases, and there is an advantage that the luminous efficiency can be further increased.

  5A to FIG. 5C and FIG. 11D to FIG. FIGS. 6A to 6C and FIGS. 12D to 12J are schematic views in the order of the manufacturing process as viewed from the top of the substrate.

  First, in accordance with the manufacturing process similar to that of the first embodiment, that is, in the order of the manufacturing processes shown in FIGS. 5A to 5C and FIGS. 6A to 6C, the silicon dioxide 4 having a thickness of about 15 nm as shown in FIGS. 5C and 6C. Form. Thereafter, the silicon dioxide formed on the back surface of the silicon substrate 1 is removed by back surface cleaning. Then, after resist is left only in a desired region by resist patterning 24 using photolithography, BF2 ions are ion-implanted at an acceleration energy of 15 keV and a dose of 1 × 10 15 / cm 2, so that the SOI layer 3 is filled. Then, a P-type impurity implantation region 25 is formed to obtain the states shown in FIGS. 11D and 12D.

  Subsequently, after removing the resist, after leaving the resist only in a desired region by resist patterning 24 using photolithography, P ions are ion-implanted with an acceleration energy of 10 keV and a dose of 1 × 10 15 / cm 2. Then, an N-type impurity implantation region 26 was formed in the SOI layer 3. This state is shown in FIGS. 11E and 12E. Here, the i region is formed by using an inversion mask.

  Subsequently, after removing the resist, silicon nitride 27 was deposited to a thickness of 100 nm on the entire surface (the same state as in FIG. 5D of Example 1). Furthermore, after leaving the resist only in a desired region by resist patterning using photolithography, the silicon nitride 27 was processed using anisotropic dry etching to obtain the states of FIGS. 11F and 12F. The remaining silicon nitride 27 is used as a mask material for the oxidation process in the next step. Subsequently, after removing silicon dioxide 4 on the surface existing in the opening by a cleaning process and wet etching using hydrofluoric acid, a desired region of SOI 3 is thinned to a predetermined film thickness by performing an oxidation treatment, and A thin film silicon 28 having an i region was formed, and a thermal oxide film 29 was formed on the surface at the same time. Here, the oxidation time and temperature were adjusted so that the thickness of the thin film silicon was 21 nm, and the states shown in FIGS. 11G and 12G were obtained. Since the thick unoxidized SOI 3 was 40 nm in the state of FIG. 11G, the thickness ratio between the thick SOI 3 and the thin film silicon 28 was about 2: 1.

  Subsequently, after the silicon nitride 27 is removed by a cleaning process and wet etching using hot phosphoric acid, the silicon dioxide on the surface and the thin film silicon is removed by a cleaning process and wet etching using hydrofluoric acid. It was in a state.

  Further, a resist for electron beam lithography was applied and formed at intervals such that λ (emission wavelength) / 2n (n is an effective refractive index of the insulating film covering the ultrafine line) as in Example 1. . Here, a resist pattern 30 having a width of 40 nm is formed by electron beam lithography with an interval between adjacent resist patterns of 200 nm (see FIGS. 11I and 12I), and thin film silicon having a thickness of 40 nm is formed using the resist pattern 30 as an etching mask. A pattern 31 was formed to obtain the states of FIGS. 11J and 12J. Since the thickness of the thin film silicon is 21 nm, the aspect ratio is 0.5 or more, and high controllability and reproducibility can be ensured in a normal oxidation process. In the same manufacturing process as in Example 1, after forming a silicon fine line, after depositing silicon nitride on the entire surface, after leaving the resist only in a desired region by resist patterning using photolithography, By patterning silicon nitride using anisotropic dry etching, a light emitting device similar to that in Example 1 and Example 2 could be manufactured.

<Example 5>
In this example, a structure of a silicon laser using a photonic crystal as an optical resonator and a manufacturing method thereof will be described.

  5A to FIG. 5M and FIG. 13N to FIG. FIGS. 6A to 6M and FIGS. 14N to 14P are schematic views showing the order of the manufacturing process as viewed from above the substrate.

  First, in accordance with the manufacturing process similar to that of Example 1, that is, in the order of the manufacturing process shown in FIGS. 5A to 5M and FIGS. 6A to 6M, a thin film silicon is formed, and then a resist for electron beam lithography is applied. A resist pattern is formed with a width of 30 nm and an interval of 10 nm. In the same manufacturing process as in Example 1, after forming a silicon fine line using the resist pattern as an etching mask, the upper part of the silicon fine line and the non-silicon fine line are formed by using the conventional ULSI interlayer insulation planarization technique. Planarization with the silicon dioxide film 32 was performed so as to eliminate the level difference from the upper part of the line, and the states shown in FIGS. 13N and 14N were obtained. This silicon dioxide film was deposited by the CVD method so as to be 100 nm or less above the silicon fine line.

  In this example, planarization with a silicon dioxide film was performed. However, as in Example 3, the manufacturing process was such that no gap was formed between silicon dioxide due to the volume expansion of silicon dioxide in the oxidation treatment after the formation of the silicon fine wire. For example, the planarization process may be omitted.

  Subsequently, after depositing 250 nm of silicon nitride on the entire surface, leaving the resist only in a desired region by resist patterning using photolithography, the silicon nitride film 33 is processed using anisotropic dry etching. Thus, the state shown in FIGS. 13O and 14O was obtained. Next, resist patterning using electron beam lithography is performed. Using the resist pattern as a mask, a hole pattern 34 having a diameter sufficiently smaller than the emission wavelength λ, for example, about λ / 10, is formed on the silicon nitride film 33. Are periodically arranged in a triangular lattice at intervals of about λ / 2.

  A photonic band gap is created by such a periodic structure, and light corresponding to the band gap cannot pass in the in-plane direction, but light is extracted from it by disturbing the periodic structure and creating defects. It becomes possible. In addition, since the point defect can capture light in the defect, it functions as a resonator, and light amplification and laser oscillation are possible. Furthermore, a waveguide can be formed by introducing defects in a linear shape. In the vertical direction without a periodic structure, light can be confined by the difference between the effective refractive index of the silicon nitride film including the contact hole and the refractive index of air.

  In FIG. 13P and FIG. 14P, point defects and linear defects were formed. In this embodiment, the porosity of contact holes is 50%, and the volume ratio of silicon nitride and air is 5: 5. In this case, the effective refractive index of the silicon nitride film can be regarded as about 1.5.

  Thereafter, silicon dioxide is deposited on the entire surface of the substrate by 1 μm using a CVD apparatus by the same manufacturing steps as those in FIGS. 5O to 5Q and FIGS. 6O to 6Q in Example 1, and then a resist using photolithography. -After leaving the resist only in a desired region by patterning, openings for electrode wiring were formed by wet etching using hydrofluoric acid.

  Subsequently, after TiN and Al were deposited on the entire surface, Al was wet etched using an etching solution containing phosphoric acid, acetic acid, and nitric acid, and then TiN was wet etched using an etching solution containing ammonia and superwater. . Further, the TiN electrode and the Al electrode wiring were formed by removing the resist pattern.

  Subsequently, after leaving the resist only in a desired region by resist patterning using photolithography, the silicon dioxide film on the silicon nitride film 33 was removed by wet etching using hydrofluoric acid. Thereafter, a hydrogen annealing process was performed at a temperature of 400 ° C., and a process in which defects generated during the process were terminated with hydrogen was completed to complete a silicon laser element having a photonic crystal.

  The produced silicon laser oscillated at a design wavelength of about 850 nm, and was in a single mode according to the spectrum analysis. By introducing a two-dimensional periodic structure and defects into a silicon nitride film, an optical resonator corresponding to the photonic band gap can be easily produced by a normal silicon process.

<Example 6>
FIG. 15 is a schematic view of a substrate of an optoelectronic integrated circuit showing Embodiment 6 of the present invention as viewed from above.

  When an optical integrated circuit is formed, a desired wiring step is performed thereafter, and a step of connecting the formed silicon laser element and the CMOS integrated circuit formed on the same substrate may be given. Further, when creating a CMOS circuit, the CMOS circuit may be created in advance before producing the silicon laser disclosed in this embodiment. Conversely, a CMOS circuit may be created after a silicon laser device is created. Furthermore, the wiring process disclosed in this embodiment may be performed simultaneously with the wiring process of the CMOS circuit. Needless to say, many variations can be made with respect to the order of the production steps when creating an integrated circuit.

  In the optoelectronic integrated circuit manufactured as described above, light from the light emitting element 1502 manufactured by the method described in the first to fifth embodiments is branched and passed through the optical waveguide 1504 to each optical modulator 1503 of the optical modulator array. Led. Here, electrical signals output from a plurality of output terminals of the integrated circuit (LSI) 1501 are integrated by a demultiplexer (not shown), and distributed to, for example, four optical modulators, and an optical modulator driver (not shown). Is modulated by each optical modulator according to the output electric signal through the optical waveguide, guided to each light receiving element 1505 of the light receiving element array and a multiplexer (not shown) through the optical waveguide, and converted back to the original bit. To another integrated circuit (LSI) 1506. In this embodiment, the LSI input / output device has two functions of an optical output unit and an optical input unit to enable bidirectional optical transmission. However, the present invention is limited to such a configuration. It goes without saying that it is not done.

It is a figure which shows the band structure in the bulk state of the silicon | silicone for demonstrating the principle of this invention. It is a figure which shows the band structure in the thin film state of silicon, or a gate electric field application state for demonstrating the principle of this invention. It is a figure which shows the experimental data which demonstrate the principle of this invention, and the emitted light intensity from an ultra-thin silicon layer. It is an experimental data demonstrating the principle of this invention, and is a figure which shows the light emission wavelength from an ultra-thin silicon layer. It is a figure which shows the ultrathin silicon layer film thickness dependence of the light emission wavelength based on the principle of this invention. It is a figure which shows the dependence of the light emission wavelength and intensity | strength based on the principle of this invention on the ultrathin silicon layer film thickness. It is sectional drawing which shows 1 process of a series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process of a series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows the process of a series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process of a series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows the process in a series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process of a series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a figure which shows the mode of the lower part of the silicon dioxide film 4 shown to Fig.6H (a). It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 1st Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 2nd Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 2nd Example of this invention. Sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 2nd Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 2nd Example of this invention. It is a top view which shows 1 process of a series of manufacturing processes of the silicon laser by the 2nd Example of this invention. . It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 2nd Example of this invention. . It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 3rd Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 3rd Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 3rd Example of this invention. It is a top view which shows one process among the series of manufacturing processes of the silicon laser by the 3rd Example of this invention. It is a top view which shows one process among the series of manufacturing processes of the silicon laser by the 3rd Example of this invention. It is a top view which shows one process among the series of manufacturing processes of the silicon laser by the 3rd Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. . It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is a top view which shows 1 process among the series of manufacturing processes of the silicon laser by the 4th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 5th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 5th Example of this invention. It is sectional drawing which shows 1 process among the series of manufacturing processes of the silicon laser by the 5th Example of this invention. It is a top view which shows one process among the series of manufacturing processes of the silicon laser by the 5th Example of this invention. It is a top view which shows one process among the series of manufacturing processes of the silicon laser by the 5th Example of this invention. It is a top view which shows one process among the series of manufacturing processes of the silicon laser by the 5th Example of this invention. It is a schematic plan view of the optical integrated circuit which shows the 6th Example of this invention.

Explanation of symbols

1 ... Silicon substrate, 2 ... Embedded oxide, 3 ... Silicon On Insulator (SOI) layer, 4 ... Silicon dioxide film, 5 ... Silicon nitride film, 6 ... Thin silicon, 7 ... Thermal oxide film , 8 …… P-type impurity implantation region, 9 …… N-type impurity implantation region, 10 …… Resist film, 11 …… Resist pattern, 12 …… Silicon pattern, 13 …… Silicon dioxide layer, 14 …… Silicon fine line , 15 …… Silicon dioxide layer, 16 …… Silicon nitride, 17 …… Silicon dioxide film, 18 …… Open, 19 …… TiN electrode, 20 …… Al electrode, 21 …… Silicon nitride, 22 …… Open , 23 …… DBR mirror, 24 …… Resist pattern, 25 …… P-type impurity implantation region, 26 …… N-type impurity implantation region, 27 …… Silicon nitride, 28 …… Thin film silicon, 29 …… Silicon dioxide, 30 …… Resist pattern, 31 …… Silicon pattern, 32 …… Silicon dioxide, 33 …… Si nitride Con, 34 ...... hole pattern.

Claims (25)

  A first insulating film provided on the semiconductor substrate; a first electrode for injecting electrons provided on the first insulating film; a second electrode for injecting holes; A light emitting portion that is electrically connected to the first and second electrodes and emits light by injecting the electrons and holes by applying a voltage to both electrodes; and light from the light emitting portion. Each of the first electrode, the second electrode, and the light-emitting portion are made of the same single crystal material, and the light-emitting portion is a surface of a second insulating film. A plurality of light emitting diodes whose surfaces are covered with the second insulating film are covered with a waveguide having a refractive index higher than that of the second insulating film, The light emitting die extends in a direction orthogonal to the light traveling direction of the waveguide. When the effective refractive index at the emission wavelength of the insulating film positioned above and below the diode is n and the emission wavelength is λ, the insulating films are arranged in parallel along the light traveling direction at a period of λ / 2n. A semiconductor light emitting device characterized by comprising:   2. The semiconductor light emitting device according to claim 1, wherein a material of the light emitting diode is a group IV semiconductor.   2. The semiconductor light emitting device according to claim 1, wherein the material of the light emitting diode is an indirect transition semiconductor in a bulk state.   4. The semiconductor light emitting device according to claim 1, wherein the light emitting diode is a thin film, and the thickness of the thin film is 10 nm or less.   4. The semiconductor light-emitting device according to claim 1, wherein the light-emitting diode is an ultrafine line, and a cross section thereof is dotted.   6. The semiconductor light emitting device according to claim 5, wherein a diameter of a cross section of the ultrafine line is 10 nm or less.   4. The semiconductor light-emitting device according to claim 1, wherein the light-emitting diode is an ultrafine line, and a cross section thereof is planar.   3. The semiconductor light emitting device according to claim 2, wherein the group IV semiconductor is silicon, and a surface orientation of the surface of the silicon is a (100) plane or a plane orientation equivalent thereto. .   3. The semiconductor light emitting device according to claim 2, wherein the light emitting portion includes a p-type semiconductor region, an n-type semiconductor region, and an i-type semiconductor region formed between the p-type semiconductor region and the n-type semiconductor region. A semiconductor light emitting element characterized by the above.   2. The semiconductor light emitting device according to claim 1, wherein the first insulating film is silicon dioxide.   11. The semiconductor light emitting device according to claim 10, wherein the waveguide is a silicon nitride film, and the second insulating film is silicon dioxide.   2. The semiconductor light emitting device according to claim 1, wherein the waveguide has a structure having a step so as to form a convex portion above the light emitting diode and a concave portion between the light emitting devices.   2. The semiconductor light emitting device according to claim 1, further comprising: a mirror part having a function of reflecting light emitted from the light emitting part at a terminal part of the waveguide, the mirror part being refracted from the first insulating film. The first insulating film so that the second insulating film having a different rate and the third insulating film having a refractive index lower than that of the second insulating film are alternately opposed to each other with a predetermined interval. A semiconductor light emitting device, wherein the semiconductor light emitting device is disposed periodically and parallel to the light emitting diode.   A first insulating film provided on the semiconductor substrate; a first electrode for injecting electrons provided on the first insulating film; a second electrode for injecting holes; A light emitting portion that is electrically connected to the first and second electrodes and emits light by injecting the electrons and holes by applying a voltage to both electrodes; and light from the light emitting portion. Each of the first electrode, the second electrode, and the light emitting unit are identical to each other. The light emitting unit is composed of a single crystal material, and the light emitting unit includes a plurality of light emitting diodes covered with a second insulating film, and the plurality of light emitting diodes covered with the second insulating film includes: Covered by a waveguide having a higher refractive index than the second insulating film, The mirror portion is provided adjacent to a side end portion of the waveguide, and the mirror portion has a refractive index higher than that of the third insulating film and the third insulating film having a refractive index different from that of the first insulating film. The lower fourth insulating films are alternately arranged on the light emitting diodes periodically and parallel to the light traveling direction of the waveguide so as to face each other with a predetermined interval. A semiconductor light emitting device.   13. The semiconductor light emitting device according to claim 12, wherein the light emitting diode is an ultrafine line, and a cross section thereof is a dot shape.   16. The semiconductor light emitting device according to claim 15, wherein a diameter of a cross section of the ultrafine line is 10 nm or less.   13. The semiconductor light emitting device according to claim 12, wherein the light emitting diode is an ultrafine line, and a cross section thereof is a planar shape.   A first insulating film provided on the semiconductor substrate; a first electrode for injecting electrons provided on the first insulating film; a second electrode for injecting holes; A light emitting unit electrically connected to the first and second electrodes, and applying a voltage to both electrodes to inject the electrons and holes to emit light; and an upper surface of the light emitting unit A porous layer having the function of a waveguide that resonates light from the light emitting part and propagates light in the layer direction is provided, and the first electrode, the second electrode, and the light emitting part are the same. The light-emitting portion includes a plurality of light-emitting diodes whose surfaces are covered with a second insulating film, and the porous layer is a film made of a material having a higher refractive index than that of the second insulating film. And having a plurality of pore diameters smaller than the emission wavelength, wherein the pore diameter is an emission wave Arranged in a triangular lattice with a shorter predetermined interval, and the semiconductor light emitting device characterized by a structure comprising a line defect and a point defect.   19. The semiconductor light emitting device according to claim 18, wherein the light emitting diode is a thin film, and the thickness of the thin film is 10 nm or less.   15. The semiconductor light-emitting device according to claim 14, wherein the light-emitting diode is an ultrafine line, and a cross-section thereof is dotted.   21. The semiconductor light emitting device according to claim 20, wherein a diameter of a cross section of the ultrafine line is 10 nm or less.   15. The semiconductor light-emitting device according to claim 14, wherein the light-emitting diode is an ultrafine line, and a cross-section thereof is planar.   19. The semiconductor light emitting device according to claim 18, wherein the porous layer is formed of a silicon nitride film.   24. The semiconductor light-emitting device according to claim 1, a light-receiving device that receives light emitted from the light-emitting diode formed on an insulating layer on a semiconductor substrate, and the light-emitting diode to the light-receiving device. It has a waveguide for propagating light and an LSI provided on a silicon thin film formed on an insulating film on a semiconductor substrate, and the light emitting diode and the LSI are connected by optical wiring or electrical wiring. An optoelectronic integrated circuit.   A first step of preparing an SOI substrate including a silicon oxide film formed on a support substrate and a single crystal silicon layer having a (100) plane orientation of the upper surface formed on the silicon oxide film; A second step of processing crystalline silicon to form an island-shaped single crystal silicon layer; a third step of introducing a first conductivity type impurity into a part of the island-shaped single crystal silicon; A fourth step of introducing an impurity of the second conductivity type opposite to the first conductivity type into a part of the shape of the single crystal silicon layer; traversing the island-shaped single crystal silicon layer; An antioxidant film is formed on the island-shaped single crystal silicon layer having an opening that exposes a part of the region into which the one conductivity type impurity is introduced and the region into which the two conductivity type impurity is introduced. Fifth step and the island-shaped single unit exposed from the opening A sixth step of oxidizing the surface of the silicon layer to form a silicon oxide film and leaving a single crystal silicon layer under the silicon oxide film; a seventh step of removing the silicon oxide film; A light emitting diode is formed on the single crystal silicon layer after removing the silicon oxide film so as to cross a region where the first conductivity type impurity is introduced and a region where the second conductivity type impurity is introduced in the crystal silicon layer. And an eighth step of oxidizing the surface of the precursor pattern to grow a silicon dioxide layer and forming a light-emitting portion having a silicon thin film or a silicon fine wire inside the silicon dioxide layer. 9. A method for manufacturing a semiconductor light emitting device, comprising at least a step 9 and a tenth step of depositing a silicon nitride film on the light emitting portion.

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