JP2010032904A - Display device, its driving method, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device simple in composition and reduced in point deduction due to Vth correction, and also to provide its driving method and electronic equipment. <P>SOLUTION: In a prescribed period in a Vth correction preparation period, the voltage of a gate line CSL is dropped from V<SB>on2</SB>to V<SB>off2</SB>according to a control signal 21e to turn off a transistor T<SB>ca</SB>and make a cathode line CTL floated. The period in which large reverse bias voltage is applied to an organic EL element 12R and the like, is shortened by the period in which the transistor T<SB>ca</SB>is turned off. The large reverse bias voltage is then not continuously applied to the organic EL element 12R throughout the Vth correction preparation period. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display device including a display unit having a light emitting element and a pixel circuit for each pixel, and a driving unit for driving the pixel circuit, and a driving method thereof. Moreover, this invention relates to the electronic device provided with the said display apparatus.

  In recent years, in the field of display devices that perform image display, display devices that use current-driven optical elements, such as organic EL (electroluminescence) elements, whose light emission luminance changes according to the value of a flowing current are used as light emitting elements of pixels. Developed and commercialized.

  Unlike a liquid crystal element or the like, the organic EL element is a self-luminous element. Therefore, a display device (organic EL display device) using an organic EL element does not require a light source (backlight), and thus has higher image visibility and lower power consumption than a liquid crystal display device that requires a light source. And the response speed of the element is fast.

  In the organic EL display device, similarly to the liquid crystal display device, there are a simple (passive) matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display device. For this reason, active matrix systems are currently being actively developed. In this method, a current flowing through a light emitting element arranged for each pixel is controlled by an active element (generally a TFT (Thin Film Transistor)) provided in a drive circuit provided for each light emitting element.

By the way, in general, the current-voltage (IV) characteristics of the organic EL element deteriorate (deteriorate with time) as time elapses. In a pixel circuit that current-drives an organic EL element, when the IV characteristic of the organic EL element changes with time, the voltage division ratio between the organic EL element and the drive transistor connected in series to the organic EL element changes. The gate-source voltage V _{gs of the} transistor also changes. As a result, since the current value flowing through the drive transistor changes, the current value flowing through the organic EL element also changes, and the light emission luminance also changes according to the current value.

In addition, the threshold voltage _Vth and mobility μ of the driving transistor may change over time, and the threshold voltage _Vth and mobility μ may vary from pixel circuit to pixel circuit due to variations in manufacturing processes. When the threshold voltage V _th and the mobility μ of the driving transistor are different for each pixel circuit, the current value flowing through the driving transistor varies for each pixel circuit. Therefore, even if the same voltage is applied to the gate of the driving transistor, the organic EL The light emission luminance of the elements varies, and the uniformity of the screen is lost.

Therefore, even if the IV characteristic of the organic EL element changes with time, or the threshold voltage _Vth or mobility μ of the driving transistor changes with time, the light emission luminance of the organic EL element is not affected by those effects. In order to keep the voltage constant, a display device incorporating a compensation function for variations in the IV characteristics of the organic EL element and a correction function for variations in the threshold voltage _Vth and mobility μ of the drive transistor has been developed. (For example, refer to Patent Document 1).

  FIG. 11 illustrates a schematic configuration of the display device described in Patent Document 1. A display device 100 illustrated in FIG. 11 includes a display unit 110 in which a plurality of pixels 120 are arranged in a matrix, and a driving unit that drives each pixel 120 (a horizontal driving circuit 130, a writing scanning circuit 140, and a power scanning circuit 150). And.

Each pixel 120 includes a red pixel 120R, a green pixel 120G, and a blue pixel 120B. As shown in FIG. 11, each of the pixels 120R, 120G, and 120B includes an organic EL element 121 (organic EL elements 121R, 121G, and 121B) and a pixel circuit 122 connected thereto. The pixel circuit 122 includes a sampling transistor T _WS , a storage capacitor C _s , and a driving transistor T _Dr , and has a circuit configuration of 2Tr1C. A gate line WSL drawn from the writing scanning circuit 140 is formed extending in the row direction, and is connected to the gate of the transistor _TWS . The power supply line PSL drawn out from the power supply scanning circuit 150 is also formed to extend in the row direction, and is connected to the drain of the transistor _TDr . The signal line DTL drawn from the horizontal drive circuit 130 is formed to extend in the column direction, and is connected to the drain of the transistor _TWS . The source of the transistor _{T WS} is the gate of the transistor _{T Dr} for driving, is connected to one end of the storage capacitor _{C s,} the transistors _{T Dr} source and the storage capacitor _{C s} of the other end and an organic EL element 121R for, 121G, It is connected to the anode of 121B (hereinafter abbreviated as organic EL element 121R and the like). The cathode of the organic EL element 121R and the like is connected to the cathode line CTL.

FIG. 12 shows an example of various waveforms in the display device 100 shown in FIG. In FIG. 12, two types of voltages (V _on , V _off (<V _on )) are applied to the gate line WSL, and two types of voltages (V _cc , V _ss (<V _tel + V _c )) are applied to the power supply line PSL. The state in which two types of voltages (V _sig , V _ofs ) are applied to the signal line DTL is shown. Note that V _tel is a threshold voltage of the organic EL element 121R and the like, and V _ca is a cathode voltage of the organic EL element 121R and the like. Further, in FIG. 12, the gate voltage V _g of the transistor T _Dr and the anode voltage V _el of the organic EL element 121R and the like change from time to time in response to voltage application to the gate line WSL, the power supply line PSL, and the signal line DTL. Is shown.

(Vth correction preparation period)
First, preparation for Vth correction is performed. Specifically, the power supply scanning circuit 150 lowers the voltage of the power line PSL to _{V ss} from _{V cc (T} 1). Then, the source voltage V _s drops to V _ss and the organic EL element 121 and the like are quenched. At this time, the gate voltage V _g is also lowered due to coupling via the storage capacitor C _s. Next, while the voltage of the signal line DTL is V _ofs , the write scanning circuit 140 increases the voltage of the gate line WSL from V _off to V _on (T ₂ ). Then, the transistor T _WS is turned on, and the gate voltage V _g of the transistor T _Dr drops to V _ofs .

(First Vth correction period)
Next, _Vth is corrected. Specifically, while the voltage of the signal line DTL is V _ofs , the power supply scanning circuit 150 increases the voltage of the power supply line PSL from V _ss to V _cc (T ₃ ). Then, the drain of the transistor _{T Dr} - flows through the current _{I ds} between the source, the holding capacitor _{C s} and the organic EL element device capacity, such as 121R (not shown) is charged, the source voltage _{V s} rises. After a certain period of time, the write scanning circuit 140 lowers the voltage of the gate line WSL from V _on to V _off (T ₄ ). Then, since the transistor _TWS is turned off, the gate of the transistor _TDr becomes floating, and the correction of _Vth is temporarily stopped.

(First Vth correction pause period)
During the period when the Vth correction is paused, the voltage of the signal line DTL is sampled in another row (pixel) different from the row (pixel) on which the previous Vth correction has been performed. Note that when the Vth correction is insufficient, i.e., the gate of the transistor _{T Dr} - when the potential difference _{V gs} between the source is larger than the threshold voltage _{V th} of the transistor _{T Dr} is also in Vth correction stop period, previously In the row (pixel) in which the Vth correction is performed, the current I _ds flows between the drain and source of the transistor T _Dr , the source voltage V _s rises, and the gate voltage V _g also increases due to coupling through the storage capacitor C _s. To rise. At this time, since the reverse bias is applied to the organic EL element 121R and the like, the organic EL element 121R and the like do not emit light.

(Second Vth correction period)
After the Vth correction pause period ends, _Vth is corrected again. Specifically, when the voltage of the signal line DTL is V _ofs and Vth correction is possible, the write scanning circuit 140 increases the voltage of the gate line WSL from V _off to V _on (T ₅ ). The gate of the transistor T _Dr is connected to the signal line DTL. At this time, when the source voltage V _s is lower than V _ofs −V _th (when Vth correction is not yet completed), until the transistor T _Dr is cut off (until the potential difference V _gs becomes V _th ). A current I _ds flows between the drain and source of the transistor T _Dr. As a result, the holding capacitor _{C s} is charged to _{V th,} the potential difference _{V gs} becomes _{V th.} Thereafter, before the horizontal driving circuit 130 switches the voltage of the signal line DTL from V _ofs to V _sig , the write scanning circuit 140 decreases the voltage of the gate line WSL from V _on to V _off (T ₆ ). Then, since the gate of the transistor T _Dr is in a floating state, the potential difference V _gs can be maintained as V _th regardless of the magnitude of the voltage of the signal line DTL. In this way, by setting the potential difference V _gs to V _{th, even} when the threshold voltage V _th of the transistor T _Dr varies from pixel circuit 122 to pixel circuit 122, the emission luminance of the organic EL element 121 and the like varies. Can be eliminated.

(Second Vth correction suspension period)
Thereafter, the horizontal driving circuit 130 switches the voltage of the signal line DTL from V _ofs to V _sig during the Vth correction pause period.

(Writing / μ correction period)
After the Vth correction pause period ends, writing and μ correction are performed. Specifically, while the voltage of the signal line DTL is V _sig , the write scanning circuit 140 increases the voltage of the gate line WSL from V _off to V _on (T ₇ ), and the gate of the transistor T _Dr is signaled. Connect to line DTL. Then, the gate voltage V _g of the transistor T _Dr becomes V _sig . At this time, the anode voltage V _el of the organic EL element 121R etc. is still smaller than the threshold voltage V _el of the organic EL element 121R etc. at this stage, and the organic EL element 121R etc. is cut off. Therefore, the current _{I ds} flows to the element capacitance such as an organic EL element 121R (not shown), since the element capacitance is charged, the source voltage _{V s} is increased by [Delta] V, eventually the potential difference _{V gs} is _V sig _{+ V th} - ΔV. In this way, μ correction is performed simultaneously with writing. Here, since ΔV increases as the mobility μ of the transistor T _Dr increases, variation in the mobility μ for each pixel can be eliminated by reducing the potential difference V _gs by ΔV before light emission.

(Light emission)
Finally, the write scanning circuit 140 decreases the voltage of the gate line WSL from V _on to V _off (T ₈ ). Then, the gate of the transistor _{T Dr} is a floating, the drain of the transistor _{T Dr} - current _{I ds} flows between the source, the source voltage _{V s} rises. As a result, the organic EL element 121R and the like emit light with a desired luminance.

JP 2008-083272 A JP 2004-157467 A

In the Vth correction preparation period described above, the source potential (= anode voltage V _el ) of the transistor T _Dr is set to a negative potential so that the potential difference V _gs of the transistor T _Dr exceeds V _th . Therefore, reverse bias continues to be applied to the organic EL element 121R and the like throughout this period. The period during which the reverse bias continues to be applied varies depending on the duty ratio between the light emission period and the extinction period (light emission period / extinction period × 100). For example, when the duty ratio is 25%, the period is 75% of the cycle. In the meantime, the reverse bias is continuously applied to the organic EL element 121R and the like.

  In general, the probability that dielectric breakdown (disappearance) occurs when a reverse bias is applied to an organic EL element increases as the magnitude of the reverse bias and the application time increase. Therefore, as described above, when the reverse bias is continuously applied to the organic EL element 121R or the like for a long time, the organic EL element 121R or the like is highly likely to be a dark spot, and the yield may be reduced. Thus, for example, Patent Document 2 proposes a measure for reducing the reverse bias by controlling the cathode voltage with a binary voltage. However, in order to do so, it is necessary to prepare a new external power supply, which causes a problem that the circuit configuration becomes complicated.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a display device capable of reducing the possibility of dark spots resulting from Vth correction with a simple configuration, a driving method thereof, and an electronic apparatus. Is to provide.

  The display device of the present invention includes a display unit having a light emitting element and a pixel circuit for each pixel, and a driving unit for driving the pixel circuit. The pixel circuit is provided with a first transistor, a second transistor, and a storage capacitor. The driving unit includes a first driving unit, a second driving unit, a third driving unit, a fourth driving unit, a control unit, a first wiring, a second wiring, a third wiring, and a fourth driving unit. A wiring and a fifth wiring are provided. The gate of the first transistor is connected to the first drive unit via the first wiring. The drain or source of the first transistor is connected to the third drive unit via the third wiring. Of the drain and source of the first transistor, the one not connected to the third drive unit is connected to the gate of the second transistor and one end of the storage capacitor. The drain or source of the second transistor is connected to the second drive unit via the second wiring. Of the drain and source of the second transistor, the one not connected to the second drive unit is connected to the other end of the storage capacitor and the anode or cathode of the light emitting element. The gate of the third transistor is connected to the fourth drive unit via the fourth wiring. The drain or source of the third transistor is connected to the anode and cathode of the light emitting element that are not connected to the second transistor. Of the drain and source of the third transistor, the one not connected to the light emitting element is connected to the fifth wiring. The first drive unit can output a signal for controlling on / off of the first transistor. The second driving unit can output a first voltage lower than a voltage obtained by adding the threshold voltage of the light emitting element and the voltage of the fifth wiring, and a second voltage equal to or higher than the first voltage. The third drive unit can output a third voltage having a magnitude corresponding to the video signal. The fourth drive unit can output a signal for controlling on / off of the third transistor. The control unit outputs a control signal instructing the fourth drive unit to output a signal for turning off the third transistor during a predetermined period of the period in which the second drive unit outputs the first voltage. It is designed to output.

  An electronic apparatus according to the present invention includes the display device.

  According to the display device driving method of the present invention, in the fourth drive unit of the display device having the following configuration, the third transistor is provided for a predetermined period of the period during which the second drive unit outputs the first voltage. A step of outputting a signal to be turned off is executed.

  A display device using the above driving method includes a display unit having a light emitting element and a pixel circuit for each pixel and a driving unit for driving the pixel circuit. The pixel circuit is provided with a first transistor, a second transistor, and a storage capacitor. The driving unit includes a first driving unit, a second driving unit, a third driving unit, a fourth driving unit, a first wiring, a second wiring, a third wiring, a fourth wiring, Five wirings are provided. The gate of the first transistor is connected to the first drive unit via the first wiring. The drain or source of the first transistor is connected to the third drive unit via the third wiring. Of the drain and source of the first transistor, the one not connected to the third drive unit is connected to the gate of the second transistor and one end of the storage capacitor. The drain or source of the second transistor is connected to the second drive unit via the second wiring. Of the drain and source of the second transistor, the one not connected to the second drive unit is connected to the other end of the storage capacitor and the anode or cathode of the light emitting element. The gate of the third transistor is connected to the fourth drive unit via the fourth wiring. The drain or source of the third transistor is connected to the anode and cathode of the light emitting element that are not connected to the second transistor. Of the drain and source of the third transistor, the one not connected to the light emitting element is connected to the fifth wiring. The first drive unit can output a signal for controlling on / off of the first transistor. The second driving unit can output a first voltage lower than a voltage obtained by adding the threshold voltage of the light emitting element and the voltage of the fifth wiring, and a second voltage equal to or higher than the first voltage. The third drive unit can output a third voltage having a magnitude corresponding to the video signal. The fourth drive unit can output a signal for controlling on / off of the third transistor. The control unit outputs a control signal instructing the fourth drive unit to output a signal for turning off the third transistor during a predetermined period of the period in which the second drive unit outputs the first voltage. It is designed to output.

  In the display device, the driving method thereof, and the electronic device of the present invention, a signal for turning off the third transistor is output for a predetermined period of the period during which the second driving unit outputs the first voltage. As a result, the one connected to the third transistor among the anode and the cathode of the light emitting element is in a floating state, so that a large reverse bias voltage is applied to the light emitting element for the period during which the third transistor is off. The period is shortened. In addition, since the power supply circuit that generates the signal voltage for turning on and off the third transistor can be shared with the power supply circuit that generates other control signals, it is not necessary to provide a new external power supply.

  According to the display device, the driving method thereof, and the electronic apparatus of the present invention, a signal for turning off the third transistor is output for a predetermined period of the period during which the second driving unit outputs the first voltage. Therefore, it is possible to prevent a large reverse bias voltage from being continuously applied to the light emitting element during the period in which the second driving unit outputs the first voltage without providing a new external power supply. Therefore, it is possible to reduce the possibility of dark spots with a simple configuration.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows an example of the entire configuration of a display device 1 according to an embodiment of the present invention. The display device 1 includes, for example, a display unit 10 and a peripheral circuit unit 20 (driving unit) formed around the display unit 10 on a substrate (not shown) made of glass, silicon (Si) wafer, resin, or the like. ).

  The display unit 10 has a plurality of pixels 11 arranged in a matrix over the entire surface of the display unit 10, and displays an image based on the video signal 20a input from the outside by active matrix driving. Each pixel 11 includes a red pixel 11R, a green pixel 11G, and a blue pixel 11B.

  FIG. 2 illustrates an example of the internal configuration of the pixels 11R, 11G, and 11B. In the pixels 11R, 11G, and 11B, as shown in FIG. 2, organic EL elements 12R, 12G, and 12B (light emitting elements) and a pixel circuit 13 are provided.

  The organic EL elements 12R, 12G, and 12B (hereinafter referred to as organic EL elements 12R and the like) have, for example, a configuration in which an anode (anode), an organic layer, and a cathode (cathode) are stacked, although not shown. . The organic layer is, for example, sequentially from the anode side, a hole injection layer that increases hole injection efficiency, a hole transport layer that increases hole transport efficiency to the light emitting layer, and light emission by recombination of electrons and holes. Has a stacked structure in which a light-emitting layer that generates light and an electron-transporting layer that increases the efficiency of electron transport to the light-emitting layer are stacked.

The pixel circuit 13 includes a sampling transistor T _WS (first transistor), a storage capacitor C _s , and a driving transistor T _Dr (second transistor), and has a circuit configuration of 2Tr1C. The transistors T _WS and T _Dr are formed of n-channel transistors (for example, n-channel MOS thin film transistors (TFTs)).

The peripheral circuit unit 20 includes a timing control circuit 21 (control unit), a horizontal drive circuit 22 (third drive unit), a write scan circuit 23 (first drive unit), and a power supply scan circuit 24 (second drive unit). And a cathode scanning circuit 25 (fourth drive unit). The timing control circuit 21 includes a display signal generation circuit 21A and a display signal holding control circuit 21B. The peripheral circuit unit 20 includes a gate line WSL (first wiring), a power supply line PSL (second wiring), a signal line DTL (third wiring), a gate line CSL (fourth wiring), a cathode. A line CTL (fifth wiring), a reverse bias transistor T _ca (third transistor), and a voltage source (not shown) are provided. Note that the reverse bias transistor T _ca is formed of, for example, an n-channel MOS TFT.

  The display signal generation circuit 21A generates a display signal 21a to be displayed on the display unit 10 for each screen (for each display of one field), for example, based on the video signal 20a input from the outside.

  The display signal holding control circuit 21B stores the display signal 21a output from the display signal generation circuit 21A for each screen (for each display of one field), for example, in a field memory composed of SRAM (Static Random Access Memory) or the like. And hold it. The display signal holding control circuit 21B also plays a role of controlling the horizontal driving circuit 22, the writing scanning circuit 23, the power supply scanning circuit 24, and the cathode scanning circuit 25 that drive each pixel 11 to operate in conjunction with each other. Specifically, the display signal holding control circuit 21B has a control signal 21b for the write scanning circuit 23, a control signal 21c for the power supply scanning circuit 24, and a control signal 21d for the horizontal drive circuit 22. The control signal 21e is output to the cathode scanning circuit 25, respectively.

Horizontal drive circuit 22, in response to the control signal 21d outputted from the display signal retention control circuit 21B, 2 kinds of voltage is able to output a _{(V ofs,} V _{sig (third} voltage)). Specifically, the horizontal drive circuit 22 _applies two types of voltages (V _ofs , V _sig) to the pixel 11 selected by the write scanning circuit 23 via the signal line DTL connected to each pixel 11 of the display unit 10. ).

Here, V _sig is a voltage value corresponding to the video signal 20a. The minimum voltage of V _sig is a voltage value lower than V _ofs, and the maximum voltage of V _sig is a voltage value higher than V _ofs .

The write scanning circuit 23, in response to the control signal 21b outputted from the display signal retention control circuit 21B, which is capable of outputting two types of voltage _{(V on1,} V _off1). Specifically, the writing scanning circuit 23 through the gate line WSL connected to each pixel 11 of the display unit 10, to the drive target pixel 11 supplies two kinds of voltages _{(V on1,} V _off1), and performs on-off control of the transistor T _WS for sampling.

_{Here, V on1} is in an ON voltage higher than a value of the transistor _{T WS.} V _on1 is a voltage value output from the write scanning circuit 23 in a “first Vth correction period” and a “write / μ correction period” described later. V _off1 is a value lower than the ON voltage of the transistor _{T WS, and} has a value lower than _{V on1.} V _off1 is a voltage value output from the write scanning circuit 23 in a “Vth correction pause period” or “light emission period” described later.

The power supply scanning circuit 24 can output two types of voltages (V _cc (second voltage), V _ss (first voltage)) in accordance with the control signal 21c output from the display signal holding control circuit 21B. Yes. Specifically, the power supply scanning circuit 24 supplies two types of voltages (V _cc , V _ss ) to the drive target pixel 11 via the power supply line PSL connected to each pixel 11 of the display unit 10, Light emission and quenching of the organic EL element 12R and the like are controlled.

Here, V _ss is a voltage value lower than a voltage (V _el + V _ca ) obtained by adding the threshold voltage V _el of the organic EL element 12R and the like and the cathode voltage V _ca of the organic EL element 12R and the like. V _cc is a voltage value equal to or higher than the voltage (V _el + V _ca ).

The cathode scanning circuit 25 can output two types of voltages (V _on2 , V _off2 ) according to the control signal 21e output from the display signal holding control circuit 21B. Specifically, the cathode scanning circuit 25 supplies two types of voltages (V _on2 , V _off2 ) to the pixel 11 to be driven via the gate line CSL connected to each pixel 11 of the display unit 10. On-off control of the reverse bias transistor _Tca is performed.

_{Here, V on2} is in an ON voltage higher than a value of the transistor _{T ca.} V _on2 is a voltage value output from the cathode scanning circuit 25 in a “Vth correction preparation period” to be described later. V _off2 has a possible value of setting a value lower than the ON voltage of the transistor T _ca, and from the voltage source without the supply voltage (e.g., zero volts). V _off2 is a voltage value output from the writing scanning circuit 23 during a period other than the "Vth correction preparation period" below.

Next, with reference to FIG. 2, the connection relationship of each component is demonstrated. The gate line WSL led out from the write scanning circuit 23 is formed to extend in the row direction and is connected to the gate of the transistor _TWS . The power supply line PSL drawn from the power supply scanning circuit 24 is also formed to extend in the row direction, and is connected to the source or drain of the transistor _TDr . Further, the signal line DTL drawn from the horizontal drive circuit 22 is formed to extend in the column direction and is connected to the source or drain of the transistor _TWS . The gate of the transistor T _Dr for driving towards the non-connected to the signal line DTL of the source and the drain of the transistor T _WS, is connected to one end of the storage capacitor C _s, the power of the source and the drain of the transistor T _Dr the other end of the line PSL and towards the retentive capacity C _s unconnected is connected to the anode of an organic EL element 12R. The cathode of the organic EL element 12R and the like is connected to the cathode line CTL.

The gate line CSL drawn from the cathode scanning circuit 25 is formed to extend in the row direction and is connected to the gate of the transistor _Tca . The transistor _Tca is inserted in series in the cathode line CTL, and one transistor _Tca is provided for each row. The source or drain of the transistor T _ca is connected to the cathode of an organic EL element 12R, the cathode and towards the unconnected organic EL element 12R or the like of the source and the drain of the transistor T _ca via a cathode ray CTL It is connected to a voltage source (not shown).

This voltage source supplies a predetermined voltage (for example, ground voltage) to the cathode line CTL. This voltage source is also connected to the horizontal drive circuit 22, write scan circuit 23, power supply scan circuit 24, and cathode scan circuit 25, and supplies V _ofs and V _sig to the horizontal drive circuit 22 for writing. supplying _{V on1, V off1} the scanning circuit 23, _{V cc,} the _{V ss} supplied to the power source scanning circuit 24, and supplies the _{V on2} relative to the cathode scanning circuit 25. Here, _{V on2} supplied to the cathode scanning circuit 25, since it may be as large as the like for supplying _{V on1} the write scanning circuit _23, the circuit supplies _{V on2} circuit supplies _{V on1} And is common. That is, a circuit for supplying V _on2 is not separately provided in the voltage source. Since V _off2 is not a voltage supplied from the voltage source, a circuit that supplies V _off2 is not provided in the voltage source.

Next, the operation (operation from quenching to light emission) of the display device 1 of the present embodiment will be described. In the present embodiment, or the I-V characteristic changes over time, such as an organic EL element 12R, also the threshold voltage V _th and the mobility μ of the transistor T _Dr is or change over time, without receiving their effects In order to keep the light emission luminance of the organic EL element 12R and the like constant, the compensation operation for the variation of the IV characteristics of the organic EL element 12R and the like, and the variation of the threshold voltage _Vth and mobility μ of the transistor T _Dr A correction operation is incorporated.

FIG. 3 shows an example of various waveforms in the display device 1. FIG. 3 shows a state in which a binary voltage change occurs every moment in the gate line WSL, the power supply line PSL, the signal line DTL, and the gate line CSL. Further, FIG. 3 shows that the gate voltage V _g , the anode voltage V _el and the cathode voltage V _ca change from moment to moment in accordance with the voltage change of the gate line WSL, power supply line PSL, signal line DTL and gate line CSL. The situation is shown.

(Vth correction preparation period)
First, preparation for Vth correction is performed. Specifically, the voltage of the gate line WSL has a _{V off1,} the voltage of the signal line DTL is _{V ofs,} the voltage of the power supply line PSL has a _{V cc,} further voltage of the cathode line CTL There _{V on2} and become in time and in (that is, when the organic EL device 12R and the like is emitting light), lowering the voltage of the power line PSL power scanning circuit 24 in response to the control signal 21c to the _{V ss} from _{V cc} (T ₁ ). Then, the source voltage Vs is lowered to _{V ss,} the organic EL element 12R or the like is quenched. At this time, the gate voltage V _g is also lowered due to coupling via the storage capacitor C _s. Next, while the voltage of the power supply line PSL is V _ss and the voltage of the signal line DTL is V _ofs , the write scanning circuit 23 changes the voltage of the gate line WSL to V according to the control signal 21b. _off1 raised to _{V on1} from _(T 2). As a result, the gate voltage V _g drops to V _ofs . At this time, the potential difference _V gs between the gate voltage _{V g} and the source voltage _{V s (= V ofs -V ini1} ) may be smaller than the threshold voltage _{V th} of the transistor _{T Dr,} same or equal, or May be larger.

Meanwhile, the cathode scanning circuit 25 turns off the transistor T _ca by lowering the voltage of the gate line CSL from V _on2 to V _off2 in accordance with the control signal 21e in a predetermined period of the Vth correction preparation period. Driving to make the cathode line CTL floating is performed. For example, as shown in FIG. 3, the cathode scanning circuit 25 is configured such that the power supply scanning circuit 24 lowers the voltage of the power supply line PSL from V _cc to V _ss according to the control signal 21c and at the same time gates according to the control signal 21e. The voltage of the line CSL is lowered from V _on2 to V _off2 , and then the power supply scanning circuit 24 raises the voltage of the power supply line PSL from V _ss to V _cc according to the control signal 21c, and at the same time, the gate line according to the control signal 21e. the voltage of the CSL increase from _{V off2} to _{V on2.}

FIG. 3 illustrates the case where the voltage fluctuation of the power supply line PSL and the voltage fluctuation of the gate line CSL are synchronized, but these may not be synchronized. For example, the cathode scanning circuit 25, a while after later was lowered to _{V ss} from voltage _{V cc} power supply line PSL power scanning circuit 24 in response to the control signal 21c, the voltage of the gate line CSL in response to a control signal 21e the lowered from _{V on2} to _{V off2,} then the voltage of the power line PSL power scanning circuit 24 in response to the control signal 21c shortly before raising the _{V ss} to _{V cc,} the voltage of the gate line CSL in response to a control signal 21e the may be increased from _{V off2} to _{V on2.}

(First Vth correction period)
Next, _Vth is corrected. Specifically, while the voltage of the signal line DTL is V _ofs , the power supply scanning circuit 24 increases the voltage of the power supply line PSL from V _ss to V _cc according to the control signal 21c (T ₃ ). Then, a current I _ds flows between the drain and source of the transistor T _Dr , and the source voltage V _s increases. After that, before the horizontal drive circuit 22 switches the voltage of the signal line DTL from V _ofs to V _sig according to the control signal 21d, the write scanning circuit 23 changes the voltage of the gate line WSL from V _on1 to V _on according to the control signal 21b. _Lower to _off1 (T ₄ ). Then, the gate of the transistor _TDr becomes floating, and the correction of _Vth is temporarily stopped.

(First Vth correction pause period)
During the period in which the Vth correction is paused (that is, while the voltage of the gate line WSL is V _off1 and the voltage of the power supply line PSL is V _cc ), the row in which the previous Vth correction is performed. In another row (pixel) different from (pixel), the voltage of the signal line DTL is sampled. Specifically, the horizontal drive circuit 22, during the period in which the Vth correction is at rest, after switching the voltage of the signal line DTL from _{V ofs} to _{V sig,} performs the operation of switching from _{V sig} to _{V ofs,} writing While the voltage of the signal line DTL is V _sig , the scanning circuit 23 applies the voltage of the gate line WSL connected to another row (pixel) different from the row (pixel) subjected to the previous Vth correction. After raised to _{V on1} from V _off1, it switched from _{V on1} to _{V off1.} Accordingly, the horizontal drive circuit 22 sets the voltage of the signal line DTL to V _{ofs in} the first half of one cycle (period indicated by 1H in the figure) in order to execute Vth correction in a certain row (pixel), In order to perform sampling in (pixel), an operation is performed in which the voltage of the signal line DTL is set to V _{sig in} the second half of one cycle.

Note that when the Vth correction is insufficient, i.e., the gate of the transistor _{T Dr} - when the potential difference _{V gs} between the source is larger than the threshold voltage _{V th} of the transistor _{T Dr} is also in Vth correction stop period, previously In the row (pixel) subjected to the Vth correction, the current I _ds flows between the drain and source of the transistor T _Dr , the source voltage V _s rises, and the gate voltage V _g also rises due to the coupling through the storage capacitor Cs. To do.

(Second Vth correction period)
After the Vth correction pause period ends, _Vth is corrected again. Specifically, when the voltage of the power supply line PSL is V _cc and the voltage of the signal line DTL is V _ofs and Vth correction is possible, the write scanning circuit 23 controls the control signal 21b. the voltage of the gate line WSL increased from _{V off1} to _{V on1 (T} 5), connects the gate of the transistor _{T Dr} to the signal line DTL in response to. At this time, when the source voltage V _s is lower than V _ofs −V _th (when Vth correction is not yet completed), until the transistor T _Dr is cut off (until the potential difference V _gs becomes V _th ). A current I _ds flows between the drain and source of the transistor T _Dr. Thus, the gate voltage _{V g} is _{V ofs,} and the source voltage _{V s} is increased, as a result, the holding capacitor _{C s} is charged to _{V th,} the potential difference _{V gs} becomes _{V th.} Thereafter, the horizontal drive circuit 22 is the voltage of the signal line DTL before switching from _{V ofs} to _{V sig,} lowering the voltage of the write scan circuit 23 is a gate line WSL from _{V on1} the _{V off1 (T} 6). Then, since the gate of the transistor T _Dr is in a floating state, the potential difference V _gs can be maintained as V _th regardless of the magnitude of the voltage of the signal line DTL. In this way, by setting the potential difference V _gs to V _{th, even} when the threshold voltage V _th of the transistor T _Dr varies from pixel circuit 13 to pixel circuit 13, the emission luminance of the organic EL element 12R and the like varies. Can be eliminated.

(Second Vth correction suspension period)
Thereafter, the horizontal drive circuit 22 switches the voltage of the signal line DTL from V _ofs to V _sig during the Vth correction pause period.

(Writing / μ correction period)
After the second Vth correction pause period, writing and μ correction are performed. Specifically, while the voltage of the signal line DTL is _{V sig,} the voltage of the gate line WSL increased from _{V off1} the _{V on2} in response to a write scanning circuit 23 the control signal 21b _(T 7), the transistor The gate of T _Dr is connected to the signal line DTL. Then, the voltage of the gate of the transistor T _Dr becomes the voltage V _{sig of the} signal line DTL. At this time, the anode voltage of an organic EL element 12R is smaller than the threshold voltage _{V el} still such as organic EL devices 12R at this stage, the organic EL device 12R and the like is cut off. Therefore, the current I _ds flows into the element capacitance (not shown) such as the organic EL element 12R, and the element capacitance is charged. Therefore, the source voltage V _s increases by ΔV, and the potential difference V _gs eventually becomes V _sig + V _th − ΔV. In this way, μ correction is performed simultaneously with writing. Here, since ΔV increases as the mobility μ of the transistor T _Dr increases, variation in the mobility μ for each pixel can be eliminated by reducing the potential difference V _gs by ΔV before light emission.

(Light emission)
Finally, reducing the voltage of the gate line WSL from _{V on1} the _{V off1} in response to a write scanning circuit 23 the control signal 21b _(T 8). Then, the gate of the transistor _{T Dr} is a floating, the drain of the transistor _{T Dr} - current _{I ds} flows between the source, the source voltage _{V s} rises. As a result, a voltage equal to or higher than the threshold voltage _Vel is applied to the organic EL element 12R and the like, and the organic EL element 12R and the like emit light with a desired luminance.

  In the display device 1 of the present embodiment, as described above, the pixel circuit 13 is controlled to be turned on / off in each pixel 11, and a driving current is injected into the organic EL element 12 </ b> R of each pixel 11. Light emission occurs due to recombination with electrons. This light is multiple-reflected between the anode and the cathode, passes through the cathode, etc., and is extracted outside. As a result, an image is displayed on the display unit 10.

By the way, in the conventional display device 100, as shown in FIG. 13, in order to make the potential difference V _gs of the transistor T _Dr exceed V _th in the Vth correction preparation period, the anode voltage V _el (= transistor T _Dr Source voltage) is set to a negative potential. Therefore, reverse bias continues to be applied to the organic EL element 121R and the like throughout this period. The period during which the reverse bias continues to be applied varies depending on the duty ratio between the light emission period and the extinction period (light emission period / extinction period × 100). For example, when the duty ratio is 25%, the period is 75% of the cycle. In the meantime, the reverse bias is continuously applied to the organic EL element 121R and the like.

  In general, the probability that dielectric breakdown (disappearance) occurs when a reverse bias is applied to an organic EL element increases as the magnitude of the reverse bias and the application time increase. Therefore, as described above, when the reverse bias is continuously applied to the organic EL element 121R or the like for a long time, the organic EL element 121R or the like is highly likely to be a dark spot, and the yield may be reduced.

On the other hand, in the present embodiment, the anode voltage V _el (= source voltage of the transistor T _Dr ) is negatively driven in the same way as the conventional one, but in the Vth correction preparation period, in the predetermined time period, by lowering the voltage of the gate line CSL from _{V on2} to _{V off2} in accordance with the control signal 21e, and turns off the transistor _{T ca,} it has a cathode-ray CTL floating. Thus, by the amount of time that the transistor T _ca is off, the large reverse bias voltage (V _ss to the organic EL element 121R and the like, obtained by dividing the cathode voltage when that turns on the transistor T _ca Since the period during which the voltage is applied is shortened, the large reverse bias is not continuously applied to the organic EL element 12R and the like throughout the Vth correction preparation period. As a result, the possibility of dark spots can be reduced.

Further, in the present embodiment, the circuit supplies a voltage V _on2 used for on-off control of the transistor T _ca is possible to commonly as circuit supplies V _on1, voltage circuit for supplying a V _on2 There is no need to provide a separate source. Further, the voltage V _off2 used for on-off control of the transistor T _ca has a possible value of setting the voltage source without the supply voltage (e.g. zero volts), the voltage is also the circuit for supplying a V _off2 There is no need to provide it in the source. Therefore, it is not necessary to provide a new power source in order to reduce the reverse bias applied to the organic EL element 12R and the like. Therefore, in this embodiment, the possibility of dark spots can be reduced with a simple configuration.

[Modification]
In the above-described embodiment, the case where the transistors T _WS and T _Dr are formed by n-channel transistors is exemplified, but they may be formed by p-channel transistors (for example, p-channel MOS type TFTs). However, in that case, as shown in FIG. 4, the other end of the power supply line PSL and the retention capacitor C _s person unconnected of the source and the drain of the transistor T _Dr in the cathode of an organic EL element 12R It is preferable to connect the anode such as the organic EL element 12R to the cathode line CTL.

(Modules and application examples)
Hereinafter, application examples of the display device 1 described in the above embodiment will be described. The display device 1 according to the above embodiment is a television device, a digital camera, a notebook personal computer, a mobile terminal device such as a mobile phone, or a video camera, such as an externally input video signal or an internally generated video signal. The present invention can be applied to display devices for electronic devices in various fields that display images or videos.

(module)
The display device 1 according to the above embodiment is incorporated into various electronic devices such as application examples 1 to 5 described later, for example, as a module shown in FIG. In this module, for example, an area 210 exposed from a member (not shown) that seals the display unit 10 is provided on one side of the substrate 2, and the timing control circuit 21, the horizontal drive circuit 22, The wiring lines of the write scanning circuit 23 and the power supply scanning circuit 24 are extended to form external connection terminals (not shown). The external connection terminal may be provided with a flexible printed circuit (FPC) 220 for signal input / output.

(Application example 1)
FIG. 6 illustrates an appearance of a television device to which the display device 1 of the above embodiment is applied. The television apparatus has, for example, a video display screen unit 300 including a front panel 310 and a filter glass 320, and the video display screen unit 300 is configured by the display device 1 according to the above embodiment. .

(Application example 2)
FIG. 7 shows the appearance of a digital camera to which the display device 1 of the above embodiment is applied. The digital camera includes, for example, a flash light emitting unit 410, a display unit 420, a menu switch 430, and a shutter button 440. The display unit 420 is configured by the display device 1 according to the above embodiment. Yes.

(Application example 3)
FIG. 8 shows the appearance of a notebook personal computer to which the display device 1 of the above embodiment is applied. The notebook personal computer has, for example, a main body 510, a keyboard 520 for inputting characters and the like, and a display unit 530 for displaying an image. The display unit 530 is a display device according to the above embodiment. 1.

(Application example 4)
FIG. 9 shows the appearance of a video camera to which the display device 1 of the above embodiment is applied. This video camera has, for example, a main body 610, a subject photographing lens 620 provided on the front side surface of the main body 610, a start / stop switch 630 at the time of photographing, and a display 640. Reference numeral 640 denotes the display device 1 according to the above embodiment.

(Application example 5)
FIG. 10 shows the appearance of a mobile phone to which the display device 1 of the above embodiment is applied. For example, the mobile phone is obtained by connecting an upper housing 710 and a lower housing 720 with a connecting portion (hinge portion) 730, and includes a display 740, a sub-display 750, a picture light 760, and a camera 770. Yes. The display 740 or the sub-display 750 is configured by the display device 1 according to the above embodiment.

  While the present invention has been described with the embodiment and application examples, the present invention is not limited to the above-described embodiment and the like, and various modifications can be made.

  For example, in the above-described embodiment, the case where the display device 1 is an active matrix type has been described. However, the configuration of the pixel circuit 13 for driving the active matrix is not limited to that described in the above-described embodiment, and is necessary. Depending on the case, a capacitor or a transistor may be added to the pixel circuit 13. In that case, a necessary drive circuit may be added in addition to the above-described horizontal drive circuit 22, write scan circuit 23, and power supply scan circuit 24 according to the change of the pixel circuit 13.

  In the above embodiment and the like, the signal holding control circuit 21B controls the driving of the horizontal driving circuit 22, the writing scanning circuit 23, and the power supply scanning circuit 24. However, other circuits control the driving of these circuits. May be. The control of the horizontal drive circuit 22, the write scanning circuit 23, and the power supply scanning circuit 24 may be performed by hardware (circuit) or software (program).

It is a block diagram showing an example of the display apparatus which concerns on one embodiment of this invention. It is a block diagram showing an example of the internal structure of the pixel of FIG. It is a wave form diagram for demonstrating an example of operation | movement of the display apparatus of FIG. It is a block diagram showing the modification of the display apparatus of FIG. It is a top view showing schematic structure of the module containing the display apparatus of each said embodiment. It is a perspective view showing the external appearance of the application example 1 of the display apparatus of the said embodiment. (A) is a perspective view showing the external appearance seen from the front side of the application example 2, (B) is a perspective view showing the external appearance seen from the back side. 12 is a perspective view illustrating an appearance of application example 3. FIG. 14 is a perspective view illustrating an appearance of application example 4. FIG. (A) is a front view of the application example 5 in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) is a left side view, and (E) is a right side view, (F) is a top view and (G) is a bottom view. It is a block diagram showing an example of the conventional display apparatus. It is a block diagram showing an example of the internal structure of the pixel of FIG. FIG. 12 is a waveform diagram for explaining an example of the operation of the display device of FIG. 11.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Display apparatus, 10 ... Display part, 11, 11R, 11G, 11B ... Pixel, 12R, 12G, 12B ... Organic EL element, 13 ... Pixel circuit, 20 ... Peripheral circuit part, 21 ... Timing control circuit, 21A ... Display signal generating circuit, 21B ... display signal retention control circuit, 22 ... horizontal drive circuit, 23 ... writing scanning circuit, 24 ... power supply scanning circuit, 25 ... cathode scanning circuit, C s _... holding capacity, CSL, WSL ... gate lines, CTL ... cathode-ray, DTL ... signal line, I _{ds ...} current, PSL ... drain _{line, T Dr, T WS, T} ca ... transistors, V g _... gate voltage, V _{gs ...} potential, V s _... source _{voltage, V th} ... Threshold voltage.

Claims (5)

A display unit having a light emitting element and a pixel circuit for each pixel;
A drive unit for driving the pixel circuit based on a video signal,
The pixel circuit includes a first transistor, a second transistor, a third transistor, and a storage capacitor.
The driving unit includes a first driving unit, a second driving unit, a third driving unit, a fourth driving unit, a control unit, a first wiring, a second wiring, a third wiring, and a fourth wiring. A wiring and a fifth wiring;
A gate of the first transistor is connected to the first driver through the first wiring;
A drain or a source of the first transistor is connected to the third driver through the third wiring;
Of the drain and source of the first transistor, the one not connected to the third driver is connected to the gate of the second transistor and one end of the storage capacitor,
A drain or a source of the second transistor is connected to the second driver through the second wiring;
Of the drain and source of the second transistor, the one not connected to the second drive unit is connected to the other end of the storage capacitor and the anode or cathode of the light emitting element,
A gate of the third transistor is connected to the fourth driver through the fourth wiring;
A drain or a source of the third transistor is connected to an anode and a cathode of the light emitting element which are not connected to the second transistor;
Of the drain and source of the third transistor, the one not connected to the light emitting element is connected to the fifth wiring,
The first driving unit can output a signal for controlling on / off of the first transistor;
The second driving unit can output a first voltage lower than a sum of a threshold voltage of the light emitting element and a voltage of the fifth wiring, and a second voltage equal to or higher than the first voltage,
The third driving unit can output a third voltage having a magnitude corresponding to the video signal.
The fourth driving unit can output a signal for controlling on / off of the third transistor,
The control unit outputs a signal for turning off the third transistor to the fourth driving unit for a predetermined period of a period during which the second driving unit outputs the first voltage. A display device that outputs a control signal for instructing. The second transistor is an n-channel transistor;
The display device according to claim 1, wherein an anode of the light emitting element is connected to the second transistor. The second transistor is a p-channel transistor;
The display device according to claim 1, wherein an anode of the light emitting element is connected to the third transistor. A display unit having a light emitting element and a pixel circuit for each pixel;
A drive unit for driving the pixel circuit based on a video signal,
The pixel circuit includes a first transistor, a second transistor, a third transistor, and a storage capacitor.
The driving unit includes a first driving unit, a second driving unit, a third driving unit, a fourth driving unit, a first wiring, a second wiring, a third wiring, a fourth wiring, 5 wirings,
A gate of the first transistor is connected to the first driver through the first wiring;
A drain or a source of the first transistor is connected to the third driver through the third wiring;
Of the drain and source of the first transistor, the one not connected to the third driver is connected to the gate of the second transistor and one end of the storage capacitor,
A drain or a source of the second transistor is connected to the second driver through the second wiring;
Of the drain and source of the second transistor, the one not connected to the second drive unit is connected to the other end of the storage capacitor and the anode or cathode of the light emitting element,
A gate of the third transistor is connected to the fourth driver through the fourth wiring;
A drain or a source of the third transistor is connected to an anode and a cathode of the light emitting element which are not connected to the second transistor;
Of the drain and source of the third transistor, the one not connected to the light emitting element is connected to the fifth wiring,
The first driving unit can output a signal for controlling on / off of the first transistor;
The second driving unit can output a first voltage lower than a sum of a threshold voltage of the light emitting element and a voltage of the fifth wiring, and a second voltage equal to or higher than the first voltage,
The third driving unit can output a third voltage having a magnitude corresponding to the video signal.
The fourth drive unit is capable of outputting a signal for controlling on / off of the third transistor. The fourth drive unit of the display device includes a period during which the second drive unit outputs the first voltage. A display device driving method for outputting a control signal instructing to output a signal for turning off the third transistor for a predetermined period. A display device,
The display device
A display unit having a light emitting element and a pixel circuit for each pixel;
A drive unit for driving the pixel circuit based on a video signal,
The pixel circuit includes a first transistor, a second transistor, a third transistor, and a storage capacitor.
The driving unit includes a first driving unit, a second driving unit, a third driving unit, a fourth driving unit, a control unit, a first wiring, a second wiring, a third wiring, and a fourth wiring. A wiring and a fifth wiring;
A gate of the first transistor is connected to the first driver through the first wiring;
A drain or a source of the first transistor is connected to the third driver through the third wiring;
Of the drain and source of the first transistor, the one not connected to the third driver is connected to the gate of the second transistor and one end of the storage capacitor,
A drain or a source of the second transistor is connected to the second driver through the second wiring;
Of the drain and source of the second transistor, the one not connected to the second drive unit is connected to the other end of the storage capacitor and the anode or cathode of the light emitting element,
A gate of the third transistor is connected to the fourth driver through the fourth wiring;
A drain or a source of the third transistor is connected to an anode and a cathode of the light emitting element which are not connected to the second transistor;
Of the drain and source of the third transistor, the one not connected to the light emitting element is connected to the fifth wiring,
The first driving unit can output a signal for controlling on / off of the first transistor;
The second driving unit can output a first voltage lower than a sum of a threshold voltage of the light emitting element and a voltage of the fifth wiring, and a second voltage equal to or higher than the first voltage,
The third driving unit can output a third voltage having a magnitude corresponding to the video signal.
The fourth driving unit can output a signal for controlling on / off of the third transistor,
The control unit outputs a signal for turning off the third transistor to the fourth driving unit for a predetermined period of a period during which the second driving unit outputs the first voltage. An electronic device that outputs a control signal to instruct.

Images