JP2010027740A - Electronic device, manufacturing method therefor, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device with an Al alloy film having a low specific resistance, avoiding rising of a contact resistance with a transparent conductive film and having an excellent alkaline chemical resistance and a favorable reflectance characteristic. <P>SOLUTION: The electronic device has a metal film pattern 10 at least provided with the Al alloy film and a transparent conductive film pattern 30 directly connected with the Al alloy film via at least its partial region on its substrate. At least one metal element selected from Ni, Co, Pd, Pt, Mo and W is added to the uppermost layer of the Al alloy film, and an O element containing-Al alloy film of an O element composition ratio of at least 0.1 at.% and not more than 6.0 at.% is formed. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an electronic device and a manufacturing method thereof. Furthermore, it is related with the electronic device provided with the said electronic device.

  Currently, display devices such as liquid crystal display devices are widely used in many electronic devices such as mobile phones, personal digital assistants, electronic notebooks, and portable televisions. There are various types of liquid crystal display devices. The operation mode includes a TN (Twisted Nematic) mode, an STN (Super Twisted Nematic) mode, and the like, and the drive method includes a simple matrix method and an active matrix method. A TFT liquid crystal display device including a general thin film transistor (hereinafter abbreviated as “TFT”) adopts a TN mode and an active matrix method, and has the advantage of providing a light, thin, and clean screen for a long time. It is used in many electronic devices.

  The TFT liquid crystal display device has a structure in which a liquid crystal layer is sandwiched between a pair of substrates. The pair of substrates includes a counter electrode having a common electrode formed on the entire inner surface, and a TFT array substrate in which TFT elements and pixel electrodes are arranged on a matrix for each pixel on the inner surface. The TFT element includes a semiconductor film such as amorphous silicon, a three-terminal switch (gate electrode, source electrode, drain electrode) and the like. The semiconductor film constituting the TFT element and the pixel electrode are electrically connected by the drain electrode.

  A transparent conductive material such as indium tin oxide (ITO) excellent in light transmittance is used for the pixel electrode, and aluminum (Al), which is a low resistance material, is used for the drain electrode and the gate wiring, Al alloy is used. However, when Al or Al alloy is in direct contact with ITO, there is a problem that an oxide layer is formed at the interface between the pixel electrode and the drain electrode and the contact resistance is increased.

  As a method for preventing the formation of an oxide layer, Patent Document 1 discloses a configuration in which a refractory metal film such as chromium (Cr) is interposed between a pixel electrode and a drain electrode. However, in order to form a refractory metal film such as Cr, it is necessary to newly add a film forming process or an etching process for pattern formation, which increases the manufacturing process and cost. It was.

  Therefore, Patent Documents 2 to 4 disclose methods capable of omitting the step of forming the refractory metal film. Patent Document 2 proposes a method in which an aluminum alloy containing nickel (Ni) is used as a drain electrode, and the drain electrode is directly brought into contact with a pixel electrode formed of ITO to be electrically connected.

Further, Patent Document 3 discloses an Al layer composed of a first layer made of an Al alloy substantially not containing nitrogen and a second layer made of a nitrogen-containing Al alloy laminated on the first layer. A method has been proposed in which the second layer is removed and the pixel electrode and the first layer are directly connected at least where the pixel electrode and the Al alloy multilayer structure film are in contact with each other. Further, in Patent Document 4, a first layer made of pure Al or an Al alloy and an impurity made of at least one of N, O, Si, and C are added as a gate electrode and a source / drain electrode. The structure which connects the electrode which laminated | stacked the layer and transparent conductive films, such as ITO, is disclosed.
JP-A-4-253342 Paragraph 0009, FIG. JP, 2004-214606, A paragraph numbers 0035, 0038-0044, 0052, 0058, 2nd to 10th, 12th figures JP, 2005-303003, A paragraph numbers 0017-0019 JP-A-11-284195

  By the way, the TFT array substrate is usually manufactured through the following processes. That is, a metal material that is an electrode or wiring material is formed on a transparent substrate, and a photoresist film is applied thereon. Next, after the photoresist film is exposed, it is developed using an organic alkaline developer. Thereby, a photoresist pattern having a desired shape is obtained. Then, using the photoresist pattern as a mask, the metal film is etched, and after obtaining a desired metal film pattern, the photoresist pattern is peeled off. For this reason, the Al alloy film is required to have resistance to alkaline chemicals.

  In order to prevent display unevenness and display failure due to signal delay or the like and provide a high-quality display, it is preferable to reduce the specific resistance of the wiring as much as possible. Therefore, it is desirable to use a material that has high resistance to alkaline chemicals, low specific resistance of the wiring, and as low contact resistance as possible with the transparent conductive film.

  However, the Al alloy containing a Group 8 element of the periodic table such as Ni disclosed in Patent Document 2 has extremely low resistance to an alkaline solution. For this reason, when an Al alloy containing Ni is applied to a wiring or an electrode, if the development treatment is performed with an organic alkaline developer, the wiring and the electrode are dissolved, and the processing accuracy is significantly reduced. For this reason, it has been necessary to employ a process that does not use an alkaline developer or a stripping solution, or sacrifice processing accuracy.

  On the other hand, when an Al alloy film is applied as a reflective pixel electrode of a reflective liquid crystal display device or a transflective liquid crystal display device, it is necessary to have good reflective characteristics. According to Patent Documents 3 and 4, the resistance to alkaline chemicals is improved as compared with Patent Document 2, but there is a problem in that the reflection characteristics deteriorate when a layer to which nitrogen or the like is added is laminated. .

  The present invention has been made in view of the above background, and the object is to have a small specific resistance, avoid an increase in contact resistance with a transparent conductive film, and is excellent in resistance to alkaline chemicals. And providing an electronic device including an Al alloy film having good reflectance characteristics.

  An electronic device according to the present invention comprises, on a substrate, a metal film pattern including at least an Al alloy film, and a transparent conductive film pattern directly connected to the Al alloy film in at least a part of the region, In the uppermost layer, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added, and the composition ratio of the O element is 0.1 at% or more and 6.0 at% or less. The O element-containing Al alloy film is formed.

  According to the present invention, an electronic device including an Al alloy film that has a small specific resistance, can avoid an increase in contact resistance with a transparent conductive film, has excellent resistance to alkaline chemicals, and also has good reflectance characteristics. It has the outstanding effect that it can be provided.

  Hereinafter, an example of an embodiment to which the present invention is applied will be described. It goes without saying that other embodiments may also belong to the category of the present invention as long as they match the gist of the present invention. Moreover, the size and ratio of each member in the following drawings are for convenience of explanation, and are different from actual ones.

[Embodiment 1]
In the first embodiment, a transmissive liquid crystal display device will be described as an example of an electronic device, and a TFT array substrate will be described as an example of an electronic device. In this specification, an electronic device is a passive element classified as an IC (integrated circuit) classified as a microcomputer, an analog, a logic, a memory, a semiconductor element classified as a diode, a transistor, a capacitor, a resistor, or the like. It is a general term for electronic mechanism components classified into components, connectors, switches, and the like, and various substrates such as TFT array substrates. The electronic device refers to all devices on which the electronic device is mounted, and is, for example, a flat display device (flat panel display) such as a liquid crystal display device or an organic EL display device.

  FIG. 1 shows a partially enlarged plan view of a main part of a TFT array substrate which is an electronic device according to the first embodiment. FIG. 2 is a cross-sectional view taken along the line II-II in FIG. A sectional view of the cut portion of the terminal region 43 is shown on the left side in FIG. For convenience of explanation, illustration of an insulating substrate, a gate insulating film, an interlayer insulating film, and the like is omitted in FIG. Moreover, although the transparent conductive film pattern is hatched in FIG. 2, the hatching of the same region is omitted in FIG.

  As shown in FIGS. 1 and 2, the TFT array substrate 101 according to the first embodiment includes an insulating substrate 1, a gate insulating film 2, a semiconductor active film 3, an ohmic low resistance film 4, an interlayer insulating film 5, and a pixel drain. -Contact hole 6, gate terminal part-contact hole 7, source terminal part-contact hole 8, first metal film pattern 10, second metal film pattern 20, transparent conductive film pattern 30 and the like.

  The first metal film pattern 10 is a pattern of a gate wiring (scanning signal line) 11, a gate electrode 12, an auxiliary capacitance wiring 14, a gate terminal portion 15, etc., and the second metal film pattern 20 is a source wiring 21, a source electrode 22, the drain electrode 23, the source terminal portion 25, and the like. The transparent conductive film pattern 30 is a pattern of a transmissive pixel electrode 31 that functions as a pixel electrode, a gate terminal pad 32, a source terminal pad 33, and the like formed in the terminal region 43.

  The gate wiring 11 extends in the horizontal direction in FIG. 1, and a plurality of gate wirings 11 are arranged in the vertical direction. Between the adjacent gate lines 11, an auxiliary capacitance line 14 is formed in parallel with the gate line 11. The auxiliary capacitance line 14 is formed at a position facing the pixel electrode formed in the upper layer of the gate insulating film 2 or the like. Thereby, an auxiliary capacitor is formed.

  The source lines (display signal lines) 21 extend in the vertical direction in FIG. 1 and are arranged in parallel in the horizontal direction so as to intersect with the gate lines 11 via the gate insulating film 2 (see FIG. 2). Yes. A plurality of gate wirings 11 and a plurality of source wirings 21 form a matrix so as to be substantially orthogonal to each other, and a region surrounded by the adjacent gate wirings 11 and the source wirings 21 is a pixel 41. Accordingly, the pixels 41 are arranged in a matrix. A region where a plurality of pixels 41 are formed is a display region. An area partitioned outside the display area is a frame area.

  Each gate line 11 extends from the display area to the gate terminal portion 15. Similarly, each source line 21 extends from the display area to the source terminal portion 25. The gate terminal portion 15 and the source terminal portion 25 are connected to an IC chip (not shown) or a wiring board (not shown) such as an FPC (Flexible Printed Circuit).

  Various signals from the outside are supplied to a gate drive circuit (not shown) and a source drive circuit (not shown) via a wiring board (not shown). The gate driving circuit supplies a video gate signal (scanning signal) to the gate wiring 11 based on an external control signal. The gate lines 11 are sequentially selected by this gate signal. The source drive circuit supplies a display signal (video signal) to the source line 21 based on an external control signal or display data. As a result, a display voltage corresponding to the display data can be supplied to each pixel 41.

  At least one signal transmission TFT 42 is provided near the intersection of the gate wiring 11 and the source wiring 21 of each pixel 41. The gate electrode 12 of the TFT 42 formed in the pixel is connected to the gate wiring 11, and the source electrode 22 of the TFT 42 is connected to the source wiring 21. When a voltage is applied to the gate electrode 12, a current flows from the source wiring 21. Thereby, a display voltage is applied from the source line 21 to the pixel electrode connected to the drain electrode 23 of the TFT 42.

  Next, the configuration of the TFT 42 and its periphery and the terminal region 43 of the TFT array substrate 101 will be described with reference to FIG. The TFT 42 is an inverted stagger type and is manufactured by channel etching. As shown in FIG. 2, the TFT 42 includes an insulating substrate 1, a gate insulating film 2, a semiconductor active film 3 that is a semiconductor layer, an ohmic low resistance film 4, an interlayer insulating film 5, a gate electrode 12, a source electrode 22, and a drain electrode. 23 etc. The terminal region 43 includes a gate terminal portion 15, a source terminal portion 25, a gate terminal pad 32, a source terminal portion pad 33, and the like.

  As the insulating substrate 1, a transparent substrate such as a glass substrate, a quartz substrate, or plastic is used. The gate electrode 12 is formed on the insulating substrate 1 and is formed of the same first metal film pattern 10 as the gate wiring 11, the auxiliary capacitance wiring 14, the gate terminal portion 15, and the like.

  The first metal film pattern 10 according to the first embodiment has a two-layer structure of a first (1) stacked film 10X as a first layer and a first (2) stacked film 10Y as a second layer. The first (1) laminated film 10X is composed of an O element-free Al alloy film that does not substantially contain oxygen except for the unavoidable inclusion of impurities, and the first (2) laminated film 10Y is substantially In particular, it is composed of a conductive O element-containing Al alloy film containing oxygen. In the first (1) laminated film 10X and the first (2) laminated film 10Y according to the first embodiment, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is contained. It has been added. Further, the first (2) stacked film 10Y is adjusted so that the composition ratio of the O element is in the range of 0.1 at% or more and 6.0 at% or less. When the composition ratio of the O element is less than 0.1 at%, resistance to alkalinity is not ensured, and the wiring is corroded to cause disconnection or thinning of the wiring width, which may reduce the manufacturing yield.

  The gate insulating film 2 is formed in an upper layer so as to cover the gate electrode 12 and the like. The semiconductor active film 3 and the ohmic low resistance film 4 are formed on the gate insulating film 2 and are arranged to face at least a part of the gate electrode 12 with the gate insulating film 2 interposed therebetween. The semiconductor active film 3 is composed of, for example, an Si (silicon) film not containing impurities, and the ohmic low resistance film 4 is composed of an ohmic low resistance Si film doped with impurities.

  The ohmic low resistance film 4 has the semiconductor active film 3 formed in the lower layer and the source electrode 22 and the drain electrode 23 formed in the upper layer. The region of the semiconductor layer located below the source electrode 22 is the source region, and the region of the semiconductor layer located below the drain electrode 23 is the drain region. A region of the semiconductor layer where the source electrode 22 and the drain electrode 23 are not formed becomes a channel region. In other words, the channel region is disposed in a region sandwiched between the source region and the drain region. In the channel region, the ohmic low resistance film 4 is removed by back channel etching.

  The source electrode 22 and the drain electrode 23 are arranged to face at least a part of the gate electrode 12 with the gate insulating film 2, the semiconductor active film 3, and the ohmic low resistance film 4 interposed therebetween. That is, in order to operate as the TFT 42, the thin film transistor region exists on the gate electrode 12 and is easily affected by an electric field when a voltage is applied to the gate electrode 12. The drain electrode 23 is composed of the same second metal film pattern 20 as the source wiring 21, the source electrode 22, the source terminal portion 25, and the like.

  The interlayer insulating film 5 is formed so as to cover the gate insulating film 2, the semiconductor active film 3, the source electrode 22, and the drain electrode 23 (see FIG. 2). A transparent conductive film pattern 30 is formed on the interlayer insulating film 5. In the TFT 42 disposed in the pixel region, a transmissive pixel electrode 31 that functions as a pixel electrode is formed. A gate terminal pad 32 is provided above the gate terminal portion 15, and a source terminal is provided above the source terminal portion 25. A pad 33 is provided.

  The pixel drain-contact hole 6 is a through hole formed in the interlayer insulating film 5 so as to connect the drain electrode 23 and the transmissive pixel electrode 31. Similarly, the gate terminal portion-contact hole 7 has a through hole in the interlayer insulating film 5 and the gate insulating film 2 and the first (2) stacked film 10Y so that the gate terminal portion 15 and the gate terminal pad 32 are connected. The source terminal portion-contact hole 8 is formed by forming a through hole in the interlayer insulating film 5 so that the source terminal portion 25 and the source terminal pad 33 are connected. In the formation region of the gate terminal portion-contact hole 7, the first (2) laminated film 10Y which is the second layer of the first metal film pattern 10 is removed, and the first (1) laminated film 10X and the gate terminal are removed. The pad 32 is directly connected. An alignment film (not shown) is formed on the surface of the TFT array substrate 101.

  A counter substrate is disposed opposite to the TFT array substrate 101. The counter substrate is, for example, a color filter substrate, and is disposed on the viewing side. On the counter substrate, a color filter, a black matrix (BM), a counter electrode, an alignment film, and the like are formed. The counter electrode may be disposed on the TFT array substrate 101 side. The TFT array substrate 101 and the counter substrate are bonded to each other through a certain gap (cell gap), and liquid crystal is injected into this gap and sealed. Furthermore, a polarizing plate, a phase difference plate, and the like are provided on the outer surfaces of the TFT array substrate 101 and the counter substrate. A backlight unit or the like is disposed on the non-viewing side of the liquid crystal display panel. The liquid crystal display device according to the first embodiment is configured as described above.

  Next, the operation of the liquid crystal display device according to the first embodiment will be described. The liquid crystal is driven by the electric field between the transmissive pixel electrode 31 that is a pixel electrode and the counter electrode. That is, the alignment direction of the liquid crystal between the substrates changes. As a result, the polarization state of the light passing through the liquid crystal layer changes. That is, the polarization state of light that has been linearly polarized after passing through the polarizing plate is changed by the liquid crystal layer. And the light quantity which passes the polarizing plate by the side of a counter substrate changes with the polarization states.

  The alignment direction of the liquid crystal changes depending on the applied display voltage. Therefore, the amount of light passing through the viewing-side polarizing plate can be changed by controlling the display voltage. That is, a desired image can be displayed by changing the display voltage for each pixel.

  Next, a manufacturing method of the TFT array substrate 101 will be described using the flowchart of FIG. In the first embodiment, the TFT array substrate 101 is manufactured by five photolithography processes.

(A) First photoengraving process First, the insulating substrate 1 is washed with pure water (a). Instead of pure water, hot sulfuric acid or the like may be used. Next, a first metal film for forming the gate wiring 11, the gate electrode 12, the auxiliary capacitance wiring 14, the gate terminal portion 15 and the like is formed on the insulating substrate 1 by a sputtering method or the like (b). Thereafter, a resist pattern is obtained by the first photolithography process (c). Then, the first metal film pattern 10 is obtained by performing wet etching (d). Thereafter, the resist pattern is removed and pure water cleaning is performed (e).

As a preferable example of the film forming method, a sputtering method using a known Ar gas or Kr gas can be given. In the first embodiment, as the first (1) laminated film 10X of the first metal film, an AlNi alloy target containing 2 at% Ni is used to form a film having a thickness of about 200 nm by a DC magnetron sputtering method. Then, as the first (2) laminated film 10Y of the first metal film, AlNixOy (x with the addition of oxygen (O) by reactive sputtering using a mixed gas obtained by adding an _{O 2} gas to the known Ar gas, y Is an integer (hereinafter the same) alloy film having a thickness of 10 nm. As a result, an AlNi alloy thin film having a thickness of 200 nm and an AlNixOy film having a thickness of 10 nm were obtained. The O element composition ratio in the AlNixOy film in the first (2) stacked film 10Y in the first metal film pattern 10 was 4 at%.

  In the first photolithography process, a resist was applied, exposed, and developed using an alkaline developer to obtain a resist pattern. When Ni is added to Al, there is a problem that the alkaline developer is corroded as described above. However, in Embodiment 1, since the AlNixOy film (first (2) stacked film 10Y) to which oxygen is added is formed on the AlNi alloy film (first (1) stacked film 10X), an alkaline developer is used. It is possible to improve resistance to That is, corrosion of the AlNi alloy can be prevented and the pattern accuracy can be increased. Thereafter, the first (1) stacked film 10X and the first (2) stacked film 10Y are collectively etched by using a known chemical solution of phosphoric acid + nitric acid + acetic acid, thereby forming the first metal film pattern 10 (gate wiring). 11 and the gate electrode 12). In addition, although the example which adds Ni to Al was demonstrated, the same group 8 3d transition metal (Co, Fe) as Ni may be used, and also a group 8 transition metal (Pd, Pt) or a group 4 transition metal ( Even if Mo, W) is used, the same effect can be obtained. From the viewpoint of reducing the specific resistance, it is preferable to use a group 8 3d transition metal (Ni, Co, Fe).

  The composition ratio of Ni in the AlNi alloy film in the first (1) laminated film 10X of the first metal film pattern 10 was 2 at%, which is substantially the same as the target composition. The specific resistance value was about 12 μΩ · cm immediately after film formation, but was about 5 μΩ · cm after a process temperature of about 300 ° C. The specific resistance value of 5 μΩ · cm is lower than the specific resistance value of a general conventional refractory metal, and the resistance of the gate wiring 11 and the like can be lowered by the configuration of the first embodiment.

  Note that an Al alloy film to which at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added is sputtered using an Al alloy target containing the corresponding metal element. Just do it. By using an Al alloy film containing at least one of the above metal elements, a transparent conductive film such as ITO and good contact resistance can be realized.

  A preferable range of the addition amount of at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W added to Al constituting the first metal film is 0.1 at% or more and 6.0 at%. % Or less. When the addition amount of at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W exceeds 6.0 at%, the specific resistance of the Al alloy increases, and is represented by Cr and Mo. The specific resistance is almost the same as that of a refractory metal, and the low resistance characteristic of the Al alloy cannot be realized. On the other hand, if it is less than 0.1 at%, the concentrated layer, precipitates, and intermetallic compound formed at the contact interface with the pixel electrode as described in Patent Document 2 are insufficient, and the contact resistance reduction effect Is difficult to obtain. A more preferable range is 0.2 at% or more and 5.0 at% or less, and a particularly preferable range is 0.5 at% or more and 4 at% or less.

  The film thickness of the O element-containing Al alloy film constituting the upper layer of the first metal film is preferably 5 nm or more and 200 nm or less. When the thickness is less than 5 nm, it is difficult to stably ensure resistance to an alkaline developer. On the other hand, if the film thickness exceeds 200 nm, the process stability when removing the upper AlNiOy film in the process (step D) described later is lowered.

(B) Second Photoengraving Process A gate insulating film 2, a semiconductor active film 3, and an ohmic low resistance film 4 are sequentially formed (f). Next, in order to pattern the semiconductor active film 3 and the ohmic low resistance film 4, a second photolithography is performed (g). Next, the semiconductor active film 3 and the ohmic low resistance film 4 are etched by dry etching (h). Then, resist removal and pure water cleaning are performed (i). Thereby, a semiconductor layer composed of the semiconductor active film 3 and the ohmic low resistance film 4 is formed as a semiconductor pattern.

In the first embodiment, a silicon nitride SiN film is 400 nm as the gate insulating film 2, an amorphous silicon (a-Si) film is 150 nm as the semiconductor active film 3, and ohmic low resistance by chemical vapor deposition (CVD). As the film 4, an n ⁺ a-Si film doped with phosphorus (P) as an impurity was sequentially formed with a thickness of 50 nm. Thereafter, the semiconductor active film 3 and the ohmic low resistance film 4 were etched by a dry etching method using a known fluorine-based gas. The impurities added to the ohmic low resistance film 4 may be added after the film formation.

(C) Third photoengraving process A second metal film for forming the source wiring 21, source electrode 22, drain electrode 23, source terminal portion 25, etc. is formed (j). After forming the second metal film, a third photolithography process is performed to obtain the second metal film pattern 20 (k). Thereafter, the second metal film is wet-etched (l) to obtain the second metal film pattern 20 (source wiring 21, source electrode 22, etc.). Next, dry etching of the ohmic contact low resistance film 4 is performed (m) to form a channel portion of the TFT. Then, the resist is removed and pure water cleaning is performed (n).

  The second metal film pattern 20 can have the same configuration as the first metal film pattern 10. In addition, Cr, Mo, or an alloy thereof can be suitably used that provides good contact characteristics (particularly, good electrical contact resistance characteristics) with the transparent conductive film used for the transmissive pixel electrode. In the second metal film pattern 20 according to the first embodiment, a Cr film was formed by a DC magnetron sputtering method using a known Ar gas using a Cr target. The film thickness was 200 nm. The dry etching of the ohmic low resistance film 4 was performed by a known dry etching method containing a fluorine-based gas.

(D) Fourth photolithography process The interlayer insulating film 5 is formed (o). Then, a fourth photoengraving is performed to form contact holes (pixel drain-contact hole 6, gate terminal portion-contact hole 7 etc.) in the interlayer insulating film 5 (p). Next, contact holes are formed in the interlayer insulating film 5 and the like by dry etching (q). Thereafter, the resist pattern is peeled off and pure water cleaning is performed (r). Thereby, an interlayer insulating film 5 having a contact hole is obtained.

  As the interlayer insulating film 5 according to the first embodiment, a silicon nitride SiN film having a thickness of 300 nm was formed by a chemical vapor deposition (CVD) method. Film formation was performed under substrate heating conditions of about 300 ° C. A known fluorine-based gas was used for the dry etching. The pixel drain-contact hole 6, the gate terminal portion-contact hole 7, the source terminal portion-contact hole 8 and the like were formed at the same time.

  In dry etching, the first (2) stacked film 10Y at the position where the gate terminal portion-contact hole 7 is formed is collectively etched when the interlayer insulating film 5 and the gate insulating film 2 are etched. In other words, the O element-containing Al alloy film in the gate terminal portion-contact hole 7 formation region is removed by etching, and the first (1) stacked film 10X which is the lower O element-free Al alloy film is exposed. Thereby, only at the position where the gate terminal portion-contact hole 7 is formed, the gate terminal portion 15 is constituted by a single layer of the first (1) stacked film 10X, and the other gate terminal portion 15 regions are formed in the first (1) (1). ) A two-layer structure of a laminated film and a first (2) laminated film.

(E) Fifth photolithography process In order to form the transmissive pixel electrode 31, the gate terminal pad 32, the source terminal pad 33, etc., first, a transparent conductive film is formed (s). Next, in order to pattern the transparent conductive film, the fifth photolithography is performed (t). Thereafter, the transparent conductive film pattern 30 is formed by wet etching (u), and the resist pattern is peeled off (v). Thereby, the transmissive pixel electrode 31, the gate terminal pad 32, the source terminal pad 33, and the like are formed.

As the transparent conductive film according to the first embodiment, an ITO film in which indium oxide (In ₂ O ₃ ) and tin oxide (SnO ₂ ) are mixed was used. Then, a transparent conductive film was formed to a thickness of 100 nm by a sputtering method using a known Ar gas. In the wet etching, a known solution containing hydrochloric acid + nitric acid was used.

  The ITO film constituting the gate terminal pad 32 is directly connected to the O element-free Al alloy film (first (1) laminated film 10X) constituting the gate terminal portion 15 via the gate terminal portion-contact hole 7. The For this reason, contact resistance can be reduced. The ITO film constituting the source terminal pad 33 is directly connected to the Cr film constituting the source terminal portion 25 via the source terminal portion-contact hole 8. For this reason, contact resistance can be reduced. Thereafter, the substrate is held in the atmosphere at about 300 ° C. for 30 minutes. The TFT array substrate 101 is manufactured through the above steps and the like.

In the first embodiment, an example in which an ITO film is used as the transparent conductive film has been described. However, the present invention is not limited to this, and includes at least one of indium oxide, tin oxide, and zinc oxide. A transparent conductive film can be suitably applied. For example, when an IZO film in which zinc oxide is mixed with indium oxide is used, a weak acid such as an oxalic acid system can be used as the wet etching solution instead of the strong acid such as the hydrochloric acid + nitric acid system described above. . For this reason, when IZO is applied as the transparent conductive film, even when an Al alloy film having poor acid resistance is applied to the first metal film pattern 10 or the like, disconnection corrosion of the Al alloy film due to the penetration of the chemical solution can be prevented. . Further, when the oxygen composition of the sputtered films of indium oxide, tin oxide, and zinc oxide is less than the chemical theoretical composition and the characteristics such as transmittance and specific resistance are not sufficient, not only Ar gas but also O gas is used as the sputtering gas. It is preferable to form a film using a gas in which _two gases or H ₂ O gas is mixed.

  As described above, an Al alloy to which at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W represented by an AlNi alloy is added has a problem of corroding against an alkaline chemical solution. is there. As a method for solving this problem, as described in Patent Document 3, there is a method of forming an Al alloy film containing nitrogen in the upper layer of the AlNi alloy. As a result of repeated studies by the present inventors, by using the Al alloy film of Embodiment 1, the contact resistance between the Al alloy film and the transparent conductive film is reduced, and both alkali resistance and low specific resistance are provided. I was able to find out. Specifically, in a metal pattern including at least an Al alloy film, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added to the uppermost layer of the Al alloy film, and When the composition ratio of the O element is 0.1 at% or more and 6.0 at% or less, the contact resistance between the Al alloy film and the transparent conductive film is reduced, and the alkali resistance and the low specific resistance are combined. I found it.

  FIG. 4 shows a plot of the etching rate (nm / min) for an alkaline developer against the composition ratio (at%) of oxygen in the O element-containing AlNi alloy film. Further, as in Patent Document 3 above, an AlNi alloy film containing nitrogen is produced, and the etching rate for an alkaline developer (at%) with respect to the composition ratio (at%) of nitrogen in the N element-containing AlNi alloy film ( The plot of (nm / min) is also shown. From the figure, it can be seen that in the N element-containing AlNi alloy film, the chemical resistance to the alkaline developer is improved when the nitrogen composition ratio is 10 at% or more. On the other hand, the O element-containing AlNi alloy film shows better characteristics than the N element-containing AlNi alloy film when the oxygen composition ratio is 8.0 at% or less.

  FIG. 5 shows a plot of specific resistance (μΩ · cm) against the composition ratio (at%) of oxygen in the O element-containing AlNi alloy film. Similarly to FIG. 4, the specific resistance (μΩ · cm) is plotted against the composition ratio (at%) of nitrogen in the N element-containing AlNi alloy film. In order to improve the chemical resistance with respect to the alkaline developer, it was found that the nitrogen composition ratio should be 10 at% or more from the result of FIG. 4, but from FIG. 5, when the nitrogen composition ratio is 10 at% or more. It can be seen that the specific resistance exceeds 20 μΩ · cm. That is, in the N element-containing AlNi alloy film, it is understood that the specific resistance increases when an area having high resistance to the alkaline developer is used.

  On the other hand, in the case of the O element-containing AlNi alloy film, the same amount of the N element-containing AlNi alloy is obtained when the oxygen composition ratio is less than 8.0 at%, which is superior to the N element-containing AlNi alloy film. A specific resistance characteristic better than that of the film can be obtained. That is, in the case of the O element-containing AlNi alloy film, it is possible to obtain a region having high resistance to an alkaline developer and good specific resistance.

  The preferable range of the composition ratio (at%) of oxygen in the O element-containing AlNi alloy film is 0.1 at% or more in consideration of process stability from the viewpoint of chemical resistance to an alkaline developer. It is preferable to set it to 0 at% or less. By setting within this range, the specific resistance of the O element-containing AlNi alloy film can be set to 15 μΩ · cm or less. This value is superior to the specific resistance of the N element-containing AlNi alloy film. A more preferable range is 0.5 at% or more and 5.0 at% or less. By setting within this range, it is possible to more effectively realize an alkali resistance property superior to that of an Al alloy film added with nitrogen and a good specific resistance property.

  According to the first embodiment, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is used as the uppermost layer (first (2) metal film 10Y) of the first metal film pattern. Is added, and the composition ratio of O element is 0.1 at% or more and 6.0 at% or less, and the O element-containing Al alloy film is disposed, so that the resistance to alkaline chemicals is improved and good Specific resistance characteristics can be realized. For this reason, it is possible to improve the pattern accuracy while applying a commonly used alkaline chemical to the developer or etching solution.

  Further, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added, and the composition ratio of the O element is 0.1 at% or more and 6.0 at% or less. By applying the O element-containing-Al alloy film, an increase in contact resistance between the O element-containing-Al alloy film and the transparent conductive film pattern can be avoided. Moreover, according to the first embodiment, the AlNixOy film that is the O element-containing Al alloy film of the gate terminal portion 15 is removed in the dry etching process for forming the gate terminal portion-contact hole 7, and the transparent conductive film and Since the first (1) laminated film 10X which is an O element-free Al alloy film is directly connected, the contact resistance can be more effectively reduced. By using a group 8 3d transition metal element (Ni, Co, Fe) among the above metal elements, the specific resistance can be further reduced.

  In addition, since the specific resistance is small as compared with the case where nitrogen is added to the AlNi alloy film, display unevenness and display failure due to signal delay of wirings can be reduced, and a high-quality display can be provided. Furthermore, since the wiring resistance value is lower than that of the AlNi alloy film to which nitrogen is added, the wiring can be made thinner, and the cross-sectional shape of each film type laminated on the upper layer is improved. Therefore, it is possible to provide a display that reduces defects due to the wiring shape and realizes high yield and high reliability.

  In the first embodiment, the first metal film pattern 10 connected to the transparent conductive film pattern is directly composed of the transparent conductive film pattern 30 and the first (1) laminated film 10X that is an O element-free Al alloy film. However, the transparent conductive film pattern 30 may be directly connected to the second (2) stacked film 10Y that is an O element-containing Al alloy film. When the contact portion with the transparent conductive film pattern 30 is an O element-containing Al alloy film, the material of the first (1) laminated film 10X is not particularly limited, and Ni, Co, Fe, Pd, Pt, Mo, And an Al film to which at least one metal element selected from W is not added, an Al alloy, another metal film, or the like can be used. For this reason, the freedom degree of material selection increases.

  In the first embodiment, the example of the two-layer structure is described as the first metal film pattern 10, but it may be a single layer or may have a multilayer structure of three or more layers. Furthermore, the composition ratio of the O element in the first metal film pattern 10 may be configured to continuously increase in the film thickness direction. In the first embodiment, the example in which the Cr film is used as the second metal film pattern 20 has been described. However, the same configuration as that of the first metal film pattern 10 according to the first embodiment may be used. is there. By doing in this way, the specific resistance of the source terminal part 25 and the source terminal pad 33 and the source electrode 23 and the transmissive pixel electrode 31 can be further reduced.

  In addition, it is described that at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added to the Al alloy film directly connected to the transparent conductive film pattern. Furthermore, you may contain the at least 1 sort (s) of element chosen from rare earth elements, such as Nd and Y. In this case, there is an effect of suppressing hillocks generated by the heat treatment of the Al film or the Al alloy film, and a more reliable display can be supplied. However, when the composition ratio is 0.1 at% or less, the effect of suppressing hillocks is not sufficient, and when it exceeds 6.0 at%, the resistance becomes the same as that of refractory metals such as Cr and Mo. The amount of element added is preferably 0.1 at% or more and 6.0 at% or less.

[Embodiment 2]
Next, an example of a TFT array substrate different from that of the first embodiment will be described. In the following description, the same elements as those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted as appropriate.

  The basic structure and manufacturing method of the TFT array substrate according to Embodiment 2 are the same as those of Embodiment 1 except for the following points. That is, the first metal film pattern 10 according to the first embodiment includes an O element-free Al alloy film and an O element-free Al alloy film that are substantially free of oxygen except for the unavoidable inclusion of impurities. Although the example formed by the metal film pattern which is formed in the layer directly above and has a layered structure of the O element-containing Al alloy film substantially containing oxygen has been described, the first metal film pattern according to the second embodiment is It is different in that it is composed of a single layer structure of an O element-containing Al alloy film substantially containing oxygen. Further, in the first embodiment, the transmissive pixel electrode 31 and the O element-free Al alloy film of the gate terminal portion 15 are directly connected, whereas in the second embodiment, the transmissive pixel electrode 31 and the gate are connected. The difference is that the O element-containing Al alloy film of the terminal portion 15 is directly connected.

  FIG. 6 is a cross-sectional view of a cut portion of the TFT array substrate 102 according to the second embodiment. The cut location is the same as in FIG. As described above, the first metal film pattern 10a of the TFT array substrate 102 according to the second embodiment has a single-layer structure of an O element-containing-Al alloy film substantially containing oxygen. The gate terminal portion pad 32 that is the transparent conductive film pattern 30 and the O element-containing-Al alloy film constituting the gate terminal portion 15 are directly connected through the gate terminal portion-contact hole 7.

The film formation conditions of the first metal film pattern 10a in the second embodiment are the same as the film formation conditions of the O element-containing-Al alloy film in the first embodiment. However, the film thickness was 200 nm. Specifically, an AlNixOy alloy to which oxygen (O) was added was formed by a reactive sputtering method using a mixed gas in which O ₂ gas was added to known Ar gas. As a result, a first metal film pattern 10a made of a single layer film made of an AlNixOy film having a thickness of 200 nm was obtained. The O element composition ratio in the first metal film pattern 10a was 4 at%. The preferable range of the addition amount of at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W added to Al constituting the first metal film is the same as that of the first embodiment. is there.

  According to the second embodiment, the same effect as in the first embodiment can be obtained. Furthermore, since the first metal film pattern 10a has a single-layer structure, the film forming process can be shortened compared to the first embodiment, and the cost can be reduced. In the case of a laminated structure of an O element-free Al alloy film and an O element-containing Al alloy film, it is necessary to select an etching solution or set etching conditions in consideration of the etching rate. However, in the second embodiment, such a problem does not occur due to the single layer structure. Therefore, the degree of freedom of process can be increased. In addition, there is an advantage that it is easy to provide a TFT array substrate with high reliability and high yield.

[Embodiment 3]
The basic structure and manufacturing method of the TFT array substrate according to Embodiment 3 are the same as those of Embodiment 1 except for the following points. That is, the second metal film pattern 20 according to the first embodiment has been described with respect to the Cr film. However, the second metal film pattern 20b according to the third embodiment has the second (1 ) A difference is that the laminated film 20X has a three-layer structure of a second (2) laminated film 20Y as the second layer and a second (3) laminated film 20Z as the third layer.

  FIG. 7 is a cross-sectional view of a cut portion of the TFT array substrate according to the third embodiment. The second metal film pattern 20b of the TFT array substrate 103 according to the third embodiment has a three-layer structure of a second (1) stacked film 20X, a second (2) stacked film 20Y, and a second (3) stacked film 20Z. Become. The second (1) laminated film 20X is composed of a barrier metal film such as Cr or Mo that reduces the contact resistance with the ohmic low resistance film 4, and the second (2) laminated film 20Y is inevitably included as an impurity. Except for this, it is composed of an O element-free Al alloy film that does not substantially contain oxygen. The second (3) laminated film 20Z is composed of an O element-containing-Al alloy film substantially containing oxygen. The composition ratio of the O element in the O element-containing Al alloy film is adjusted to be 0.1 at% or more and 6.0 at% or less. In addition, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added to the O element-containing Al alloy film and the O element-free Al alloy film.

  The manufacturing method is performed according to the flowchart of FIG. 3 described in the first embodiment. However, film formation (j) of the second metal film in the process C is performed so as to have the above three-layer structure instead of the Cr single layer. Then, patterning is performed in the third photolithography process (k), and then wet etching of the second metal film is performed (l). In the wet etching, first, the uppermost second (3) laminated film 20Z and the second (2) laminated film 20Y located thereunder are etched, and then the lowermost second (1) (1). The stacked film 20X is etched.

  As the second (1) laminated film 20X, Cr, Mo, Ti, Ta having good contact characteristics with the ohmic low resistance film 4 or an alloy film containing them as a main component can be cited as a suitable example. In particular, Mo, Ti, or an alloy containing these as a main component can be collectively etched with the same known etchant in the above wet etching process in combination with an AlNi alloy film. It is more preferable from the viewpoint of shortening the number.

  In the third embodiment, a Cr film is formed using a Cr target as the second (1) laminated film 20X. Specifically, a film having a thickness of 100 nm was formed by a DC magnetron sputtering method using a known Ar gas. Next, as the second (2) laminated film 20Y, an AlNi alloy film having a thickness of about 100 nm is formed by a DC magnetron sputtering method using an AlNi alloy target containing 2 at% Ni by a sputtering method using a known Ar gas or Kr gas. The film was formed with a thickness of.

Thereafter, an AlNixOy alloy film having a thickness of 10 nm was formed as a second (3) laminated film 20Z by a reactive sputtering method using a mixed gas obtained by adding O ₂ gas to a known Ar gas. As described above, the Cr film (100 nm) as the second (1) laminated film 20X, the AlNi alloy film (100 nm) as the second (2) laminated film 20Y, and the AlNixOy film (10 nm) as the second (3) laminated film 20Z. ) Was obtained in this order. The O element composition ratio in the second (3) laminated film 20Z was 4 at%.

  In step D shown in FIG. 3, as in the first embodiment, an interlayer insulating film 5 is formed (o), and a resist pattern for forming contact holes and the like is formed by the fourth photolithography process. (P), dry etching (q) is performed to form a contact hole, and the transparent conductive film pattern 30 at a desired position is directly connected to the second metal film pattern 20b and the first metal film pattern 10. .

  In the third embodiment, the conditions of the manufacturing process D are the same as those in the first embodiment. That is, as the interlayer insulating film 5 according to the third embodiment, a silicon nitride SiN film having a thickness of 300 nm is formed by a chemical vapor deposition (CVD) method. Film formation was performed under substrate heating conditions of about 300 ° C. A known fluorine-based gas was used for the dry etching. The pixel drain-contact hole 6, the gate terminal portion-contact hole 7, the source terminal portion-contact hole 8 and the like were formed at the same time as in the first embodiment.

  In dry etching, as in the first embodiment, the etching of the first (2) stacked film 10Y at the position where the gate terminal portion-contact hole 7 is formed is collectively performed with the etching of the gate terminal portion-contact hole 7. And do it. Similarly, etching of the second (3) stacked film 20Z at the position where the pixel drain-contact hole 6 and the source terminal portion-contact hole 8 are formed is performed on the pixel drain-contact hole 6 and the source terminal portion-contact hole 8. Etching at once.

  In other words, by dry etching, the second (3) stacked film 20Z and the first (2) stacked film 10Y, which are O element-containing Al alloys, are removed at the contact hole formation position, and the second (2) The laminated film 20Y and the first (1) laminated film 10X are exposed. Then, through the manufacturing process E, the transparent conductive film pattern 30 is directly connected to the second (2) laminated film 20Y and the first (1) laminated film 10X.

  According to the third embodiment, the same effect as in the first embodiment can be obtained. Further, by configuring the second metal film pattern 20b as described above, the second conductive film pattern 20b (the source wiring 21, the source electrode 22, the drain electrode 23, the source terminal portion 25, etc.) as compared with the first embodiment. The specific resistance can be reduced. By reducing the wiring resistance of the source wiring 21, it is possible to provide a high-quality display with little signal delay.

[Embodiment 4]
Next, an example in which the electronic apparatus according to the invention is applied to a transflective liquid crystal display device will be described. The basic structure and manufacturing method of the TFT array substrate according to the fourth embodiment are the same as those of the third embodiment except for the following points. That is, the TFT array substrate according to the third embodiment includes the transmissive pixel electrode as the pixel electrode, but the TFT array substrate according to the fourth embodiment includes the reflective pixel electrode and the transmissive pixel electrode as the pixel electrode. The point is different. The manufacturing method according to the fourth embodiment is the same as the manufacturing method according to the third embodiment except that the exposure mask for forming a resist pattern for forming the second metal film pattern 20 according to the third embodiment is changed. It is.

  FIG. 8 is a partially enlarged plan view of the main part of the TFT array substrate of the transflective liquid crystal display device according to the fourth embodiment. FIG. 9 is a cross-sectional view taken along the line IX-IX in FIG. A sectional view of the cut portion of the terminal region 43 is shown on the left side in FIG. For convenience of explanation, illustration of an insulating substrate, a gate insulating film, an interlayer insulating film, and the like is omitted in FIG. Further, the transparent conductive film pattern is hatched in FIG. 9, but in FIG. 8, the hatching of the same region is omitted.

  As shown in FIGS. 8 and 9, the TFT array substrate 104 according to the fourth exemplary embodiment includes a reflective pixel electrode 26 and the like in addition to the components described in the third exemplary embodiment. The reflective pixel electrode 26 is configured by the second metal film pattern 20. Specifically, the reflective pixel electrode 26 is formed as an integral pattern with the drain electrode in a region extending from the drain electrode 23 that also constitutes the second metal film pattern 20.

  As a result of intensive studies by the inventors, the metal film pattern directly connected to the transparent conductive film pattern 30 is selected from Ni, Co, Fe, Pd, Pt, Mo, and W as at least the uppermost layer. By using an O element-containing Al alloy film in which at least one metal element is added and the composition ratio of O element is 0.1 at% or more and 6.0 at% or less, good reflectance characteristics are provided. I found what I could do.

  FIG. 10 shows a plot of reflectance (%) at 550 nm against the oxygen composition ratio (at%) in the O element-containing AlNi alloy film. Also shown is a plot of the reflectance (%) at 550 nm against the composition ratio (at%) of nitrogen in the N element-containing AlNi alloy film. When the AlNi alloy film did not contain N element and O element, the reflectance was 88% (see FIG. 10). On the other hand, in the case of an AlNi alloy film having a composition ratio of N element of 4 at%, the reflectance is 83.5%, and it can be seen that the reflection characteristics are deteriorated by adding nitrogen.

  On the other hand, in the case of an AlNi alloy film having an O element composition ratio of 4 at%, the reflectance is 86%, and the reduction in reflectance characteristics can be suppressed as compared with the case where the same amount of nitrogen is added. Recognize. As a result of repeated studies, it was found that good reflection characteristics can be obtained by setting the O composition ratio to 6.0 at% or less.

  According to the fourth embodiment, the same effect as that of the third embodiment can be obtained. Furthermore, by applying the second metal film pattern 20c as the reflective pixel electrode 26, it is possible to provide the TFT array substrate 104 with good reflection characteristics.

  In the fourth embodiment, the reflective pixel electrode 26, which is a region extending from the drain electrode 23 serving as the reflective region R, is covered with the interlayer insulating film 5, but the TFT array substrate 104A shown in FIG. As described above, the interlayer insulating film 5 on the reflective pixel electrode 26 may be removed. In this case, if the O element-containing Al alloy film (for example, AlNixOy film) formed on the reflective pixel electrode 26 is set to about 10 nm, the O element-containing Al alloy film is simultaneously removed during the dry etching of the interlayer insulating film 5. can do. Thereby, the reflectance can be further improved. In the fourth embodiment, an example in which the second metal film pattern has three layers has been described. However, a two-layer structure of an O element-containing Al alloy film and a barrier film may be used. By omitting the O element-free Al alloy film, the number of film formation can be reduced and the manufacturing cost can be reduced. In addition, by providing only an excellent O element-containing Al alloy film with respect to an alkaline chemical solution, it is possible to further increase the reliability and increase the yield.

[Embodiment 5]
The basic structure and manufacturing method of the TFT array substrate according to Embodiment 5 are the same as those of Embodiment 4 except for the following points. That is, the TFT array substrate 104 according to the fourth embodiment has the reflective pixel electrode 26 formed in the second metal film, whereas the reflective pixel electrode according to the fifth embodiment is provided above the second metal film. The difference is that a separate reflective pixel electrode layer is provided. In the fourth embodiment, the transparent conductive film pattern 30 is formed on the interlayer insulating film 5. However, in the fifth embodiment, the transparent conductive film pattern is formed on the interlayer insulating film 5. It differs in that it is formed in the upper layer of the conductive organic film. In the fourth embodiment, the transmissive pixel electrode 31 constituting the transmissive region T is formed on the interlayer insulating film 5, whereas in the fifth embodiment, the transmissive pixel electrode constituting the transmissive region T is formed. The difference is that 31 is disposed immediately above the insulating substrate 1. Further, the constituent material of the second metal film pattern 20 is different between the fourth embodiment and the fifth embodiment.

  FIG. 12 is a cross-sectional view of a cut portion of the TFT array substrate according to the fifth embodiment. FIG. 13 shows a flowchart of the manufacturing process of the TFT array substrate according to the fifth embodiment. The TFT array substrate 105 according to the fifth embodiment includes a photosensitive organic film 9, a third metal film pattern 50, and the like in addition to the element members described in the first embodiment. The third metal film pattern 50 is a pattern of the reflective pixel electrode 51.

  Similar to the specific example of the first embodiment, the second metal film pattern 20 according to the fifth embodiment has good contact characteristics with the transparent conductive film used for the transmissive pixel electrode (particularly, good electrical contact resistance characteristics). Cr, Mo, or an alloy of these was used. Needless to say, a structure including an Al alloy film may be used as in the third and fourth embodiments.

  The photosensitive organic film 9 is formed on the interlayer insulating film 5. Then, there are a pixel drain-contact hole 6d penetrating from the surface of the photosensitive organic film 9 to the surface of the drain electrode 23, a gate terminal portion-contact hole 7d penetrating to the gate terminal portion 15, a source terminal portion-contact hole 8d, and the like. Is formed. These contact holes are formed so as to penetrate the photosensitive organic film 9 and the interlayer insulating film 5. The reflective pixel electrode 51 is disposed at the formation position of the photosensitive organic film 9 and the reflective region R on the transmissive pixel electrode 31d (see FIG. 12).

  The third metal film pattern 50 according to the fifth embodiment includes a first third (1) laminated film 50X, a second third (2) laminated film 50Y, and a third third (3) laminated film. It consists of all three layers of the film 50Z. The third (1) laminated film 50X is a coverage improving film capable of neatly covering a step of 100 nm ahead existing at the pattern edge of the transmissive pixel electrode. For example, Mo etc. can be applied suitably. By disposing the coverage improving film in the lowermost layer, it is possible to improve the coverage characteristics of the Al alloy film formed in the upper layer and suppress point defects due to poor coverage.

  The third (2) laminated film 50Y is composed of an O element-free Al alloy film that does not substantially contain oxygen except for the portion that is inevitably included as an impurity. The third (3) laminated film 50Z is composed of an O element-containing Al alloy film having a composition ratio of O element of 0.1 at% or more and 6.0 at% or less. The second and third Al alloy films are obtained by adding at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W to Al.

  The manufacturing method according to the fifth embodiment is common up to step C in FIG. 3 described in the first embodiment. In the fifth embodiment, the first metal film pattern 10 includes the first (1) laminated film 10X made of an O element-free Al alloy film and the first (2) laminated film made of an O element-containing Al alloy film. Although an example in which the film 10Y is stacked is described, instead of this, Cr, Mo, or the like may be used as the first metal film pattern 10.

  In step D according to the fifth embodiment, an interlayer insulating film 5 is formed (o), and a photosensitive organic film 9 is formed as an upper layer (p). Next, a resist pattern is obtained by the fourth photolithography process (q). Thereafter, dry etching is performed (r), and patterns such as contact holes (pixel drain-contact hole 6d, gate terminal contact hole 7d, source terminal contact hole 8d, etc.) are formed simultaneously.

  In the fifth embodiment, as step D, first, a silicon nitride SiN film was formed to a thickness of 300 nm by a chemical vapor deposition (CVD) method. Film formation was performed under substrate heating conditions of about 300 ° C. Next, as the photosensitive organic film 9, PC335 manufactured by JSR Co. was applied by spin coating so as to have a film thickness of 3.2 to 3.9 μm. A known fluorine-based gas was used for the dry etching. At the time of dry etching, the first (2) stacked film 10Y of the gate terminal portion 15 was removed. At this time, the photosensitive organic film 9, the interlayer insulating film 5, and the gate insulating film 2 in the transmission region T are removed. Thereby, the light transmittance in the transmission region T can be improved.

  In step E, a transparent conductive film is formed (t), and a resist pattern is obtained by the fifth photolithography process (u). Then, wet etching is performed (v) to obtain a transparent conductive film pattern 30 (transparent pixel electrode 31d, gate terminal pad 32d, source terminal pad 33d, etc.). Thereafter, the resist is removed and pure water cleaning is performed (w). In Embodiment 5, an ITO film was formed as a transparent conductive film to a thickness of 100 nm by a sputtering method using a known Ar gas. As the etching solution, a known solution containing hydrochloric acid and nitric acid was used.

In step F, a third metal film is formed (x), and a resist pattern is obtained by the sixth photolithography process (y). Next, wet etching is performed (z), and the resist pattern is removed (zI). As a preferred example, in the fifth embodiment, as the third (1) laminated film 50X, a Mo film is formed with a thickness of 100 nm by a DC magnetron sputtering method using a known Ar gas using a Mo target. To do. Next, an AlNi alloy film having a thickness of about 100 nm is formed by a DC magnetron sputtering method using a known Ar gas or Kr gas using an AlNi alloy target containing 2 at% Ni as the third (2) laminated film 50Y. A film was formed. Thereafter, as the third (3) laminated film 50Z, an AlNixOy alloy film having a thickness of 10 nm was formed by a reactive sputtering method using a known mixed gas obtained by adding O ₂ gas to Ar gas.

  According to the fifth embodiment, the same effect as in the first embodiment can be obtained. In addition, since the coverage improving film is disposed as the third (1) laminated film 50X which is the lowermost layer of the third metal film pattern 50, point defects due to poor coverage can be suppressed. Further, in the transmissive region T, the interlayer insulating film 5 and the gate insulating film 2 are removed, and the transmissive pixel electrode 31d is disposed on the insulating substrate 1, so that the transmittance can be increased.

[Embodiment 6]
Next, an example in which the electronic apparatus according to the present invention is applied to an organic EL display device will be described. FIG. 14 is a schematic cross-sectional view of the pixel region and the terminal region 43 showing the TFT substrate of the organic EL display device according to Embodiment 6 and the organic EL element formed thereon. FIG. 15 is a flowchart for explaining a manufacturing process of the organic EL display device according to the sixth embodiment.

  As shown in FIG. 14, the organic EL display device according to the sixth embodiment includes an insulating substrate 1, a gate insulating film 2, a semiconductor active film 3, an ohmic low resistance film 4, an interlayer insulating film 5, a pixel drain-contact hole. 6e, gate terminal portion-contact hole 7e, source terminal portion-contact hole 8e, first metal film pattern 10, second metal film pattern 20, third metal film pattern 50e, transparent conductive film pattern 30e, and the like.

  The first metal film pattern 10 is a pattern of a gate wiring (scanning signal line) 11, a gate electrode 12, a gate terminal portion 15, and the like, and the second metal film pattern 20 is a source wiring 21, a source electrode 22, and a drain electrode 23. The pattern of the source terminal portion 25 and the like. Furthermore, a pattern of the anode electrode 52, the gate terminal pad 53, the source terminal pad 54, and the like is configured by the laminated structure of the third metal film pattern 50e and the transparent conductive film pattern 30e.

  As the insulating substrate 1, a transparent substrate such as a glass substrate, a quartz substrate, or plastic is used. The gate electrode 12 is formed on the insulating substrate 1 and is formed of the same first metal film pattern 10 as the gate wiring 11, the gate terminal portion 15, and the like. The gate insulating film 2 is formed in an upper layer so as to cover the gate electrode 12 and the like. The semiconductor active film 3 and the ohmic low resistance film 4 are formed on the gate insulating film 2 and are arranged to face at least a part of the gate electrode 12 with the gate insulating film 2 interposed therebetween. The semiconductor active film 3 is composed of, for example, an Si (silicon) film not containing impurities, and the ohmic low resistance film 4 is composed of an ohmic low resistance Si film doped with impurities.

  The source electrode 22 and the drain electrode 23 are arranged to face at least a part of the gate electrode 12 with the gate insulating film 2, the semiconductor active film 3, and the ohmic low resistance film 4 interposed therebetween. That is, in order to operate as the TFT 42, the thin film transistor region exists on the gate electrode 12 and is easily affected by an electric field when a voltage is applied to the gate electrode 12. The drain electrode 23 is composed of the same second metal film pattern 20 as the source wiring 21, the source electrode 22, the source terminal portion 25, and the like.

  The interlayer insulating film 5 is formed so as to cover the gate insulating film 2, the semiconductor active film 3, the source electrode 22, and the drain electrode 23 (see FIG. 14). A photosensitive organic film 9 is formed on the upper layer. In the TFT 42 disposed in the pixel region, an anode electrode 52 that functions as a pixel electrode is formed on the photosensitive organic film 9, and a pixel drain-contact hole formed in the interlayer insulating film 5 and the photosensitive organic film 9. The drain electrode 23 and the anode electrode 52 are electrically connected via 6e. The gate terminal pad 53 and the gate terminal electrode 15 are connected via the gate terminal portion-contact hole 7e, and the source terminal pad 54 and the source terminal electrode 25 are connected via the source terminal portion-contact hole 8e. Has been.

  An organic EL light emitting layer 61 and a separation film 62 are formed on the upper layer of the anode electrode 52, and an insulating counter substrate 65 such as glass is bonded to the upper layer via a cathode electrode 63 and an adhesive layer 64. Yes. The third metal film pattern 50e according to the sixth embodiment has a two-layer structure of a third (1) stacked film 50X as the first layer and a third (2) stacked film 50Y as the second layer. The third (1) laminated film 50X is composed of an O element-free Al alloy film that does not substantially contain oxygen except for the portion that is inevitably included as an impurity. The third (2) laminated film 50Y is composed of a conductive O element-containing Al alloy film substantially containing oxygen. A transparent conductive film pattern 30e having the same pattern is disposed immediately above. The transparent conductive film pattern 30e is composed of an amorphous ITO film.

  The manufacturing method of the TFT array substrate 200 of the organic EL display device according to the sixth embodiment is common until the manufacturing process D of the TFT array substrate 105 according to the fifth embodiment shown in FIG. Therefore, the explanation is omitted. In step E shown in FIG. 15, first, a third metal film is formed (t). Thereafter, a resist pattern is obtained by the fifth photolithography process (u). Next, a pattern of the anode electrode 52, the gate terminal pad 53, the source terminal pad 54, and the like is obtained by wet etching (v), and after removing the resist, pure water cleaning is performed (w).

In the sixth embodiment, an AlNi alloy film is formed by a DC magnetron sputtering method using a known Ar gas or Kr gas using an AlNi alloy target containing 2 at% Ni as the third (1) laminated film 50X. The film was formed to a thickness of about 50 nm. Next, as the third (2) laminated film 50Y, an AlNixOy alloy film having a thickness of 10 nm was formed by a reactive sputtering method using a known mixed gas obtained by adding O ₂ gas to Ar gas. The O element composition ratio in the AlNixOy film in the third (2) stacked film 50Y in the third metal film pattern 50e was 4 at%. And as a transparent conductive film, the amorphous ITO film | membrane which is a translucent conductive oxide film was formed into a film thickness of 20 nm. In the wet etching process, the amorphous ITO film is etched using a solution containing oxalic acid, and then a third (2) laminated film 50Y, which is an AlNixOy film, is used using a solution containing phosphoric acid + nitric acid + acetic acid, and an AlNi alloy film. The third (1) laminated film 50X was sequentially etched.

  Here, an example in which Ni is added as an impurity to be added to Al has been described, but instead of Ni, any one or more of at least one metal element selected from Co, Fe, Pd, Pt, Mo, and W is used. Alternatively, an Al alloy target may be used.

  Next, in Step F, an organic resin film made of polyimide or the like is applied and formed and patterned by a photolithography process in order to secure a region for forming the organic EL light emitting layer 61 separately in each pixel portion. Thus, the separation membrane 62 is obtained (x). Thereafter, the organic EL light emitting layer 61 is formed in the pixel region by a method such as vapor deposition (y). Thereafter, the cathode electrode 63 is formed (z). The cathode electrode 63 is configured to be connected to the lower organic EL light emitting layer 61 in the pixel region and at the same time to be connected to a lower cathode grounding electrode (not shown) through a contact hole (not shown). Yes. The cathode electrode 63 preferably has high flatness on the film surface. Therefore, it is preferable to form an amorphous ITO film having no crystal grain boundary in the film structure.

  Thereafter, in order to prevent deterioration of the light emission characteristics of the organic EL light emitting layer 61 due to moisture and impurities, the entire pixel display region where the organic EL light emitting layer 61 is formed between the counter substrate 65 is covered with the adhesive layer 64. (ZI) is bonded to the counter substrate 65 (zII).

In the sixth embodiment, the product name DL100 manufactured by Toray is used as the separation film, and the film-shaped separation film 62 is formed so as to surround each pixel region by coating with a film thickness of about 2 μm and by a photolithography process. did. As the organic EL light emitting layer, known dicyanomethylenepyran derivatives (red light emission), coumarin type (green light emission), quinacridone type (green light emission), tetraphenylbutadiene type (blue light emission), distyrylbenzene type (blue light emission), etc. The material is formed with a thickness of 1 to 200 nm. As the cathode electrode 63, an ITO film which is a transparent conductive film is formed with a thickness of 100 nm by a sputtering method. The amorphous ITO film can be formed, for example, by sputtering in a mixed gas obtained by adding H ₂ O gas to Ar gas. It is also possible to use an IZO film in which indium oxide and zinc oxide are mixed, or an ITZO film in which zinc oxide is mixed in an ITO film.

  According to the sixth embodiment, the same effect as in the first embodiment can be obtained. Since the AlNi alloy film substantially containing oxygen is laminated on the AlNi alloy of the anode electrode, resistance to alkaline chemicals is improved. Further, by applying the third metal film pattern 50e as a reflective pixel electrode, it is possible to provide a TFT array substrate with good reflection characteristics.

  In the sixth embodiment, the example in which the third metal film and the transparent conductive film are continuously formed and the patterns are collectively formed is described. However, the third (1) stacked film 50X and the third film are formed. (2) After forming the pattern by forming the third metal film made of the laminated film 50Y, the pattern may be formed by forming a transparent conductive film. According to this method, by adding a dry etching process before forming the amorphous ITO film, the third (2) stacked film 50Y is removed, and the transparent conductive film pattern 30e and the third (1) stacked film 50X Can also be directly connected. By adopting this method, the contact resistance between the transparent conductive film pattern 30e and the Al alloy film can be further reduced. In addition, reflection characteristics can be improved. Therefore, the luminous efficiency of the organic EL light emitting layer can be increased and a high quality display can be provided.

  Moreover, although the example which has a two-layer structure as the 3rd metal film pattern 50 was demonstrated, the 3rd (1) laminated film 50X which is an O element non-Al alloy film was cut, and O element containing-Al alloy film was used. It is good also as a single layer structure. Thereby, the number of film formations can be reduced and the manufacturing cost can be reduced.

  In the first to sixth embodiments described above, an example in which an amorphous silicon film is used as a semiconductor film of a TFT serving as a switching element for driving a pixel has been described. However, the present invention is not limited thereto, and various semiconductor layers such as a polysilicon film are used. Can be used. Further, the structure of the TFT is not limited to the bottom gate type, and various structures such as a top gate type can be employed.

FIG. 3 is a schematic plan view of a main part of the TFT array substrate according to the first embodiment. II-II cutting part sectional drawing of FIG. FIG. 6 is a manufacturing process diagram of the TFT array substrate according to the first embodiment. The figure which plotted the etching rate with respect to the amount of oxygen or nitrogen added to the AlNi alloy. The figure which plotted the specific resistance with respect to the amount of oxygen or nitrogen added to the AlNi alloy. FIG. 5 is a schematic cross-sectional view of a TFT array substrate according to Embodiment 2. FIG. 6 is a schematic cross-sectional view of a TFT array substrate according to Embodiment 3. 10 is a schematic plan view of a main part of a TFT array substrate according to Embodiment 4. FIG. IX-IX cutting part sectional view of Drawing 8. The figure which plotted the reflectance with respect to the amount of oxygen or nitrogen added to the AlNi alloy. FIG. 10 is a schematic cross-sectional view of a TFT array substrate according to a modified example of Embodiment 4. 10 is a schematic cross-sectional view of a TFT array substrate according to Embodiment 5. FIG. FIG. 10 is a manufacturing process diagram of a TFT array substrate according to the fifth embodiment. 10 is a schematic cross-sectional view of a TFT array substrate according to Embodiment 6. FIG. FIG. 10 is a manufacturing process diagram of a TFT array substrate according to the sixth embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Gate insulating film 3 Semiconductor active film 4 Ohmic low resistance film 5 Interlayer insulating film 6 Pixel drain-contact hole 7 Gate terminal part-Contact hole 8 Source terminal part-Contact hole 9 Photosensitive organic film 10 1st metal Film Pattern 10X First (1) Multilayer Film 10Y First (2) Multilayer Film 11 Gate Wiring 12 Gate Electrode 14 Auxiliary Capacitor Wiring 15 Gate Terminal Section 20 Second Metal Film Pattern 20X Second (1) Multilayer Film 20Y Second ( 2) Multilayer film 20Z Third (3) Multilayer film 21 Source wiring 22 Source electrode 23 Drain electrode 25 Source terminal portion 26 Reflective pixel electrode 30 Transparent conductive film pattern 31 Transparent pixel electrode 32 Gate terminal pad 33 Source terminal pad 41 Pixel 42 TFT
43 terminal region 50 third metal film pattern 50X third (1) laminated film 50Y third (2) laminated film 50Z third (3) laminated film 51 reflective pixel electrode 52 anode electrode 53 gate terminal pad 54 source terminal pad 61 organic EL light emitting layer 62 Separating film 63 Cathode electrode 64 Adhesive layer 65 Opposite substrate 100-105 TFT array substrate 200 TFT array substrate

Claims (13)

A metal film pattern comprising at least an Al alloy film on the substrate;
A transparent conductive film pattern directly connected to the Al alloy film and at least a part of the region;
In the uppermost layer of the Al alloy film, at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added, and the composition ratio of the O element is 0.1 at% or more, An electronic device in which an O element-containing Al alloy film of 6.0 at% or less is formed.   The electronic device according to claim 1, wherein the metal element is a group 8 3d transition metal element of at least one of Ni, Co, and Fe.   The metal film pattern includes an O element-free Al alloy film that does not substantially contain oxygen except for an inevitably included impurity as a lower layer of the O element-containing Al alloy film. The electronic device according to claim 1 or 2. In the region where the transparent conductive film pattern and the Al alloy film are directly connected, the O element-containing-Al alloy film is removed, the O element-free-Al alloy film and the transparent conductive film pattern are directly connected, and ,
The O element-free Al alloy film is an alloy film in which at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added to Al. 3. The electronic device according to 3.   The electronic device according to any one of claims 1 to 4, wherein the Al alloy film and the transparent conductive film pattern are connected through a contact hole disposed in an insulating film. A gate electrode, a source / drain electrode, and a thin film transistor and a pixel electrode having a semiconductor layer sandwiched between them,
The transparent conductive film pattern is used as a transmissive pixel electrode,
The electronic device according to claim 1, wherein the metal film pattern is used as at least one of a reflective pixel electrode, the gate electrode, and the source / drain electrode.   The composition ratio of the metal element in the O element-containing-Al alloy film and / or the O element-free-Al alloy film is 0.1 at% or more and 6.0 at% or less. The electronic device according to any one of 1 to 6.   8. The electronic device according to claim 1, wherein the film thickness of the O element-containing Al alloy film is 5 nm or more and 200 nm or less.   The O element-containing Al alloy film and the O element-free Al alloy film further contain 0.1 at% or more and 6.0 at% or less of at least one element selected from rare earth elements as an alloy component. The electronic device according to claim 1, wherein:   An electronic apparatus comprising the electronic device according to claim 1. Forming a metal film pattern comprising at least an Al alloy film on the substrate;
Forming a transparent conductive film pattern directly connected to the Al alloy film in at least a part of the region,
In the step of forming the metal film pattern, at least the uppermost layer of the Al alloy film contains at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W, and includes an O element. An electronic device manufacturing method in which an O element-containing Al alloy film having a composition ratio of 0.1 at% or more and 6.0 at% or less is formed and patterned.   In the step of forming the metal pattern, an O element-free Al alloy film that does not substantially contain oxygen is formed except for inevitably contained impurities, and then the O element-containing Al alloy film is formed. 12. The method of manufacturing an electronic device according to claim 11, wherein the film is formed, and the O element-free Al alloy film and the O element-containing Al alloy film are collectively formed into a pattern. In the region where the transparent conductive film pattern and the Al alloy film are directly connected, the O element-containing-Al alloy so that the transparent conductive film pattern and the O element-free-Al alloy film are directly connected. Further comprising the step of removing the film,
The O element-free Al alloy film is an alloy film in which at least one metal element selected from Ni, Co, Fe, Pd, Pt, Mo, and W is added to Al. 13. A method for producing an electronic device according to 12.

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