JP2010027406A - Antiphase controller, and antiphase illumination control system using the same - Google Patents

Antiphase controller, and antiphase illumination control system using the same Download PDF

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JP2010027406A
JP2010027406A JP2008187920A JP2008187920A JP2010027406A JP 2010027406 A JP2010027406 A JP 2010027406A JP 2008187920 A JP2008187920 A JP 2008187920A JP 2008187920 A JP2008187920 A JP 2008187920A JP 2010027406 A JP2010027406 A JP 2010027406A
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antiphase
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load
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full
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Tetsuya Tanigawa
哲也 谷川
Yoshinobu Murakami
善宣 村上
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Panasonic Electric Works Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40Control techniques providing energy savings, e.g. smart controller or presence detection

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of part items, to compactify a size and to reduce a cost, in an antiphase controller for illumination-controlling an illumination load, by antiphase-controlling an input voltage from an alternating current source. <P>SOLUTION: This antiphase controller 1 is provided with a rectifier 11 for full-wave rectifying the alternating current voltage V1; an n-type FET 12 interposed between the rectifier 11 and the illumination load 2, and for controlling the continuity of a current flowing in the illumination load 2; a zero-cross detecting part 13 for detecting zero crossing of the full-wave rectified voltage; a dimming control level setting part 14 for setting a dimmming control level of the illumination load 2; and a control part 15 for turning on and off the FET, at the timing of the zero cross, and for turning on and off the FET 12 at a fixed fringe angle, in response to the illumination control level. The illumination load 2 is thereby continuity-controlled in the antiphase control for the alternating current voltage V1 by the one switching element, and consequently, the number of part items is reduced to make the size small and to reduce the cost. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、交流電源を逆位相制御して負荷へ供給する電力を制御する逆位相制御装置とこれを用いた逆位相調光制御システムに関する。   The present invention relates to a reverse phase control device that controls power supplied to a load by performing reverse phase control of an AC power supply, and a reverse phase dimming control system using the same.

従来、逆位相制御装置においては、例えば、白熱電灯やLEDの照明負荷を調光制御するために、交流電源と照明負荷との間に直列に接続されたスイッチング素子を交流電圧波形のゼロクロスポイントでオンし、一定の位相角でオフすることにより照明負荷への供給電力の制御を行っている。   Conventionally, in an anti-phase control device, for example, in order to perform dimming control of an illumination load of an incandescent lamp or LED, a switching element connected in series between an AC power source and the illumination load is set at a zero cross point of an AC voltage waveform The power supplied to the lighting load is controlled by turning on and turning off at a constant phase angle.

この種の逆位相制御装置として、交流電源の半周期の正負電圧毎に照明負荷との導通を制御するスイッチング素子をそれぞれ備え、各スイッチング素子で交流電源を逆位相制御して照明負荷を調光制御する逆位相制御装置が知られている(例えば、特許文献1参照)。この種の逆位相制御装置の構成例について、図4及び図5を参照して説明する。   This kind of anti-phase control device is equipped with a switching element that controls the conduction with the lighting load for each positive and negative voltage of the half cycle of the AC power supply, and dimming the lighting load by controlling the AC power supply in reverse phase with each switching element An anti-phase control device for controlling is known (for example, see Patent Document 1). A configuration example of this type of anti-phase control device will be described with reference to FIGS. 4 and 5.

図4において、逆位相制御装置100は、交流電源と照明負荷101との間に逆直列に接続された2個のスイッチング用のトランジスタQ1、Q2と、これらトランジスタQ1、Q2の導通を制御する制御部102とを備える。制御部102は、交流電源電圧の正負波形に対応してトランジスタQ1、Q2にそれぞれ正及び負の調光制御信号を送出し、トランジスタQ1、Q2をスイッチングして照明負荷101を調光制御する。トランジスタQ1、Q2としては、絶縁ゲートバイポーラ型トランジスタ(IGBT)やパワーMOSFETなどの電力制御用スイッチング素子が使用される。また、トランジスタQ1、Q2には、それらが非導通モードのときに導通するバイパス用のダイオードDa、Dbがそれぞれ並列に接続されている。   In FIG. 4, an antiphase control device 100 controls two transistors Q1 and Q2 for switching connected in reverse series between an AC power source and a lighting load 101, and controls conduction of these transistors Q1 and Q2. Unit 102. The control unit 102 sends positive and negative dimming control signals to the transistors Q1 and Q2, respectively, corresponding to the positive and negative waveforms of the AC power supply voltage, and switches the transistors Q1 and Q2 to control the lighting load 101. As the transistors Q1 and Q2, a power control switching element such as an insulated gate bipolar transistor (IGBT) or a power MOSFET is used. The transistors Q1 and Q2 are connected in parallel with bypass diodes Da and Db that are turned on when they are in the non-conductive mode, respectively.

図5において、逆位相制御装置100は、交流電源と照明負荷101との間に逆並列に接続された2個のスイッチング用のトランジスタQ1、Q2と、これらトランジスタQ1、Q2の導通をそれぞれ制御する第1ゲート制御部103と第2ゲート制御部104とを備える。これらゲート制御部103、104は、交流電源電圧の正負波形に対応して、トランジスタQ1、Q2のゲートにそれぞれ正及び負の調光制御信号を送出して、照明負荷101を調光制御する。   In FIG. 5, the anti-phase control device 100 controls two switching transistors Q1 and Q2 connected in antiparallel between the AC power source and the illumination load 101, and the conduction of these transistors Q1 and Q2, respectively. A first gate control unit 103 and a second gate control unit 104 are provided. These gate controllers 103 and 104 control the lighting load 101 by controlling the lighting load 101 by sending positive and negative dimming control signals to the gates of the transistors Q1 and Q2, respectively, corresponding to the positive and negative waveforms of the AC power supply voltage.

しかしながら、上記図4、図5に示される逆位相制御装置100においては、交流電源電圧の半周期の正負電圧毎に、互いに逆向きのトランジスタQ1、Q2をそれぞれスイッチングするため、電力制御用スイッチング素子を2つ必要とし、また、バイパス用のダイオードDa、Dbなども必要としていた。また、これらスイッチング素子は、高価であると共に、それぞれ放熱部材及びスイッチング素子駆動用のドライバ回路等を必要とする。このため、回路規模及び回路基板面積が大きくなり、大型化すると共に、部品点数が多く、コスト高となっていた。また、互いに逆向きのスイッチング素子を制御するために正負のゲート制御信号をそれぞれ出力するゲート制御部や正負の直流電源回路等を必要とするなど、回路構成が複雑になる。
特開平6−203967号公報
However, in the antiphase control device 100 shown in FIGS. 4 and 5, the transistors Q1 and Q2 that are opposite to each other are switched for each positive and negative voltage of the half cycle of the AC power supply voltage. And two bypass diodes Da and Db are also required. These switching elements are expensive and require a heat dissipation member and a driver circuit for driving the switching elements. For this reason, the circuit scale and the circuit board area are increased, the size is increased, the number of parts is increased, and the cost is increased. In addition, the circuit configuration becomes complicated, such as requiring a gate control unit that outputs positive and negative gate control signals and a positive and negative DC power supply circuit to control switching elements that are opposite to each other.
JP-A-6-203967

本発明は、上記の問題を解決するためになされたものであり、交流電源からの入力電圧を逆位相制御して照明負荷を調光制御する逆位相制御装置において、部品点数を低減して、小型化、低コスト化を図ることができる逆位相制御装置を提供することを目的とする。   The present invention has been made to solve the above problems, and in an anti-phase control device that performs dimming control of an illumination load by performing anti-phase control on an input voltage from an AC power supply, the number of components is reduced, An object of the present invention is to provide an anti-phase control device that can be reduced in size and cost.

上記目的を達成するために請求項1の発明は、交流電源電圧を全波整流する整流器と、前記整流器と負荷との間に介在され、前記負荷に流れる電流の導通を制御するスイッチング素子と、前記スイッチング素子を、全波整流された電圧のゼロクロスのタイミングでオンすると共に、一定の点弧角でオフする逆位相制御部と、を備えたものである。   In order to achieve the above object, the invention of claim 1 includes a rectifier that performs full-wave rectification of an AC power supply voltage, a switching element that is interposed between the rectifier and the load, and controls conduction of a current flowing through the load. The switching element includes an anti-phase controller that turns on at a zero-cross timing of a full-wave rectified voltage and turns off at a constant firing angle.

請求項2の発明は、抵抗負荷成分を有する光源と、交流電源電圧を全波整流する整流器と、前記整流器と前記光源との間に介在され、前記光源に流れる電流の導通を制御する電界効果トランシスタと、前記電界効果トランシスタを、全波整流された電圧のゼロクロスのタイミングでオンすると共に、一定の点弧角でオフする逆位相制御部と、を備え、前記電界効果トランシスタのソース又はドレインと前記逆位相制御部のGNDレベルが一致しているものである。   According to a second aspect of the present invention, there is provided a light source having a resistive load component, a rectifier that performs full-wave rectification of an AC power supply voltage, and a field effect that is interposed between the rectifier and the light source and controls conduction of current flowing through the light source. A transistor, and an antiphase controller that turns on the field-effect transistor at a zero-cross timing of a full-wave rectified voltage and turns off at a constant firing angle, and a source or drain of the field-effect transistor, The GND levels of the antiphase control units are the same.

請求項1の発明によれば、交流電源を全波整流してからスイッチング素子をオンオフするので、負荷への電流の導通制御を1つのスイッチング素子で行うことができ、部品点数を削減でき、小型化及び低コスト化が図れる。   According to the first aspect of the invention, since the switching element is turned on / off after full-wave rectification of the AC power supply, the current conduction to the load can be controlled by one switching element, the number of parts can be reduced, and the size can be reduced. And cost reduction.

請求項2の発明によれば、交流電源を全波整流してから電界効果トランジスタをオンオフするので、1つの電界効果トランジスタで導通制御を行うことができ、小型化、低コスト化できると共に、例えば、FETがn型のときには、そのソースは逆位相制御部のGNDレベルに一致しているので、ゲートに正の制御電圧を与えるだけで導通制御でき、逆位相制御部の回路設計が容易になり、回路構成を簡略化できる。   According to the invention of claim 2, since the field effect transistor is turned on / off after full-wave rectification of the AC power supply, the conduction control can be performed with one field effect transistor, and the size and cost can be reduced. When the FET is n-type, its source matches the GND level of the anti-phase control unit, so conduction control can be performed simply by applying a positive control voltage to the gate, and the circuit design of the anti-phase control unit becomes easy. The circuit configuration can be simplified.

以下、本発明の第1の実施形態に係る逆位相制御装置(本装置という)について、図1及び図2を参照して説明する。本装置1は、図1に示すように、正弦波の交流電源電圧(以下、交流電源と言う)V1を全波整流する整流器11と、整流器11と照明負荷(負荷、光源)2との間に介在され、照明負荷2に流れる電流の導通を制御するスイッチング素子としての電界効果トランシスタ(FET)12と、全波整流された電圧のゼロクロスを検出するゼロクロス検出部13と、照明負荷2の調光レベルを設定する調光レベル設定部14と、FET12をゼロクロスのタイミングでオンすると共に、一定の点弧角でオフする逆位相制御部(以下、制御部と言う)15とを備える。照明負荷2は負荷接続部16に接続される。   Hereinafter, an antiphase control apparatus (referred to as this apparatus) according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2. As shown in FIG. 1, the apparatus 1 includes a rectifier 11 that performs full-wave rectification of a sinusoidal AC power supply voltage (hereinafter referred to as AC power supply) V <b> 1, and a rectifier 11 and an illumination load (load, light source) 2. The field effect transistor (FET) 12 as a switching element that controls the conduction of the current flowing through the illumination load 2, the zero-cross detection unit 13 that detects the zero-cross of the full-wave rectified voltage, and the adjustment of the illumination load 2 The light control level setting part 14 which sets a light level, and the antiphase control part (henceforth a control part) 15 which turns off FET12 at the timing of a zero cross and turns off with a fixed firing angle are provided. The illumination load 2 is connected to the load connection unit 16.

照明負荷2は、抵抗負荷成分を有し、逆位相制御装置1の負荷となって電力供給を受けて点灯される照明灯である。この照明負荷2としては、白熱球、蛍光灯、及びLEDや有機ELなどの半導体からなる固体発光素子等を使用することができる。   The illumination load 2 is an illumination lamp that has a resistance load component and is turned on upon receiving power supply as a load of the antiphase control device 1. As the illumination load 2, an incandescent bulb, a fluorescent lamp, a solid light emitting element made of a semiconductor such as an LED or an organic EL, and the like can be used.

整流器11は、4つのダイオードD1乃至D4によるダイオードブリッジ回路からなり、入力される交流電圧V1を全波整流する。ダイオードD1、D2の交点Aと、ダイオードD3、D4の交点Bとの間に交流電圧V1が入力され、ダイオードD2、D4の交点Cには、FET12のドレインが接続される。また、ダイオードD1、D3の交点EとFET12のソースは、負荷接続部16に繋がっている。また、このダイオードブリッジ回路は、FET等のスイッチング素子に比較して安価である。   The rectifier 11 includes a diode bridge circuit including four diodes D1 to D4, and full-wave rectifies the input AC voltage V1. An AC voltage V1 is input between the intersection A of the diodes D1 and D2 and the intersection B of the diodes D3 and D4, and the drain of the FET 12 is connected to the intersection C of the diodes D2 and D4. Further, the intersection E of the diodes D1 and D3 and the source of the FET 12 are connected to the load connection portion 16. Further, this diode bridge circuit is less expensive than a switching element such as an FET.

上記整流器11においては、交流電圧V1が正電圧のとき、FET12のオンにより、ダイオードD2、FET12、照明負荷2、ダイオードD3の回路に電流が流れる。これと同様に、交流電圧V1が負電圧のとき、FET12のオンにより、ダイオードD4、FET12、照明負荷2、ダイオードD1の回路に電流が流れる。この整流動作により、整流器11の出力は、全波整流電圧V2となり、正方向のみの電圧波形となる。   In the rectifier 11, when the AC voltage V1 is a positive voltage, the FET 12 is turned on, whereby a current flows through the circuits of the diode D2, the FET 12, the illumination load 2, and the diode D3. Similarly, when the AC voltage V1 is a negative voltage, a current flows through the circuits of the diode D4, the FET 12, the illumination load 2, and the diode D1 by turning on the FET 12. By this rectification operation, the output of the rectifier 11 becomes a full-wave rectified voltage V2 and a voltage waveform only in the positive direction.

FET12は、整流器11による全波整流電圧V2をスイッチング制御する。ここでは、正極性の全波整流電圧V2に対して、n型FETが用いられ、FET12のソースは、制御部15のGNDレベルと一致するように共通の接地ライン17に接続されている。従って、制御部15からFET12のゲートに入力される制御電圧の極性は全波整流電圧V2と同じ正極性としている。なお、FET12のドレインを接地した構成とすることもでき、この場合、ゲート制御電圧波形は反転される。また、整流器11のダイオードブリッジ回路の各ダイオード接続を逆にし、全波整流電圧を負極性とした場合は、ゲートの制御電圧も負極性とし、例えば、p型FETが用いられる。また、ここでは、スイッチング素子をFETとしたが、例えば、大容量の電流を流すことができるパワーMOSFET(Metal Oxide Semiconductor Field Effect Transistor)や、IGBT等を使用することができる。   The FET 12 performs switching control of the full-wave rectified voltage V2 by the rectifier 11. Here, an n-type FET is used for the positive full-wave rectified voltage V2, and the source of the FET 12 is connected to the common ground line 17 so as to coincide with the GND level of the control unit 15. Therefore, the polarity of the control voltage input from the control unit 15 to the gate of the FET 12 has the same positive polarity as the full-wave rectified voltage V2. In addition, it can also be set as the structure which earth | grounded the drain of FET12, In this case, a gate control voltage waveform is inverted. Further, when each diode connection of the diode bridge circuit of the rectifier 11 is reversed and the full-wave rectified voltage is negative, the gate control voltage is also negative, and, for example, a p-type FET is used. Here, although the switching element is an FET, for example, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) capable of flowing a large amount of current, an IGBT, or the like can be used.

ゼロクロス検出部13は、交流電源からの入力電圧のゼロクロスとなるタイミングを検出し、このタイミングでゼロクロス信号を発生し、このゼロクロス信号を制御部15に入力する。このゼロクロス検出部13は、入力電圧の正弦波形の正電圧時と負電圧時にそれぞれ動作するスイッチング回路(不図示)を備え、それらのスイッチング動作が切り替わるときを検出してゼロクロス検出を行う。このゼロクロスのタイミングでFET12がオンされる。   The zero cross detection unit 13 detects a timing at which the input voltage from the AC power supply becomes zero cross, generates a zero cross signal at this timing, and inputs the zero cross signal to the control unit 15. The zero-cross detector 13 includes a switching circuit (not shown) that operates when the input voltage has a sine waveform at the positive voltage and the negative voltage, and detects when the switching operation is switched to detect the zero-cross. The FET 12 is turned on at this zero cross timing.

調光レベル設定部14は、調光用ボリューム(不図示)や調光信号に基いて照明負荷2の調光率を設定する。調光レベル設定部14は、調光率が設定されると、指定された調光率に基いてFET12のオン期間を設定することにより調光レベルを設定し、設定した調光レベルを制御部15に入力する。   The dimming level setting unit 14 sets the dimming rate of the illumination load 2 based on a dimming volume (not shown) or a dimming signal. When the dimming rate is set, the dimming level setting unit 14 sets the dimming level by setting the ON period of the FET 12 based on the specified dimming rate, and the set dimming level is controlled by the control unit. 15

制御部15は、CPUとメモリを備え、逆位相制御装置1全体を制御する。制御部15は、調光レベル設定部14で設定された調光レベルに基いて、位相制御のためのPWM(Pulse Width Modulation)信号を生成し、このPMW信号によりFET12をスイッチング駆動する。PWM信号は、ゼロクロス検出部13により検出されたゼロクロス信号の発生タイミングをトリガとしてスタートされるパルス信号であり、このパルス信号がハイ(H)、ロー(L)となることによりFET12がオンオフされ、スイッチング駆動される。また、FET12がオンする導通期間には、交流電源からの入力電圧が照明負荷2に供給される。このとき、制御部15は、ゼロクロス信号に同期して立ち上がるPWM信号のハイでFET12をオンして、PWM信号がローになったタイミングでFET12をオフすることにより、照明負荷2を逆位相制御する。   The control unit 15 includes a CPU and a memory, and controls the entire antiphase control device 1. The control unit 15 generates a PWM (Pulse Width Modulation) signal for phase control based on the dimming level set by the dimming level setting unit 14, and performs switching driving of the FET 12 by the PMW signal. The PWM signal is a pulse signal that is started with the generation timing of the zero cross signal detected by the zero cross detection unit 13 as a trigger. When this pulse signal becomes high (H) or low (L), the FET 12 is turned on / off, Switching driven. Further, the input voltage from the AC power supply is supplied to the illumination load 2 during the conduction period in which the FET 12 is turned on. At this time, the control unit 15 turns on the FET 12 at the high level of the PWM signal that rises in synchronization with the zero cross signal, and turns off the FET 12 at the timing when the PWM signal becomes low, thereby controlling the illumination load 2 in reverse phase. .

ここで、図2(a)〜(e)を参照して、制御部15による調光制御の動作について説明する。図2(a)は、交流電圧V1の正弦波形を示し、この交流電圧V1は整流器11で全波整流されて同図(b)に示される全波整流電圧V2となる。ゼロクロス検出部13は、交流電圧V1の半周期毎にゼロクロスを検出して、同図(c)に示すように、パルス波形のゼロクロス信号を生成する。同図(d)は、制御部15から出力されるPWM信号を示し、このPWM信号がハイのとき、FET12がオンされる。これにより、このPWM信号がFET12に印加されると、このPWM信号のオン期間Taの期間のみFET12がオンとなる。同図(e)は、オン期間Taにおいて照明負荷2に供給される負荷供給電圧を示し、ここでは、オン期間Taに対応する交流電圧V1の半周期における位相角を点弧角θで表す。即ち、この負荷供給電圧は、ゼロクロスの電流オンタイミングt1からPWM信号が点弧角θでオフする時間t2まで照明負荷2に印加される電圧波形を示す。このPWM信号のオン期間Taは、ユーザがボリューム等により調光率を変えることにより変化され、照明負荷2が調光制御される。   Here, with reference to FIGS. 2A to 2E, the operation of the light control by the control unit 15 will be described. FIG. 2A shows a sine waveform of the AC voltage V1, and this AC voltage V1 is full-wave rectified by the rectifier 11 to become a full-wave rectified voltage V2 shown in FIG. The zero-cross detector 13 detects the zero-cross every half cycle of the AC voltage V1, and generates a zero-cross signal having a pulse waveform as shown in FIG. FIG. 4D shows a PWM signal output from the control unit 15, and when the PWM signal is high, the FET 12 is turned on. Thus, when this PWM signal is applied to the FET 12, the FET 12 is turned on only during the ON period Ta of the PWM signal. FIG. 4E shows the load supply voltage supplied to the illumination load 2 in the on period Ta, and here, the phase angle in the half cycle of the AC voltage V1 corresponding to the on period Ta is represented by the firing angle θ. That is, this load supply voltage shows a voltage waveform applied to the illumination load 2 from the zero cross current on timing t1 to the time t2 when the PWM signal is turned off at the firing angle θ. The on period Ta of the PWM signal is changed by the user changing the dimming rate by the volume or the like, and the lighting load 2 is dimmed and controlled.

このように、本実施形態によれば、交流電圧V1を全波整流した全波整流電圧V2を電源としてFET12をオンオフするので、照明負荷2への導通制御を1つのスイッチング素子で行うことができ、スイッチング素子の放熱用の放熱部材や駆動用のドライバ回路も少なくなり、回路基板面積も小さくなる。また、正負のゲート制御電圧を必要とせず、このため、2つのゲート制御部や、正負の直流電源回路等を必要としない。従って、部品点数を削減でき、低コスト化、小型化が図れる。なお、本実施形態においては、逆位相制御装置1の負荷を照明負荷2としたが、照明負荷2に限らず、逆位相制御された交流電源電圧で動作可能な負荷であればよい。また、本実施形態の逆位相制御装置1を照明負荷(光源)2と一体化し、逆位相制御で調光する逆位相調光制御システムとして構成することもできる。   As described above, according to the present embodiment, the FET 12 is turned on / off using the full-wave rectified voltage V2 obtained by full-wave rectifying the AC voltage V1 as a power source, so that the conduction control to the illumination load 2 can be performed by one switching element. In addition, the heat dissipating member for dissipating the switching element and the driver circuit for driving are reduced, and the circuit board area is also reduced. Further, positive and negative gate control voltages are not required, and therefore, two gate control units, positive and negative DC power supply circuits and the like are not required. Therefore, the number of parts can be reduced, and the cost and size can be reduced. In the present embodiment, the load of the anti-phase control device 1 is the lighting load 2, but the load is not limited to the lighting load 2 and may be any load that can be operated with an AC power supply voltage controlled in anti-phase. Further, the anti-phase control device 1 of the present embodiment can be integrated with the illumination load (light source) 2 and configured as an anti-phase dimming control system that performs dimming by anti-phase control.

次に、本発明の第1の実施形態に係る変形例について、図3を参照して説明する。図3は、本変形例の逆位相制御装置1における制御部15とFET12との接続構成を示す。本変形例は、制御部15をCPUで構成し、PWM信号からなるゲート制御電圧を出力するCPUの出力ポートとFET12のゲート間に、ゲート制御電圧を増幅するためのゲートドライバ18を接続したものである。   Next, a modification according to the first embodiment of the present invention will be described with reference to FIG. FIG. 3 shows a connection configuration between the control unit 15 and the FET 12 in the antiphase control device 1 of the present modification. In this modification, the control unit 15 is configured by a CPU, and a gate driver 18 for amplifying the gate control voltage is connected between the output port of the CPU that outputs a gate control voltage composed of a PWM signal and the gate of the FET 12. It is.

本変形例によれば、FET12のゲートをCPUからのゲート制御電圧(例えば、3.3V乃至5.0V)で直接オンできないときでも、このゲート制御電圧をゲートドライバ18で増幅することができるので、確実にFET12をオンして導通制御することができる。   According to this modification, even when the gate of the FET 12 cannot be directly turned on with a gate control voltage (for example, 3.3 V to 5.0 V) from the CPU, the gate driver 18 can amplify the gate control voltage. It is possible to reliably turn on the FET 12 and control conduction.

なお、本発明は上記各実施形態の構成に限定されるものではなく、発明の趣旨を変更しない範囲で種々の変形が可能である。上記実施形態においては、整流器を単相ブリッジ整流回路としたが、ダイオード2つの単相全波整流回路で形成してもよい。   In addition, this invention is not limited to the structure of said each embodiment, A various deformation | transformation is possible in the range which does not change the meaning of invention. In the above embodiment, the rectifier is a single-phase bridge rectifier circuit, but may be formed of two single-phase full-wave rectifier circuits with two diodes.

本発明の第1の実施形態に係る逆位相制御装置の構成図。The block diagram of the anti | reverse | negative phase control apparatus which concerns on the 1st Embodiment of this invention. (a)は同装置の入力電圧の波形図、(b)は同全波整流電圧の波形図、(c)は同ゼロクロス信号を示す図、(d)は同PWM信号を示す図、(e)は(d)のPWM信号で制御された負荷供給電圧を示す図。(A) is a waveform diagram of the input voltage of the device, (b) is a waveform diagram of the full-wave rectified voltage, (c) is a diagram showing the zero-cross signal, (d) is a diagram showing the PWM signal, (e ) Is a diagram showing a load supply voltage controlled by the PWM signal of (d). 本発明の上記第1の実施形態の変形例における制御部とFETの接続構成を示す図。The figure which shows the connection structure of the control part and FET in the modification of the said 1st Embodiment of this invention. 従来の逆位相制御装置の構成図。The block diagram of the conventional antiphase control apparatus. 従来の他の逆位相制御装置の構成図。The block diagram of the other conventional antiphase control apparatus.

符号の説明Explanation of symbols

1 逆位相制御装置
11 整流器
12 FET(電界効果トランジスタ)
13 ゼロクロス検出部
14 調光レベル設定部
15 制御部(逆位相制御部)
16 負荷接続部
17 接地ライン
2 照明負荷(負荷、光源)
θ 点弧角
DESCRIPTION OF SYMBOLS 1 Antiphase control apparatus 11 Rectifier 12 FET (field effect transistor)
13 Zero Cross Detection Unit 14 Dimming Level Setting Unit 15 Control Unit (Antiphase Control Unit)
16 Load connection 17 Ground line 2 Lighting load (load, light source)
θ firing angle

Claims (2)

交流電源電圧を全波整流する整流器と、
前記整流器と負荷との間に介在され、前記負荷に流れる電流の導通を制御するスイッチング素子と、
前記スイッチング素子を、全波整流された電圧のゼロクロスのタイミングでオンすると共に、一定の点弧角でオフする逆位相制御部と、
を備えたことを特徴とする逆位相制御装置。
A rectifier for full-wave rectification of the AC power supply voltage;
A switching element that is interposed between the rectifier and the load and controls conduction of a current flowing through the load;
The switching element is turned on at the zero-cross timing of the full-wave rectified voltage, and is turned off at a constant firing angle, and
An anti-phase control device comprising:
抵抗負荷成分を有する光源と、
交流電源電圧を全波整流する整流器と、
前記整流器と前記光源との間に介在され、前記光源に流れる電流の導通を制御する電界効果トランシスタと、
前記電界効果トランシスタを、全波整流された電圧のゼロクロスのタイミングでオンすると共に、一定の点弧角でオフする逆位相制御部と、を備え、
前記電界効果トランシスタのソース又はドレインと前記逆位相制御部のGNDレベルが一致していることを特徴とする逆位相調光制御システム。
A light source having a resistive load component;
A rectifier for full-wave rectification of the AC power supply voltage;
A field effect transistor that is interposed between the rectifier and the light source and controls conduction of a current flowing through the light source;
The field effect transistor is turned on at a zero-cross timing of a full-wave rectified voltage and has an anti-phase control unit turned off at a constant firing angle,
The antiphase dimming control system characterized in that the source or drain of the field effect transistor and the GND level of the antiphase control unit match.
JP2008187920A 2008-07-18 2008-07-18 Antiphase controller, and antiphase illumination control system using the same Withdrawn JP2010027406A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012221595A (en) * 2011-04-04 2012-11-12 Mitsubishi Electric Corp Led turn-on device, reverse phase control device and lighting control system
JP2013004350A (en) * 2011-06-17 2013-01-07 Toshiba Lighting & Technology Corp Antiphase control device
JP2014127714A (en) * 2012-12-27 2014-07-07 Nichia Chem Ind Ltd Light emission diode drive device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012221595A (en) * 2011-04-04 2012-11-12 Mitsubishi Electric Corp Led turn-on device, reverse phase control device and lighting control system
JP2013004350A (en) * 2011-06-17 2013-01-07 Toshiba Lighting & Technology Corp Antiphase control device
JP2014127714A (en) * 2012-12-27 2014-07-07 Nichia Chem Ind Ltd Light emission diode drive device

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