JP2010004683A - Overheating protective circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an overheating protective circuit capable of changing the hysteresis width between an overheat protection temperature and an operation restoration temperature, depending on the overheated state of a semiconductor chip of a protective object. <P>SOLUTION: The overheating protective circuit 1 includes: an overheated state detection part 11 which starts the output of an overheat detection signal Vb, when the temperature of the semiconductor chip 100 exceeds the overheat protection temperature and terminates the output of the overheat detection signal Vb, when the temperature of the semiconductor chip 100 lowers up to the operation restoration temperature, having hysteresis between the overheat protective temperature and itself; an abnormal overheat determination part 12, which receives the input of a signal capable of monitoring the overheated state of the semiconductor chip 100, and determines whether the semiconductor chip 100 is in an abnormally overheated state; and a hysteresis control part 13, which makes the hysteresis width wider in the direction of lowering the setting value of the operation restoration temperature in the overheated state detection part 11, when the abnormal overheat determination part 12 determines that the semiconductor chip is in the abnormally overheated state. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an overheat protection circuit, and more particularly, to an overheat protection circuit that detects an increase in the temperature of a semiconductor chip and protects the semiconductor chip from overheating.

  When the semiconductor chip becomes high temperature, the semiconductor element included in the semiconductor chip may be destroyed. In particular, an IC series regulator used as a stabilized power source for electronic devices or the like is likely to become hot due to a temperature rise due to a load current or a temperature rise at the time of an output short circuit. Therefore, a semiconductor chip on which a series regulator is mounted may be provided with an overheat protection circuit that detects an increase in the temperature of the semiconductor chip and protects the semiconductor chip from overheating.

  Such an overheat protection circuit outputs an overheat detection signal when the temperature of the semiconductor chip rises above a specified temperature. When the overheat detection signal is output, the series regulator stops the current output of the output transistor. As a result, the temperature of the semiconductor chip decreases. When the temperature of the semiconductor chip becomes lower than the specified temperature, the overheat protection circuit stops outputting the overheat detection signal. When the output of the overheat detection signal is stopped, the series regulator resumes the current output of the output transistor.

  At this time, conventionally, the overheat protection temperature at which the output of the overheat detection signal is started and the operation return temperature at which the output transistor resumes the current output is given a temperature difference, so-called hysteresis, so that stable overheat detection can be performed. (For example, refer to Patent Document 1).

  If this hysteresis width setting is narrowed, the operation of the series regulator can be restored quickly, and the operation of electronic devices can be restored quickly.

  However, if the hysteresis width is narrow, the abnormal state of the load may still continue when returning from overheat protection, and the overheat protection circuit immediately enters the protection state again, and an overheat protection detection signal is output. In this case, although the overheat protection detection signal is frequently output, there arises a problem that the temperature of the semiconductor chip does not decrease easily.

As a technique related to a protection circuit other than the overheat protection circuit, there is an overcurrent detection circuit, which detects that an overcurrent has flowed through a series regulator and reduces the output current (for example, Patent Document 2). reference.).
JP2007-31529A (6th page, FIG. 2) JP 2006-60945 A (Page 6, FIG. 1)

  Accordingly, an object of the present invention is to provide an overheat protection circuit capable of changing the hysteresis width between the overheat protection temperature and the operation return temperature in accordance with the overheat state of the semiconductor chip to be protected.

  According to one aspect of the present invention, when the temperature of the semiconductor chip exceeds the overheat protection temperature, the output of the overheat detection signal is started, and the semiconductor chip has the hysteresis until the operation return temperature having hysteresis between the overheat protection temperature. The semiconductor chip is in an abnormal overheat state upon receiving an input of an overheat state detection means for terminating the output of the overheat detection signal and a signal capable of monitoring the overheat state of the semiconductor chip when the temperature drops. Abnormal overheat determining means for determining whether or not the abnormal overheat determination means determines that the abnormal overheat state is present, and hysteresis control means for expanding the width of the hysteresis in a direction to decrease the set value of the operation return temperature An overheat protection circuit is provided.

  According to the present invention, the hysteresis width between the overheat protection temperature and the operation return temperature can be changed according to the overheat state of the semiconductor chip to be protected.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram illustrating an example of the configuration of the overheat protection circuit according to the first embodiment of the present invention.

  The overheat protection circuit 1 of the present embodiment is mounted on the semiconductor chip 100 together with the switching regulator 110. When the chip temperature rises due to the operation of the switching regulator 110 and the semiconductor chip 100 reaches an overheated state, the operation of the switching regulator 110 is performed. The overheat detection signal Vb for stopping is output.

  The overheat protection circuit 1 starts outputting the overheat detection signal Vb when the temperature of the semiconductor chip 100 exceeds the overheat protection temperature, and the temperature of the semiconductor chip 100 reaches the operation return temperature having hysteresis between the overheat protection temperature. Whether the semiconductor chip 100 is in an abnormal overheat state upon receiving an input of an overheat state detection unit 11 that terminates the output of the overheat detection signal Vb and a signal capable of monitoring the overheat state of the semiconductor chip 100 when the output level is lowered. When the abnormal overheat determination unit 12 and the abnormal overheat determination unit 12 determine an abnormal overheat state, the above-described hysteresis width is reduced in the direction of decreasing the set value of the operation return temperature in the overheat state detection unit 11. And an expanding hysteresis control unit 13.

  FIG. 2 shows the state of hysteresis control for the output of the overheat detection signal Vb in this embodiment.

  When the chip temperature rises and exceeds the “overheat protection temperature”, the overheat state detection unit 11 outputs an overheat detection signal Vb.

  When the switching regulator 110 stops operating due to the output of the overheat detection signal Vb, the chip temperature starts to drop, but the overheat state detection unit 11 continues to output the overheat detection signal Vb.

  In a normal case, when the chip temperature further decreases to the “normal operation return temperature”, the overheat state detection unit 11 ends the output of the overheat detection signal Vb.

  When the output of the overheat detection signal Vb ends, the switching regulator 110 resumes operation. As the operation of the switching regulator 110 resumes, the chip temperature rises.

  If the temperature exceeds the “overheat protection temperature” again, the overheat state detection unit 11 outputs the overheat detection signal Vb again.

  As described above, in the normal case, the overheat state detection unit 11 performs ON / OFF of the overheat detection signal Vb output along the first hysteresis loop shown in FIG.

  On the other hand, when the abnormal overheat determination unit 12 determines that the semiconductor chip 100 is in an abnormal overheat state, the hysteresis control unit 13 decreases the set value of the operation return temperature in the overheat state detection unit 11. Increase the width of hysteresis.

  As a result, the operation return temperature is lowered to the “operation return temperature during abnormal overheating” shown in FIG. As a result, ON / OFF of the overheat detection signal Vb output changes along the second hysteresis loop.

  In the case of this second hysteresis loop, the time during which the overheat detection signal Vb is output is long, that is, the time during which the switching regulator 110 stops operating is long. Therefore, there is a high possibility that the cause of abnormal overheating will be eliminated during that time.

  According to the present embodiment, when the semiconductor chip to be protected is in an abnormal overheat state, the hysteresis width between the overheat protection temperature and the operation return temperature is expanded to lower the operation return temperature. Can do. Thereby, the temperature of the semiconductor chip at the time of operation return can be made lower than usual. Further, it is possible to prevent the semiconductor chip from frequently stopping and returning from operation.

  In this embodiment, a specific circuit example of an overheat protection circuit that detects an overheat state by converting the overheat protection temperature and the chip temperature into a voltage is shown.

  Similarly to the first embodiment, the overheat protection circuit 2 according to the present embodiment also includes an overheat state detection unit 21, an abnormal overheat determination unit 22, and a hysteresis control unit 23.

  Whether the abnormal overheat determination unit 22 of the present embodiment is in an abnormal overheat state due to the amount of time until the overheat detection signal Vb is output again after the temperature is lowered and the operation returns after the operation is stopped due to overheat detection. Determine if.

  The overheat state detection unit 21 includes a band cap voltage generation unit 211 that generates a reference voltage VBG corresponding to the overheat protection temperature, and a temperature measurement voltage generation unit 212 that generates a temperature measurement voltage Va that changes in proportion to a change in chip temperature. And an OP amplifier OP2 that compares the temperature measurement voltage Va with the reference voltage VBG and outputs an overheat detection signal Vb when the temperature measurement voltage Va becomes larger than the reference voltage VBG.

  The band cap voltage generation unit 211 generates a reference voltage extremely stable with respect to temperature by appropriately setting the ratio of the resistors R2 and R3 and the emitter current ratio of the PNP transistors Q1 and Q2.

  The OP amplifier OP1 of the band cap voltage generation unit 211 controls the gate voltages of the PMOS transistors P1 and P2 so that the PMOS transistors P1 and P2 function as current sources.

  The temperature measurement voltage generation unit 212 includes a PMOS transistor P3 whose gate voltage is controlled by the OP amplifier OP1 of the band cap voltage generation unit 211, and resistors R11, R12, and R13 connected in series to the PMOS transistor P3.

  Resistors R11, R12, and R13 are grounded by the hysteresis controller 23. If the resistance values are R11, R12, and R13, a variable resistance whose resistance values change in three stages of R11, R11 + R12, and R11 + R12 + R13 is equivalent to being connected to the PMOS transistor P3.

  The temperature measurement voltage Va output from the temperature measurement voltage generator 212 corresponds to the voltage across the terminals of this variable resistor.

  This temperature measurement voltage Va has a positive temperature coefficient with respect to the temperature. This will be described with reference to FIG.

Now, the base-emitter voltages of the PNP transistors Q1 and Q2 of the bandcap voltage generator 211 are V _BE1 and V _BE2 , and the resistance values of the resistors R1, R2, and R3 are Rr, Rr, and RT, respectively, and flow through the resistor R3. Assuming that the current is IE, the current IE is controlled so that the voltages of both inputs of the OP amplifier OP1 are equal.
V _BE1 = V _BE2 + IE · RT
Holds. Than this,
IE · RT = V _BE1 −V _BE2
It becomes. here,
V _BE1 −V _BE2 = kT / q · ln (N)
So
IE = 1 / RT · kT / q · ln (N)
It becomes. Here, k: Boltzmann constant, T: absolute temperature, q: charge amount of electrons, N: emitter current ratio of PNP transistors Q1 and Q2.

  Now, if the size of the PMOS transistor P3 is the same as that of the PMOS transistors P1 and P2, the gate voltage is controlled by the OP amplifier OP1, so that the output current amount of the PMOS transistor P3 is also the output current of the PMOS transistors P1 and P2. It has the same amount of current as IE.

Therefore, when the resistance value of the variable resistor formed by the resistors R11, R12, and R13 is expressed as Ra, the temperature measurement voltage Va is
Va = IE * Ra = Ra / RT * kT / q * ln (N)
It becomes. Therefore, when this Va is differentiated by the absolute temperature T to obtain the temperature coefficient dVa / dT,
dVa / dT = Ra / RT · k / q · ln (N)
And becomes a positive value.

  That is, the temperature measuring voltage Va shows a characteristic that increases as the chip temperature increases.

  In addition, as the resistance value Ra of the variable resistor increases, the voltage value of the temperature measurement voltage Va for the same temperature increases.

  Therefore, the resistance value Ra of the variable resistor is initially reduced, the temperature at which the temperature measurement voltage Va rises and reaches the reference voltage VBG is defined as the overheat protection temperature, and when the temperature measurement voltage Va exceeds the reference voltage VBG, the variable resistance The resistance value Ra is increased. Thereby, the output characteristic of the temperature measurement voltage Va with respect to temperature shifts upward.

  As a result, the temperature at which the temperature measurement voltage Va reaches the reference voltage VBG when the temperature drops can be lowered than when the temperature rises. The temperature at which the temperature measurement voltage Va reaches the reference voltage VBG when the temperature drops is defined as the operation return temperature.

  Thus, by changing the resistance value Ra of the variable resistor, a hysteresis characteristic can be provided between the overheat protection temperature and the operation return temperature.

  Further, the hysteresis width can be increased as the resistance value Ra of the variable resistor that is changed when the overheat protection temperature is reached is increased.

  FIG. 5 shows the relationship between how the resistance value Ra of the variable resistor is changed and the change in the hysteresis width.

  Assuming that the resistance value of the variable resistor is Ra1, Ra2, Ra3 (Ra1 <Ra2 <Ra3), the output characteristics of the temperature measurement voltage Va change to Va1, Va2, Va3 with respect to the temperature.

  Therefore, if the initial resistance value of the variable resistor is Ra1, and the resistance value of the variable resistor is Ra2 when the temperature rises to the overheat protection temperature, the operation return temperature becomes the first operation return temperature, and the first hysteresis loop Draw.

  On the other hand, when the resistance value of the variable resistor when the temperature rises to the overheat protection temperature is Ra3, the operation return temperature becomes the second operation return temperature, and a second hysteresis loop is drawn. The second hysteresis loop has a wider hysteresis width than the first hysteresis loop.

  Therefore, first, the hysteresis control unit 23 controls the hysteresis width of the overheat state detection unit 21 by changing the magnitude of the resistance value Ra of the variable resistor that is changed when the temperature rises to the overheat protection temperature.

  Next, returning to FIG. 3, the abnormal overheat determination unit 22 will be described.

  The abnormal overheat determination unit 22 of the present embodiment uses the overheat detection signal Vb as a signal for monitoring the overheat state, and determines whether or not it is in an abnormal heating state based on the length of the pulse width.

  The overheat detection signal Vb output from the overheat state detection unit 21 of this embodiment becomes “0” when the chip temperature exceeds the overheat protection temperature, and becomes “1” when the chip temperature falls to the operation return temperature. After that, when the chip temperature again exceeds the overheat protection temperature, it becomes “0”. However, since the chip temperature rarely reaches the overheat protection temperature, the period during which the overheat detection signal Vb is “1” is considerable. long.

  However, when the cause of overheating continues, the pace of temperature rise after the return of operation is fast, and the chip temperature immediately reaches the overheat protection temperature again. Therefore, in this case, the period during which the overheat detection signal Vb is “1” is short.

  Therefore, the abnormal overheat determination unit 22 determines that the abnormal heating state is present when the period “1” of the overheat detection signal Vb is shorter than the predetermined period.

  Therefore, the abnormal overheat determination unit 22 is set when the start signal or the overheat detection signal Vb output upon detection of power-on is set to “1” by the OR gate OR1 that outputs the set signal s to detect overheat. The SR-type flip-flop SR1 is provided that is reset when the period of “1” of the signal Vb is shorter than a predetermined period. The output q of the SR flip-flop SR1 becomes an abnormal heating state determination signal.

  The reset signal r of the SR flip-flop SR1 includes a delay circuit 221 that delays the “1” of the overheat detection signal Vb for a predetermined period, and an EX-NOR that detects a match between the output d of the delay circuit 221 and the overheat detection signal Vb. The gate EN1, the latch LT1 that latches the output d of the delay circuit 221 using the output e of the EX-NOR gate EN1 as a clock signal, and the AND gate that takes the logical product of the inverted output Vc of the latch LT1 and the output d of the delay circuit 221 And a circuit composed of AN1. The output of the AND gate AN1 becomes the reset signal r of the SR flip-flop SR1.

  FIG. 6 is a waveform diagram showing how the abnormal overheat determination unit 22 operates.

  In a normal state, since the period “1” of the overheat detection signal Vb is long, there is a period in which the overheat detection signal Vb and “1” of the output d of the delay circuit 221 overlap, and “1” of the output d of the delay circuit 221. At the rising edge, the output e of the EX-NOR gate EN1 rises to “1”. As a result, the latch LT1 latches “1” of the output d of the delay circuit 221 at the rising edge of the output e of the EX-NOR gate EN1, and its inverted output Vc changes to “0”. Therefore, the reset signal r that is the output of the AND gate AN1 that takes the logical product of the output d of the delay circuit 221 and the output d of the delay circuit 221 is “0” even if the output d of the delay circuit 221 is “1”. It is.

  The EX-NOR gate EN1 rises to “1” when the output d of the delay circuit 221 falls. At this time, the latch LT1 latches the value “0” of the output d of the delay circuit 221 at that time, and changes its inverted output Vc to “1”.

  On the other hand, when the period of “1” of the overheat detection signal Vb is shorter than the delay time of the delay circuit 221 in the abnormal overheat state, there is no period of “1” overlapping the overheat detection signal Vb and the output d of the delay circuit 221. Therefore, when the output d of the delay circuit 221 rises to “1”, the output e of the EX-NOR gate EN1 falls to “0”. As a result, the latch LT1 does not perform the latch operation, and its inverted output remains “1”. Therefore, the reset signal r which is the output of the AND gate AN1 becomes “1” when the output d of the delay circuit 221 becomes “1”. As a result, the SR flip-flop SR1 is reset and its output q changes to '0'. The state of the output q of “0” is continued until the overheat detection signal Vb becomes “1” next time.

  Next, the hysteresis control unit 23 will be described.

  The hysteresis control unit 23 includes NMOS transistors N1 and N3 connected in series between the connection point between the resistors R1 and R2 of the overheat state detection unit 21 and the ground terminal GND, and the resistors R2 and resistances of the overheat state detection unit 21. NMOS transistors N2 and N4 connected in series between the connection point of R3 and the ground terminal GND.

  The overheat detection signal Vb is input to the gate terminal of the NMOS transistor N1, and the output q of the SR flip-flop SR1 of the hysteresis control unit 23 is input to the gate terminal of the NMOS transistor N3. Therefore, when the overheat detection signal Vb = “1” and the output q of the SR type flip-flop SR1 = “1”, that is, in the normal operation state, the NMOS transistors N1 and N3 are both turned “ON”.

  Thereby, the resistor R1 is connected between the PMOS transistor P3 of the overheat state detection unit 21 and the ground terminal GND. When the output current of the PMOS transistor P3 is IE, the resistance value of the resistor R1 is R1, and the temperature measurement voltage Va at this time is Va1, Va1 = IE · R1.

  Further, a signal obtained by inverting the overheat detection signal Vb by the inverter IV1 is input to the gate terminal of the NMOS transistor N2, and the output q of the SR flip-flop SR1 of the hysteresis control unit 23 is input to the gate terminal of the NMOS transistor N4. . Therefore, when the overheat detection signal Vb = “0” and the output q of the SR type flip-flop SR1 = “1”, that is, when the overheat state occurs, the NMOS transistors N2 and N4 are both turned “ON”.

  Thereby, the resistors R1 and R2 are connected in series between the PMOS transistor P3 of the overheat state detection unit 21 and the ground terminal GND. When the resistance value of the resistor R2 is R2, and the temperature measurement voltage Va at this time is Va2, Va2 = IE · (R1 + R2).

  On the other hand, when the output q of the SR flip-flop SR1 is “0”, that is, in an abnormal overheat state, the NMOS transistors N3 and N4 are “OFF”.

  Thereby, the resistors R1, R2, and R3 are connected in series between the PMOS transistor P3 of the overheat state detection unit 21 and the ground terminal GND. When the resistance value of the resistor R3 is R3 and the temperature measurement voltage Va at this time is Va3, Va3 = IE · (R1 + R2 + R3).

  FIG. 6 shows the ON / OFF state of the NMOS transistors N1 to N4 and how the temperature measurement voltage Va changes in accordance with the operation of the abnormal overheat determination unit 22.

  FIG. 7 shows a hysteresis loop in the operation shown in FIG.

  FIG. 7A shows a hysteresis loop during normal operation. In this case, when the temperature measurement voltage Va rising along the temperature characteristic line indicated by Va1 reaches the reference voltage VBG, the temperature characteristic line moves to Va2. Thereafter, the temperature measurement voltage Va decreases along the temperature characteristic line indicated by Va2, and when the reference voltage VBG is reached, the temperature characteristic line returns to the original Va1.

  In this case, the point where the temperature characteristic line Va1 intersects the reference voltage VBG is the overheat protection temperature, and the point where the temperature characteristic line Va2 intersects the reference voltage VBG is the normal operation return temperature.

  FIG. 7B shows a hysteresis loop when abnormal overheating is detected.

  In this case, when the temperature measurement voltage Va rising along the temperature characteristic line indicated by Va1 reaches the reference voltage VBG, the temperature characteristic line temporarily moves to Va2. Thereafter, when the temperature measurement voltage Va that has decreased along the temperature characteristic line indicated by Va2 reaches the reference voltage VBG, the temperature characteristic line further moves to Va3. Thereafter, when the temperature measurement voltage Va decreases along the temperature characteristic line indicated by Va3 and reaches the reference voltage VBG, the temperature characteristic line returns to the original Va1. Therefore, the hysteresis width in this case is wider than the hysteresis loop of FIG.

  In this case, the point where the temperature characteristic line Va3 intersects the reference voltage VBG is the operation return temperature in the overheated state.

  According to the present embodiment, it is possible to determine whether or not the semiconductor chip is in an abnormal heating state only by monitoring the pulse width of the overheat detection signal Vb.

  Further, the operation return temperature and the operation return temperature can be set to arbitrary values by setting the resistance values of the resistors R1, R2, and R3 of the overheat state detection unit 21. Thereby, the chip temperature can be managed according to the application of the semiconductor chip and the like.

  In the present embodiment, an example of an overheat protection circuit in a semiconductor chip having an overcurrent detection circuit and mounting a switching regulator 120 that outputs an overcurrent detection signal Vh is shown.

  FIG. 8 is a circuit diagram illustrating an example of the configuration of the overheat protection circuit according to the third embodiment of the present invention.

  The overheat protection circuit 3 of the present embodiment is different from the second embodiment in that an abnormal overheat determination unit 32 is provided instead of the abnormal overheat determination unit 22 of the second embodiment. Therefore, in FIG. 8, the same parts as those in the second embodiment are denoted by the same reference numerals as those in FIG. 3, and detailed description thereof is omitted here.

  In this embodiment, overheating protection is performed by utilizing the fact that when the switching regulator 120 enters an overcurrent output state, the semiconductor chip easily falls into an abnormal overheat state. Therefore, the abnormal overheat determination unit 32 determines that the semiconductor chip is in an abnormal overheat state when the overcurrent detection signal Vh output from the switching regulator 120 indicates overcurrent detection.

  Similarly to the abnormal overheat determination unit 22 of the second embodiment, the abnormal overheat determination unit 32 of the present embodiment also includes an SR flip-flop SR1 that outputs an abnormal heating state determination signal q. The set signal s of the SR flip-flop SR1 is also output from the OR gate OR1 to which the start signal and the overheat detection signal Vb are input, like the abnormal overheat determination unit 22.

  On the other hand, a signal obtained by inverting the overcurrent detection signal Vh output from the switching regulator 120 by the inverter IV2 is used as the reset signal r of the SR flip-flop SR1.

  Next, the operation of the abnormal overheat determination unit 32 will be described with reference to FIG.

  In the normal state, the output signal q of the SR flip-flop SR1 is set to “1”, and the overcurrent detection signal Vh outputs “0”.

  When the switching regulator 120 enters an overcurrent output state, the overcurrent detection signal Vh outputs “1”. Further, when the overcurrent output state continues and the temperature of the semiconductor chip exceeds the overheat protection temperature, the overheat detection signal Vb becomes '0'. When the switching regulator 120 stops operating due to the output of the overheat detection signal Vb, the current from the switching regulator 120 is not output, so the overcurrent detection signal Vh falls to ‘0’.

  As a result, the reset signal r, which is an inverted signal of the overcurrent detection signal Vh, rises to ‘1’, the SR flip-flop SR1 is reset, and its output q changes to ‘0’.

  Due to the change of the output q of the SR flip-flop SR1 to “0”, the NMOS transistors N3 and N4 of the hysteresis control unit 23 are “OFF”. As a result, the temperature measurement voltage Va of the overheat state detection unit 21 is Va3 = IE · (R1 + R2 + R3). As a result, the operation return temperature is lower than the normal operation return temperature, and is lowered to the operation return temperature at the time of abnormal overheating.

  FIG. 10 shows a hysteresis loop in the operation shown in FIG.

  FIG. 10A is a hysteresis loop during normal operation. In this case, when the temperature measurement voltage Va that has risen along the temperature characteristic line indicated by Va1 reaches the reference voltage VBG, the temperature characteristic line moves to Va2. Thereafter, the temperature measurement voltage Va decreases along the temperature characteristic line indicated by Va2, and when the reference voltage VBG is reached, the temperature characteristic line returns to the original Va1.

  FIG. 10B is a hysteresis loop when abnormal overheating is detected.

  In this case, when the temperature measurement voltage Va rising along the temperature characteristic line indicated by Va1 reaches the reference voltage VBG, the temperature characteristic line moves to Va3. Thereafter, when the temperature measurement voltage Va decreases along the temperature characteristic line indicated by Va3 and reaches the reference voltage VBG, the temperature characteristic line returns to the original Va1. Thereby, the hysteresis width in this case becomes wider than the hysteresis loop of FIG.

  According to such a present Example, since an abnormal overheat determination is performed using the overcurrent detection signal output from a switching regulator, the circuit structure of an abnormal overheat determination part can be simplified.

The block diagram which shows the example of a structure of the overheat protection circuit which concerns on Example 1 of this invention. The figure which shows the mode of the hysteresis control in the overheat protection circuit of Example 1. FIG. The circuit diagram which shows the example of a structure of the overheat protection circuit which concerns on Example 2 of this invention. Explanatory drawing regarding the measurement voltage generation in the overheat protection circuit of Example 2. FIG. The figure which shows the relationship between the resistance value of the resistance of the temperature measurement voltage generation part of Example 2, and a hysteresis width. FIG. 6 is a waveform diagram illustrating an example of the operation of the overheat protection circuit according to the second embodiment. FIG. 6 is a diagram illustrating an example of hysteresis control in the overheat protection circuit according to the second embodiment. The circuit diagram which shows the example of a structure of the overheat protection circuit which concerns on Example 3 of this invention. FIG. 6 is a waveform diagram illustrating an example of the operation of the overheat protection circuit according to the third embodiment. FIG. 10 is a diagram illustrating an example of hysteresis control in the overheat protection circuit according to the third embodiment.

Explanation of symbols

1, 2, 3 Overheat protection circuit 11, 21 Overheat detection unit 12, 22, 32 Abnormal overheat determination unit 13, 23 Hysteresis control unit P1-P3 PMOS transistor N1-N4 NMOS transistor Q1, Q2 PNP transistors R1-R3, R11 ˜R13 Resistor OP1, OP2 OP amplifier SR1 SR type flip-flop LT1 Latch AN1 AND gate OR1 OR gate EN1 EX-NOR gate IV1, IV2: Inverter Vin Input voltage terminal GND Ground terminal

Claims (5)

When the temperature of the semiconductor chip exceeds the overheat protection temperature, output of the overheat detection signal is started, and when the temperature of the semiconductor chip decreases to an operation return temperature having a hysteresis between the overheat protection temperature, the overheat An overheating state detection means for terminating the output of the detection signal;
An abnormal overheat determination means for receiving an input of a signal capable of monitoring an overheat state of the semiconductor chip and determining whether the semiconductor chip is in an abnormal overheat state;
An overheat protection circuit comprising hysteresis control means for expanding the hysteresis width in a direction to lower the set value of the operation return temperature when the abnormal overheat determination means determines that the abnormal overheat state has occurred. . The abnormal overheat determination means is
Receiving the overheat detection signal as the overheat state monitoring signal,
2. The overheat protection circuit according to claim 1, wherein when the output period of the overheat detection signal is shorter than a predetermined time, the abnormal overheat state is determined. When the semiconductor chip includes an overcurrent detection circuit that detects an overcurrent of the output current and outputs an overcurrent detection signal,
The abnormal overheat determination means is
Receiving the overheat detection signal and the overcurrent detection signal as the overheat state monitoring signal;
The overheat protection circuit according to claim 1, wherein when the overheat detection signal is output and the overcurrent detection signal is output, it is determined that the abnormal overheat state is present. The overheat state detecting means is
Comparing means for comparing a temperature measurement voltage, which is a voltage between terminals of a variable resistor through which a current that increases in proportion to a change in temperature of the semiconductor chip, and a reference voltage corresponding to the overheat protection temperature,
4. The overheat protection circuit according to claim 1, wherein the overheat detection signal is output when the temperature measurement voltage becomes larger than the reference voltage. 5. The hysteresis control means comprises:
In an initial state, the variable resistor is set to a first resistance value,
When the overheat detection signal is output from the overheat state detection means, the variable resistance is set to a second resistance value larger than the first resistance value,
5. The overheating according to claim 4, wherein when the abnormal overheating determination unit determines that the abnormal overheating state occurs, the variable resistance is set to a third resistance value larger than the second resistance value. Protection circuit.

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