JP2009506406A - コンピュータシステムの制御装置および制御方法 - Google Patents

コンピュータシステムの制御装置および制御方法 Download PDF

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Publication number
JP2009506406A
JP2009506406A JP2008525512A JP2008525512A JP2009506406A JP 2009506406 A JP2009506406 A JP 2009506406A JP 2008525512 A JP2008525512 A JP 2008525512A JP 2008525512 A JP2008525512 A JP 2008525512A JP 2009506406 A JP2009506406 A JP 2009506406A
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JP
Japan
Prior art keywords
functional unit
computer system
error
defective
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2008525512A
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English (en)
Japanese (ja)
Inventor
ヴァイベルレ ラインハルト
ミュラー ベルント
ベール エーバーハルト
コラーニ ヨーク
グメーリヒ ライナー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of JP2009506406A publication Critical patent/JP2009506406A/ja
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/006—Identification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845—Systems in which the redundancy can be transformed in increased performance

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Control By Computers (AREA)
  • Multi Processors (AREA)
JP2008525512A 2005-08-08 2006-07-21 コンピュータシステムの制御装置および制御方法 Withdrawn JP2009506406A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102005037262A DE102005037262A1 (de) 2005-08-08 2005-08-08 Vorrichtung und Verfahren zur Steuerung eines Rechnersystems
PCT/EP2006/064490 WO2007017359A1 (de) 2005-08-08 2006-07-21 Vorrichtung und verfahren zur steuerung eines rechnersystems

Publications (1)

Publication Number Publication Date
JP2009506406A true JP2009506406A (ja) 2009-02-12

Family

ID=37478820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008525512A Withdrawn JP2009506406A (ja) 2005-08-08 2006-07-21 コンピュータシステムの制御装置および制御方法

Country Status (7)

Country Link
EP (1) EP1915691A1 (ko)
JP (1) JP2009506406A (ko)
KR (1) KR20080032167A (ko)
CN (1) CN101238449A (ko)
DE (1) DE102005037262A1 (ko)
TW (1) TW200732907A (ko)
WO (1) WO2007017359A1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017204691B3 (de) * 2017-03-21 2018-06-28 Audi Ag Steuervorrichtung zum redundanten Ausführen einer Betriebsfunktion sowie Kraftfahrzeug

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3783250A (en) * 1972-02-25 1974-01-01 Nasa Adaptive voting computer system
US4342083A (en) * 1980-02-05 1982-07-27 The Bendix Corporation Communication system for a multiple-computer system
US4327437A (en) * 1980-07-30 1982-04-27 Nasa Reconfiguring redundancy management

Also Published As

Publication number Publication date
KR20080032167A (ko) 2008-04-14
EP1915691A1 (de) 2008-04-30
DE102005037262A1 (de) 2007-02-15
WO2007017359A1 (de) 2007-02-15
TW200732907A (en) 2007-09-01
CN101238449A (zh) 2008-08-06

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Effective date: 20090313