JP2009290068A - Nitride semiconductor light emitting element, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve problems on processes and problems on element characteristics in manufacture of a nitride semiconductor light emitting element having vertical electrode structure. <P>SOLUTION: The nitride semiconductor light emitting element is characterized in that a nitride semiconductor laminated structure including an n type nitride semiconductor layer (3), a nitride semiconductor light emitting layer (4) and a p type nitride semiconductor layer (5) which are sequentially laminated, a warpage prevention layer (9) and a support substrate (11), are joined in this order. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nitride semiconductor light emitting device and a method for manufacturing the same, and more particularly to a nitride semiconductor light emitting device capable of increasing the area and improving the light emission efficiency and the electrostatic breakdown voltage and the method for manufacturing the same.

  As is well known, a voltage is applied to a stacked semiconductor structure including a sequentially stacked n-type compound semiconductor, a compound semiconductor active layer (light emitting layer), and a p-type compound semiconductor, thereby being included in the n-type semiconductor layer. There is a compound semiconductor light emitting device that utilizes light emission by recombining electrons and holes contained in a p-type semiconductor within an active layer. Light-emitting diodes are commercially available as well-known examples of such semiconductor light-emitting devices, and these light-emitting devices use direct transition semiconductors in which electrons and holes are efficiently recombined, so that the light-emitting efficiency is very high. Very expensive. Therefore, these light emitting elements are currently used for lighting, home appliance displays, road traffic lights, and the like.

  Here, the white light emitting diode used for illumination and display is produced by combining, for example, a blue light emitting diode and a phosphor such as YAG (yttrium, aluminum, garnet) having a fluorescent wavelength in a yellow region. A nitride semiconductor is used for the blue light emitting diode.

  In a method for manufacturing a nitride semiconductor light emitting device that is generally put into practical use, an n-type GaN layer sequentially stacked on a wafer-like sapphire substrate as a crystal growth substrate (hereinafter referred to as “growth substrate”). A semiconductor multilayer structure including an active layer and a p-type GaN layer is grown.

  However, since the sapphire substrate is an insulator, the positive electrode and the negative electrode are formed on the same surface side of the sapphire substrate. That is, partial etching is performed from the p-type GaN layer until reaching the n-type GaN layer, a negative electrode is provided on the n-type GaN layer partially exposed by the etching, and a positive electrode is provided on the p-type GaN layer. An electrode is provided. In this case, the active layer area per light emitting element chip is reduced. In addition, after the sapphire substrate is mounted on the stem, two bonding wires are necessary to apply a voltage to the light emitting element. Furthermore, the heat dissipation through the sapphire substrate is not good with respect to the heat generated in the light emitting element.

  From such a viewpoint, in the method for manufacturing a nitride semiconductor light emitting device disclosed in Japanese Patent Application Laid-Open No. 2001-313422 of Patent Document 1, a pair of positive and negative electrodes are formed by removing the sapphire growth substrate by polishing or the like and sandwiching the semiconductor multilayer structure in the vertical direction. (Hereinafter, this positive and negative electrode structure is also referred to as “vertical electrode structure”).

  Japanese Patent Application Laid-Open No. 2000-101139 of Patent Document 2 discloses a method of irradiating a laser beam on the interface from the substrate side as a method of removing the sapphire growth substrate from the nitride semiconductor multilayer structure.

As will be described later, the nitride semiconductor multilayer structure from which the sapphire growth substrate is removed can be held by a conductive support substrate such as a plating layer, a resin layer partially including a conductor region, or a GaAs layer.
JP 2001-313422 A JP 2000-101139 A JP 2000-277804 A JP 2004-0477704 A JP 2000-021772 A Published by Hideo Ise, “Electroforming Technology and Applications”, 1996

  According to Patent Document 1, in the process of removing the growth substrate by polishing from the wafer including the sapphire growth substrate and the nitride semiconductor multilayer structure thereon, there is a problem that the wafer breaks when the wafer is warped. Therefore, in Patent Document 1, in order to prevent the warpage of the wafer, the warpage of the ohmic electrode layer of the first metal layer and the second metal layer having a thickness of 10 μm or more on the uppermost layer of the nitride semiconductor multilayer structure on the sapphire growth substrate. A prevention layer is sequentially deposited. The warpage prevention layer can reduce the warpage of the wafer. However, Patent Document 1 has a problem that it takes a very long time to remove the sapphire growth substrate by polishing.

  In Patent Document 1, the semiconductor laminated structure from which the sapphire growth substrate is removed is held by a conductive support substrate made of a plating layer or a resin layer partially including a conductor region. Moreover, in the manufacturing method of Unexamined-Japanese-Patent No. 2000-277804 of patent document 3, conductive substrates, such as GaAs, are utilized as a support substrate for the semiconductor laminated structure from which a sapphire growth substrate is removed. However, since the thermal expansion coefficients of the sapphire growth substrate and the GaAs support substrate are different, there arises a problem that the wafer is warped in the process in which the semiconductor laminated structure on the growth substrate and the support substrate are bonded by thermocompression bonding via a metal layer.

  Here, the amount of warpage of the wafer is defined by the difference in height between the highest portion and the lowest portion in the wafer surface. When the amount of warpage of the wafer is 80 μm or more, when the growth substrate is peeled off from the semiconductor multilayer structure by laser irradiation as disclosed in Patent Document 2, the interface between the semiconductor multilayer structure and the growth substrate is used. Further, it is difficult to uniformly irradiate the laser, and it is difficult to peel and remove the growth substrate without damaging the semiconductor multilayer structure. In particular, when the support substrate is thermocompression bonded to the semiconductor multilayer structure as in Patent Document 3, the amount of warpage increases as the wafer area increases, so that the growth substrate is more difficult to remove.

  In addition, as a method for producing a support substrate, in Patent Document 1, electroless plating is used, and in Japanese Patent Application Laid-Open No. 2004-47704, Patent Document 4, a support substrate is created by electroplating, but the wafer warps due to the stress of the plating itself. Therefore, the same problem as in Patent Document 3 occurs.

  Actually, when a support substrate is formed with a Cu layer having a thickness of 100 μm by electrolytic plating on a nitride semiconductor laminated structure grown on a 2-inch diameter sapphire substrate, a warp amount of about 80 μm is generated on the wafer, and the sapphire It was not easy to remove the growth substrate.

  According to the examination results of the present inventors, the growth substrate can be peeled and removed when the wafer warpage is less than 80 μm, but the nitride semiconductor multilayer structure tends to be damaged when the warpage is 80 μm or more. Become prominent. In addition, when the amount of warpage of the wafer is less than 40 μm, there is a tendency that a part of the nitride semiconductor multilayer structure is damaged, but the growth substrate is easily peeled off. Further, when the amount of warpage of the wafer is less than 20 μm, the tendency of causing damage to the nitride semiconductor multilayer structure is remarkably reduced, and the growth substrate can be more easily separated.

  This is because when the focal point of the laser beam is shifted by 20 μm in the beam axis direction, the laser energy irradiated per unit area is reduced by about 20%, and as a result, the applied energy for peeling the growth substrate is reduced. Is consistent with not enough. The amount of warpage of the wafer described here does not depend on the area of the wafer, and the larger the amount of warpage, the more the growth substrate is affected.

  In addition, a wafer warped by applying a support substrate is warped even after the growth substrate is peeled and removed, making it difficult to perform processes such as photolithography and chip division. Further, the nitride semiconductor multilayer structure contained in the wafer is warped, so that an internal electric field due to crystal distortion composed of heterogeneous atoms of group III atoms and group V atoms is applied to the light emitting layer, and the light emission efficiency is improved. Problems such as reduction and shift in emission wavelength may occur.

  As described above, regarding the fabrication of a nitride semiconductor light emitting device having a vertical electrode structure, the method according to Patent Document 3 and Patent Document 4 differs from the method according to Patent Document 1 because of providing a support substrate. As a result, warpage of the wafer causes process problems and device characteristics.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to improve process problems and device characteristic problems in the production of a nitride semiconductor light emitting device having a vertical electrode structure.

  A nitride semiconductor light emitting device according to the present invention includes a nitride semiconductor multilayer structure including an n-type nitride semiconductor layer, a nitride semiconductor light emitting layer, and a p-type nitride semiconductor layer, a warp prevention layer, and a support substrate, which are sequentially stacked. And are joined in this order.

  In addition, it is preferable that a curvature prevention layer contains one or more layers of a metal layer, an alloy layer, or a dielectric layer harder than a support substrate. When the warp preventing layer is a metal layer or an alloy layer, Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Nb, Mo, Ru, Rh, Hf, Ta, W, Re, Os, Ir, And one or more of Be. The warp prevention layer preferably has a hardness of 40 HV or higher.

  Further, a layer containing Au may be further included between the warpage preventing layer and the support substrate, and it is preferable that the warpage preventing layer can also act to prevent the diffusion of Au. It is preferable that the warp preventing layer acts to warp in the opposite direction to the warp of the support substrate. The thermal conductivity of the support substrate is preferably 1.5 W / cm · K or more.

  Indium tin oxide, indium molybdenum oxide, indium oxide, tin oxide, cadmium tin oxide, gallium oxide, indium zinc oxide on the entire surface of the outermost p-type nitride semiconductor layer included in the nitride semiconductor multilayer structure It is preferable that a p-side electrode including an oxide, a gallium zinc oxide, and a zinc oxide oxide layer or a metal layer with a thickness of 1 nm to 200 nm in thickness is formed. On the other hand, it is preferable that an n-side metal electrode is formed on a part of the outermost n-type nitride semiconductor layer included in the nitride semiconductor multilayer structure. The n-side metal electrode preferably has a diameter in the range of 50 nm to 150 nm and a thickness of 200 nm or more.

  In the method for manufacturing a nitride semiconductor light emitting device as described above, a nitride semiconductor multilayer structure is grown on a wafer-like growth substrate for crystal growth, and a warp preventing layer is interposed on the nitride semiconductor multilayer structure. In the wafer state in which the support substrate is bonded and the support substrate is bonded, the amount of warpage of the wafer is preferably less than 80 μm in the height difference of the wafer surface.

The warpage prevention layer is preferably formed by electrolytic plating. The support substrate is also preferably formed on the warpage preventing layer by plating. The growth substrate can include any of sapphire, GaN, SiC, LiGaO ₂ , and LiAlO ₂ . The nitride semiconductor multilayer structure preferably includes a buffer layer in contact with the growth substrate, and the growth substrate is preferably transparent to the laser light absorbed by the buffer layer. When the buffer layer contains GaN, the laser light preferably has a center wavelength of 355 nm or less. The surface of the growth substrate preferably has irregularities in a stripe shape, a circular shape, or a polygonal shape.

  According to the present invention, in a wafer including a growth substrate, a nitride semiconductor multilayer structure, a warpage prevention layer, and a support substrate, the warpage prevention layer has an effect of suppressing the warpage of the wafer. When the growth substrate is peeled from the nitride semiconductor multilayer structure by laser light irradiation, the laser beam focus shift due to wafer warpage can be reduced, and the growth substrate can be easily removed without damaging the nitride semiconductor multilayer structure. can do.

  Further, even when laser scribing is used to divide the wafer from which the growth substrate has been peeled off, the warp prevention layer can act to suppress warpage of the wafer and facilitate chip division.

  Furthermore, in the nitride semiconductor multilayer structure in which the warpage is suppressed by the warp prevention layer, generation of an internal electric field due to strain is suppressed, the quantum confined Stark effect in the light emitting layer by the internal electric field is suppressed, and the emission peak wavelength shifts In addition, a decrease in the probability of recombination of electrons and holes can be prevented.

(Embodiment 1)
FIG. 1 is a schematic cross-sectional view showing a laminated structure in the process of manufacturing a nitride semiconductor light emitting device according to Embodiment 1 of the present invention. In this figure, an undoped GaN buffer layer 2, an n-type GaN layer 3, a light emitting layer 4 including a GaN / InGaN quantum well, and a p-type GaN layer 5 are sequentially stacked on a sapphire growth substrate 1.

  A Pd contact layer 6 is formed on the p-type GaN layer 5 and heat treatment is performed to improve its adhesion. On the Pd contact layer 6, an Ag reflective metal layer 7, a barrier layer 8 in the stacking order of Ti (thickness 100 nm) / Pt (thickness 30 nm), and a warp prevention layer 9 of Hf (thickness 5 μm) are sequentially formed. Laminated.

  On the Hf warp prevention layer 9, an adhesive metal layer of Au (thickness 3 μm) is formed. On the other hand, on the Si support substrate 11, a pasted metal laminate in the order of lamination of Ti (thickness 100 nm) / Pt (thickness 30 nm) / Au (thickness 0.5 μm) / AuSn (thickness 3 μm) is formed. . Then, the Au layer and the AuSn layer included in these affixed metal layers are overlapped with each other, and the bonding metal layer 10 is formed by thermocompression bonding.

  FIG. 2 is a schematic cross-sectional view showing a nitride semiconductor light emitting device in which a positive electrode and a negative electrode are formed after the step of FIG. 2 is produced, the undoped GaN buffer layer 2 in FIG. 1 is irradiated with a laser beam having a wavelength of 355 nm and thermally decomposed, and the growth substrate 1 and the buffer layer 2 are removed. A Ti / Al or Ti / Au pad electrode 12 as a positive electrode is formed on the exposed n-type GaN layer 3, and a Ti / Al / Ti electrode 13 as a negative electrode is formed on the lower surface of the Si substrate 11. Is formed.

The material for the growth substrate is not limited to sapphire, and any material that can lattice match with the GaN crystal layer and can transmit the light absorbed by the buffer layer, such as SiC, GaN, LiGaO ₂ , LiAlO _2, etc. Can also be used.

  In addition, in order to improve the crystal quality of the nitride semiconductor layer deposited on the growth substrate, the surface of the growth substrate is formed with fine irregularities such as stripes, circles, triangles, and other polygonal shapes. Also good. For a growth substrate including such a fine surface, refer to Japanese Patent Application Laid-Open No. 2000-021772 of Patent Document 5.

  As a material for the contact metal layer for the p-type nitride semiconductor layer, Au, Ag, Pt, Ti, Pd, Al, Ni, Pd, or the like can be used. However, the contact metal layer preferably has a thickness of 1 nm or more and 200 nm or less because it is necessary to efficiently transmit light to the adjacent reflective metal layer and to ensure its own conductivity. Note that the material of the contact layer for the p-type nitride semiconductor layer is not limited to metal, but is indium tin oxide (ITO), indium molybdenum oxide (IMO), oxidized, having good conductivity and good transmittance. Transparent conductivity such as indium (IO), tin oxide (TO), cadmium tin oxide (CdTO), gallium oxide (GaO), indium zinc oxide (InZnO), gallium zinc oxide (GaZnO), zinc oxide (ZnO) It is also possible to use a functional oxide.

  In the first embodiment, an Ag layer is used as the reflective metal layer, but a metal layer containing one or more of Al, Ag, Ni, Ti, Pt, and Au can also be used. As the barrier layer adjacent to the reflective metal layer, a metal layer containing one or more of Ni, Ti, and Pt can be used.

  The warpage prevention layer is not limited to the Hf layer, and can be formed using a material harder than the support substrate. For example, when using a Cu support substrate having a hardness of 40 HV, metals, alloys, dielectrics (partial regions) having a hardness of 40 HV or more and preferably 100 HV or more can be used for the warp prevention layer.

  The warpage preventing layer can include one or more constituent layers, and the thickness of each constituent layer is preferably 0.01 to 100 μm, more preferably 0.05 to 10 μm, and preferably 0.1 to 1 μm. More preferably it is.

  In the schematic cross-sectional view of FIG. 3, a modification of the light emitting device of FIG. 2 is shown, and only the configuration of the barrier layer and the warp prevention layer is changed. That is, in the light emitting device of FIG. 3, the Hf warpage prevention layer 9a and the Hf warpage prevention layer 9b are provided on the upper surface side and the lower surface side of the Ti / Pt barrier layer 8a, respectively.

  As a material for the warp prevention layer, one or more of Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Nb, Mo, Ru, Rh, Hf, Ta, W, Re, Os, Ir, and Be Any metal or alloy may be used.

  When a dielectric is used as the material for the warp prevention layer, a part of the dielectric warp prevention layer may be removed by etching or lift-off in order to secure a current path in the vertical electrode structure.

  Also in the schematic cross-sectional view of FIG. 4, a modification of the light-emitting element of FIG. That is, in the light emitting device of FIG. 4, a dielectric warpage preventing layer 9c is provided between the Ag reflective metal layer 7 and the Ti / Pt barrier layer 8b. An opening is provided in a partial region of the dielectric warp prevention layer 9c, and the reflective metal layer 7 of Ag and the Ti / Pt barrier layer 8b are in contact with each other in the opening.

  The schematic cross-sectional view of FIG. 5 also shows a modification of the light-emitting element of FIG. That is, in the light emitting device of FIG. 5, the Hf warpage preventing layer 9d also functions as a barrier layer, and the Ti / Pt barrier layer 8 in FIG. 2 is omitted. In this case, the warpage preventing layer 9d is formed to be sufficiently thick, and it is possible to suppress the diffusion of Au in the bonding metal layer 10 into the Ag reflection layer 7.

  In the first embodiment, an affixed metal layer including an AuSn layer is used to form the bonding metal layer 10, but the AuSn layer is not always necessary, and Al, Ag, Ni, Ti, Pt, In, Au, AuSn , And a pasted metal layer including a metal layer containing one or more of AuSi can also be used. Moreover, it is also possible to utilize a conductive adhesive instead of the affixed metal layer.

  In the first embodiment, the Si support substrate 11 is used. As the support substrate, a SiC substrate, a GaN substrate, a GaP substrate, a GaAs substrate, an InP substrate, a ZnSe substrate, a ZnO substrate, a Cu substrate, a CuW substrate, a W substrate, and the like. You can also choose from. The support substrate has a thermal conductivity of 1.5 W / cm since the thermal conductivity of Si or GaN is 1.3 to 1.5 W / cm · K from the viewpoint of improving the heat dissipation of the light emitting element. -It is preferable to use a support substrate of K or more.

  In the first embodiment, the sapphire substrate is removed by thermally decomposing the buffer layer with a laser having a wavelength of 355 nm. The wavelength of the laser light can be transmitted through the growth substrate and absorbed by the buffer layer. Good. Since the damage on the exposed surface of the semiconductor laminated structure from which the growth substrate has been removed is small when the wavelength of the laser beam is short, the fourth harmonic (266 nm) is compared with the third harmonic (355 nm) of the Nd: YAG laser. It is preferable to use it.

  The laser irradiation apparatus used in the first embodiment includes a simple optical system that does not have a function of adjusting the focus by following the warp of the wafer. Therefore, if the wafer has a large amount of warping when the growth substrate is removed by the laser, the focus position of the laser is shifted from the buffer layer, and the growth substrate cannot be peeled uniformly.

  Even when the focus position is deviated by 40 μm, it is possible to supply energy necessary for decomposing the buffer layer even in a portion deviated from the focus position by increasing the laser power. However, when the laser power is strengthened, excessive energy is supplied to the focused portion, and the nitride semiconductor multilayer structure may be damaged. More specifically, the energy density is reduced by about 20% just by shifting the laser focus position from the buffer layer by 20 μm, and it is not easy to sufficiently decompose the buffer layer.

  Actually, in the case of a 17 mm square growth substrate, the amount of warpage is 30 μm or more under conventional conditions not including a warp prevention layer, and the nitride semiconductor multilayer structure cannot be uniformly peeled from the growth substrate. However, in the first embodiment, the warpage amount is reduced to 20 μm or less by the warpage preventing layer, so that the nitride semiconductor multilayer structure can be uniformly peeled from the growth substrate.

  Further, when the Cu plating support substrate was formed on the nitride semiconductor laminated structure formed on the 2-inch diameter sapphire growth substrate, the amount of warpage of the wafer was about 80 μm. In this case, the entire surface of the wafer could not be uniformly irradiated with laser, and a region where the semiconductor multilayer structure could not be peeled off from the growth substrate remained, or a region where the semiconductor multilayer structure was damaged was generated. However, even in a region where peeling was not performed by one laser irradiation, the peeling could be completed by adjusting the laser focus position and performing laser irradiation again.

  On the other hand, when the amount of warpage was adjusted to about 40 μm with a 2 inch diameter wafer, a region where the semiconductor multilayer structure was damaged occurred, but the semiconductor multilayer structure could be peeled off from the growth substrate.

  From the above viewpoint, the warpage amount of the wafer must be 80 μm or less, preferably 40 μm or less, and more preferably 20 μm or less.

(Embodiment 2)
FIG. 6 is a schematic cross-sectional view showing a laminated structure in the process of manufacturing a nitride semiconductor light emitting device according to Embodiment 2 of the present invention. 6, the bonding metal layer 10 is changed to an Au seed layer 10a for electrolytic plating, and the Si support substrate 11 is changed to a support substrate 11a of a Cu plating layer having a thickness of about 100 μm, as compared with FIG. It differs only in what is being done.

  FIG. 7 is a schematic cross-sectional view showing a nitride semiconductor light emitting device in which a positive electrode and a negative electrode are formed after the step of FIG. In order to manufacture the light emitting device of FIG. 7, similarly to the case of FIG. 2, the undoped GaN buffer layer 2 in FIG. 6 is irradiated with laser light having a wavelength of 355 nm, and the growth substrate 1 and the buffer layer 2 are removed. The A Ti / Al or Ti / Au pad electrode 12 as a positive electrode is formed on the exposed n-type GaN layer 3, and Ti / Al / Ti as a negative electrode is formed on the lower surface of the Cu plating support substrate 11a. Electrode 13 is formed.

  Note that the formation of the support substrate by the plating layer is not limited to Cu plating, and at least one of Au plating, Ag plating, Ni plating, Cu plating, and Fe plating may be used. The plating support substrate may contain at least one of Cu, Ni, Au, Ag, and Fe, and the thickness thereof may be in the range of 50 to 250 μm that enables wafer handling, and the range of 80 to 120 μm. It is preferable to be within.

  Generally, the thickness of the plating support substrate formed on the nitride semiconductor multilayer structure is about 100 μm, but the wafer can be handled even if the plating support substrate is as thin as about 50 μm. However, when the plating support substrate is thin, handling of the wafer requires attention to damage. On the other hand, when the plating support substrate is made thick, there is no problem in handling the wafer, but the time and cost for forming the plating support substrate increase, so it is considered that a thickness of about 200 to 250 μm is desirable. . Therefore, it is considered that the thickness of the plating support substrate is about 80 to 120 μm in consideration of the time and cost required for plating and the ease of wafer handling.

  The material for the electroplating seed layer is not limited to Au, and a metal having good conductivity and adhesion can be used. It is also possible to form a seed layer with the same material as the plating support substrate to be formed. Further, when the warpage preventing layer is a conductive metal layer as in the present embodiment, it is also possible to directly form a plating support substrate without forming a seed layer on the warpage preventing layer.

(Embodiment 3)
FIG. 8 is a schematic cross-sectional view showing a laminated structure of a nitride semiconductor light emitting device according to Embodiment 3 of the present invention. Compared with FIG. 2, the light emitting device of FIG. 8 has an Au seed layer 9e for electroplating and a Ni plating layer 9f laminated on the Ti / Pt buffer layer 9 instead of forming the Hf warpage prevention layer 9. It is different only in that.

  In the third embodiment, the Si support substrate 11 is used, but it goes without saying that a plating support substrate as shown in FIG. 7 may be formed instead of the Si support substrate. In addition, each metal layer included in the light emitting element of Embodiment 3 can also be selected from the various metal layers exemplified for the corresponding metal layers in Embodiments 1 and 2.

  Forming the warp prevention layer by plating in the third embodiment has not only the advantage that a thick warp prevention layer can be provided inexpensively and easily, but also the advantage that the internal stress state of the formed warp prevention layer can be freely controlled. Have. That is, the type of plating solution, current density, temperature, type of electrodeposition bath, concentration of electrodeposition bath, additive, addition of stress reducing agent, amount of additive added, control of sulfur concentration in the electrodeposition bath Furthermore, the compression stress or tensile stress in the metal layer deposited by plating can be easily controlled by appropriately setting at least one of the material of the anode material and the like. For details of control of internal stress in the plating layer, see Non-Patent Document 1, Hideo Ise, “Electroforming Technology and Applications”, 1996, published by Tsuji Shoten.

  The internal stress of the plating layer is referred to as electrodeposition stress. When the electrodeposition stress is positive, it is tensile stress, and when it is negative, it is compressive stress. Of course, there is no stress when the electrodeposition stress is zero.

  For example, the electrodeposition stress increases as the current density increases. Moreover, the electrodeposition stress decreases as the temperature of the plating solution increases. Furthermore, a tensile stress and a compressive stress can be selected depending on the kind of plating. In the case of Au plating, a compressive stress is generally generated, and in the case of Cu, Ni, and Fe plating, a tensile stress is generally generated.

  When the electrodeposition bath is a watt bath, the electrodeposition stress is large, and when the electrodeposition bath is an all nickel sulfamate bath, the electrodeposition stress is smaller than that of the watt bath. In the case of a nickel sulfamate bath, the electrodeposition stress is smaller than that in the watt bath, but larger than that in the entire nickel sulfamate bath.

The tensile stress and the compressive stress can be selected depending on the concentration ratio of the electrodeposition bath liquid. For example, in the case of CuSO ₄ .5H ₂ O: H ₂ SO ₄ = 87: 24.5, it becomes tensile stress, and in the case of CuSO ₄ · 5H ₂ O: H ₂ SO ₄ = 87: 73.5, it becomes compressive stress. Become.

  By adding a brightener or a stress reducing agent as an additive to the plating solution, it is possible to convert compressive stress and tensile stress. For example, in the case of Cu plating, as the concentration of additives (thiourea, gelatin, β-naphthylquinoline, and Rossel salt) increases, the tensile stress increases and reaches a maximum value, then reaches zero, and then compresses further. Change to stress. The additive naphthalenedisulfonic acid (stress relaxation agent for Ni plating) also has the same effect on Cu plating.

  In the case of Ni plating, the stress reducing agent in the plating solution, such as nickel sulfate, nickel sulfamate, and nickel borofluoride, is used as the first brightener and is an aromatic hydrocarbon [benzene, naphthalene, etc.] With sulfonic acid, sulfonate, sulfonic amide, sulfonic imide, sulfonic acid and the like.

  Typical stress reducing agents include saccharin, p-toluenesulfonamide, benzenesulfonamide, benzenesulfonimide, sodium benzenedisulfonate, sodium benzenetrisulfonate, sodium naphthalene disulfonate, sodium naphthalene sulfonate. .

  Also, the tensile stress and the compressive stress can be controlled by adjusting the additive amount. For example, if the sulfur content in the liquid during electrodeposition increases, the electrodeposition stress decreases and becomes compressive stress. That is, the electrodeposition stress can be controlled by adjusting the sulfur concentration in the liquid during electrodeposition.

  Furthermore, since the sulfur content in the liquid varies depending on the material of the anode material, the electrodeposition stress can be controlled also by the material of the anode material. For example, when electrodepositing with a nickel sulfamate bath using a platinum-plated titanium plate as an anode, the electrodeposition stress becomes a compressive stress.

  As described above, the stress state of the electrolytic plating layer can be easily controlled by changing various plating conditions. Therefore, by forming a warpage prevention layer that tends to cause warpage in the opposite direction to the warpage of the support substrate, It is possible to reduce the amount of warpage.

  As described above, according to the present invention, problems in process and device characteristics can be improved in the manufacture of a nitride semiconductor light emitting device having a vertical electrode structure.

1 is a schematic cross-sectional view showing a laminated structure in the middle of production of a nitride semiconductor light emitting device according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view showing a nitride semiconductor light emitting device in which a positive electrode and a negative electrode are formed after the step of FIG. 1. FIG. 6 is a schematic cross-sectional view showing a modification of the light emitting device of FIG. 2. FIG. 6 is a schematic cross-sectional view showing another modification of the light emitting element of FIG. 2. FIG. 10 is a schematic cross-sectional view showing still another modification of the light emitting element of FIG. 2. FIG. 6 is a schematic cross-sectional view showing a laminated structure in the middle of manufacturing a nitride semiconductor light emitting device according to another embodiment of the present invention. FIG. 7 is a schematic cross-sectional view showing a nitride semiconductor light emitting device in which a positive electrode and a negative electrode are formed after the step of FIG. 6. FIG. 6 is a schematic cross-sectional view showing a nitride semiconductor light emitting device according to still another embodiment of the present invention.

Explanation of symbols

  1 sapphire growth substrate, 2 undoped GaN buffer layer, 3 n-type GaN layer, 4 light emitting layer including GaN / InGaN quantum well, 5 p-type GaN layer, 6 Pd contact layer, 7 Ag reflective metal layer, 8, 8a, 8b Ti / Pt barrier layer, 9, 9a, 9b Hf warpage prevention layer, 9c dielectric warpage prevention layer, 9d thick Hf warpage prevention layer, 9e plating seed layer, 9f Ni plating warpage prevention layer, 10 bonding metal layer, 10a plating seed Layer, 11 Si support substrate, 11a Cu plating support substrate, 12 Ti / Au pad electrode, 13 Ti / Al / Ti electrode.

Claims (17)

A nitride semiconductor stacked structure including an n-type nitride semiconductor layer, a nitride semiconductor light emitting layer, and a p-type nitride semiconductor layer, which are sequentially stacked;
A warpage prevention layer,
A nitride semiconductor light emitting device, wherein a support substrate is bonded in this order.   The nitride semiconductor light emitting device according to claim 1, wherein the warpage preventing layer includes one or more of a metal layer, an alloy layer, or a dielectric layer harder than the support substrate.   The warpage preventing layer includes one or more of Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Nb, Mo, Ru, Rh, Hf, Ta, W, Re, Os, Ir, and Be. The nitride semiconductor light-emitting device according to claim 2.   4. The nitride semiconductor light emitting device according to claim 1, wherein the warpage preventing layer has a hardness of 40 HV or more. 5.   5. The method according to claim 1, further comprising a layer containing Au between the warp preventing layer and the support substrate, wherein the warp preventing layer can also act to prevent diffusion of Au. The nitride semiconductor light-emitting device according to 1.   6. The nitride semiconductor light emitting device according to claim 1, wherein the warpage preventing layer acts to warp in a direction opposite to the warpage of the support substrate.   The nitride semiconductor light emitting device according to any one of claims 1 to 6, wherein the support substrate has a thermal conductivity of 1.5 W / cm · K or more.   Indium tin oxide, indium molybdenum oxide, indium oxide, tin oxide, cadmium tin oxide, gallium oxide, indium zinc is formed on the entire surface of the outermost p-type nitride semiconductor layer included in the nitride semiconductor multilayer structure. 8. The electrode according to claim 1, further comprising a p-side electrode including a layer of any one of oxide, gallium zinc oxide, and zinc oxide, or a metal layer having a thickness of 1 nm to 200 nm. The nitride semiconductor light emitting device described.   9. The nitride semiconductor light emitting device according to claim 1, further comprising an n-side metal electrode on a part of the outermost n-type nitride semiconductor layer included in the nitride semiconductor multilayer structure. 10. element.   10. The nitride semiconductor light emitting device according to claim 9, wherein the n-side metal electrode has a diameter in a range of 50 nm to 150 nm and a thickness of 200 nm or more. A method for manufacturing the nitride semiconductor light-emitting device according to claim 1, comprising:
Growing the nitride semiconductor multilayer structure on a wafer growth substrate for crystal growth,
Bonding the support substrate with the warp prevention layer interposed on the nitride semiconductor multilayer structure;
In the wafer state in which the support substrate is bonded, the warpage of the wafer is less than 80 μm in the height difference of the wafer surface.   The manufacturing method according to claim 11, wherein the warpage preventing layer is formed by electrolytic plating.   The manufacturing method according to claim 11, wherein the support substrate is formed on the warpage preventing layer by plating. The manufacturing method according to claim 11, wherein the growth substrate includes any one of sapphire, GaN, SiC, LiGaO ₂ , and LiAlO ₂ .   15. The nitride semiconductor multilayer structure includes a buffer layer in contact with the growth substrate, and the growth substrate is transparent to laser light absorbed by the buffer layer. The manufacturing method as described in.   The manufacturing method according to claim 15, wherein the buffer layer includes GaN, and the laser light has a center wavelength of 355 nm or less.   The manufacturing method according to claim 11, wherein the surface of the growth substrate has stripes, circles, or polygonal irregularities.

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