JP2009288967A - Signal processing apparatus, display control device, and register setting method for signal processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal processing apparatus, display control device and the register setting means of the signal processing apparatus for flexibly facilitating countermeasures to a plurality of product grades and the change of specifications without making software intervene. <P>SOLUTION: The signal processing apparatus 1 includes: a register 11 for storing conversion data from an externally input operation code into an internal control code; a decoder 12 for converting the operation code into the control code based on the value of the register 11; and a single or plurality of signal processing parts 13 for executing prescribed processing based on the control code converted by the decoder 12. The signal processing apparatus 1 includes: a reset circuit 14 for initializing the register 11 and a conversion data setting part 15 for setting the conversion data in the register 11 after the release of reset by the reset circuit 14. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a signal processing device, a display control device, and a register setting method for the signal processing device.

  In general, there are multiple grades such as high-function type, general-purpose type, and low-priced type for electronic equipment such as home or vehicle audio bi-dual equipment. Different.

  In many cases, a microcomputer or an ASIC (Application Specific Integrated Circuit) is incorporated in a control unit that operates an electronic device.

  For example, in a touch panel type liquid crystal display device incorporated in an in-vehicle navigation system, as shown in FIG. 1A, an output process of an input video signal to a liquid crystal display unit 400, an input detection process of a touch panel 500, a liquid crystal display ASIC 110 that performs power supply control of a backlight or the like of unit 400, slave microcomputer 200 that controls the operating conditions of ASIC 110, and master microcomputer 300 that controls the system, and software executed by each microcomputer 200 It corresponds to each grade by making it different.

A display processing circuit using such an ASIC is as described in Patent Document 1 and Patent Document 2.
JP 2006-323285 A (paragraph 0030) JP 2007-86370 A (paragraph 0022)

  However, when adopting an inexpensive microcomputer with a mask ROM incorporated in the slave microcomputer, a plurality of microcomputers with different mask ROM contents corresponding to different specifications are manufactured, but as the product lineup increases There is a problem that the number of varieties increases enormously and management costs increase.

  When a slave microcomputer using a microcomputer with a built-in flash memory, which is widely used in recent years, is adopted, the manufacturing cost of the mask ROM mold can be reduced, but a cost reduction corresponding to it cannot be expected.

  Therefore, it is a relatively appropriate measure to reduce the number of parts by integrating specific functions of the slave microcomputer into the ASIC.

  In this case, a register that holds conversion data from an externally input operation code to an internal control code, a decoder that converts an operation code into a control code based on the value of the register, and a control code converted by the decoder It is conceivable to construct an ASIC 120 having a plurality of signal processing units that execute predetermined processing such as output processing to the liquid crystal display unit, input detection processing of the touch panel, and power supply control of the backlight of the liquid crystal display unit.

  However, as shown in FIG. 1B, the conversion data to be converted into control codes corresponding to various operation codes output from the master microcomputer 300 to the ASIC 120 is fixedly set in the register 600. It is impossible in the inevitable reality that changes and the like are unavoidable, and it is an important issue how to suppress the increase in management cost due to the increase in variety.

  Such a problem is not limited to an in-vehicle liquid crystal display device, but is a problem common to various signal processing devices.

  An object of the present invention is to provide a signal processing apparatus, a display control apparatus, and a register setting of a signal processing apparatus that can flexibly cope with a plurality of product grades, specification changes, and the like without involving software. The point is to provide a method.

  In order to achieve the above-mentioned object, the signal processor according to the present invention is characterized in that a register for holding conversion data from an externally input operation code to an internal control code, and the operation code based on the value of the register A signal processing apparatus comprising: a decoder for converting the control code into the control code; and a single or a plurality of signal processing units for executing a predetermined process based on the control code converted by the decoder; And a conversion data setting unit that sets the conversion data in the register after the reset is released by the reset circuit.

  According to the above configuration, the conversion data setting unit sets different conversion data in the register in accordance with the grade and specification of the product such as the electronic device in which the signal processing device is incorporated. It is no longer necessary to construct a signal processing device. That is, the versatility of the signal processing device can be improved.

  Further, by configuring the register, the decoding, and the signal processing unit by hardware, software intervention can be eliminated.

  As described above, according to the present invention, it is possible to provide a signal processing apparatus that can flexibly cope with a plurality of product grades, specification changes, and the like without software.

  Hereinafter, the signal processing device when the signal processing device according to the present invention is a display control device for an in-vehicle display device, and a register setting method for the signal processing device will be described.

  As shown in FIG. 2, the signal processing device 1 as a display control device of the in-vehicle display device is based on a register 11 that holds conversion data from an externally input operation code to an internal control code, and a value of the register 11. A decoder 12 that converts an operation code into a control code, and a single or a plurality of signal processing units 13 that execute predetermined processing based on the control code converted by the decoder 12.

  The operation code is a code representing the type of command in machine language, and the control code is an address number assigned to the signal processing unit 13 that needs to be activated in order to execute the command specified by the operation code. For example, when an address number is input to each signal processing unit 13, at least one signal processing unit 13 that needs to be activated in order to execute a command corresponding to the address number is activated in a predetermined order to perform predetermined processing. Execute.

  The conversion data is composed of operation codes for the number of types of processing executed by the signal processing device 1 and control codes corresponding to the operation codes.

  The conversion data is held in the register 11 as, for example, a data table as shown in FIG. FIG. 3A shows conversion data indicating the type of processing executed by the signal processing device 1 corresponding to each of the 8-bit operation codes. For example, the operation code “F1 (hexadecimal number display)” is shown. The process corresponding to “” is “video correction”.

  In FIG. 3A, the control code is described by the name of the process such as “video correction”, but actually, the video correction unit 133 is activated in order to start the video correction unit 133 at a predetermined timing. Is the address number assigned to.

  In the present embodiment, the signal processing device 1 is configured by an ASIC, and as shown in FIG. 2, by an independent synchronous system serial communication or the like from the outside (for example, a microcomputer 2 or the like that controls the signal processing device 1). Receive a command including an operation code. The signal processing device 1 is not limited to the ASIC, and may be, for example, an FPGA (Field Programmable Gate Array).

  The signal processing device 1 includes a serial register 1A that sequentially holds an input command in synchronization with a clock signal. As shown in FIGS. 3B and 3C, the command has a predetermined length (for example, 40 bits) and is composed of an operation code and data. Details will be described later.

  Between the serial register 1A and the microcomputer 2, a clock line SCK that transmits a clock signal from the microcomputer 2 to the serial register 1A, a serial input line SI that transmits data such as an operation code from the microcomputer 2 to the serial register 1A, and serial A serial output line SO for transmitting the data from the register 1A to the microcomputer 2 is connected. Buffers 1B and 1C are provided for the input line SI and the output line SO, respectively.

  The signal processing device 1 includes a communication control unit 1D. The communication control unit 1D switches the direction of data communication by switching the states of the buffers 1B and 1C (whether they are high impedance) based on an instruction from the signal processing unit 13 or a conversion data setting unit 15 to be described later. .

  Further, the communication control unit 1D transmits the command held in the serial register 1A in parallel to the decoder 12 every predetermined number of clocks (for example, the same number as the command data length).

  The decoder 12 refers to the conversion data held in the register 11 and outputs control data corresponding to the operation code input from the serial register 1A to the signal processing unit 13. For example, when the conversion data held in the register 11 is the data shown in FIG. 3A and the input operation code is “11”, the decoder 12 performs control for starting the hue correction unit 132. The code is output to the signal processing unit 13.

  The signal processing unit 13 executes any one of video display processing, operation input processing, and power supply processing for the display device 3 as the in-vehicle display device based on the operation code input from the outside. Here, the display device 3 is, for example, a touch panel type liquid crystal panel mounted on a navigation device or the like.

  The signal processing unit 13 includes, for example, an outline correction unit 131, a hue correction unit 132, a video correction unit 133, a timing controller 134, a key switch 135, a touch panel position detection unit 136, a power supply control unit 137, a backlight control unit 138, and the like. I have.

  The contour correction unit 131 performs edge adjustment of video data input from the outside (for example, a video source 4 such as a DVD player or a digital TV). The hue correction unit 132 performs color correction on the video data after the edge adjustment. The video correction unit 133 performs contrast correction, gamma correction, and dither processing on the color-corrected video data. The timing controller 134 adjusts the output timing of the video data after correcting the contrast and the like to the display device 3. The adjustment of the output timing is performed based on the timing of voltage application to the liquid crystal.

  The key switch 135 and the touch panel position detection unit 136 are activated when calibration of the touch panel is executed. For example, the calibration is performed by correcting the coordinates of the touch panel based on the difference between the coordinates (set coordinates) of a predetermined switch on the touch panel set in advance and the coordinates (actual coordinates) when the predetermined switch is pressed. Is to do.

  When performing the above-described calibration, the key switch 135 exchanges information such as whether or not the touch panel is pressed by the operator and the type of operation switch on the pressed touch panel with the display device 3, and the touch panel position. The detection unit 136 exchanges the coordinate data of the pressed touch panel with the display device 3.

  The power supply control unit 137 controls whether or not power is supplied to the display device 3. The backlight control unit 138 adjusts the luminance of the backlight mounted on the display device 3.

  As described above, the image correction processing is executed by the contour correction unit 131, the color correction unit 132, the contrast correction unit 133, and the timing controller 134, and the operation input processing is executed by the key switch 135 and the power supply control unit 136, thereby controlling the backlight. The power supply process is executed by the unit 137 and the touch panel position detection unit 138.

  According to the above configuration, the display device 3 has different specifications depending on the grade of the vehicle on which it is mounted. Therefore, it is a preferable application example to use the signal processing device according to the present invention as the display control device of the display device.

  The signal processing device 1 includes a reset circuit 14 that initializes the register 11, and includes a conversion data setting unit 15 that sets conversion data in the register 11 after the reset circuit 14 releases the reset.

  The reset circuit 14 is a circuit that resets the signal processing device 1 and has a forced reset function by a reset signal output from the microcomputer 2 or the like, and will be described as a predetermined level (hereinafter, the predetermined level is a low level) during a reset operation. ) Is output to the conversion data setting unit 15, the register 11, the signal processing unit 13, and the like, for example, a CR time constant circuit.

  In the present embodiment, the signal processing apparatus 1 includes an external memory 5 in which conversion data is stored, and the conversion data setting unit 15 is based on data read from the external memory 5 within a predetermined time after reset release. Set the value of register 11.

  Here, the external memory 5 may be a ROM, an EEPROM, or the like provided exclusively for storing conversion data, or provided in the display device 3 that stores correction data of coordinates calculated by the calibration of the display device 3 described above. It may be an EEPROM or the like. That is, the external memory 5 may also be used as the memory of the display device 3.

  Below, the process of the conversion data setting part 15 is demonstrated based on the time chart shown to Fig.4 (a), and the flowchart shown to Fig.5 (a).

  After a low level is output from the reset circuit 14 at the start of resetting of the signal processing device 1, if the output from the reset circuit 14 changes from a low level to a high level at the time of reset release, the timer circuit 1E provided in the signal processing device 1 Starts counting up (TA1).

  Here, the timer circuit 1E is composed of a counter, and starts counting up with a reset release by the reset circuit 14 (switching of the output of the reset circuit 14 from low level to high level) as a trigger (TA1). When the number reaches a constant value (in this embodiment, a count value corresponding to a predetermined time), a control signal indicating the elapse of the predetermined time is output to the conversion data setting unit 15, and the count-up is stopped to reset the count value (TA2 ).

  When the reset is released (SA1, TA1), the conversion data setting unit 15 accesses the external memory 5 to read the stored conversion data and holds it in the register 11 (SA2).

  The signal processing device 1 is configured not to accept a command input from the microcomputer 2 until a predetermined time elapses after the reset is released. For example, the communication control unit 1D receiving an instruction from the conversion data setting unit 15 switches the buffer 1B to high impedance, thereby prohibiting input from the microcomputer 2. In addition, after a predetermined time has elapsed, input from the microcomputer 2 is permitted by the communication control unit 1D that receives an instruction from the conversion data setting unit 15 to which the control signal is input from the timer circuit 1E.

  A command input from the microcomputer 2 is a command for starting at least one signal processing unit 13 in a predetermined order and executing a predetermined process. As shown in FIG. 3B, the command is made up of an operation code indicating the type of command and parameters necessary for executing the command.

  When a command as shown in FIG. 3B is input from the microcomputer 2 after a predetermined time has elapsed (SA3, TA2), the decoder 12 converts the conversion data set by the conversion data setting unit 15 and stored in the register 11. With reference to the data, the control data corresponding to the operation code included in the command is output to the signal processing unit 13 together with the parameters. As a result, the command is executed by the signal processing unit 13 (SA4).

  According to the above-described configuration, the conversion data setting unit 15 receives the conversion data from the external memory 5 without using the microcomputer 2, so that the signal processing device is incorporated without increasing the load on the microcomputer 2. Depending on the grade and specification of a product such as an electronic device, different conversion data can be set in the register to increase the versatility of the signal processing device.

  As described above, the register setting method of the signal processing device according to the present invention controls the operation code based on the register 11 that holds the conversion data from the externally input operation code to the internal control code, and the value of the register 11. A register setting method for a signal processing apparatus 1 including a decoder 12 for converting into a code and a single or a plurality of signal processing units 13 for executing predetermined processing based on a control code converted by the decoder 12, In this method, after the reset is released by the reset circuit 14 that initializes the register 11, the conversion data setting unit 15 takes in the conversion data from the outside and sets the value of the register 11.

  Hereinafter, another embodiment will be described. In the above-described embodiment, the case where the conversion data setting unit 15 sets the value of the register 11 based on the data read from the external memory 5 within a predetermined time after the reset release by the reset circuit 14 has been described. As shown in FIG. 8, the conversion data setting unit 15 may set the value of the register 11 based on an initialization operation code externally input within a predetermined time after the reset release by the reset circuit 14.

  In the following, with respect to the processing of the conversion data setting unit 15 in this case, a part different from the above-described embodiment will be mainly described based on the time chart shown in FIG. 4B and the flowchart shown in FIG. The different part is the part of step SA2 in the flowchart shown in FIG.

  When the reset is released (SA1, TB1), the conversion data setting unit 15 receives a conversion data setting command input from the microcomputer (SA2).

  Here, as shown in FIG. 3C, the conversion data setting command is an initialization operation code indicating conversion data setting, an operation code indicating a setting target command, and control data corresponding to the operation code. It consists of

  After the reset is released (SA1, TB1), the conversion data setting unit 15 stores a data table as shown in FIG. 3 in the register 11 based on the conversion data setting command sequentially input from the microcomputer 2 for each setting target command. Build (SA2).

  Note that the decoder 12 does not accept any command other than the conversion data setting command even if it is a command input from the microcomputer 2 until a predetermined time elapses after the reset is released.

  According to the above-described configuration, the conversion data setting unit 15 sets different conversion data in the register 11 by receiving different initialization operation codes from the microcomputer 2, so that different hardware for each product with different grades and specifications. This eliminates the need to construct a signal processing apparatus, and increases the versatility of the signal processing apparatus.

  As shown in FIG. 7, the signal processing device 1 includes an internal memory 16 in which a plurality of sets of conversion data are stored, and a plurality of signal input terminals 17 that specify any set of conversion data stored in the internal memory 16. The conversion data setting unit 15 may read the conversion data corresponding to the input value of the signal input terminal 17 immediately after the reset release by the reset circuit 14 from the internal memory 16 and set the value of the register 11.

  The internal memory 16 is, for example, a ROM constructed on an ASIC, and stores a plurality of data tables as shown in FIG. 3A, that is, conversion data.

  As the plurality of signal input terminals 17, an ASIC terminal that constructs the signal processing apparatus 1 is used, and is set to either a high level or a low level by an input signal from the microcomputer 2 or the like. The plurality of signal input terminals 17 may be set to either a high level or a low level by being pulled up or pulled down inside the ASIC that constructs the signal processing apparatus 1.

  Each of the plurality of conversion data stored in the internal memory 16 is associated with a different combination of input values of the plurality of signal input terminals 17. For example, when two types of conversion data are stored in the internal memory 16 and there is one signal input terminal 17, one conversion data is associated with a high-level input value of the signal input terminal 17, and the other The conversion data is associated with the low level input value of the signal input terminal 17.

  Below, the process of the conversion data setting part 15 in this case is demonstrated based on the time chart shown in FIG.4 (c), and the flowchart shown in FIG.5 (b).

  When the reset is released (SB1, TC1), the conversion data setting unit 15 refers to the input value of the signal input terminal 17 (SB2), and in step SB2 among the plurality of conversion data stored in the internal memory 16. The conversion data associated with the input value of the signal input terminal 17 referred to (the terminal setting state in the period indicated by the hatched area in FIG. 4C) is read and held in the register 11 (SB3). Thereafter, the same processing as step SA4 in FIG. 5A is executed (SB4).

  According to the above configuration, the conversion data setting unit 15 can improve the versatility of the signal processing device without increasing the burden on the microcomputer and without requiring the external memory 5.

  When the signal processing device 1 has the configuration shown in FIG. 7, the conversion data setting unit 15 externally inputs the value of the register 11 set immediately after reset release by the reset circuit 14 within a predetermined time after reset release. It may be changed based on the initialization operation code. That is, the configuration shown in FIG. 8 that combines FIG. 6 and FIG. 7 may be used.

  Below, the process of the conversion data setting part 15 in this case is demonstrated based on the time chart shown in FIG.4 (d), and the flowchart shown in FIG.5 (c).

  The processing of steps SC1 to SC3 is the same as the processing of steps SB1 to SB3 in FIG. Thereafter, when a command (conversion data setting command) including an initialization operation code is input from the microcomputer 2 (SC6) from the reset release in step SC1 until a predetermined time elapses (SC6), conversion data setting is performed. The unit 15 modifies the operation code portion indicating the setting target command included in the conversion data setting command among the conversion data set in the register 11 in step SC3. When the predetermined time has elapsed (SC6), the same processing as step SA4 in FIG. 5A is executed (SB4).

  According to the above-described configuration, the value of the register 11 set based on the input value of the signal input terminal 17 can be corrected based on the initialization operation code input externally later, so that the conversion data stored in the internal memory 16 Therefore, the storage capacity of the internal memory 16 can be prevented from being compressed.

  In the above-described embodiment, when the signal processing device 1 has the configuration shown in FIGS. 2, 6, and 8, the signal processing device 1 starts from the microcomputer 2 until a predetermined time elapses after the reset is released. Although the case where an input command is not received has been described, a mask circuit 18 may be provided between the decoder 12 and the signal processing unit 13 instead of receiving a command even within a predetermined time.

  That is, as shown in FIG. 9, the signal processing apparatus 1 is a mask circuit that prohibits the output of the control code converted by the decoder 12 to the signal processing unit 13 until a predetermined time after the reset release by the reset circuit 14 elapses. 18, the conversion data setting unit 15 may cancel the prohibition state of the mask circuit 18 when the setting of the value of the register 11 is completed. FIG. 9 shows a configuration in which a mask circuit 18 is added to the signal processing apparatus 1 shown in FIG.

  The mask circuit 18 is, for example, a three-state buffer or a switch circuit that switches between conduction of a signal input from the decoder 12 and high impedance (prohibition of conduction of the input signal) by input of a control signal from the conversion data setting unit 15. It consists of

  The conversion data setting unit 15 determines that the setting of the value of the register 11 has been completed based on the initialization end operation code input from the outside. For example, when an operation code having all the digits of the code “0” is used as the initialization end operation code, the conversion data setting unit 15 receives the command including the initialization end operation code and stores it in the register 11 at that time. The stored conversion data is used as conversion data used in the subsequent processing.

  According to the above configuration, when the setting of the value of the register 11 by the conversion data setting unit 15 is completed before the predetermined time elapses, the prohibition state of the mask circuit 18 is canceled and the decoder 12 sends the signal processing unit 13 to the signal processing unit 13. Therefore, it is not necessary to wait for a predetermined time to start the processing by the signal processing unit 13, and the processing speed of the signal processing device 1 can be improved.

  Further, in the signal processing device 1 including the mask circuit 18, the conversion data setting unit 15 may output a ready signal to the outside (for example, the microcomputer 2) when the setting of the value of the register 11 is completed.

  According to the above-described configuration, it is possible to prompt the microcomputer 2 or the like to transmit a command for starting the processing of the signal processing unit 13, so that the processing speed of the signal processing device 1 can be further improved.

  Even when the signal processing apparatus 1 does not include the mask circuit 18 and does not accept a command input from the microcomputer 2 until a predetermined time elapses after reset release, the mask circuit 18 described above is used. The processing speed of the signal processing device 1 can be further improved by performing the same processing as the cancellation of the prohibited state. That is, the conversion data setting unit 1 outputs a ready signal to the microcomputer 2 when the setting of the value of the register 11 is completed, and controls the communication control unit 1D to send a command input from the microcomputer 2 to the signal processing device 1. Will accept.

  In the above-described embodiment, the case where the signal processing device 1 is a display control device of an in-vehicle display device has been described. However, the signal processing device 1 is configured by hardware such as an ASIC, and an electronic device on which the signal processing device is mounted. If the signal processing device needs to change the conversion data to be converted into the control code in response to various operation codes when the specification changes in the device, etc., it is limited to the display control device of the in-vehicle display device Absent.

  The embodiment described above describes an example for realizing the present invention, and the specific configuration of each part should be appropriately changed and designed according to the system to be constructed as long as the effects of the present invention are achieved. Is possible.

(A) is a block configuration diagram of a conventional liquid crystal display device, and (b) is a block configuration diagram of a slave computer configured by ASIC with conversion data fixedly set. Block diagram of signal processing device (A) is explanatory drawing of conversion data, (b) is explanatory drawing of the command input from a microcomputer, (c) is explanatory drawing of a conversion data setting command. (A) is a time chart when the conversion data setting unit sets a register value based on the data read from the external memory, and (b) is a time chart when the conversion data setting unit sets the register value based on the initialization operation code. (C) is a time chart when the conversion data setting unit sets a register value based on the input value of the signal input terminal, and (d) is an initialization operation performed by the conversion data setting unit. Time chart for setting register values based on input values of code and signal input terminals (A) is a flowchart when the conversion data setting unit sets a register value based on the data read from the external memory, and (b) is a register value based on the input value of the signal input terminal by the conversion data setting unit. FIG. 7C is a flowchart when the conversion data setting unit sets the register value based on the initialization operation code and the input value of the signal input terminal. Block configuration diagram of a signal processing apparatus including a conversion data setting unit for setting a register value based on an initialization operation code Block diagram of a signal processing device with signal input terminals Block configuration diagram of a signal processing apparatus including a conversion data setting unit for setting a register value based on an initialization operation code and a signal input terminal Block diagram of a signal processing apparatus with a mask circuit

Explanation of symbols

1: signal processing device 5: external memory 11: register 12: decoder 13: signal processing unit 14: reset circuit 15: conversion data setting unit 16: internal memory 17: signal input terminal 18: mask circuit

Claims (8)

A register that holds conversion data from an externally input operation code to an internal control code, a decoder that converts the operation code into the control code based on the value of the register, and a control code converted by the decoder A signal processing device including a single or a plurality of signal processing units for performing predetermined processing based on the processing;
A signal processing apparatus comprising: a reset circuit that initializes the register; and a conversion data setting unit that sets the conversion data in the register after reset is released by the reset circuit.   An external memory storing the conversion data is provided, and the conversion data setting unit sets the value of the register based on data read from the external memory within a predetermined time after the reset is released. The signal processing apparatus according to claim 1.   The signal processing apparatus according to claim 1, wherein the conversion data setting unit sets the value of the register based on an initialization operation code externally input within a predetermined time after the reset is released.   An internal memory in which a plurality of sets of conversion data are stored; and a plurality of signal input terminals for designating any set of conversion data stored in the internal memory; and the conversion data setting unit immediately after the reset release 2. The signal processing apparatus according to claim 1, wherein conversion data corresponding to an input value of a signal input terminal is read from the internal memory and a value of the register is set.   5. The conversion data setting unit changes a value of the register set immediately after the reset is released based on an initialization operation code externally input within a predetermined time after the reset is released. The signal processing apparatus as described.   A mask circuit that prohibits output of the control code converted by the decoder to the signal processing unit until a predetermined time after the reset is released, and the conversion data setting unit completes setting of the value of the register 6. The signal processing device according to claim 2, wherein the prohibition state of the mask circuit is canceled.   7. The signal processing device according to claim 1, wherein the signal processing device is a display control device of an in-vehicle display device, and the signal processing unit performs video display processing for the in-vehicle display device based on the externally input operation code. A display control apparatus that executes any one of an operation input process and a power supply process. A register that holds conversion data from an externally input operation code to an internal control code, a decoder that converts the operation code into the control code based on the value of the register, and a control code converted by the decoder A register setting method for a signal processing device including a single or a plurality of signal processing units for executing predetermined processing based on
A register setting method for a signal processing device, wherein after the reset is released by a reset circuit that initializes the register, the conversion data setting unit fetches the conversion data from outside and sets the value of the register.

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