JP2009288748A - Display device and driving method thereof and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device wherein a variance in threshold voltage of a sampling transistor can be suppressed. <P>SOLUTION: A drive scanner switches a feeder DS from a high potential Vcc to a low potential Vss to extinguish a light emitting element EL and then turns on a sampling transistor T1 to perform a write operation of writing a signal potential Vsig of an video image signal into a gate of a driving transistor T2. Meanwhile, the drive scanner switches the feeder DS from the low potential Vss to the high potential Vcc to raise a source potential Vs of the driving transistor T2 and performs a lighting operation of biasing the light emitting element EL forward to cause a driving current corresponding to the signal potential Vsig to flow to the light emitting element EL. In this case, a gate potential Vg is reduced by coupling from the drain side to the gate side of the driving transistor T2 through a parasitic capacitance Cgd to reduce a bias between the gate and the drain of the sampling transistor T1. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an active matrix display device using a light emitting element for a pixel and a driving method thereof. The present invention also relates to an electronic device provided with such a display device. More specifically, the present invention relates to a technique for stabilizing characteristics of an active element formed in a pixel.

  In recent years, development of flat self-luminous display devices using organic EL devices as light-emitting elements has become active. An organic EL device is a device that utilizes the phenomenon of light emission when an electric field is applied to an organic thin film. Since the organic EL device is driven at an applied voltage of 10 V or less, it has low power consumption. In addition, since the organic EL device is a self-luminous element that emits light, it does not require an illumination member and can be easily reduced in weight and thickness. Furthermore, since the response speed of the organic EL device is as high as several μs, an afterimage does not occur when displaying a moving image.

Among planar self-luminous display devices using organic EL devices as pixels, active matrix display devices in which thin film transistors are integrated and formed as active elements are actively developed. An active matrix type flat self-luminous display device is described in Patent Document 1 below, for example.
JP 2007-310311 A

  FIG. 21 is a schematic circuit diagram showing an example of a conventional active matrix display device. The display device includes a pixel array unit 1 and peripheral circuit units. The circuit unit includes a horizontal selector 3 and a write scanner 4. The pixel array unit 1 includes columnar signal lines SL and row-shaped scanning lines WS. Pixels 2 are arranged at the intersections between the signal lines SL and the scanning lines WS. In the figure, only one pixel 2 is shown for easy understanding. The write scanner 4 includes a shift register, operates in response to an externally supplied clock signal ck, and sequentially transfers start pulses sp supplied from the outside, thereby sequentially outputting control pulses to the scanning lines WS. . The horizontal selector 3 supplies a video signal to the signal line SL in accordance with the line sequential scanning on the write scanner 4 side.

  The pixel 2 includes a sampling transistor T1, a driving transistor T2, a storage capacitor C1, and a light emitting element EL. The driving transistor T2 is a P-channel type, its source is connected to the power supply line, and its drain is connected to the light emitting element EL. The gate of the driving transistor T2 is connected to the signal line SL via the sampling transistor T1. The sampling transistor T1 is turned on in response to the control pulse supplied from the write scanner 4, samples the video signal supplied from the signal line SL, and writes it to the holding capacitor C1. The driving transistor T2 receives the video signal written in the storage capacitor C1 as the gate voltage Vgs at the gate thereof, and causes the drain current Ids to flow through the light emitting element EL. As a result, the light emitting element EL emits light with a luminance corresponding to the video signal. The gate voltage Vgs represents the gate potential with reference to the source.

The driving transistor T2 operates in the saturation region, and the relationship between the gate voltage Vgs and the drain current Ids is expressed by the following characteristic equation.
Ids = (1/2) μ (W / L) Cox (Vgs−Vth) ²
Here, μ is the mobility of the driving transistor, W is the channel width of the driving transistor, L is the channel length, Cox is the gate insulating film capacitance per unit area, and Vth is the threshold voltage. As is apparent from this characteristic equation, when the driving transistor T2 operates in the saturation region, it functions as a constant current source that supplies the drain current Ids according to the gate voltage Vgs.

  FIG. 22 is a graph showing voltage / current characteristics of the light emitting element EL. The horizontal axis represents the anode voltage V, and the vertical axis represents the drive current Ids. The anode voltage of the light emitting element EL is the drain voltage of the driving transistor T2. In the light emitting element EL, the current / voltage characteristics change with time, and the characteristic curve tends to fall with time. For this reason, the anode voltage (drain voltage) V changes even if the drive current Ids is constant. In that respect, the pixel circuit 2 shown in FIG. 21 operates in the saturation region of the driving transistor T2, and can drive the driving current Ids corresponding to the voltage Vgs at the gate regardless of the fluctuation of the drain voltage. It is possible to keep the light emission luminance constant regardless of the change in the characteristics over time.

  FIG. 23 is a circuit diagram showing another example of a conventional pixel circuit. A difference from the pixel circuit shown in FIG. 21 is that the driving transistor T2 is changed from the P-channel type to the N-channel type. In the circuit manufacturing process, it is often advantageous to make all the transistors constituting the pixel N-channel type.

  A conventional display device basically includes a pixel array section and a circuit section for driving the pixel array section. The pixel array section includes a row-shaped scanning line, a column-shaped signal line, and matrix-shaped pixels arranged at a portion where both intersect. The circuit unit sequentially applies a control pulse to each scanning line in a horizontal cycle, and scans pixels on a line-by-line basis. The control scanner (write scanner) performs video on column signal lines in accordance with the line-sequential scanning. And a signal selector (horizontal selector) for supplying a signal.

  The pixel has a sampling transistor in which the gate is connected to the scanning line and one of the source and drain is connected to the signal line, the gate is connected to the other of the source and drain of the sampling transistor, and one of the source and drain is connected to the power supply A driving transistor, a light emitting element connected to the other of the source and drain of the driving transistor, and a storage capacitor connected to the gate of the driving transistor. The sampling transistor is turned on in a short time width from when the control pulse supplied from the control scanner rises to when it falls, and samples the video signal from the signal line and writes it to the storage capacitor. The driving transistor causes a driving current corresponding to the video signal written in the storage capacitor to flow through the light emitting element. The light emitting element emits light with luminance according to the driving current.

  The sampling transistor is turned off after the video signal is written to the storage capacitor. The sampling transistor has, for example, a source connected to the signal line and a drain connected to the gate of the driving transistor. Therefore, when the sampling transistor is in the off state, a bias voltage is applied between the drain and the gate. This bias voltage changes the threshold voltage of the sampling transistor. This variation affects the operation of the pixel and the light emission luminance varies. Depending on the operating conditions of the pixel, the bias voltage applied between the drain and gate of the sampling transistor may cause the threshold voltage of the sampling transistor to decrease over time, resulting in a decrease in light emission luminance over time. It is an issue that should be done.

  In view of the above-described problems of the related art, an object of the present invention is to provide a display device that can suppress threshold voltage fluctuation of a sampling transistor. In order to achieve this purpose, the following measures were taken. That is, the display device according to the present invention basically includes a pixel array section and a circuit section for driving the pixel array section. The pixel array section includes a row-shaped scanning line, a column-shaped signal line, a matrix-shaped pixel arranged at a portion where both intersect, and a power supply line arranged in parallel to the scanning line. The circuit unit outputs a control pulse to each scanning line sequentially to scan the pixels line by line, a power supply scanner that switches each power line between a high potential and a low potential, and the line sequential scanning. And a signal selector for supplying a video signal to the column-shaped signal lines. The pixel includes a light emitting element, a sampling transistor, and a driving transistor. The sampling transistor has a gate connected to the scanning line, a source connected to the signal line, and a drain connected to the gate of the driving transistor. The driving transistor has a source connected to the light emitting element and a drain connected to the feeder line. In such a configuration, the power supply scanner performs an extinguishing operation in which the power supply line is switched from a high potential to a low potential, the source potential of the driving transistor is lowered, a reverse bias is applied to the light emitting element, and the light emitting element is turned off. The control scanner applies a control pulse to the scanning line, turns on the sampling transistor, and performs a writing operation to write a video signal to the gate of the driving transistor. The power supply scanner performs a lighting operation in which the power supply line is switched from a low potential to a high potential to increase the source potential of the driving transistor, the light emitting element is forward biased, and a driving current corresponding to the video signal is supplied to the light emitting element. . In the lighting operation, coupling is performed from the drain side to the gate side of the driving transistor via a parasitic capacitance to lower the gate potential, thereby reducing the bias between the gate and drain of the sampling transistor.

  Specifically, in the lighting operation, the power supply line is once changed from a low potential to an overpotential higher than a high potential, and then the overpotential is dropped to a high potential to apply negative coupling to the gate of the driving transistor. More specifically, the power supply scanner raises the power supply line from a low potential to an overpotential before the writing operation, and lowers the power supply line from the overpotential to a high potential after the writing operation.

  According to the present invention, during the lighting operation, coupling is performed via a parasitic capacitance from the drain side to the gate side of the driving transistor to lower the gate potential, thereby reducing the bias between the gate and drain of the sampling transistor. Reduce. Thereby, a change with time of the threshold voltage of the sampling transistor can be suppressed, and thus a change with time of the emission luminance can be suppressed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of a display device according to the present invention. As shown in the figure, the display device includes a pixel array section 1 and circuit sections (3, 4, 5) for driving the pixel array section 1. The pixel array unit 1 includes a row-like scanning line WS, a column-like signal line SL, a matrix-like pixel 2 arranged at a portion where both intersect, and a power supply line arranged corresponding to each row of the pixels 2 DS. The circuit unit (3, 4, 5) supplies a control pulse sequentially to each scanning line WS to scan the pixels 2 line-sequentially in units of rows, and a control scanner (write scanner) 4 in accordance with this line-sequential scanning. A power supply scanner (drive scanner) 5 that supplies a power supply voltage to be switched between a first potential (high potential) and a second potential (low potential) to each power supply line DS, and a column-shaped signal line SL in accordance with the line sequential scanning. Are provided with a signal selector (horizontal selector) 3 for supplying a signal potential to be a video signal and a reference potential. The write scanner 4 operates in response to a clock signal WSck supplied from the outside, and sequentially transfers start pulses WSsp supplied from the outside, thereby outputting a control pulse to each scanning line WS. The drive scanner 5 operates in response to a clock signal DSck supplied from outside, and sequentially transfers start pulses DSsp supplied from the outside, thereby switching the potential of the power supply line DS line-sequentially.

  FIG. 2A is a circuit diagram illustrating a specific configuration of the pixel 2 included in the display device illustrated in FIG. 1. As shown in the figure, the pixel circuit 2 includes a light emitting element EL, a sampling transistor T1, a driving transistor T2, and a storage capacitor C1. The sampling transistor T1 has its gate connected to the scanning line WS, one of its source and drain connected to the signal line SL, and the other connected to the gate G of the driving transistor T2. In this specification, of the pair of current ends of the sampling transistor, the current end connected to the signal line SL side is used as a source, and the current end connected to the gate G side of the drive transistor T2 is used as a drain. The driving transistor T2 has a source S connected to the anode of the light emitting element EL and a drain D connected to the power supply line DS. The cathode of the light emitting element EL is connected to a predetermined cathode potential Vcat. The storage capacitor C1 is connected between the gate G and the source S of the driving transistor T2.

  In such a configuration, the drive scanner 5 switches the power supply line DS from the high potential Vcc to the low potential Vss, lowers the potential of the source S of the driving transistor T2, applies a reverse bias to the light emitting element EL, and turns off the light. I do. Thereafter, the write scanner 4 applies a control pulse to the scanning line WS, turns on the sampling transistor T1, and performs a writing operation of writing the signal potential Vsig of the video signal to the gate G of the driving transistor T2. On the other hand, the drive scanner 5 switches the power supply line DS from the low potential Vss to the high potential Vcc to raise the potential of the source S of the driving transistor T2, and the drive current Ids according to the signal potential Vsig with the light emitting element EL being forward biased. A lighting operation is performed to flow through the light emitting element EL. In this case, in the lighting operation, coupling is performed via a parasitic capacitance from the drain D side of the driving transistor T2 to the gate G side to lower the gate potential, thereby reducing the gate-drain bias of the sampling transistor T1. To do.

  According to one embodiment, in the lighting operation, the power supply line DS is once changed from the low potential Vss to the overpotential higher than the high potential Vcc, and then dropped from the overpotential to the high potential Vcc to cause negative coupling to the gate G of the driving transistor T2. Add. Specifically, the drive scanner 5 raises the power supply line DS from the low potential Vss to the overpotential before the writing operation, and lowers the power supply line DS from the overpotential to the high potential Vcc after the writing operation.

  According to the present invention, during the lighting operation, coupling is performed from the drain D side of the driving transistor T2 to the gate G side via the parasitic capacitance to lower the gate potential, and thus the gate and drain of the sampling transistor T1. Reduce the bias between. Thereby, a change with time of the threshold voltage of the sampling transistor T1 can be suppressed, and thus a change with time of the emission luminance can be suppressed.

  FIG. 2B is a schematic diagram for explaining the operation of the pixel circuit shown in FIG. (A) is a timing chart showing a reference example of a lighting operation and a writing operation. In the writing operation, the write scanner applies a rectangular control pulse to the scanning line WS, turns on the sampling transistor T1, and writes the signal potential Vsig to the gate G of the driving transistor T2. On the other hand, the drive scanner performs a lighting operation by switching the power supply line DS from the low potential Vss = −5V to the high potential Vcc = 13V.

  (B) is a circuit diagram showing a potential state of the pixel circuit after the writing operation and the lighting operation shown in (A). The zero potential 0V of the scanning line WS is applied to the gate of the sampling transistor T1, and it is in the off state. Note that a video signal is applied to the source of the sampling transistor T1, for example, in the range of amplitude 1 to 5V. On the other hand, the driving transistor T2 is in an on state, and a driving current is supplied from the source to the anode of the light emitting element. The source potential Vs is determined by the operating point of the light emitting element and the driving transistor T2. The level obtained by adding the signal potential Vsig to the source potential Vs is substantially the gate potential Vg of the driving transistor T2. For example, in the case of white display, the gate potential Vg = 10V. Therefore, the bias voltage between the gate and the drain of the sampling transistor T1 is 10V-0V = 10V in absolute value. If such a bias continues to be applied, the threshold voltage vthT1 of the sampling transistor T1 decreases with time.

  (C) is a timing chart showing a sequence of a lighting operation and a writing operation according to the present invention. In the writing operation, the write scanner applies a rectangular control pulse to the scanning line WS, turns on the sampling transistor T1, and writes the signal potential Vsig to the gate G of the driving transistor T2. On the other hand, since the drive scanner performs a lighting operation, the power supply line DS is temporarily changed from the low potential Vss to the overpotential Vh = 28 V higher than the high potential Vcc, and then dropped from the overpotential Vh to the high potential Vcc = 13 V to perform negative coupling. Is added to the gate G of the driving transistor T2. As described above, the drive scanner 5 raises the power supply line DS from the low potential Vss to the overpotential Vh before the writing operation in which the control pulse rises, and the power supply line DS is set to the overpotential Vh after the writing operation in which the control pulse falls. To high potential Vcc.

  FIG. 4D is a circuit diagram illustrating a potential state of the pixel circuit after the writing operation and the lighting operation illustrated in FIG. The zero potential 0V of the scanning line WS is applied to the gate of the sampling transistor T1, and it is in the off state. A video signal is applied to the source of the sampling transistor T1 within an amplitude range of 1 to 5V. On the other hand, the driving transistor T2 is in an on state, and a driving current is supplied from the source to the anode of the light emitting element. The source potential Vs is determined by the operating points of the light emitting element EL and the driving transistor T2. The level obtained by adding the signal potential Vsig to the source potential Vs is substantially the gate potential Vg of the driving transistor T2. For example, in the case of white display, the gate potential Vg = 10V. Therefore, the bias voltage between the gate and the drain of the sampling transistor T1 is 10V-0V = 10V in absolute value. If the bias is continuously applied as it is, the threshold voltage vthT1 of the sampling transistor T1 decreases with time. Therefore, in the present invention, after the writing operation in which the control pulse falls, the power supply line DS is dropped from the overpotential Vh = 28V to the high potential Vcc = 13V to add negative coupling from the drain D to the gate G of the driving transistor T2. . As a result, the gate potential Vg of the driving transistor becomes less than 10 V, and the bias voltage between the gate and the drain of the sampling transistor T1 is relaxed compared to the reference example of (B). Since the gate potential Vg is lowered by the amount of coupling, the bias voltage between the gate and drain of the sampling transistor T1 is relaxed, and fluctuations in VthT1 are suppressed.

(E) is a schematic circuit diagram showing a coupling operation according to the present invention. As shown in the figure, a parasitic capacitance Cgd is interposed between the drain and gate of the driving transistor T2. A holding capacitor C1 is connected between the gate and source of the driving transistor T2. In the figure, Coled is an equivalent capacitance of the light emitting element EL. The sampling transistor T1 is in an off state, and the gate of the driving transistor T2 is disconnected from the signal line SL. In this state, when the power supply line DS is switched from the overpotential Vh to the high potential Vcc, this voltage drop is coupled to the gate side of the driving transistor T2 via the parasitic capacitance Cgd. A drop ΔVg of the gate potential Vg of the driving transistor T2 due to the coupling is given by the following equation.
ΔVg = (Vh−Vcc) · Cgd / (Cgd + C1)

  FIG. 3 is a timing chart for explaining the operation of the pixel shown in FIG. This timing chart is a reference example before taking measures according to the present invention. This timing chart shows a change in the potential of the scanning line WS, a change in the potential of the power supply line DS, and a change in the potential of the signal line SL with a common time axis. The potential change of the scanning line WS represents a control pulse, and the opening / closing control of the sampling transistor T1 is performed. The change in the potential of the power supply line DS represents switching between the power supply voltages Vcc and Vss. Further, the potential change of the signal line SL represents switching between the signal potential Vsig of the input signal and the reference potential Vofs. In parallel with these potential changes, the potential changes of the gate G and the source S of the driving transistor T2 are also shown. As described above, the potential difference between the gate G and the source S is Vgs.

  In this timing chart, the periods are divided for convenience as (1) to (7) in accordance with the transition of the operation of the pixel. In the period (1) immediately before entering the field, the light emitting element EL is in a light emitting state. After that, a new field of line sequential scanning is entered, and in the first period (2), the feeder line DS is switched from the high potential Vcc to the low potential Vss. In the next period (3), the input signal is switched from Vsig to Vofs. Further, the sampling transistor T1 is turned on in the next period (4). During this period (2) to (4), the gate voltage of the driving transistor T2 and the source voltage during light emission are reset. Periods (2) to (4) are preparation periods for threshold voltage correction, and the gate G of the driving transistor T2 is reset to Vofs, while the source S is reset to Vss. Subsequently, a threshold voltage correction operation is actually performed in the threshold correction period (5), and a voltage corresponding to the threshold voltage Vth is held between the gate G and the source S of the driving transistor T2. Actually, a voltage corresponding to Vth is written in the holding capacitor C1 connected between the gate G and the source S of the driving transistor T2. Once the sampling transistor T1 is turned off, the process proceeds to the writing period / mobility correction period (6). Here, the signal potential Vsig of the video signal is written into the storage capacitor C1 in a form added to Vth, and the mobility correction voltage ΔV is subtracted from the voltage held in the storage capacitor C1. In the writing period / mobility correction period (6), the sampling transistor T1 needs to be turned on in a time zone in which the signal line SL is at the signal potential Vsig. Thereafter, the process proceeds to the light emission period (7), and the light emitting element emits light with a luminance corresponding to the signal potential Vsig. At that time, since the signal potential Vsig is adjusted by a voltage corresponding to the threshold voltage Vth and the mobility correction voltage ΔV, the light emission luminance of the light emitting element EL varies in the threshold voltage Vth and mobility μ of the driving transistor T2. Will not be affected. Note that a bootstrap operation is performed at the beginning of the light emission period (7), and the gate potential and the source potential of the driving transistor T2 rise while the gate G / source S voltage Vgs of the driving transistor T2 is kept constant.

  The operation of the pixel circuit shown in FIG. 2A will be described with reference to FIGS. First, as shown in FIG. 4, in the light emission period (1), the power supply potential is set to Vcc, and the sampling transistor T1 is turned off. At this time, since the driving transistor T2 is set so as to operate in the saturation region, the driving current Ids flowing through the light emitting element EL depends on the voltage Vgs applied between the gate G and the source S of the driving transistor T2. The value shown by the transistor characteristic equation described above is taken.

  Subsequently, as shown in FIG. 5, when the preparation periods (2) and (3) are entered, the potential of the power supply line (power supply line) is set to Vss. At this time, the reverse bias is set so that Vss becomes smaller than the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL. That is, since Vss <Vthel + Vcat, the light emitting element EL is turned off, and the power supply line side becomes the source of the driving transistor T2. At this time, the anode of the light emitting element EL is charged to Vss.

  Further, as shown in FIG. 6, in the next preparation period (4), the potential of the signal line SL becomes Vofs, while the sampling transistor T1 is turned on, and the gate potential of the driving transistor T2 is set to Vofs. In this way, the source S and the gate G of the driving transistor T2 at the time of light emission are reset, and the gate-source voltage Vgs at this time becomes a value of Vofs−Vss. Vgs = Vofs−Vss is set to be larger than the threshold voltage Vth of the driving transistor T2. In this way, by resetting the driving transistor T2 so that Vgs> Vth, preparation for the next threshold voltage correction operation is completed.

  Subsequently, as shown in FIG. 7, when proceeding to the threshold voltage correction period (5), the potential of the feeder line DS (power supply line) returns to Vcc. By setting the power supply voltage to Vcc, the anode of the light emitting element EL becomes the source S of the driving transistor T2, and a current flows as shown in the figure. At this time, an equivalent circuit of the light emitting element EL is represented by a parallel connection of a diode Tel and a capacitor Cel as shown in the figure. Since the anode potential (that is, the source potential Vss) is lower than Vcat + Vthel, the diode Tel is in the off state, and the leak current flowing therethrough is considerably smaller than the current flowing through the driving transistor T2. Therefore, most of the current flowing through the driving transistor T2 is used to charge the holding capacitor C1 and the equivalent capacitor Cel. Thereafter, the sampling transistor is temporarily turned off.

  FIG. 8 shows the time change of the source voltage of the driving transistor T2 in the threshold voltage correction period (5) shown in FIG. As shown in the figure, the source voltage of the driving transistor T2 (that is, the anode voltage of the light emitting element EL) rises from Vss with time. When the threshold voltage correction period (5) elapses, the driving transistor T2 is cut off, and the voltage Vgs between the source S and the gate G becomes Vth. At this time, the source potential is given by Vofs−Vth. If this value Vofs−Vth is still lower than Vcat + Vthel, the light emitting element EL is in a cut-off state.

  Next, when entering the writing period / mobility correction period (6) as shown in FIG. 9, the potential of the signal line SL is switched from Vofs to Vsig while the sampling transistor T1 is turned on again. At this time, the signal potential Vsig is a voltage corresponding to the gradation. The gate potential of the driving transistor T2 is Vsig because the sampling transistor T1 is turned on. On the other hand, the source potential rises with time because current flows from the power supply Vcc. Even at this time, if the source potential of the driving transistor T2 does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL, the current flowing from the driving transistor T2 is exclusively used for charging the equivalent capacitor Cel and the holding capacitor C1. Is called. At this time, since the threshold voltage correction operation of the driving transistor T2 has already been completed, the current flowing through the driving transistor T2 reflects the mobility μ. Specifically, the driving transistor T2 having a high mobility μ has a large amount of current at this time, and the source potential increase ΔV is also large. On the contrary, when the mobility μ is small, the current amount of the driving transistor T2 is small, and the increase ΔV of the source is small. With this operation, the gate voltage Vgs of the driving transistor T2 is compressed by ΔV reflecting the mobility μ, and Vgs with the mobility μ completely corrected is obtained when the mobility correction period (6) is completed.

  FIG. 10 is a graph showing temporal changes in the source voltage of the driving transistor T2 during the mobility correction period (6) described above. As shown in the figure, when the mobility of the driving transistor T2 is large, the source voltage rises quickly, and Vgs is compressed accordingly. That is, when the mobility μ is large, Vgs is compressed so as to cancel the influence, and the drive current can be suppressed. On the other hand, when the mobility μ is small, the source voltage of the driving transistor T2 does not rise so fast, so that Vgs is not strongly compressed. Therefore, when the mobility μ is small, Vgs of the driving transistor is not compressed so as to compensate for the small driving capability.

  FIG. 11 shows an operation state in the light emission period (7). In this light emission period (7), the sampling transistor T1 is turned off to cause the light emitting element EL to emit light. The gate voltage Vgs of the driving transistor T2 is kept constant, and the driving transistor T2 passes a constant current Ids ′ to the light emitting element EL according to the above-described characteristic equation. The anode voltage of the light emitting element EL (that is, the source voltage of the driving transistor T2) rises to Vx because a current Ids' flows through the light emitting element EL, and when this exceeds Vcat + Vthel, the light emitting element EL becomes in a forward bias state and emits light. . The light emitting element EL changes its current / voltage characteristics as the light emission time becomes longer. Therefore, the potential of the source S changes. However, since the gate voltage Vgs of the driving transistor T2 is maintained at a constant value by the bootstrap operation, the current Ids ′ flowing through the light emitting element EL does not change. Therefore, even if the current / voltage characteristics of the light emitting element EL deteriorate, a constant drive current Ids ′ always flows, and the luminance of the light emitting element EL does not change.

  In the operation sequence of the pixel circuit shown in FIG. 3, adaptive control of mobility correction time (signal writing time) is performed. Specifically, adaptive control of the signal writing period (that is, mobility correction period) is performed by providing a slope to the falling edge of the control pulse applied to the gate of the sampling transistor T1. The adaptive control is a method of automatically performing variable adjustment so that the mobility correction period is optimized according to the signal potential. The signal potential of the video signal changes from the black level to the white level according to the gradation. The optimum mobility correction time is not necessarily constant, and depends on the gradation level of the video signal. As a general tendency, the optimal mobility correction period is short when the luminance is white level, and the optimal mobility correction period is long when the luminance is black level.

  With reference to FIG. 12, the adaptive control in the mobility correction period described above will be specifically described. The control pulse supplied to the scanning line WS has a characteristic falling waveform, which is steep at first, changes gently thereafter, and finally falls sharply again. This falling waveform is applied to the control terminal (gate) of the sampling transistor T1. On the other hand, the signal potential Vsig is applied to the source of the sampling transistor T1. Therefore, the gate voltage Vgs for controlling on / off of the sampling transistor T1 depends on the signal potential Vsig applied to the source.

  Assuming that the signal potential in white display is Vsig white and the threshold voltage of the sampling transistor T1 is VthT1, the sampling transistor T1 is turned off when the falling edge of the control pulse crosses the level of Vsig white + VthT1 indicated by the chain line. To do. Since the timing of turning off is the time when the control pulse starts to fall sharply, the white display signal writing period from when the sampling transistor T1 is turned on to when it is turned off is shortened. Therefore, the mobility correction period during white display is also shortened.

  On the other hand, if the signal potential during black display is Vsig black, the sampling transistor T1 is turned off when the falling portion of the control pulse falls below Vsig black + VthT1 indicated by the dotted line as shown in the figure. Therefore, the signal writing period during black display becomes longer. In this way, adaptive control of the mobility correction period according to the signal potential is performed.

  In this way, by adding a slope to the falling edge of the control waveform applied to the gate of the sampling transistor T1, appropriate mobility correction can be applied over all gradations, and uniform image quality without streaks or unevenness can be obtained. Is possible. However, in the sampling transistor T1, VthT1 varies with time unless any countermeasure is taken, so that the mobility correction time also changes, and optimal adaptive control cannot be stably performed. This point will be specifically described with reference to FIGS.

  FIG. 4A is a schematic diagram illustrating a connection relationship of sampling transistors included in a pixel circuit. The sampling transistor T1 has a drain connected to the gate of the driving transistor T2, a source connected to the signal line SL, and a gate connected to the scanning line WS. A control pulse is applied from the scanning line WS to the gate of the sampling transistor T1. The waveform of the control pulse has a sharp rise and a gentle fall, and the above-described adaptive control of the mobility correction time is performed.

  FIG. 5B is a schematic diagram showing a potential relationship when the sampling transistor T1 is in an off state, and particularly in the case where the light emitting element EL is in a light emitting state. The zero potential 0V of the scanning line WS is applied to the gate G of the sampling transistor T1. The drain D of the sampling transistor T1 is connected to the gate of the driving transistor T2, and its potential is, for example, 10V. At the time of light emission, the anode potential of the light emitting element EL (that is, the source potential of the driving transistor T2) is increased, and the gate potential of the driving transistor T2 is increased in conjunction with this, which is 10 V in the illustrated example. Therefore, during light emission, the bias between the gate G and the drain D of the sampling transistor T1 is 10V-0V = 10V in absolute value. Due to the influence of this relatively high bias, depletion proceeds with time and the threshold voltage VthT1 of the sampling transistor T1 decreases.

  (C) is a schematic diagram showing a potential relationship when the sampling transistor T1 is in an off state, and in particular, a case where the light emitting element EL is in a non-light emitting state. The zero potential 0V of the scanning line WS is applied to the gate G of the sampling transistor T1. The drain D of the sampling transistor T1 is connected to the gate of the driving transistor T2, and its potential is, for example, 3V. When no light is emitted, the drive current does not flow, so the anode potential of the light emitting element EL (that is, the source potential of the drive transistor T2) is lowered, and the gate potential of the drive transistor T2 is lowered in conjunction with this, 3V. Therefore, when no light is emitted, the bias between the gate G and the drain D of the sampling transistor T1 is 3V-0V = 3V in absolute value, which is relatively low. Therefore, depletion does not proceed and the threshold voltage VthT1 of the sampling transistor T1 does not change.

  (D) is a schematic diagram which shows the duty drive of a display apparatus. The duty drive is a method of adjusting the luminance of the screen by variably controlling the ratio of the light emission period in one frame period or one field period. In the illustrated example, when the duty is 75%, the ratio of the light emission period to one frame period or one field period is 75%, and the screen luminance is relatively high. On the other hand, when the duty is 25%, the ratio of the light emission period in one frame period or one field period is 25%, and the screen luminance is relatively low. The higher the duty is, the longer the accumulated light emission time is, and the depletion of the sampling transistor proceeds accordingly.

  (E) represents the waveform of the control pulse applied to the gate of the sampling transistor T1. Overlaid on this waveform, the fluctuation of the threshold voltage VthT1 of the sampling transistor T1 is represented. As shown in the drawing, when the gate potential of the sampling transistor T1 falls below the threshold voltage VthT1 with respect to the signal potential Vsig, the sampling transistor T1 is turned off. The time from when the sampling transistor T1 is turned on to when it is turned off is the mobility correction time. When the threshold voltage VthT1 is lowered along with the depletion of the sampling transistor T1, the correction time becomes longer, and the emission luminance is lowered accordingly.

  Therefore, in the present invention, during the lighting operation of the pixel, coupling is performed from the drain D side of the driving transistor T2 to the gate G side via the parasitic capacitance Cgd to lower the gate potential Vg, thereby causing the sampling transistor T1 of the sampling transistor T1. Reduce the gate-drain bias. As a result, a change with time of the threshold voltage VthT1 of the sampling transistor T1 is suppressed, and thus a change with time of the emission luminance is suppressed.

  The display device according to the present invention has a thin film device configuration as shown in FIG. This figure shows a schematic cross-sectional structure of a pixel formed on an insulating substrate. As shown in the figure, the pixel includes a transistor part (a single TFT is illustrated in the figure) including a plurality of thin film transistors, a capacitor part such as a storage capacitor, and a light emitting part such as an organic EL element. A transistor portion and a capacitor portion are formed on a substrate by a TFT process, and a light emitting portion such as an organic EL element is stacked thereon. A transparent counter substrate is pasted thereon via an adhesive to form a flat panel.

  The display device according to the present invention includes a flat module-shaped display as shown in FIG. For example, a pixel array unit in which pixels made up of organic EL elements, thin film transistors, thin film capacitors and the like are integrated in a matrix is provided on an insulating substrate, and an adhesive is disposed so as to surround the pixel array unit (pixel matrix unit). Then, a counter substrate such as glass is attached to form a display module. If necessary, this transparent counter substrate may be provided with a color filter, a protective film, a light shielding film, and the like. For example, an FPC (flexible printed circuit) may be provided in the display module as a connector for inputting / outputting a signal to / from the pixel array unit from the outside.

  The display device according to the present invention described above has a flat panel shape and is input to a main body of various electronic devices such as a digital camera, a notebook personal computer, a mobile phone, and a video camera, or The present invention can be applied to displays (display units) of electronic devices in various fields that display information generated in the main unit of the electronic device as an image or video. Examples of electronic devices to which such a display device is applied are shown below.

  FIG. 16 shows a television to which the present invention is applied, which includes a video display screen 11 including a front panel 12, a filter glass 13, and the like, and is manufactured by using the display device of the present invention for the video display screen 11. .

  FIG. 17 shows a digital camera to which the present invention is applied, in which the top is a front view and the bottom is a back view. This digital camera includes an imaging lens, a light emitting unit 15 for flash, a display unit 16, a control switch, a menu switch, a shutter 19, and the like, and is manufactured by using the display device of the present invention for the display unit 16.

  FIG. 18 shows a notebook personal computer to which the present invention is applied. The main body 20 includes a keyboard 21 that is operated when characters and the like are input, and the main body cover includes a display unit 22 that displays an image. This display device is used for the display portion 22.

  FIG. 19 shows a mobile terminal device to which the present invention is applied. The left side shows an open state and the right side shows a closed state. The portable terminal device includes an upper housing 23, a lower housing 24, a connecting portion (here, a hinge portion) 25, a display 26, a sub-display 27, a picture light 28, a camera 29, and the like, and includes the display device of the present invention. The display 26 and the sub-display 27 are used.

  FIG. 20 shows a video camera to which the present invention is applied. The video camera includes a main body 30, a lens 34 for photographing a subject, a start / stop switch 35 at the time of photographing, a monitor 36, etc. on the side facing forward. It is manufactured by using the device for its monitor 36.

1 is a block diagram showing an overall configuration of a display device according to the present invention. 1 is a pixel circuit diagram showing an embodiment of a display device according to the present invention. It is a schematic diagram with which it uses for operation | movement description of embodiment shown to FIGS. 2-1. It is a timing chart with which it uses for operation | movement description of the display apparatus shown to FIGS. It is a schematic diagram with which it uses for operation | movement description of the pixel shown to FIGS. It is a schematic diagram for explaining the operation in the same manner. It is a schematic diagram for explaining the operation in the same manner. It is a schematic diagram for explaining the operation in the same manner. It is a graph similarly provided for operation | movement description. It is a schematic diagram for explaining the operation in the same manner. It is a graph similarly provided for operation | movement description. It is a schematic diagram for explaining the operation in the same manner. It is a wave form diagram similarly provided for operation | movement description. It is a circuit diagram with which it uses for description of operation | movement of the transistor for sampling. It is sectional drawing which shows the device structure of the display apparatus concerning this invention. It is a top view which shows the module structure of the display apparatus concerning this invention. It is a perspective view which shows the television set provided with the display apparatus concerning this invention. It is a perspective view which shows the digital still camera provided with the display apparatus concerning this invention. 1 is a perspective view illustrating a notebook personal computer including a display device according to the present invention. It is a schematic diagram which shows the portable terminal device provided with the display apparatus concerning this invention. It is a perspective view which shows the video camera provided with the display apparatus concerning this invention. It is a circuit diagram which shows an example of the conventional display apparatus. It is a graph which shows the current / voltage characteristic of a light emitting element. It is a circuit diagram which shows the other example of the conventional display apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pixel array part, 2 ... Pixel, 3 ... Signal selector, 4 ... Control scanner, 5 ... Power supply scanner, T1 ... Sampling transistor, T2 ... Drive Transistor, C1... Holding capacitor, EL... Light emitting element, WS... Scanning line, DS.

Claims (5)

It consists of a pixel array part and a circuit part that drives it,
The pixel array unit includes a row-like scanning line, a column-like signal line, a matrix-like pixel arranged at a portion where both intersect, and a power supply line arranged in parallel to the scanning line,
The circuit unit sequentially outputs a control pulse to each scanning line and scans pixels in a line-by-line manner, a power supply scanner that switches each feeding line between a high potential and a low potential, and the line sequential scanning. In addition, a signal selector that supplies video signals to the column-shaped signal lines,
The pixel includes a light emitting element, a sampling transistor, and a driving transistor,
The sampling transistor has a gate connected to the scanning line, a source connected to the signal line, a drain connected to the gate of the driving transistor,
The driving transistor has a source connected to the light emitting element, a drain connected to the power supply line,
The power supply scanner switches the power supply line from a high potential to a low potential, lowers the source potential of the driving transistor, reverse biases the light emitting element, and turns off the light emitting element,
The control scanner applies a control pulse to the scanning line, turns on the sampling transistor, performs a writing operation to write a video signal to the gate of the driving transistor,
The power supply scanner performs a lighting operation in which the power supply line is switched from a low potential to a high potential to raise the source potential of the driving transistor, the light emitting element is forward biased, and a driving current corresponding to the video signal is supplied to the light emitting element. ,
In the lighting operation, a display device that reduces the gate-to-drain bias of the sampling transistor by coupling the drive transistor from the drain side to the gate side via a parasitic capacitance to lower the gate potential.   2. The display device according to claim 1, wherein, in the lighting operation, the power supply line is temporarily changed from a low potential to an overpotential higher than a high potential, and then the overpotential is dropped to a high potential to apply negative coupling to the gate of the driving transistor.   3. The display device according to claim 2, wherein the power supply scanner raises the power supply line from a low potential to an overpotential before the writing operation, and lowers the power supply line from the overpotential to a high potential after the writing operation. The pixel array section includes a pixel array section and a circuit section for driving the pixel array section. The pixel array section includes a row-shaped scanning line, a column-shaped signal line, a matrix-shaped pixel arranged at a portion where both intersect, and a scanning line. The circuit unit outputs a control pulse to each scanning line sequentially and scans the pixels line by line, and each feeding line has a high potential and a low potential. And a signal selector that supplies a video signal to a column-shaped signal line in accordance with the line sequential scanning, and the pixel includes a light emitting element, a sampling transistor, and a driving transistor, The sampling transistor has a gate connected to the scanning line, a source connected to the signal line, a drain connected to the gate of the driving transistor, and the driving transistor having a source connected to the light emitting element. Connect to drive the display device having a drain connected to a fed-wire for the,
The power supply scanner switches the power supply line from a high potential to a low potential, lowers the source potential of the driving transistor, reverse biases the light emitting element, and turns off the light emitting element,
The control scanner applies a control pulse to the scanning line, turns on the sampling transistor, performs a writing operation to write a video signal to the gate of the driving transistor,
The power supply scanner performs a lighting operation in which the power supply line is switched from a low potential to a high potential to raise the source potential of the driving transistor, the light emitting element is forward biased, and a driving current corresponding to the video signal is supplied to the light emitting element. ,
In the lighting operation, coupling of the driving transistor from the drain side to the gate side through a parasitic capacitance causes a reduction in the gate potential, thereby reducing the bias between the gate and the drain of the sampling transistor. Method.
Driving method A main body and a display for displaying information output from the main body,
The display unit includes a pixel array unit and a circuit unit that drives the pixel array unit.
The pixel array unit includes a row-like scanning line, a column-like signal line, a matrix-like pixel arranged at a portion where both intersect, and a power supply line arranged in parallel to the scanning line,
The circuit unit sequentially outputs a control pulse to each scanning line and scans pixels in a line-by-line manner, a power supply scanner that switches each feeding line between a high potential and a low potential, and the line sequential scanning. In addition, a signal selector that supplies video signals to the column-shaped signal lines,
The pixel includes a light emitting element, a sampling transistor, and a driving transistor,
The sampling transistor has a gate connected to the scanning line, a source connected to the signal line, a drain connected to the gate of the driving transistor,
The driving transistor has a source connected to the light emitting element, a drain connected to the power supply line,
The power supply scanner switches the power supply line from a high potential to a low potential, lowers the source potential of the driving transistor, reverse biases the light emitting element, and turns off the light emitting element,
The control scanner applies a control pulse to the scanning line, turns on the sampling transistor, performs a writing operation to write a video signal to the gate of the driving transistor,
The power supply scanner performs a lighting operation in which the power supply line is switched from a low potential to a high potential to raise the source potential of the driving transistor, the light emitting element is forward biased, and a driving current corresponding to the video signal is supplied to the light emitting element. ,
In the lighting operation, an electronic device that reduces the gate-drain bias of the sampling transistor by coupling the drive transistor from the drain side to the gate side via a parasitic capacitance to lower the gate potential.

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