JP2009277858A - Nonvolatile semiconductor memory device, and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an excellent nonvolatile semiconductor memory device wherein writing and erasing characteristics are enhanced by improving an insulating film between a control electrode and a charge storage layer, and to provide a method of manufacturing the device. <P>SOLUTION: The nonvolatile semiconductor memory device has source-drain regions formed in a silicon substrate 1, a first insulating film 2 which is a tunnel insulating film formed on a channel region between the source-drain regions of the silicon substrate 1, a first conductive layer 3 formed on the first insulating film 2, and a two-layer gate structure in which a second insulating film 7 made of a multilayer film of a low dielectric constant insulating film and a high dielectric constant insulating film formed on the first conductive layer 3 is formed as an inter-electrode insulating film, and a second conductive layer 8 is formed on the second insulating film 7 as a control electrode. The multilayer film of a nitrogen-added silicon oxide film 7-1/the high dielectric constant insulating film 7-2/silicon oxide film7-3 is formed as the second insulating film 7. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nonvolatile semiconductor memory device and a manufacturing method thereof.

In recent years, in nonvolatile semiconductor memory devices, in order to increase the capacitance between the control electrode and the charge storage layer, it has been proposed to provide a high dielectric constant insulating film between the control electrode and the charge storage layer (for example, , See Patent Document 1).

Conventionally, however, it cannot be said that sufficient studies have been made on the insulating film provided between the control electrode and the charge storage layer, and it is difficult to obtain a nonvolatile semiconductor memory device having excellent characteristics and reliability. It was.
JP-A-5-129625

An object of the present invention is to provide an excellent nonvolatile semiconductor memory device and a method for manufacturing the same by improving an insulating film between a control electrode and a charge storage layer.

A nonvolatile semiconductor memory device according to a first aspect of the present invention includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, and a charge storage layer formed on the first insulating film. And a second insulating film formed on the charge storage layer and a control electrode formed on the second insulating film.

A nonvolatile semiconductor memory device according to a second aspect of the present invention includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, and a charge storage layer formed on the first insulating film. A non-volatile semiconductor memory device comprising a second insulating film formed on the charge storage layer and a control electrode formed on the second insulating film, wherein the second insulating film comprises: A lower dielectric constant is formed on the first silicon nitride film and the first silicon nitride film, and is formed on the silicon oxide film added with nitrogen and the first silicon oxide film. Is provided with an intermediate insulating film of 7 or more, a second silicon oxide film formed on the intermediate insulating film, and a second silicon nitride film formed on the silicon oxide film.

A method for manufacturing a nonvolatile semiconductor memory device according to a third aspect of the present invention provides a first method on a semiconductor substrate.
Forming an insulating film, a step of forming a charge storage layer on the first insulating film, a step of forming a second insulating film on the charge storage layer,
And a step of forming a control electrode on the second insulating film, wherein the second insulating film is formed of nitrogen in the lower first silicon oxide film. Add
An intermediate insulating film having a relative dielectric constant of 7 or more is formed on the first silicon oxide film, and an upper second silicon oxide film formed on the intermediate insulating film is formed. The silicon oxide film is an ALD. Formed by law.

A method for manufacturing a nonvolatile semiconductor memory device according to a fourth aspect of the present invention provides a first method on a semiconductor substrate.
Forming an insulating film, forming a charge storage layer on the first insulating film, forming a second insulating film on the charge storage layer, and on the second insulating film And forming a control electrode on the non-volatile semiconductor memory device, wherein the second insulating film forms a lower first silicon nitride film layer, and the first silicon A silicon oxide film added with nitrogen is formed on the nitride film, an intermediate insulating film having a relative dielectric constant of 7 or more is formed on the lower silicon oxide film, and a second upper layer formed on the intermediate insulating film is formed. A silicon oxide film is formed, a silicon nitride film is formed on the second silicon oxide film, and the silicon oxide film is formed by an ALD method.

According to the present invention, a nonvolatile semiconductor memory device having excellent write / erase characteristics can be obtained by improving the interelectrode insulating film.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
Hereinafter, a nonvolatile semiconductor memory device (referred to as a semiconductor device) according to the present embodiment will be described with reference to the drawings.

FIG. 1 relates to a semiconductor memory device including a memory cell array in which a plurality of memory cell columns configured by arranging a plurality of memory cell transistors in the column direction are arranged in parallel in the row direction. A plurality of element isolation insulating films that run parallel to each other between a semiconductor substrate and a plurality of memory cell columns, a first conductive layer separated by the insulating film, and a memory formed on the first conductive layer and adjacent to each other An inter-electrode insulating film belonging to each cell column and a second conductive layer having a bottom surface formed on the inter-electrode insulating film and serving as a common wiring for adjacent memory cells are shown.

1A is a cross-sectional view in the word line direction (channel width direction), and FIG. 1B is a cross-sectional view in the bit line direction (channel length direction).

As shown in FIG. 1, an element isolation insulating film embedded in the element isolation region 6 is formed from a coating insulating film.

The cell transistor has a tunnel insulation formed on a channel region between a source / drain region (not shown) formed in the silicon substrate 1 and a source / drain region (not shown) of the silicon substrate 1. A first insulating film 2 that is a film, a first conductive layer 3 that is a floating gate electrode formed on the first insulating film 2 by a first conductive layer 3, and a first conductive layer 3 A second insulating film 7 made of a laminated film of a low dielectric constant insulating film and a high dielectric constant insulating film is formed as an interelectrode insulating film, and a second conductive layer 8 is formed on the second insulating film 7. It has a two-layer gate structure formed as a control gate electrode.

In this embodiment, as the second insulating film 7 which is an interelectrode insulating film, a laminated film of a silicon oxide film 7-1 added with nitrogen / a high dielectric constant insulating film 7-2 / a silicon oxide film 7-3 is formed. To do.

In the present embodiment, a method for manufacturing an element according to the present embodiment will be described with respect to the case where the writing characteristics of the element are improved.

If the device is required to have improved erasing characteristics, this embodiment is used as a silicon oxide film on the control electrode side.
Application to 7-3 makes it possible to obtain a desired improvement effect.

In addition, by applying this embodiment to both silicon oxide films 7-1 and 7-3, writing /
It goes without saying that an improvement effect can be obtained in the characteristics in both directions of erasure.

In the present embodiment, nitrogen is added to the silicon oxide film 7-1 under the second insulating film 7 for the purpose of improving the write characteristics. The amount of nitrogen added at this time is introduced so as to be substantially uniform in the silicon oxide film as shown in the schematic diagram of FIG. By adding nitrogen to the silicon oxide film 7-1, characteristics at the time of writing to which a high electric field is applied are improved. Conventional silicon oxide film 7-
In the structure in which nitrogen is not added to 1, electrons injected into the first conductive layer 3 that is the floating gate electrode through the first insulating film 2 that is the tunnel insulating film are converted into the second insulating film 7 that is the interelectrode insulating film. The threshold value is saturated because the leakage current of the tunnel and the leakage current of the interelectrode insulating film are balanced. That is, it becomes impossible to write.

On the other hand, in the case of the present embodiment in which nitrogen is added to the silicon oxide film 7-1, the dielectric constant of the silicon oxide film 7-1 to which nitrogen is added is increased, and the high writing speed in the silicon oxide film 7-1 is increased. Since the electric field is suppressed and the physical film thickness can be increased without increasing the electric film thickness by increasing the dielectric constant, the first conductive layer 3 that is the floating gate electrode is changed to the second electrode that is the control electrode. The probability of tunneling electrons passing through the conductive layer 8 can be reduced.

  For this reason, it is possible to write up to a higher threshold.

  By introducing nitrogen into the silicon oxide film 7-1, the withstand voltage can be improved.

Further, diffusion of impurities can be suppressed by introducing nitrogen. When the high dielectric constant insulating film 7-2 contains carbon, carbon diffuses into the element isolation insulating film in the thermal process or oxidation process after the formation of the high dielectric constant insulating film 7-2, thereby changing the threshold value of the transistor. However, the amount of impurity diffusion can be suppressed by incorporating nitrogen into the lower silicon oxide film 7-1.

In the present embodiment, the case where nitrogen is substantially uniformly formed in the silicon oxide film has been described. According to this method, since nitrogen is introduced over the entire silicon oxide film, high electric field leakage, which is an effect of introducing nitrogen, can be effectively realized.

Therefore, when the writing specification is severe, that is, when it is desired to write up to a high threshold, the method of this embodiment is effective.

In addition, when the demand for the low electric field leakage characteristic at the time of charge holding is severe, the embodiment described later is applied.

  The method for manufacturing the semiconductor device according to the present embodiment will be explained with reference to FIGS.

As shown in FIG. 4, a first insulating film 2 is formed on a p-type silicon substrate 1 (or a p-type well formed on an n-type silicon substrate) to a thickness of 1 nm to 15 nm, and a chemical vapor phase is formed thereon. A first conductive layer 3 (floating gate) serving as a charge storage layer is formed to a thickness of about 10 nm to 200 nm by a growth method.

Then, a silicon nitride film 4 is formed to a thickness of about 50 nm to 200 nm by chemical vapor deposition, and a silicon oxide film 5 is further formed to a thickness of about 50 nm to 400 nm by chemical vapor deposition.

After the silicon oxide film 5 is formed to a thickness of about 50 nm to 400 nm, a photoresist (not shown) is applied on the silicon oxide film, and the resist is patterned by exposure drawing.

After patterning, the silicon oxide film is etched using a photoresist (not shown) as an etching resistant mask.

After the etching, the photoresist is removed, the silicon nitride film 4 is etched using the silicon oxide film 5 as a mask, and the first conductive layer 3, the first insulating film 2 and the silicon substrate 1 are etched for element isolation. Grooves are formed.

After forming the trench for element isolation, that is, the element isolation region 6, by embedding the element isolation trench by forming a buried element isolation insulating film by 200 nm to 1500 nm by a coating technique, the cross-sectional view of FIG. 4 is obtained.

As shown in FIG. 5, the element isolation region 6 is densified by processing in an oxygen atmosphere or a water vapor atmosphere.

Next, planarization is performed using a chemical mechanical polishing method (by CMP) using the silicon nitride film 4 as a stopper. Next, only the element isolation insulating film is etched back using etching conditions having a selection ratio with the silicon nitride film, and the cross-sectional view of FIG. 5 is obtained.

Next, as shown in FIG. 6, by using ALD (Atomic Layer Deposition) method, aminosilane is used as the silicon raw material, water vapor, ozone, etc. are used as the oxygen raw material at a temperature of 300 ° C. to 700 ° C., and the nitrogen raw material is used. Ammonia is used for this, and silicon of one atomic layer or more and oxygen and nitrogen are alternately deposited to form a silicon oxide film 7-1 to which nitrogen is added, and the cross-sectional view of FIG. 6 is obtained.

  The thickness of the silicon oxide film 7-1 doped with nitrogen is 1 to 5 nm.

In the present embodiment, the nitrogen amount in the silicon oxide film can be accurately controlled by adjusting the nitrogen source gas conditions.

The amount of nitrogen added to the silicon oxide film depends on the laminated structure of the film type, the film thickness, and the electric field during operation of the device.

When the band structure is considered in consideration of the above conditions, when the operating electric field is applied to the element, the film thickness of the conductive band of the insulating film crossing the conductive band position of silicon is obtained by adding nitrogen to the silicon oxide film 7-1. Try to increase. Adding nitrogen increases the dielectric constant of the film and increases the distance of electrons at the time of writing. However, if the amount of nitrogen to be added is too large, the barrier height decreases, and the distance becomes shorter.

For example, as shown in FIG. 3, in the case of the film structure described in the present embodiment, the relative dielectric constant of the silicon oxide film is 3.9, the interelectrode insulating film electric field is 10 MV / cm, the barrier height with respect to the Si conduction band of SiO2 = Three
In the case of eV, when the amount of nitrogen added to the silicon oxide film 7-1 is expressed by the composition ratio of Si3N4 to SiO2, the effect of reducing leakage current is obtained in the range of less than 90% (dielectric constant is about 6.7). It is done.

The most effective composition ratio is about 45% (dielectric constant is about 5.1). Also, based on the above assumption, the film structure on the injection side is silicon oxide film = 1 nm, silicon nitride film = 1 nm (in the case of relative dielectric constant = 7)
When the silicon oxide film = 5 nm, the leakage current decreases within a range of less than 20% (dielectric constant of about 5.1) when expressed by the composition ratio of Si3N4 to SiO2. The optimum amount of nitrogen to be added is determined from the usage status of the device and the charge retention characteristics as described above.

In addition, the nitrogen concentration in the silicon oxide film can be increased, and the amount of charge traps in the nitrogen-containing silicon oxide film can be increased.

Further, even if the N / Si composition ratio is formed to be Si-rich, the amount of charge traps in the nitrogen-containing silicon oxide film can be increased.

It is also possible to reduce the leakage current when a high electric field is applied by increasing the amount of charge traps by combining either method or both. This is due to the nitrogen content,
It is considered that charge traps are formed when mismatching occurs in the oxide film due to bonding, oxygen vacancies are formed, or dangling bonds of Si are formed in the film. If there are too many charge traps, the leakage current between adjacent cells increases, so there is an appropriate amount. This differs depending on the use state of the element such as the distance and structure between adjacent cells and the electric field between adjacent cells.

As shown in FIG. 7, a high dielectric constant insulating film 7-2, which is a metal oxide having a high dielectric constant, is formed on the upper portion of the silicon oxide film 7-1 to which nitrogen is added. 1-7nm for film 7-3
A cross section of FIG.

Then, as shown in FIG. 8, a second conductive layer 8 is formed on the second insulating film 7 which is an interelectrode insulating film. The second conductive layer 8 becomes a control gate electrode. After patterning the control electrode by exposure drawing, a nonvolatile semiconductor memory device is obtained through a normal post-process.

Here, the high dielectric constant insulating film in the interelectrode insulating film described in the present embodiment will be described. Silicon nitride (Si3N4) film with a relative dielectric constant of about 7, aluminum oxide (Al2O3) film with a relative dielectric constant of about 8, magnesium oxide (MgO) film with a relative dielectric constant of about 10, dielectric constant Rate is 16
Yttrium oxide (Y2O3) film, hafnium oxide with a relative dielectric constant of about 22 (
Any one single layer film of HfO2) film, zirconium oxide (ZrO2) film and lanthanum oxide (La2O3) can be used. Furthermore, an insulating film made of a ternary compound such as a hafnium silicate (HfSiO) film or a hafnium aluminate (HfAlO) film may be used.

That is, an oxide or nitride containing at least one element of silicon (Si), aluminum (Al), magnesium (Mg), yttrium (Y), hafnium (Hf), zirconium (Zr), and lanthanum (La) Even it can be used.

Regarding the manufacturing method of nitrogen-added silicon oxide film, in addition to the ALD method shown in this example, dichlorosilane, nitrous oxide (N2O), and ammonia are sequentially reacted at a temperature of about 800 ° C. by low pressure chemical vapor deposition. A silicon oxide film 7-1 to which nitrogen is added may be formed.

Since the silicon oxide film in this case contains chlorine, the leakage current when applying a high electric field is effectively reduced by the trapping action of electrons. The same effect is also exhibited in a laminated structure of a silicon oxide film and a silicon nitride film formed by CVD. Alternatively, it can be formed by heat-treating a coating silicon material containing nitrogen. In the method using the coating-based silicon raw material, the amount of nitrogen remaining in the film is determined by the heat treatment conditions.

As a method for adding nitrogen to the silicon oxide film, there is a method in which nitriding treatment is performed after the silicon oxide film is formed. Examples of the nitriding treatment include thermal nitriding treatment, radical nitriding treatment, and implantation treatment. However, in this case, the thickness of the silicon oxide film is limited by the nitriding conditions, that is, the thickness at which nitrogen can be uniformly added to the silicon oxide film is determined by the nitriding conditions.

Furthermore, the nitrogen distribution in the film can be made more uniform by applying heat treatment to the silicon oxide film added with nitrogen formed by these manufacturing methods. At the same time, the film quality is also improved, so that the electrical characteristics can be improved. Further, in the case where the silicon oxide film is subjected to a nitriding process and then the heat treatment is performed on the nitrogen-added film, the film thickness at which nitrogen can be uniformly added to the silicon oxide film can be estimated to be even thicker.

Further, regarding the laminated structure, the case of silicon oxide film / high dielectric constant film / silicon oxide film has been described, but the effect of this embodiment can be obtained even in other laminated structures.

For example, even in a laminated structure such as silicon nitride film / silicon oxide film / high dielectric constant film / silicon oxide film / silicon nitride film, silicon nitride film / silicon oxide film / silicon nitride film / silicon oxide film / silicon nitride film, etc. The embodiment is effective.

In the case where the lower layer of the nitrogen-added silicon oxide film is a silicon nitride film, when forming the nitrogen-added silicon oxide film, re-nitridation can be performed on the surface of the lower silicon nitride film to compensate for nitrogen loss in the lower layer .

For example, when a nitrogen source material such as ammonia is introduced first at the start of the formation of a silicon oxide film doped with nitrogen, nitrogen loss in the lower silicon nitride film can be compensated. By doing so, the film quality of the silicon nitride film is improved and the dielectric constant is also increased, so that the electrical characteristics of the interelectrode insulating film are improved.

In this embodiment, an example related to a nonvolatile semiconductor memory device having a floating gate electrode has been described. However, even a semiconductor device having another structure has the same effect as long as it is an element having a similar stacked structure. Needless to say.

Even in a nonvolatile semiconductor memory device using a trap in an insulating film generally known as MONOS, the effectiveness can be realized by applying the present invention to a block insulating film formed on an upper layer of a charge storage layer, for example.

(Embodiment 2)
Hereinafter, a nonvolatile semiconductor memory device according to the present embodiment (hereinafter referred to as a semiconductor device) will be described with reference to the drawings.

The present invention relates to a semiconductor memory device including a memory cell array in which a plurality of memory cell columns configured by arranging a plurality of memory cell transistors in a column direction are arranged in parallel in a row direction. For the same reason, the description of the structural cross-sectional view will be described using FIG.

As shown in FIG. 1, a plurality of element isolation insulating films that run parallel to each other between a semiconductor substrate and a plurality of memory cell columns, a first conductive layer separated by the insulating film, and formed on the first conductive layer The inter-electrode insulating films respectively belonging to the memory cell columns adjacent to each other and the second conductive layer formed on the inter-electrode insulating film and serving as a common wiring for the adjacent memory cells are shown.

1A is a cross-sectional view in the word line direction (channel width direction), and FIG. 2B is a cross-sectional view in the bit line direction (channel length direction).

  Hereinafter, the present embodiment will be described with reference to the drawings.

As shown in FIG. 1, an element isolation insulating film embedded in the element isolation region 6 is formed from a coating insulating film.

The cell transistor has a tunnel insulation formed on a channel region between a source / drain region (not shown) formed in the silicon substrate 1 and a source / drain region (not shown) of the silicon substrate 1. A first insulating film 2 which is a film, a floating gate electrode formed by the first conductive layer 3 on the first insulating film 2, and a low dielectric constant insulating film formed on the first conductive layer 3 And a second insulating film 7 composed of a laminated film of a high dielectric constant insulating film formed as an interelectrode insulating film, and a second conductive layer 8 formed as a control gate electrode on the second insulating film 7 It has a gate structure.

In the present embodiment, a laminated film of a silicon oxide film 7-1, a high dielectric constant insulating film 7-2, and a silicon oxide film 7-3 is formed as the second insulating film 7 that is an interelectrode insulating film.

When improvement in erasing characteristics is required, it is possible to obtain a desired improvement effect by applying this embodiment to the silicon oxide film 7-3 on the control electrode side. Further, by applying this embodiment to both silicon oxide films 7-1 and 7-3, an improvement effect can be obtained in the characteristics in both the write / erase directions.

In the present embodiment, nitrogen is added to the silicon oxide film 7-1 under the second insulating film 7 for the purpose of improving the write characteristics. The nitrogen added at this time is gradually increased toward the interface of the high dielectric constant insulating film 7-2 formed on the top.

FIG. 9 shows the distribution (schematic diagram) in the depth direction of the nitrogen composition ratio in the film. In FIG. 9 (a), nitrogen is not added at the floating electrode side interface of the silicon oxide film, and nitrogen starts to be added from a certain thickness in the film and gradually reaches the high dielectric constant insulating film 7-2 side interface. This is a case where the amount of nitrogen added is increased.

FIG. 9B shows a case where nitrogen is added from the floating electrode side interface of the silicon oxide film, and the nitrogen addition amount is gradually increased to the high dielectric constant insulating film 7-2 side interface.

In the case of FIG. 9 (a), a silicon oxide film having a high barrier height remains on the floating gate electrode side, so that there is an advantage that leakage of a low electric field during charge holding can be suppressed.

On the other hand, the case of FIG. 9 (b) corresponds to the case of adding a higher concentration of nitrogen as a whole compared with (a), and is suitable for obtaining the effect of reducing the leak when applying a high electric field. It must be noted here that in order to reduce the high electric field leakage during writing, the nitrogen distribution gradually increases the amount of nitrogen added from the floating electrode side toward the high dielectric constant insulating film side. However, nitrogen is added to the silicon oxide film 7-3 in order to reduce high electric field leakage during erasure. The nitrogen distribution at that time gradually decreases from the interface of the high dielectric constant insulating film 7-2 toward the control electrode.

By adding nitrogen to the silicon oxide film 7-1, characteristics at the time of writing to which a high electric field is applied are improved. In the conventional structure in which nitrogen is not added to the silicon oxide film 7-1, electrons injected into the first conductive layer 3 that is the floating gate electrode through the first insulating film 2 that is the tunnel insulating film are transferred to the interelectrode insulating film. That is, the threshold value is saturated because the leakage current of the tunnel and the leakage current of the interelectrode insulating film are balanced. That is, it becomes impossible to write.

On the other hand, in the case of the present embodiment in which nitrogen is added to the silicon oxide film 7-1, the dielectric constant of the silicon oxide film 7-1 to which nitrogen is added is increased, and the high writing speed in the silicon oxide film 7-1 is increased. Since the electric field is suppressed and the physical film thickness can be increased without increasing the electric film thickness by increasing the dielectric constant, the first conductive layer 3 that is the floating gate electrode is changed to the second electrode that is the control electrode. The probability of tunneling electrons passing through the conductive layer 8 can be reduced. For this reason, even if the writing time is lengthened, the threshold is less likely to be saturated.
Other benefits can also be obtained by introducing nitrogen. By introducing nitrogen into the silicon oxide film 7-1, the withstand voltage can be improved. Further, diffusion of impurities can be suppressed by introducing nitrogen. When the high dielectric constant insulating film 7-2 contains carbon, carbon diffuses in the element isolation insulating film in the thermal process or oxidation process after the formation of the high dielectric constant insulating film 7-2, and the threshold value of the transistor is changed. However, the amount of impurity diffusion can be suppressed by incorporating nitrogen into the lower silicon oxide film 7-1.

In the present embodiment, the case where the nitrogen concentration gradually increases toward the interface of the high dielectric constant insulating film has been described.

  FIG. 10 shows a band diagram when the concentration distribution of the silicon oxide film is FIG.

According to the present embodiment, the introduction of high concentration nitrogen is limited to the vicinity of the high dielectric constant insulating film interface,
Since the barrier height on the floating electrode side is high because it is a silicon oxide film, the barrier height felt by electrons on the injection side can be effectively increased, and the tunnel probability of charge retention can be effectively reduced.

Also, by gradually increasing the nitrogen concentration, the dielectric constant of the film increases in the direction of the high dielectric constant insulating film. If nitrogen is not introduced, the conduction band of the nitrogen-added silicon oxide film crosses the conduction band of Si. In the region where the tunneling probability of electrons increases, it is possible to reduce the electric field when a high electric field is applied by increasing the dielectric constant, and the barrier can be extended to the higher dielectric constant insulating film side. Electric field leakage can be effectively suppressed.

The method according to the present embodiment is an effective method when the demand for the charge retention characteristic is severe and it is desired to reduce the high electric field leakage.
The semiconductor device manufacturing method according to the present embodiment will be explained with reference to FIGS.

As shown in FIG. 11, a first insulating film 2 is formed on a p-type silicon substrate 1 (or a p-type well formed on an n-type silicon substrate) 1 to a thickness of 1 to 15 nm, and a chemical vapor phase is formed thereon. The first conductive layer 3 (floating gate) to be a charge storage layer is formed by a growth method to a thickness of about 10 nm to 200 nm, and the silicon nitride film 4 is formed by a chemical vapor deposition method to a thickness of about 50 nm to 200 nm. Thus, the silicon oxide film 5 is formed to a thickness of about 50 nm to 400 nm.

Then, a photoresist (not shown) is applied on the silicon oxide film 5, and the resist is patterned by exposure drawing.

Next, the silicon oxide film is etched using a photoresist (not shown) as an etching resistant mask. After the etching, the photoresist is removed, the silicon nitride film 4 is etched using the silicon oxide film 5 as a mask, and then the first conductive layer 3, the first insulating film 2 and the silicon substrate 1 are etched, thereby isolating elements. Grooves are formed.

Next, the element isolation trench is embedded by forming a buried element isolation insulating film in the element isolation region 6 by a coating technique to 200 nm to 1500 nm, thereby obtaining the cross-sectional view of FIG.

Next, as shown in FIG. 12, the element isolation region 6 is densified by performing treatment in an oxygen atmosphere or a water vapor atmosphere. Next, planarization is performed using a chemical mechanical polishing method (by CMP) using the silicon nitride film 4 as a stopper.

Next, only the element isolation insulating film is etched back using etching conditions having a selection ratio with the silicon nitride film 4 to obtain the cross-sectional view of FIG.

Next, as shown in FIG. 13, then, by ALD (Atomic Layer Deposition) method,
At a temperature of ~ 700 ° C, aminosilane is used as the Si raw material, water vapor, ozone, etc. are used as the oxygen raw material, ammonia is used as the nitrogen raw material, and one or more atomic layers of Si and O and N are alternately deposited to form nitrogen. The added silicon oxide film 7-1 is formed, and the cross-sectional view of FIG. 13 is obtained.

The thickness of the silicon oxide film 7-1 doped with nitrogen is 1 to 5 nm. In the present embodiment, the amount of nitrogen in the film and the distribution tendency in the depth direction can be adjusted by adjusting the order in which the Si, O, and N materials are circulated and the introduction conditions of the N materials.

The optimum range of nitrogen added to the silicon oxide film depends on the effect from the distance from the interface of the first conductive layer 3, which is a floating gate electrode. And depends on the electric field during operation of the device. When a band structure is considered in consideration of the above conditions, it is desirable that the conductive band of the insulating film is formed on the floating electrode side with respect to the film thickness that crosses the position of the conductive band of Si when an operating electric field is applied to the element.

For example, in the case of the film structure of the present embodiment, when the dielectric constant of the silicon oxide film is 3.9, the electric field of the insulating film between the electrodes is 10 MV / cm, and the barrier height with respect to the Si conductive band of SiO2 is 3 eV, the conductive property of the insulating film The thickness of the band across the conductive band position of Si is about 3 nm, and nitrogen starts to be added at a position where the distance from the floating electrode 3 is smaller than 3 nm, and the amount of added nitrogen is gradually increased to increase the silicon oxide film 7-1. It is desirable to form.

The nitrogen addition amount of the corresponding film is preferably 100% at the interface of the high dielectric constant insulating film 7-2, that is, a silicon nitride film. On the basis of the above assumption, when the film structure on the injection side is silicon oxide film = 1 nm, silicon nitride film = 1 nm (in the case of relative dielectric constant = 7), and silicon oxide film = 5 nm, addition of nitrogen starts. The range of the silicon oxide film is a distance from the first conductive layer 3 which is a floating electrode to about 3.6 nm.

Next, as shown in FIG. 14, a high dielectric constant film 7-2, which is a metal oxide having a high dielectric constant, is formed on the silicon oxide film 7-1 to a thickness of about 1 to 20 nm, and a silicon oxide film 7- 3 is formed to a thickness of about 1 to 10 nm, and the structure sectional view of FIG.

Then, as shown in FIG. 15, the second conductive layer 8 is formed on the second insulating film 7 which is an interelectrode insulating film. The second conductive layer 8 becomes a control gate electrode. After patterning the control electrode by exposure drawing, a semiconductor device is obtained through a normal post-process.

Here, the high dielectric constant insulating film in the interelectrode insulating film described in the present embodiment will be described. Silicon nitride (Si3N4) film with a relative dielectric constant of about 7, aluminum oxide (Al2O3) film with a relative dielectric constant of about 8, magnesium oxide (MgO) film with a relative dielectric constant of about 10, dielectric constant Yttrium oxide (Y2O3) film with a dielectric constant of about 16, hafnium oxide with a relative dielectric constant of about 22 (Hf
Any one single layer film of O2) film, zirconium oxide (ZrO2) film and lanthanum oxide (La2O3) can be used.

Furthermore, hafnium silicate (HfSiO) film and hafnium aluminate (HfAlO)
) An insulating film made of a ternary compound such as a film may be used. That is, an oxide or nitride containing at least one element of silicon (Si), aluminum (Al), magnesium (Mg), yttrium (Y), hafnium (Hf), zirconium (Zr), and lanthanum (La) Even it can be used.

In the present embodiment, a method of manufacturing the silicon oxide film 7-1) to which nitrogen is added by the ALD method is shown, but a manufacturing method by a low pressure chemical vapor deposition method (LP-CVD method) is also good. In the LP-CVD method, dichlorosilane, nitrous oxide (N 2 O), and ammonia as a nitrogen source are reacted at a temperature of about 800 ° C. to form a silicon oxide film 7-1 to which nitrogen is added.

The amount of nitrogen to be added can be controlled by the flow rate of ammonia. In addition to the method of forming a silicon oxide film added with nitrogen by CVD film formation by simultaneous flow of a silicon raw material (dichlorosilane), an oxygen raw material (nitrogen dioxide) and a nitrogen raw material (ammonia) to be added, a silicon oxide film The same effect can be achieved by alternately laminating ultrathin layers of silicon nitride and silicon nitride.

By gradually changing the ratio between the thickness of the silicon oxide film and the thickness of the silicon nitride film, the amount of nitrogen to be added can be controlled to form the film. Since the silicon oxide film formed by this method contains chlorine, the effect of reducing the leakage current when a high electric field is applied by the trapping action of electrons is added to the effect of the present invention, and the electrical characteristics are improved.

There is also a method of adding nitrogen into the film by performing nitriding after the formation of the silicon oxide film. Nitriding includes thermal nitriding and plasma nitriding. The amount of nitrogen in the silicon oxide film is controlled by the nitriding conditions.

In any case, the film quality is improved by applying a heat treatment after the formation of the silicon oxide film added with nitrogen, and the electrical characteristics are further improved.

Further, regarding the laminated structure, the case of silicon oxide film / high dielectric constant film / silicon oxide film has been described, but the effect of the embodiment can be obtained even in other laminated structures.

For example, silicon nitride film / silicon oxide film / high dielectric constant film / silicon oxide film / silicon nitride film, silicon nitride film / silicon oxide film / silicon nitride film / silicon oxide film / silicon nitride film, etc. The effect of the present embodiment is effective even in the structure.

In the case where the lower layer of the nitrogen-added silicon oxide film is a silicon nitride film and the nitrogen distribution in the nitrogen-added silicon oxide film is as shown in FIG. 9B, the lower layer is formed when the nitrogen-added silicon oxide film is formed. By renitriding the surface of the silicon nitride film, nitrogen loss in the lower layer can be compensated.

For example, when a nitrogen source material such as ammonia is first circulated at the start of the formation of a silicon oxide film to which nitrogen is added, nitrogen loss in the lower silicon nitride film can be compensated. By doing so, the film quality of the silicon nitride film is improved and the dielectric constant is also increased, so that the electrical characteristics of the interelectrode insulating film are improved.

In this embodiment, an example related to a nonvolatile semiconductor memory device having a floating gate electrode has been described. However, even a semiconductor device having another structure has the same effect as long as it is an element having a similar stacked structure. Needless to say. Even in a nonvolatile semiconductor memory device using a trap in an insulating film generally known as MONOS, the effectiveness can be realized by applying the present invention to a block insulating film formed on an upper layer of a charge storage layer, for example.

Sectional drawing of the semiconductor device by this Embodiment 1. The figure which shows the depth direction distribution of the nitrogen concentration in the silicon oxide film by this Embodiment 1. The figure which shows the band of the silicon oxide film at the time of the high electric field application by this Embodiment 1 The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 1. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 1. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 1. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 1. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 1. The figure which shows the depth direction distribution of the nitrogen concentration in the silicon oxide film by this Embodiment 2. The figure which shows the band of the silicon oxide film at the time of the high electric field application by this Embodiment 2 The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 2. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 2. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 2. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 2. The figure which shows a part of manufacturing process of the semiconductor device by this Embodiment 2.

Explanation of symbols

1 ... Silicon substrate, 2 ... First insulating film, 3 ... First conductive layer, 4 ... Silicon nitride film, 5 ... Silicon oxide film, 6 ... ... element isolation region, 7 ... second insulating film, 7-1 ... recon oxide film, 7-2 ... high dielectric constant insulating film, 7-3 ... silicon Oxide film, 8 ... second conductive layer, 9 ... interlayer insulation film

Claims (5)

A semiconductor substrate;
A first insulating film formed on the semiconductor substrate;
A charge storage layer formed on the first insulating film;
A semiconductor device comprising: a second insulating film formed on the charge storage layer; and a control electrode formed on the second insulating film, wherein the second insulating film includes nitrogen in the film. A first silicon oxide film added to
An intermediate insulating film formed on the lower silicon oxide film and having a relative dielectric constant of 7 or more;
A nonvolatile semiconductor memory device comprising a second silicon oxide film formed on the intermediate insulating film. A semiconductor substrate;
A first insulating film formed on the semiconductor substrate;
A charge storage layer formed on the first insulating film;
A non-volatile semiconductor storage device comprising a second insulating film formed on the charge storage layer and a control electrode formed on the second insulating film, wherein the second insulating film is a lower layer Formed on the first silicon nitride film and the first silicon nitride film, and formed on the silicon oxide film to which nitrogen is added and the first silicon oxide film, and has a relative dielectric constant. 7 or more intermediate insulating films, a second silicon oxide film formed on the intermediate insulating film,
A non-volatile semiconductor memory device, comprising: a second silicon nitride film formed on the silicon oxide film. 2. The distribution in the depth direction of nitrogen in the silicon nitride film to which nitrogen is added is low on the floating gate electrode side and high on the intermediate insulating film side in the silicon oxide film.
Or the non-volatile semiconductor memory device of 2. Forming a first insulating film on the semiconductor substrate;
Forming a charge storage layer on the first insulating film;
Forming a second insulating film on the charge storage layer;
Forming a control electrode on the second insulating film, and a method for manufacturing a nonvolatile semiconductor memory device,
The second insulating film is formed by adding nitrogen to the lower first silicon oxide film to form an intermediate insulating film having a relative dielectric constant of 7 or more on the first silicon oxide film. A method of manufacturing a nonvolatile semiconductor memory device, comprising: forming an upper second silicon oxide film formed on the silicon oxide film; and forming the silicon oxide film by an ALD method. Forming a first insulating film on the semiconductor substrate;
Forming a charge storage layer on the first insulating film;
Forming a second insulating film on the charge storage layer;
Forming a control electrode on the second insulating film, and a method for manufacturing a nonvolatile semiconductor memory device,
The second insulating film forms a lower first silicon nitride film layer, forms a silicon oxide film to which nitrogen is added on the first silicon nitride film, and compares the second insulating film with the lower silicon oxide film. Dielectric constant
7 or more intermediate insulating films are formed, an upper second silicon oxide film formed on the intermediate insulating film is formed, a silicon nitride film is formed on the second silicon oxide film, and the silicon oxide film is formed. A method of manufacturing a nonvolatile semiconductor memory device, wherein the film is formed by an ALD method.

Images