JP2009260619A - Distribution type amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a distribution type amplifier of a small layout area. <P>SOLUTION: The distribution type amplifier includes: a plurality of first lines 1 arranged in parallel to each other and respectively configuring the primary side of a slab type transformer; a plurality of second lines 2 alternately arranged in parallel to the plurality of first lines 1 and respectively configuring the secondary side of the slab type transformer; connection wiring 5 for serially connecting the plurality of second lines 2 to an output terminal 6; and N-type transistors 3 and 4 provided corresponding to the respective first lines 1, for amplifying differential input signals +Vin and -Vin and supplying them to the corresponding first lines 1. Thus, since the plurality of slab type transformers are arranged in parallel, the layout area can be small. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a distributed amplifier, and more particularly to a distributed amplifier that performs power combining by connecting a plurality of slab transformers in series.

  In recent years, distributed amplifiers have attracted attention as high-power amplifiers using CMOS transistors with low drain breakdown voltage. For example, Patent Document 1 discloses a distributed amplifier that synthesizes power using outputs of four differential amplifiers using four slab transformers arranged in a ring shape.

As a method for increasing the output of such a distributed amplifier, there are a first method for increasing the output of the differential amplifier at each stage and a second method for increasing the number of stages of the differential amplifier. The first method is limited by the breakdown voltage of the CMOS transistor included in the differential amplifier, and has an upper limit. Although there is an example in which the cascode connection is applied to the differential amplifier to reduce the voltage applied to the CMOS transistor, there is a limit to increasing the output because the power supply voltage is limited in the IC. Therefore, the second method of increasing the number of stages of the differential amplifier is most effective for increasing the output of the distributed amplifier.
JP 2005-503679 Gazette

  However, in the distributed amplifier of Patent Document 1, since a plurality of slab transformers are arranged in a ring shape, there is a problem that the layout area increases when the number of differential amplifiers is increased. Although it is conceivable to reduce the size of the slab type transformer as a method for suppressing the increase in layout area, the length of the slab type transformer is related to the power transmission efficiency from the primary side to the secondary side. Is required.

  Therefore, a main object of the present invention is to provide a distributed amplifier having a small layout area.

  A distributed amplifier according to the present invention is a distributed amplifier that amplifies an input signal and outputs the amplified signal to an output terminal, and includes a plurality of first lines, a plurality of second lines, a connection wiring, an amplifier circuit, Is provided. The plurality of first lines are arranged in parallel to each other, and each constitutes a primary side of the slab transformer. The plurality of second lines are alternately arranged in parallel with the plurality of first lines, and each constitutes a secondary side of the slab transformer. The connection wiring connects a plurality of second lines in series with the output terminal. The amplifier circuit is provided corresponding to each first line, amplifies the input signal, and applies the amplified signal to the corresponding first line.

  Another distributed amplifier according to the present invention is a distributed amplifier that amplifies an input signal and outputs the amplified signal to an output terminal, and includes a plurality of first lines, a plurality of second lines, a connection wiring, And an amplifier circuit. The plurality of first lines are arranged in parallel to each other, and each constitutes a primary side of the slab transformer. The plurality of first lines are grouped in advance two by two to form a plurality of first line groups, and one ends of the two first lines belonging to each first line group are connected to each other. Yes. The plurality of second lines are alternately arranged in parallel with the plurality of first line groups, and each constitutes a secondary side of the slab transformer. The connection wiring connects a plurality of second lines in series with the output terminal. The amplifier circuit is provided corresponding to each first line group, amplifies the input signal, and applies it between the other ends of the two corresponding first lines.

  In the distributed amplifier according to the present invention, since all of the first and second lines of the plurality of slab transformers are arranged in parallel, the layout is compared with the conventional arrangement in which the plurality of slab transformers are arranged in a ring shape. The area can be reduced.

[Embodiment 1]
1 is a top view showing a layout of a distributed amplifier according to a first embodiment of the present invention. In FIG. 1, this distributed amplifier includes a plurality (four in the figure) of first lines 1 and a plurality (five in the figure) of second lines 2 formed on a substrate (not shown). Prepare. A plurality of conductive layers are laminated on the surface of the substrate while being insulated from each other. The plurality of first lines 1 and the plurality of second lines 2 are formed of the first conductive layer among the plurality of conductive layers, are arranged in parallel to each other, and are alternately arranged. Each of the first and second lines 1 and 2 is a distributed constant type line. The first line 1 constitutes the primary side of the slab type transformer, and the second line 2 constitutes the secondary side of the slab type transformer. Accordingly, one first line 1 and two second lines 2 adjacent to it constitute one slab type transformer. In this way, by sandwiching one first line 1 between two second lines 2, power is efficiently transmitted from the first line 1 to the second line 2.

  Each first line 1 is provided with N-type MOS transistors 3 and 4 serving as amplifier circuits. N-type MOS transistor 3 is connected between one end of first line 1 and the ground voltage GND line, and has a gate receiving input signal + Vin. The N-type MOS transistor 4 is connected between the other end of the first line 1 and the ground voltage GND line, and has a gate receiving a signal −Vin having a phase opposite to that of the input signal + Vin. That is, a differential signal is input to both ends of the slab type transformer. This amplifier circuit is not limited to the N-type MOS transistors 3 and 4. For example, the signal + Vin is obtained by modulating a sine wave signal having a frequency of about 900 M to 5 GHz according to the standard.

  A power supply voltage Vd is applied to the center of each first line 1. It is preferable to connect one end of the bonding wire to the center of the first line 1 and apply the power supply voltage Vd from the other end of the bonding wire. Alternatively, the power supply wiring is formed of a conductive layer different from the first conductive layer constituting the first line 1, and the power supply wiring and the central portion of the first line 1 are connected by a through hole. A power supply voltage Vd may be applied.

  The plurality of second lines 2 are connected in series by a connection wiring 5 between the output terminal 6 and the line of the ground voltage GND. Specifically, the lower end of the second line 2 at the left end in FIG. 1 is connected to the line of the ground voltage GND, and the upper end of each second line 2 is the lower end of the second line 2 at the right side in FIG. The upper end of the second line 2 at the right end in FIG. 1 is connected to the output terminal 6. The connection wiring 5 is formed of a second conductive layer different from the first conductive layer among the plurality of conductive layers.

  In this way, the first and second lines 1 and 2 and the connection wiring 5 are formed of different conductive layers because the second line 2 and the connection wiring 5 through which currents having components in different directions flow are the same. This is because if the conductive layer is formed, the signal transmitted from the first line 1 to the second line 2 is attenuated, and the amplification factor is lowered. Therefore, in the region where the second line 2 and the connection wiring 5 are at right angles, it is not always necessary to form the second line 2 and the connection wiring 5 with different conductive layers. Further, when the second conductive layer in which the connection wiring 5 is formed is farther from the first conductive layer in which the second line 2 is formed, signal attenuation in the second line 2 is less likely to occur. .

  In this distributed amplifier, in order to further reduce the influence of the connection wiring 5 on the second line 2, the shield layer 7 is disposed between the connection wiring 5 and the first and second lines 1 and 2. The shield layer 7 is fixed at a constant potential. Thereby, the shielding effect of the shield layer 7 is improved. The shield layer 7 is formed of a third conductive layer between the first and second conductive layers of the plurality of conductive layers on the substrate. In order to sufficiently prevent mutual interference between the first and second lines 1 and 2 and the connection wiring 5, the size of the shield layer 7 is set so that the first and second lines 1 and 2 are arranged. It is necessary to make the area larger than any of the area and the area where the connection wiring 5 is disposed. The shield layer 7 may be formed in a mesh shape, or a plurality of slits may be formed in the shield layer 7.

  Next, the operation of this distributed amplifier will be described. When the signal + Vin is input to the gate of each N-type MOS transistor 3 and the signal −Vin having a phase opposite to that of the signal + Vin is input to the gate of each N-type MOS transistor 4, each first line 1 is a slab type transformer 1. A signal obtained by amplifying the differential signal 2Vin is generated between both ends of each first line 1 functioning as a secondary side. The signal of the first line 1 is transmitted to the second line 2 that functions as the secondary side of the slab transformer. Since the plurality of second lines 2 are connected in series between the output terminal 6 and the ground voltage GND line by the connection wiring 5, the signal generated in the plurality of second lines 2 is connected to the output terminal 6. A signal Vout is synthesized.

  In the first embodiment, since all of the first and second lines 1 and 2 of the plurality of slab type transformers are arranged in parallel, compared to the conventional case where the plurality of slab type transformers are arranged in a ring shape, The layout area can be reduced.

  Note that when a capacitor is connected between stages, a capacitor having an MIM structure may be formed using two conductive layers, or a capacitor may be formed using a junction capacitance in a substrate. Also, the capacitor can be easily connected between stages using a conductive layer different from the conductive layer used in the distributed amplifier of FIG.

  In the first embodiment, the four-stage distributed amplifier has been described. However, by increasing the number of basic units including the first and second lines 1 and 2 and the N-type MOS transistors 3 and 4, A distributed amplifier having a five-stage configuration or more can be easily configured. Hereinafter, various modifications of the first embodiment will be described.

  2, choke inductors 8 are provided corresponding to the respective N-type MOS transistors 3, and choke inductors 9 are provided corresponding to the respective N-type MOS transistors 4. One terminal of each choke inductor 8 receives power supply voltage Vd, and the other terminal is connected to the drain of the corresponding N-type MOS transistor 3. One terminal of each choke inductor 9 receives power supply voltage Vd, and the other terminal is connected to the drain of the corresponding N-type MOS transistor 4.

  That is, in the first embodiment, the power supply voltage Vd is supplied to the central portion of the first line 1 via a bonding wire or the like, whereas in this modification, the power supply voltage Vd is supplied via the choke inductors 8 and 9. This is supplied to the drains of the N-type MOS transistors 3 and 4. Therefore, in this modified example, it is not necessary to form a pad for connecting a bonding wire on the first line 1, so that the line width of the first line 1 can be reduced and the layout area is further reduced. Can be

  In the modified example of FIG. 3, the drains of all N-type MOS transistors 3 are commonly connected, and one choke inductor 8 is provided in common to all N-type MOS transistors 3. The power supply voltage Vd is applied to one terminal of the choke inductor 8, and the other terminal 8 is connected to the drain of the all N-type MOS transistor 3. The drains of all N-type MOS transistors 4 are connected in common, and one choke inductor 9 is provided in common to all N-type MOS transistors 4. The power supply voltage Vd is applied to one terminal of the choke inductor 9, and the other terminal 9 is connected to the drain of the all N-type MOS transistor 4. In this modified example, the number of choke inductors 8 and 9 can be reduced compared to the modified example of FIG. Therefore, when the choke inductors 8 and 9 are formed on-chip, the chip area can be reduced. Further, when the choke inductors 8 and 9 are external parts, the number of parts can be reduced.

  Further, in the modified example of FIG. 4, the portion of the connection wiring 5 that connects the upper end in the drawing of each second line 2 and the lower end of the second line 2 on the right side thereof is the first and second 2 are arranged obliquely with respect to the lines 1 and 2. As the angle between the connection wiring 5 and the first and second lines 1 and 2 is closer to 90 degrees, the influence of the connection wiring 5 on the first and second lines 1 and 2 is reduced.

  Further, in the modified example of FIG. 5, the portion of the connection wiring 5 that connects the upper end in the drawing of each second line 2 and the lower end of the second line 2 on the right side thereof is a right-angle wiring part 5 a. And diagonal wiring portions 5b and 5c. The right-angle wiring portion 5 a is disposed at a right angle with respect to the center portion of the first line 1. The diagonal wiring portion 5b is connected between the upper end of the left second line 2 and the right end of the right-angle wiring portion 5a. The diagonal wiring portion 5c is connected between the left end of the right-angle wiring portion 5a and the lower end of the left second line 2. By providing the right-angle wiring portion 5a in this way, the angle between the oblique wiring portions 5b and 5c and the first and second lines 1 and 2 can be brought close to 90 degrees, and the first and second lines The influence of the connection wiring 5 on 1 and 2 can be reduced.

  A plurality of right-angle wiring portions 5a are arranged in the length direction of the first line 1, and a plurality of right-angle wiring portions are provided between the upper end of the second line 2 on the left side and the lower end of the second line 2 on the right side. You may connect to a zigzag via 5a. The greater the number of right-angle wiring portions 5a, the closer the angle between the oblique wiring portions and the first and second lines 1 and 2 approaches 90 degrees.

[Embodiment 2]
FIG. 6 is a top view showing a layout of a distributed amplifier according to the second embodiment of the present invention. In FIG. 6, this distributed amplifier includes a plurality (four in the figure) of first lines 1 and a plurality (three in the figure) of second lines 2 formed on a substrate (not shown). Prepare. The plurality of first lines 1 and the plurality of second lines 2 are formed of a conductive layer on the surface of the substrate and are arranged in parallel to each other. Each of the first and second lines 1 and 2 is a distributed constant type line. The plurality of first lines 1 are grouped in advance two by two to form a plurality (two in the figure) of first line groups. The plurality of first line groups and the plurality of second lines 2 are alternately arranged. In FIG. 6, two first line groups are arranged between the three second lines 2.

  The first line 1 constitutes the primary side of the slab type transformer, and the second line 2 constitutes the secondary side of the slab type transformer. Therefore, the first line 1 and the second line 2 adjacent thereto constitute one slab type transformer. The second line 2 is not provided in the region between the two first lines 1 belonging to the same first line group. The interval between the two first lines 1 of the same first line group is determined according to the power supplied to the first line 1 and is set widely in the case of high power, and in the case of minute power. It is set narrowly. This is because currents in different directions flow through the two first lines 1 of the same first line group, so that the power transmitted to the second line 2 is weakened.

  One ends of the two first lines 1 of each first line group are connected to each other by the connection wiring 10 and receive the power supply voltage Vd. Further, N-type MOS transistors 3 and 4 serving as amplifier circuits are provided at the other ends of the two first lines 1 of each first line group. The N-type MOS transistor 3 is connected between the other end of the first line 1 of one of the two first lines 1 (right side in the figure) and the line of the ground voltage GND, and the gate thereof is input. Receives signal + Vin. The N-type MOS transistor 4 is connected between the other end of the first line 1 on the other (left side in the figure) of the two first lines 1 and the line of the ground voltage GND, and the gate thereof is input. A signal −Vin having a phase opposite to that of the signal + Vin is received.

  The plurality of second lines 2 are connected in series by a connection wiring 11 between the output terminal 6 and the line of the ground voltage GND. Specifically, the lower end of the second line 2 at the left end in FIG. 6 is connected to the line of the ground voltage GND, and the upper end of the second line 2 is the upper end of the center second line 2 in FIG. Connected to. The lower end of the central second line 2 is connected to the lower end of the right second line 2 in FIG. 6, and the upper end is connected to the output terminal 6. Therefore, a signal Vout obtained by synthesizing signals generated on the plurality of second lines 2 is output to the output terminal 6.

Also in this second embodiment, the same effect as in the first embodiment can be obtained.
In the second embodiment, the first and second lines 1 and 2 can be shortened because a single-stage amplifier is configured by using the two first lines 1. It is. However, the area reduction effect is slightly inferior to that of the first embodiment. On the other hand, since one end of the two second lines 2 or the other end of the two second lines 2 may be connected, the connection wiring 11 can be shortened. Further, the power supply voltage Vd can be easily supplied.

  In the modification of FIG. 7, the shield layer 12 is provided between the two first lines 1 of each first line group. The shield layer 12 is formed of the same conductive layer as the first and second lines 1 and 2 and is fixed at a constant potential. In this modification, the shield layer 12 can reduce mutual interference between the two first lines 1 of each first line group.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is a top view which shows the layout of the distributed amplifier by Embodiment 1 of this invention. 5 is a diagram illustrating a modification example of the first embodiment. FIG. It is a figure which shows the other example of a change of Embodiment 1. FIG. FIG. 10 is a diagram showing still another modification example of the first embodiment. FIG. 10 is a diagram showing still another modification example of the first embodiment. It is a top view which shows the layout of the distributed amplifier by Embodiment 2 of this invention. It is a figure which shows the example of a change of Embodiment 2. FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 1st track | line, 2nd track | line, 3,4 N-type MOS transistor, 5, 10, 11 connection wiring, 5a Right angle wiring part, 5b, 5c Diagonal wiring part, 6 Output terminal, 7, 12 Shield layer, 8,9 Choke inductor.

Claims (11)

A distributed amplifier that amplifies an input signal and outputs it to an output terminal,
A plurality of first lines arranged parallel to each other, each of which constitutes a primary side of a slab transformer;
A plurality of second lines arranged alternately in parallel with the plurality of first lines, each constituting a secondary side of the slab transformer;
A connection wiring for connecting the plurality of second lines in series to the output terminal;
A distributed amplifier comprising: an amplifier circuit provided corresponding to each first line and amplifying the input signal and supplying the amplified input signal to the corresponding first line. The distributed amplifier is formed on a substrate;
A plurality of conductive layers are laminated on the surface of the substrate,
The first and second lines are formed of a first conductive layer of the plurality of conductive layers,
The distributed amplifier according to claim 1, wherein the connection wiring is formed of a second conductive layer different from the first conductive layer among the plurality of conductive layers.   The distributed amplifier according to claim 2, wherein at least a part of the connection wiring is disposed obliquely with respect to the first and second lines.   4. The distributed amplifier according to claim 2, wherein at least a part of the connection wiring is disposed at right angles to the first and second lines. 5. Furthermore, a shield layer provided between the first and second lines and the connection wiring,
5. The shield layer according to claim 2, wherein the shield layer is formed of a third conductive layer between the first and second conductive layers of the plurality of conductive layers. 6. Distributed amplifier. The amplifier circuit is
A first transistor connected between one end of the corresponding first line and a reference voltage line, the gate of which receives the input signal;
6. The second transistor connected between the other end of the corresponding first line and the reference voltage line, the second transistor receiving a signal whose phase is opposite to that of the input signal. The distributed amplifier according to any one of the above.   The distributed amplifier according to claim 6, wherein a power supply voltage of the amplifier circuit is applied to a central portion of each first line. A first choke inductor that applies a power supply voltage of the amplifier circuit to a drain of the first transistor;
The distributed amplifier according to claim 6, further comprising: a second choke inductor that applies a power supply voltage of the amplifier circuit to a drain of the second transistor. A distributed amplifier that amplifies an input signal and outputs it to an output terminal,
Arranged in parallel to each other, each comprising a plurality of first lines constituting the primary side of the slab transformer,
The plurality of first lines are grouped in advance two by two to form a plurality of first line groups, and one ends of the two first lines belonging to each first line group are connected to each other. ,
Furthermore, a plurality of second lines arranged alternately in parallel with the plurality of first line groups, each constituting a secondary side of the slab transformer,
A connection wiring for connecting the plurality of second lines in series to the output terminal;
A distributed amplifier comprising an amplifier circuit provided corresponding to each first line group and amplifying the input signal between the other ends of the two corresponding first lines.   The distributed amplifier according to claim 9, further comprising a shield layer provided corresponding to each first line group and disposed between the corresponding two first lines. The amplifier circuit is
It is provided corresponding to one of the two corresponding first lines, connected between the other end of the corresponding first line and the reference voltage line, and its gate is A first transistor for receiving an input signal;
It is provided corresponding to the other first line of the two corresponding first lines, connected between the other end of the corresponding first line and the line of the reference voltage, and the gate thereof is A second transistor for receiving an input signal and an antiphase signal;
The distributed amplifier according to claim 9 or 10, wherein the power supply voltage of the amplifier circuit is applied to the other ends of the two corresponding first lines.

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