JP2009253423A - Waveform compensation circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a waveform compensation circuit which does not require a high impedance line and has a waveform compensation function of not bringing about a waveform deterioration due to over-compensation even in the case of a line length with a less loss, in high speed signal transmission. <P>SOLUTION: The waveform compensation circuit includes: a first transmission line 2a; an inductor 6 connected to a terminal part of the first transmission line; a second transmission line 2b which has one end connected to the terminal part of the first transmission line through the inductor and has a delay time being half a one-bit width of a digital data pattern to be transmitted and a characteristic impedance being almost the same as the first transmission line; a resistance 5 connected between the other end of the second transmission line and a ground 100; and a diode 4 which is connected in parallel to the resistance and has a direction from the second transmission line to the ground as the forward direction. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a waveform compensation circuit that compensates for waveform distortion caused by frequency-dependent attenuation of a transmission line.

  In order to cope with waveform distortion due to attenuation of the frequency dependence of the transmission line that has become apparent with the recent increase in signal transmission rate, the frequency dependence of the transmission line is made using a termination circuit composed of a transmission line with high characteristic impedance. There has been proposed a waveform compensation circuit that configures a circuit having a characteristic that cancels the waveform and compensates the waveform by flattening the frequency dependence (see, for example, Patent Document 1).

JP 2006-270935 A

  The conventional waveform compensation circuit is intended to compensate for waveform distortion due to frequency-dependent attenuation of the transmission line, but it is a principle that uses reflection due to impedance mismatch, so it is very high when trying to increase the compensation effect A characteristic impedance line is required, which makes it difficult to manufacture the substrate. Further, when the attenuation is small, such as when the length of the transmission line is short, there is a problem that the flatness of the frequency characteristics is impaired by the waveform compensation circuit, and conversely the waveform deteriorates. For this reason, it has been difficult to apply to a system in which the wiring length changes due to operation such as transmission using a cable or transmission using a backplane.

  The present invention has been made to solve the above-described problems, and in high-speed signal transmission, a high impedance line is not required, and waveform compensation that does not cause waveform deterioration due to overcompensation even for a line length with little loss. An object is to obtain a waveform compensation circuit having a function.

  The waveform compensation circuit according to the present invention has a first transmission line, an inductor connected to the terminal end of the first transmission line, and one end connected to the terminal end of the first transmission line via the inductor. A second transmission line having a delay time half the 1-bit width of the transmitted digital data pattern and a characteristic impedance comparable to that of the first transmission line, the other end of the second transmission line, and a ground And a diode connected in parallel to the resistor and having a forward direction from the second transmission line toward the ground.

  Also, one end is connected to the first transmission line and a terminal portion of the first transmission line, and the delay time is half the 1-bit width of the digital data pattern to be transmitted, and characteristics comparable to those of the first transmission line. A second transmission line having an impedance; a resistor connected between the other end of the second transmission line and the ground; and a parallel connection to the resistor, and a direction from the second transmission line toward the ground. And a diode whose forward direction is.

  Also, one end is connected to the first transmission line and a terminal portion of the first transmission line, and a delay time that is half the 1-bit width of the transmitted digital data pattern and a characteristic impedance higher than that of the first transmission line are provided. A second transmission line having a resistance, a resistor connected between the other end of the second transmission line and the ground, and a resistor connected in parallel to each other in order from the second transmission line toward the ground. And a diode as a direction.

Furthermore, the first transmission line, the inductor connected to the terminal end of the first transmission line, and digital data transmitted at one end connected to the terminal end of the first transmission line via the inductor A second transmission line having a delay time of half the 1-bit width of the pattern and a characteristic impedance comparable to that of the first transmission line; and a second transmission line connected between the other end of the second transmission line and the ground. 1 resistor, a diode having a forward direction from the connection portion of the inductor and the second transmission line to the ground, and a second resistor connected between the diode and the ground. It is provided.

  According to the present invention, in high-speed signal transmission, it is possible to obtain a waveform compensation circuit having a waveform compensation function that does not require a high impedance line and does not cause waveform degradation due to overcompensation even for a line length with little loss.

Embodiment 1 FIG.
1 is a block diagram showing a waveform compensation circuit according to Embodiment 1 of the present invention. The waveform compensation circuit shown in FIG. 1 includes a transmission line 2a provided between a driver 1 that transmits a signal and a receiver 3, and an inductor 6 that is connected to an input end of the receiver 3 that is a terminal portion of the transmission line 2a. One end of the transmission line 2a is connected to the end of the transmission line 2a through the inductor 6, and a wiring length having a characteristic impedance equivalent to that of the transmission line 2a and a delay time corresponding to half of the 1-bit width of the transmitted digital data. A transmission line 2b, a resistor 5 connected between the other end of the transmission line 2b and the ground 100, a diode 4 connected in parallel to the resistor 5 and having a forward direction from the transmission line 2b toward the ground 100, It has.

  Next, the operation will be described. The data pattern transmitted from the driver 1 reaches the receiver 3 via the transmission line 2a. Since the transmission line 2a has a frequency-dependent loss such as a conductor loss or a dielectric loss, the signal reaching the receiver 3 is deteriorated. The deterioration of the signal mainly appears in the form that the rising edge of the transition bit is dull. The incident signal is transmitted to the transmission line 2b via the inductor 6, but when the signal is a transition bit by the inductor 6, a part of the signal is specularly reflected. The reflected signal overlaps with the incident signal at the receiving end of the receiver 3 to sharpen the rise. This improves the waveform.

  Further, the signal transmitted to the transmission line 2b reaches the terminal portion where the resistor 5 and the diode 4 are connected in parallel. The diode 4 has a high impedance for a small voltage signal and is terminated by a resistor 5 connected in parallel. A large voltage signal becomes conductive and short-circuited to the ground, and negative reflection occurs. The negative reflected wave returns to the receiver 3 through the transmission line 2b. Since the delay time of the transmission line 2b is half of 1 bit, the arrival of the negative reflected wave is delayed by exactly 1 bit from the first incident wave. That is, there is an effect of reducing the signal voltage of the next bit with respect to a large voltage signal. The waveform deterioration of the transmission line 2a tends to prevent the signal voltage of the next bit from being lowered when a bit transition occurs next to a signal of a large voltage, and this is caused by a negative reflected wave having characteristics opposite to this. Waveform deterioration can be compensated.

  As described above, since the waveform deteriorated by the regular reflection by the inductor 6 and the negative reflection by the diode 4 is compensated, the waveform compensation which is easy to manufacture without requiring a high impedance line like the conventional waveform compensation circuit. A circuit can be realized. In addition, since the negative reflection having a magnitude corresponding to the incident voltage is generated by using the diode 4, the effect is greater than the configuration using the conventional fixed impedance mismatch. Moreover, since a high impedance line becomes unnecessary, it becomes easy to use a high dielectric constant material in constituting the transmission line 2b. By using a high dielectric constant material, the physical length of the transmission line 2b can be shortened by shortening the wavelength, and the circuit can be miniaturized.

Embodiment 2. FIG.
2 is a block diagram showing a waveform compensation circuit according to Embodiment 2 of the present invention. The waveform compensation circuit according to the second embodiment shown in FIG. 2 has a configuration in which the inductor 6 is removed from the configuration diagram of FIG. Since the regular reflection by the inductor 6 is eliminated, the effect is lower than that of the first embodiment, but in addition to the advantage that the number of parts can be reduced, the waveform compensation effect by the negative reflection effect by the diode 4 can be expected.

  Further, in this configuration diagram, if the characteristic impedance of the transmission line 2b is made higher than that of the transmission line 2a, regular reflection and negative reflection equivalent to those of the prior art occur, and further negative reflection by the diode 4 is added. A better waveform compensation effect than the prior art can be obtained.

Embodiment 3 FIG.
FIG. 3 is a block diagram showing a waveform compensation circuit according to Embodiment 3 of the present invention. The waveform compensation circuit according to the third embodiment shown in FIG. 3 has a configuration in which the connection position of the diode 4 is closer to the receiver 3 of the transmission line 2b in the configuration diagram of FIG. The resistance value of the resistor 5 is assumed to be lower than the characteristic impedance of the transmission line 2b. The waveform is compensated by the regular reflection by the inductor 6 and the negative reflection of the resistor 5, and the diode 4 becomes conductive for an incident signal having a large amplitude of a certain level or more and a part of the signal is provided between the diode 4 and the ground 100. The signal that is terminated by the resistor 5a and transmitted to the transmission line 2b becomes small, and the reflected wave by the resistor 5 becomes small.

  As described above, since the termination combining the diode 4 and the resistor 5a is attached from the receiver 3 of the transmission line 2a, when the loss of the transmission line 2a is small, waveform deterioration occurs in a general waveform compensation circuit. With the configuration in which a part of the incident wave is terminated according to the amplitude of the incident wave, a waveform compensation circuit in which overcompensation hardly occurs can be realized.

Embodiment 4 FIG.
4 is a block diagram showing a waveform compensation circuit according to Embodiment 4 of the present invention. The waveform compensation circuit according to the fourth embodiment shown in FIG. 4 is suitable for the terminal portion including the diode 4 by inserting a capacitor 7 between the transmission line 2a and the connection portion of the inductor 6 in the configuration diagram of FIG. The bias circuit 8 is connected. The DC component of the signal can be removed by the capacitor 7 and the DC component applied to the diode can be adjusted by the bias circuit 8.

  With the above configuration, the waveform compensation circuit can be realized even under a condition where the DC component of the original incident signal is greatly different from the voltage switched by the diode 4.

Embodiment 5 FIG.
5 is a block diagram showing a waveform compensation circuit according to Embodiment 5 of the present invention. The waveform compensation circuit according to the fifth embodiment shown in FIG. 5 is obtained by reversing the direction of the diode 4 in the configuration diagram of FIG. The diode 4 has a property that current hardly flows at a reverse voltage below the reverse breakdown region, and a current flows rapidly when the reverse voltage exceeds the reverse breakdown region. That is, the fifth embodiment can also perform waveform compensation similar to that of the first embodiment in which the reference value of the signal is different. Note that the fifth embodiment is obtained by reversing the direction of the diode 4 in the configuration of the first embodiment, but can be similarly applied to other embodiments 2-4.

Embodiment 6 FIG.
6 is a block diagram showing a waveform compensation circuit according to Embodiment 6 of the present invention. The waveform compensation circuit according to the sixth embodiment shown in FIG. 6 is obtained by adding a diode 4b in the reverse direction to the diode 4a in parallel in the configuration diagram of FIG. When the voltage of the incident signal is near 0, both the diodes 4a and 4b have high impedance, the signal is terminated by the resistor 5, and no reflection occurs. When the incident signal deviates from 0 to some extent, one of the diodes 4a and 4b becomes conductive and negative reflection occurs. In addition, although this Embodiment 6 adds the diode 4b of the reverse direction with respect to the diode 4a in parallel in the structure of Embodiment 1, it adds similarly to other Embodiment 2-4. Applicable.

  As described above, since the diodes having different directions are connected in parallel, a waveform compensation effect can be realized for a digital signal in which a voltage is applied positively or negatively around 0V.

Embodiment 7 FIG.
7 is a block diagram showing a waveform compensation circuit according to Embodiment 7 of the present invention. The waveform compensation circuit according to the seventh embodiment shown in FIG. 7 is obtained by replacing the diode 4 with the capacitor 10 in the configuration diagram of FIG. The regular reflection by the inductor 6 and the negative reflection of the capacitor 10 have an effect of compensating the waveform in the same manner as the conventional configuration examples. Furthermore, since the capacitor 10 can be realized by a substrate pattern or the like, the cost can be reduced.

It is a block diagram which shows the waveform compensation circuit which concerns on Embodiment 1 of this invention. It is a block diagram which shows the waveform compensation circuit which concerns on Embodiment 2 of this invention. It is a block diagram which shows the waveform compensation circuit which concerns on Embodiment 3 of this invention. It is a block diagram which shows the waveform compensation circuit based on Embodiment 4 of this invention. It is a block diagram which shows the waveform compensation circuit based on Embodiment 5 of this invention. It is a block diagram which shows the waveform compensation circuit based on Embodiment 6 of this invention. It is a block diagram which shows the waveform compensation circuit based on Embodiment 7 of this invention.

Explanation of symbols

  1 driver, 2a, 2b transmission line, 3 receiver, 4, 4a, 4b diode, 5, 5a resistance, 6 inductor, 7 capacitor, 8 bias circuit, 10 capacitor, 100 ground.

Claims (8)

A first transmission line;
An inductor connected to a termination portion of the first transmission line;
One end of the first transmission line is connected to the end of the first transmission line via the inductor, and the delay time is half the 1-bit width of the transmitted digital data pattern and has a characteristic impedance comparable to that of the first transmission line. Two transmission lines;
A resistor connected between the other end of the second transmission line and the ground;
And a diode connected in parallel to the resistor and having a forward direction from the second transmission line toward the ground. A first transmission line;
A second transmission line having one end connected to the terminal end of the first transmission line and having a delay time half the 1-bit width of the transmitted digital data pattern and a characteristic impedance comparable to the first transmission line; ,
A resistor connected between the other end of the second transmission line and the ground;
And a diode connected in parallel to the resistor and having a forward direction from the second transmission line toward the ground. A first transmission line;
A second transmission line having one end connected to the terminal end of the first transmission line and having a delay time that is half the 1-bit width of the transmitted digital data pattern and a characteristic impedance higher than that of the first transmission line;
A resistor connected between the other end of the second transmission line and the ground;
And a diode connected in parallel to the resistor and having a forward direction from the second transmission line toward the ground. A first transmission line;
An inductor connected to a termination portion of the first transmission line;
One end of the first transmission line is connected to the end of the first transmission line via the inductor, and the delay time is half the 1-bit width of the transmitted digital data pattern and has a characteristic impedance comparable to that of the first transmission line. Two transmission lines;
A first resistor connected between the other end of the second transmission line and the ground;
A diode having a forward direction from the connecting portion between the inductor and the second transmission line toward the ground;
A waveform compensation circuit comprising: a second resistor connected between the diode and the ground. The waveform compensation circuit according to claim 1,
A capacitor inserted between the first transmission line and the termination portion;
A waveform compensation circuit, further comprising: a bias circuit connected to the termination portion. In the waveform compensation circuit according to any one of claims 1 to 5,
A waveform compensation circuit, wherein the diode is replaced in the reverse direction. In the waveform compensation circuit according to any one of claims 1 to 5,
The waveform compensation circuit, further comprising another diode connected in parallel to the diode in a direction opposite to the diode. The waveform compensation circuit according to claim 1,
A waveform compensation circuit, wherein the diode is replaced with a capacitor.

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