JP2009245500A - Magnetic storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To surely reduce a spin-polarized current by making a frequency of AC current which is superimposed on a DC current, and a natural frequency of magnetization of a magnetization free layer, completely coincident. <P>SOLUTION: A magnetic storage device includes: a magneto-resistive element 2 including a magnetization fixed layer, magnetization free layer, and a non-magnetic spacer layer disposed between the magnetization fixed layer and the magnetization free layer; a magnetic field applying section 3 for applying the magnetic field H to the magnetization free layer; and a power supply section 4 for supplying an AC-superimposed DC voltage Vdd on which the AC current is superimposed between the magnetization fixed layer and the magnetization free layer. The power supply section 4 causes the frequency of the AC current to be swept within a frequency range including the natural frequency of magnetization of the magnetization free layer for the magneto-resistive element 2. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a magnetic storage device including a magnetoresistive effect element.

  As this type of magnetic memory device, a nonvolatile magnetic memory (hereinafter also referred to as a magnetic memory device) disclosed in Japanese Patent Application Laid-Open No. 2004-179383 is known. This magnetic memory device is a magnetic random access memory (hereinafter also referred to as “MRAM: Magnetic Random Access Memory”) including a memory cell including a spin-injection magnetization reversal type storage element. A plurality of memory cells (hereinafter also referred to as memory cells) formed of a single layered structure in which a layer, a nonmagnetic layer, a second ferromagnetic layer, a tunnel barrier, and a third ferromagnetic layer are stacked in this order ing. In addition, the magnetic memory device includes a plurality of bit lines arranged in parallel and a plurality of word lines arranged so as to be orthogonal to the bit lines. The memory cells are arranged one by one, connected to the bit line at one end in the stacking direction, and connected to the word line at the other end. In this case, the first ferromagnetic layer, the nonmagnetic layer, and the second ferromagnetic layer constitute a giant magnetoresistive element, and the second ferromagnetic layer, the tunnel barrier, and the third ferromagnetic layer are tunneled. Type magnetoresistive effect element is formed. Further, of the giant magnetoresistive effect element, the first ferromagnetic layer and the nonmagnetic layer function as a spin injection magnetization switching layer, and the second ferromagnetic layer is a giant magnetoresistive effect element / tunnel type magnetoresistive effect element. The first ferromagnetic layer functions as a fixed layer of the giant magnetoresistive effect element, and the third ferromagnetic layer functions as a free layer of the tunnel type magnetoresistive effect element.

In this magnetic memory device, the magnetization direction of the second ferromagnetic layer (free layer) is changed to the third ferromagnetic layer (fixed layer) according to the direction of the write current flowing through the memory cell via the bit line and the word line. Information (1-bit information of “0” or “1”) is stored in the memory cell by arbitrarily arranging it in one of the parallel (same direction) and anti-parallel (reverse direction) to the magnetization direction. On the other hand, when reading the information stored in the memory cell, the magnitude of the current that flows when a predetermined voltage is applied to the memory cell via the bit line and the word line is detected. The resistance value of the memory cell changes depending on the magnetization direction of the second ferromagnetic layer (free layer) relative to the magnetization direction of the third ferromagnetic layer (fixed layer). Accordingly, since the magnitude of the current flowing through the memory cell also changes depending on the magnetization direction of the second ferromagnetic layer (free layer) relative to the magnetization direction of the third ferromagnetic layer (fixed layer), the magnitude of this current is detected. Thus, information stored in the memory cell can be read out.

  By the way, in order to invert the magnetization direction of the second ferromagnetic layer (free layer) as described above from an original state (in order to cause spin injection magnetization reversal), the magnetic memory device is used. It is necessary to pass a spin-polarized current having a magnitude greater than a certain threshold value for the ferromagnetic material. If the threshold value of the magnitude of the spin-polarized current necessary for causing the spin-injection magnetization reversal (hereinafter referred to as “magnetization reversal threshold value”) is large, the power consumption of the magnetic device increases and the magnetic device The problem of shortening the service life occurs.

In response to this problem, the applicant of the present application has provided a magnetization fixed layer, a magnetization free layer, and a magnetization fixed layer of a magnetoresistive effect element having a nonmagnetic spacer layer disposed between the magnetization fixed layer and the magnetization free layer. A DC current in which an AC current (an AC current having a frequency corresponding to the natural frequency in the magnetization direction of the magnetization free layer) is supplied between the magnetization free layer and a spin-polarized AC current in the magnetoresistive element is supplied. Is generated by using the precession of magnetization of the magnetization free layer induced by the spin polarization AC current, and the magnetization of the magnetization free layer with less spin polarization DC current. Find a way to reverse the direction.
Japanese Patent Laid-Open No. 2004-179383 (page 5-6, FIG. 1)

  By the way, in this method found by the applicant of the present application, as described above, it is necessary to define the frequency of the alternating current superimposed on the direct current to a frequency corresponding to the natural frequency of magnetization of the magnetization free layer. However, when the aspect ratio or crystal structure of the magnetization free layer changes due to variations in the manufacturing process, or when the strength of the magnetic field applied to the magnetization free layer from the magnetic field application unit changes, The natural frequency of the free layer magnetization also changes. For this reason, this method found by the applicant of the present application is based on the fact that the frequency of the alternating current superimposed on the direct current may not completely match the natural frequency of magnetization of the magnetization free layer. There is a problem that the pole current may not be reduced.

  The present invention has been made to solve such a problem. The frequency of the alternating current superimposed on the direct current and the natural frequency of magnetization of the magnetization free layer are completely matched to reliably reduce the spin-polarized current. It is a main object of the present invention to provide a magnetic storage device that can be used.

  To achieve the above object, a magnetic memory device according to the present invention includes a magnetoresistive layer including a magnetization fixed layer, a magnetization free layer, and a nonmagnetic spacer layer disposed between the magnetization fixed layer and the magnetization free layer. An effect element, a magnetic field applying unit that applies a magnetic field to the magnetization free layer, and a current supply unit that supplies a direct current in which an alternating current is superimposed between the magnetization fixed layer and the magnetization free layer, The current supply unit sweeps the frequency of the alternating current within a frequency range including a natural frequency of magnetization of the magnetization free layer of the magnetoresistive element.

  Further, the magnetic storage device includes a plurality of the magnetoresistive effect elements, and the current supply unit sweeps the frequency of the alternating current within a frequency range including the natural frequency for each magnetoresistive effect element.

  Further, in the magnetic storage device, the magnetic field application unit includes a permanent magnet, and maintains the strength of the magnetic field constant.

  In the magnetic memory device according to the present invention, the power supply unit sweeps (sweeps) the frequency of the AC voltage superimposed on the DC voltage within a frequency range including the natural frequency of magnetization of the magnetization free layer for the magnetoresistive effect element. ) Therefore, according to this magnetic memory device, even if the natural frequency in the precession of magnetization of the magnetization free layer varies as compared with the magnetization reversal method in which the frequency of the AC voltage is a fixed frequency, It is possible to surely induce the precession with respect to the magnetization so that the magnetization direction of the magnetization free layer can be reliably reversed by a direct current having a current value smaller than the current value when the magnetization is reversed only by the direct current.

  The magnetic storage device according to the present invention includes a plurality of magnetoresistive elements, and the current supply unit sweeps the frequency of the alternating current within a frequency range including the natural frequency for each magnetoresistive element. Therefore, according to this magnetic memory device, when all the magnetoresistive elements are subjected to the precession with respect to the magnetization of the magnetization free layer, and the magnetization direction of the magnetization free layer is reversed by only a direct current. The magnetization can be reliably reversed by a direct current having a current value smaller than the current value.

  According to the magnetic memory device of the present invention, the magnetic field applying unit is configured using a permanent magnet so that the strength of the magnetic field applied to the magnetization free layer of the magnetoresistive effect element is maintained constant. Thereby, a magnetic field application part can be comprised simply.

  First, the configuration of the magnetic storage device 1 according to the present invention will be described with reference to the drawings.

  As shown in FIG. 1, the magnetic storage device 1 includes a magnetoresistive effect element 2, a magnetic field application unit 3, and a power supply unit 4.

  As an example, the magnetoresistive effect element 2 is composed of a TMR element including a magnetization free layer 21 as shown in FIGS. Specifically, the magnetoresistive effect element 2 includes a magnetization free layer 21, a spacer layer 22, a magnetization fixed layer 23, and an antiferromagnetic layer 24, and the upper electrode 25 and the lower electrode 26 are stacked in this order. In between, the magnetization free layer 21 is connected to the upper electrode 25, and the antiferromagnetic layer 24 is connected to the lower electrode 26. In this case, the magnetization free layer 21 is made of a ferromagnetic material as a magnetosensitive layer. The spacer layer 22 is a nonmagnetic spacer layer in the present invention, and is made of an insulating nonmagnetic material and functions as a tunnel barrier layer. The spacer layer 22 is usually formed with a thickness of 1 nm or less. The lower electrode 26 is connected to the ground.

  As an example, as shown in FIG. 2, the magnetization fixed layer 23 includes a ferromagnetic layer (second magnetic layer) 23a whose magnetization direction is fixed, a nonmagnetic layer 23b made of a metal such as Cu, and a magnetization direction that is ferromagnetic. Each of the layers is laminated in this order so that the ferromagnetic layer 23c is located above the antiferromagnetic layer 24. The ferromagnetic layer 23c is fixed to be opposite to the layer 23a. Has been configured. In this case, the magnetization directions 23AM and 23CM of the pair of ferromagnetic layers 23a and 23c are set perpendicular to the thickness direction (Z-axis direction) of the magnetoresistive effect element 2. The antiferromagnetic layer 24 is exchange-coupled to the lower ferromagnetic layer 23c.

  Further, the magnetoresistive effect element 2 has a direction of the easy magnetization axis F in the magnetization free layer 21 and a magnetic field application described later, as shown in FIG. The magnetoresistive element 2 and the magnetic field so that the direction of the magnetic field H applied from the unit 3 intersects at a predetermined angle θ (preferably an angle in the range of 5 ° to 175 °) in the XY plane. The positional relationship with the application unit 3 is defined in advance.

  As an example, the magnetic field application unit 3 includes a pair of permanent magnets (for example, magnets made of platinum cobalt) 31 and 32 as shown in FIGS. The pair of permanent magnets 31 and 32 are arranged so as to sandwich the magnetization free layer 21 of the magnetoresistive element 2. In this case, as shown in the figure, the end of the permanent magnet 31 in the direction of the magnetoresistive element 2 reaches the vicinity of one side surface of the magnetization free layer 21 of the magnetoresistive element 2. The permanent magnet 32 also has an end portion side in the direction of the magnetoresistive effect element 2 reaching the vicinity of the other side surface of the magnetization free layer 21 of the magnetoresistive effect element 2. With this configuration, the magnetic field application unit 3 applies a magnetic field H having a constant strength to the magnetization free layer 21.

The power supply unit 4 includes a power supply unit 41 for generating a write current, a power supply unit 42 for generating a read current, output control buffers 43 and 44, and a buffer selection unit 45. In this example, the power supply unit 41 for generating a write current includes DC power supplies 41a and 41b, an AC power supply 41c, a switch 41d, and a capacitor 41e. In this case, the DC power supplies 41a and 41b are connected such that the output voltage V _DCW is regulated to the same voltage and are opposite in polarity to the input terminal of the output control buffer 43, and either one is switched by the switch 41d. The output voltage V _DCW is selectively output to the control buffer 43 as the DC voltage V _DCW . When either one of the DC power sources 41a and 41b is selected by the switch 41d, the AC power source 41c outputs the AC voltage V _ACW in synchronization (interlocking) with it. Specifically, the output of the AC voltage V _ACW is started in synchronization with the start of output of the DC voltage V _DCW by one of the DC power sources 41a and 41b selected by the switch 41d, and the output of the DC voltage V _DCW is ended. The output of the AC voltage V _ACW is stopped in synchronization. In this case, the AC power source 41c, during the output period of the AC voltage _{V ACW,} within a preset frequency range the frequency _{f AC} of the alternating voltage _{V ACW} (within the range of from the lower limit frequency _{f L} to the upper limit frequency _{f H)} Sweep. The AC voltage V _ACW output from the AC power supply 41 c is superimposed on the DC voltage V _DCW output from either the DC power supply 41 a or 41 b via the capacitor 41 e, and is output from the power supply unit 41 to the output control buffer 43. Is output.

The power source unit 42 for generating read current includes a DC power source 42a and a switch 42b. The DC power supply 42 a is connected to the input terminal of the output control buffer 44, and outputs the DC voltage V _DCR to the output control buffer 44 when the switch 42 b is turned on. Note that the polarity of the DC power supply 42a may be opposite to that shown in FIG. Each of the output control buffers 43 and 44 is connected to a buffer selection unit 45 and is controlled by the buffer selection unit 45 to be in an energized state or a non-energized state.

With the above configuration, when the output control buffer 43 is in the energized state and the output control buffer 44 is in the non-energized state when the output control buffer 43 is in the energized state and the DC power supply 41a side is selected by the switch 41d, the AC voltage V _The DC voltage V _DCW superimposed with _ACW is output from the output terminal of the output control buffer 43 as the AC superimposed DC voltage Vdd. In this state, due to the application of the AC superimposed DC voltage Vdd to the magnetoresistive effect element 2, the DC current in which an AC current is superimposed on the magnetoresistive effect element 2 (AC superimposed DC current) is negative in the Z-axis direction. (See FIG. 2). On the other hand, in the power supply unit 4, when the output control buffers 43 and 44 are in this state and the DC power supply 41b side is selected by the switch 41d, the DC voltage V _DCW having the opposite polarity superimposed with the AC voltage V _ACW is AC superimposed. The DC voltage Vdd is output from the output terminal of the output control buffer 43. In this state, due to the application of the AC superimposed DC voltage Vdd to the magnetoresistive effect element 2, the DC current in which the AC current is superimposed on the magnetoresistive effect element 2 (AC superimposed DC current) is the positive direction of the Z axis. Flowing into.

Further, when the output control buffer 43 is in the non-energized state and the output control buffer 44 is in the energized state and the switch 42b is turned on, the power supply unit 4 performs output control with the DC voltage V _DCR as the DC voltage Vdd. Output from the output terminal of the buffer 43. In this state, due to the application of the DC voltage Vdd to the magnetoresistive effect element 2, a DC current flows in the magnetoresistive effect element 2 in the positive direction of the Z axis. As described above, the power supply unit 4 can supply an AC superimposed DC current or a DC current to the magnetoresistive effect element 2, and the polarity of the AC superimposed DC current flowing through the magnetoresistive effect element 2 can be changed. Yes.

Next, the information storage operation of the magnetic memory device 1, that is, the inversion method of the magnetization direction 21M of the magnetization free layer 21 will be described in comparison with the magnetization inversion method already found by the applicant of the present application. The frequency f _AC of the _AC voltage V _ACW output from the AC power supply 41 c is equal to the natural frequency f _F of the precession of magnetization of the magnetization free layer 21 due to variations in the manufacturing process of the magnetoresistive effect element 2. taking into account the variation is set so as to always contain the natural frequency f _F between the lower limit frequency f _L to the upper limit frequency f _H.

When the magnetization direction 21M of the magnetization free layer 21 shown in FIG. 3 is reversed, in the magnetization reversal method found by the applicant of the present application, as shown in FIG. 5, the magnetization reversal threshold Ic (spin-polarized direct current only) is used. A constant frequency equal to the natural frequency f _F of the magnetization direction 21M of the magnetization free layer 21 is set to a spin-polarized DC current having a smaller current value than the minimum DC current value that can reverse the magnetization direction 21M of the magnetization free layer 21). The spin-polarized current is superimposed on the spin-polarized alternating current.

  On the other hand, in this example, when the magnetization direction 21M of the magnetization free layer 21 shown in FIG. 3 is reversed, the AC superimposed DC current shown in FIG. 6 is passed in the negative direction of the Z axis. The AC superimposed DC current can be flowed by selecting the DC power supply 41a side by the switch 41d in a state where the output control buffer 43 is energized and the output control buffer 44 is not energized in FIG. . In this case, the spin-polarized current supplied into the magnetization free layer 21 is a spin-polarized direct current on which the spin-polarized alternating current is superimposed. The direct current on which the alternating current is superimposed may be a direct current pulse current or a rectangular wave current.

When this spin-polarized alternating current is supplied into the magnetization free layer 21, the spin-polarized alternating current always includes the natural frequency f _F of the magnetization precession of the magnetization free layer 21. When the frequency of the polar alternating current coincides with the natural frequency f _F , precession for the magnetization of the magnetization free layer 21 is induced, and the magnetization direction 21M of the magnetization free layer 21 is easily reversed. When the magnetization direction 21M of the reversed magnetization free layer 21 is reversed again, the DC power supply 41b is switched by the switch 41d while the output control buffer 43 is energized and the output control buffer 44 is de-energized. Select the side. 6 can flow in the positive direction of the Z-axis, that is, with respect to the magnetization of the magnetization free layer 21 in a state where the spin-polarized direct current flows in the opposite direction to the above case. Since precession can be induced, the magnetization direction 21M of the magnetization free layer 21 is easily reversed again. As described above, in the magnetic memory device 1 of the present example, the AC voltage V _ACW output from the AC power supply 41c has the frequency f _AC from the lower limit frequency f _L defined in advance as described above to the upper limit frequency f _H. In comparison with the magnetization reversal method found by the applicant, in which a spin-polarized alternating current having a constant frequency is superimposed on the spin-polarized direct current, the natural frequency f of the magnetization of the magnetization free layer 21 is swept. _{Even when F} changes, the precession of the magnetization of the magnetization free layer 21 can be reliably induced to easily reverse the magnetization direction 21M of the magnetization free layer 21. For this reason, the magnetization direction 21M of the magnetization free layer 21 can be reliably reversed by a direct current smaller than the magnetization reversal threshold Ic when the magnetization is reversed only by a direct current. Therefore, in the magnetic memory device 1 of this example, information can be always written to the magnetoresistive element 2 with low power consumption.

  Further, when reading information, the magnetoresistive effect element 2 is smaller than the magnetization reversal threshold value Ic as shown in FIG. 7 in the same manner as the conventional reading method or the reading method found by the applicant. In this case, the magnetization direction 21M is not reversed. Such a current causes the output control buffer 43 to be in a non-energized state, the switch 41d to be in a non-selected state (a state in which neither of the DC power supplies 41a and 41b is selected (off state)), and the output control buffer 44 to By turning on the switch 42b in the energized state, the magnetoresistive effect element 2 can be flown from the output terminal of the output control buffer 44. In this magnetic memory device 1, the resistance value of the magnetoresistive effect element 2 exhibits a predetermined value according to the relative angle between the magnetization direction 21 </ b> M of the magnetization free layer 21 and the magnetization direction 23 </ b> AM of the ferromagnetic layer 23 a. As an example, if the information “0” is stored when the magnetization direction 21M and the magnetization direction 23AM are parallel, and the information “1” is stored when the magnetization direction 21M is antiparallel, the direct current is applied. Further, by measuring the resistance value in the stacking direction of the magnetoresistive effect element 2, information stored in the magnetoresistive effect element 2 can be read based on the measured resistance value.

As described above, in the magnetic memory device 1, the power supply unit 4 uses the frequency f _AC of the _AC voltage V _ACW superimposed on the DC voltage V _DCW as the natural frequency f in the magnetization precession of the magnetization free layer 21. in the frequency range containing the _F (in the range from the lower limit frequency f _L to the upper limit frequency f _H) causes sweep (sweep). Therefore, the frequency f _AC of the AC voltage V _ACW is set to a fixed frequency by defining the lower limit frequency f _L and the upper limit frequency f _H in consideration of variations in the natural frequency f _F in the precession of magnetization of the magnetization free layer 21. As compared with the magnetization reversal method, the magnetization reversal threshold in the case where the precession with respect to the magnetization of the magnetization free layer 21 is surely induced and the magnetization direction 21M of the magnetization free layer 21 is reversed only by a direct current. The magnetization can be reliably reversed with a direct current smaller than the value Ic.

  Further, according to the magnetic storage device 1, the magnetic field application unit 3 is configured using the permanent magnets 31 and 32, and the strength of the magnetic field H applied to the magnetization free layer 21 of the magnetoresistive effect element 2 is made constant. By maintaining, the magnetic field application unit 3 can be configured easily.

  Next, a magnetic memory device 1A having a plurality of magnetoresistive elements 2 will be described with reference to FIG.

The magnetic storage device 1A includes a plurality of magnetic memory elements M00, M01, M02, M10, M11, M12, M20, M21, M22 (hereinafter referred to as “magnetic” unless otherwise specified). Memory elements M ”) are arranged in a matrix. In the magnetic memory device 1A, common word lines WL ₀ , WL ₁ , WL ₂ (hereinafter not particularly distinguished) are used as the gate electrodes of the selection transistors 51 for selecting the magnetic memory elements arranged in the row direction. (Sometimes referred to as “WL”). Specifically, the gate electrode of each selection transistor 51 of the magnetic memory elements M00, M10, M20 are connected to word lines WL _0, the magnetic memory element M01, M11, to the gate electrode of each selection transistor 51 of the M21 word line WL ₁ is connected, a word line WL ₂ is connected to the gate electrode of the magnetic memory elements M02, M12, each selection transistor 51 of the M22.

Also, common upper bit lines BLu ₀ , BLu ₁ , BLu ₂ (hereinafter also referred to as “BLu” unless otherwise specified) are connected to the magnetoresistive effect elements 2 of the magnetic memory elements arranged in the column direction. ing. Specifically, the upper bit line BLu ₀ is connected to the magnetoresistive effect elements 2 of the magnetic memory elements M00, M01, M02, and the magnetoresistive effect elements 2 of the magnetic memory elements M10, M11, MI2 are connected to the magnetoresistive effect elements 2 of the magnetic memory elements M00, M01, M02. An upper bit line BLu ₁ is connected, and an upper bit line BLu ₂ is connected to each magnetoresistive element 2 of the magnetic memory elements M 20, M 21, M 22. Each upper bit line BLu ₀ , BLu ₁ , BLu ₂ is connected to a non-inverting input terminal of a comparator 52 described later via read switches 520, 521, 522.

Further, common lower bit lines BLd ₀ , BLd ₁ , BLd ₂ (hereinafter also referred to as “BLd” unless otherwise distinguished) are connected to the source electrodes of the selection transistors 51 arranged in the column direction. Specifically, the lower bit line BLd ₀ is connected to the source electrode of each select transistor 51 of the magnetic memory elements M00, M01, M02, and the source electrode of each select transistor 51 of the magnetic memory elements M10, M11, MI2. lower bit line BLd ₁ is connected, the lower bit line BLd ₂ is connected to the source electrode of the magnetic memory elements M20, M21, each selection transistor 51 of the M22 in.

The upper bit line BLu ₀ is connected to a power output unit (output terminals of the output control buffers 43 and 44) of the power supply unit 4 via a bit voltage switch 410a, and a ground potential is set to the bit voltage switch 420a. Connected through. Similarly, the upper bit line BLu _1, the power output unit and the ground potential of the power supply unit 4, the bit voltage switch 411a, is connected via 421a, the upper bit line BLu _2, the power supply section 4 The power supply output unit and the ground potential are connected via bit voltage switches 412a and 422a. On the other hand, the lower bit line BLd _0, with the power output of the power supply unit 4 is connected via a bit voltage switch 410b, a ground potential is connected through a bit voltage switch 420b. Similarly, the lower bit line BLd ₁ is connected to the power output unit of the power supply unit 4 and the ground potential via the bit voltage switches 411b and 421b, and the lower bit line BLd ₂ is connected to the power supply unit 4 of the power supply unit 4. The power supply output unit and the ground potential are connected through bit voltage switches 412b and 422b. In the magnetic storage device 1A, the power supply unit 41 of the power supply unit 4 includes only one of the DC power supplies 41a and 41b (in this example, only the DC power supply 41a).

In this magnetic storage device 1A, the frequency f _AC of the _AC voltage V _ACW output from the AC power supply 41c of each power supply unit 4 is a magnetization free layer caused by variations in the manufacturing process of each magnetoresistive element 2. taking into account the variation of the natural frequency f _F of the precession of the magnetization of 21, always include all natural frequency f _F of the magnetoresistive element 2 between the lower limit frequency f _L to the upper limit frequency f _H Is set to Although not shown, the magnetic storage device 1 </ b> A is also provided with a magnetic field application unit 3, and a constant magnetic field H is applied to each magnetoresistive element 2.

  In this magnetic storage device 1A, one magnetic memory element M stores 1-bit information. Hereinafter, a method for writing information to and a method for reading information from the magnetic memory device 1A will be described by taking a method for writing and reading information to the magnetic memory element M00 as an example. In this case, the magnetic memory element M00 has two states in which the magnetization direction 21M (see FIG. 3) of the magnetization free layer 21 of the magnetic memory element M00 is parallel to the magnetization direction 23AM of the magnetization fixed layer 23 and antiparallel. Corresponding to bit information ("0", "1"). Therefore, information is written by reversing the magnetization direction 21M of the magnetization free layer 21.

When reversing the magnetization direction 21M of the magnetization free layer 21 of the magnetic memory element M00, the bit voltage switches 410a and 420b are turned on and the bit voltage switches 420a and 410b are turned off. Furthermore, applying a voltage to turn on the selection transistor 51 to the word line WL _0. Next, only the power supply unit 4 connected to the bit voltage switch 410a among the power supply units 4 is operated, and the AC superimposed DC voltage Vdd (the DC voltage V _DCW on which the AC voltage V _ACW is superimposed) is output from the output terminal. ) Is output from the power supply unit 4 to the magnetic memory element M00 by supplying an AC superimposed DC current in a direction from the magnetoresistive element 2 to the selection transistor 51. At this time, the AC superimposed DC current supplied from the power supply unit 4 has the frequency f _AC of the superimposed AC voltage V _ACW from the lower limit frequency f _L defined in advance as described above. In order to sweep up to the upper limit frequency f _H, it always matches the natural frequency f _F of the magnetoresistive element 2. For this reason, in this magnetic memory device 1, the magnetization precession of the magnetization free layer 21 induced by the spin-polarized alternating current is always used, and the magnetization direction of the magnetization free layer 21 is reduced with a smaller spin-polarized direct current. 21M can always be reversed reliably. That is, the magnetic storage device 1A is a magnetic memory having a lower magnetization reversal threshold.

In addition, when again reverse the magnetization direction 21M of the magnetization free layer 21 of the magnetic memory element M00, which is inverted as described above, by applying a voltage to turn on the selection transistor 51 to the word line WL _0, each bit voltage switch 410a 420b and the bit voltage switches 420a and 410b are turned on. Next, only the power supply unit 4 connected to the bit voltage switch 410b in each power supply unit 4 is operated, and the AC superimposed DC voltage Vdd (the DC voltage V _DCW on which the AC voltage V _ACW is superimposed) is output from the output terminal. ) Is supplied from the power supply unit 4 to the magnetic memory element M00 to supply an AC superimposed DC current in a direction from the selection transistor 51 to the magnetoresistive element 2. As described above, the magnetization precession of the magnetization free layer 21 induced by the spin-polarized alternating current is always utilized, and the magnetization direction 21M of the magnetization free layer 21 is always reliably reversed again with a smaller amount of spin-polarized DC current. By doing so, different information can be written in the magnetic memory element M00. Similarly, information can be written to other magnetic memory elements M.

On the other hand, when reading the information recorded in the magnetic memory element M00, the bit voltage switches 410a and 420b are turned on, and the bit voltage switches 420a and 410b are turned off. Next, by operating only the power supply unit 4 connected to the bit voltage switch 410a of each power supply unit 4 and outputting the AC superimposed DC voltage Vdd (DC voltage V _DCR ) from its output terminal, A DC current having a current value smaller than the magnetization reversal threshold value Ic is supplied from the power supply unit 4 to the magnetic memory element M00 in the direction from the magnetoresistive effect element 2 toward the selection transistor 51. The resistance value of the magnetic memory element M00 differs depending on whether the magnetization direction 21M (see FIG. 3) of the magnetization free layer 21 is parallel or antiparallel to the magnetization direction 23AM of the magnetization fixed layer 23. It happens if the the case of antiparallel between the voltage of the upper bit line BLu ₀ are different. Therefore, by determining whether higher or lower than the reference voltage Vref and the voltage of the upper bit line BLu ₀ by the comparator 52, it is possible to read information stored in the magnetic memory element M00. Similarly, information recorded in other magnetic memory elements can be read.

In addition to the magnetic storage device 1A, the magnetic storage device having a plurality of magnetoresistive elements 2 can be configured as a magnetic storage device 1B shown in FIG. In addition, about the same structure, the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted. This magnetic storage device 1B is different from the magnetic storage device 1A in that a bit voltage switch is connected to each word line WL. Specifically, the magnetic memory device 1B, the word lines WL ₀ to bit voltage switch 410a, 420a are connected, the word line WL ₁ in bit voltage switch 411a, 421a are connected, bit voltage switch 412a to the word line WL ₂ , 422a are connected. Also in this magnetic memory device 1B, information can be written to and read from each magnetoresistive element 2 in the same manner as the magnetic memory device 1A described above.

Specifically, a method for writing and reading information to the magnetic memory element M00 will be described as an example. First, when reversing the magnetization direction 21M of the magnetization free layer 21, the bit voltage switches 410a and 420b are turned on and the bit voltage switches 420a and 410b are turned off. Furthermore, applying a voltage to turn on the selection transistor 51 to the upper bit line BLu _0. As a result, in the same manner as in the magnetic storage device 1A, an AC superimposed DC current is supplied from the power supply unit 4 to the magnetic memory element M00 in the direction from the magnetoresistive effect element 2 to the selection transistor 51, and magnetization The free layer 21 is inverted.

Further, when again reverse the magnetization direction 21M of the magnetization free layer 21 of the magnetic memory element M00, which is inverted as described above, similarly to the above-described magnetic memory device 1A, selected upper bit line BLu ₀ transistor 51 Is applied, the bit voltage switches 410a and 420b are turned off, and the bit voltage switches 420a and 410b are turned on. Thereby, an AC superimposed DC current is supplied from the power supply unit 4 to the magnetic memory element M00 in the direction from the selection transistor 51 toward the magnetoresistive effect element 2, and the magnetization free layer 21 is inverted again. In this way, information can be written into the magnetic memory element M00. Also in this magnetic memory device 1B, since the AC superimposed DC current is supplied to the magnetoresistive effect element 2 from the power supply unit 4 similar to the magnetic memory device 1A, the magnetization free layer 21 induced by the spin-polarized AC current By always utilizing the precession of magnetization, information can be written by always reversing the magnetization direction 21M of the magnetization free layer 21 with less spin-polarized direct current.

On the other hand, when reading the information stored in the magnetic memory element M00, the bit voltage switches 410a and 420b are turned on and the bit voltage switches 420a and 410b are turned off in the same manner as the magnetic storage device 1A. To do. Next, a current smaller than the magnetization reversal threshold value Ic is supplied from the power supply unit 4 to the magnetic memory element M00 in the direction from the magnetoresistive effect element 2 toward the selection transistor 51. In this state, by determining whether higher or lower than the reference voltage Vref and the voltage of the word line WL ₀ by the comparator 52, it is possible to read information recorded in the magnetic memory device M00. Similarly, information recorded in other magnetic memory elements can be read out.

  The magnetic storage devices 1A and 1B are each provided with nine magnetic memory elements M, but the number of magnetic memory elements is not particularly limited, and can be defined as any desired number.

1 is a circuit diagram of a magnetic storage device 1. FIG. It is a perspective view which shows the structure of the magnetoresistive effect element 2 vicinity of FIG. It is the WW sectional view taken on the line in FIG. 3 is a perspective view of the vicinity of a magnetization free layer 21 of the magnetoresistive element 2. FIG. It is a current waveform figure at the time of magnetization reversal in the magnetization reversal method which the present applicant has already found. It is a current waveform diagram at the time of magnetization reversal in the magnetic storage devices 1, 1A, 1B. FIG. 3 is a current waveform diagram when magnetization is not reversed in the magnetic storage devices 1, 1A, 1B. 1 is a circuit diagram of a magnetic storage device 1A. It is a circuit diagram of the magnetic storage device 1B.

Explanation of symbols

1, 1A, 1B Magnetic storage device 2 Magnetoresistive element 3 Magnetic field application unit 4 Power supply unit 21 Magnetization free layer 22 Spacer layer 23 Magnetization fixed layer

Claims (3)

Magnetoresistance effect element comprising a magnetization fixed layer, a magnetization free layer, and a nonmagnetic spacer layer disposed between the magnetization fixed layer and the magnetization free layer, and a magnetic field application for applying a magnetic field to the magnetization free layer And a current supply unit that supplies a direct current in which an alternating current is superimposed between the magnetization fixed layer and the magnetization free layer,
The magnetic memory device according to claim 1, wherein the current supply unit sweeps the frequency of the alternating current within a frequency range including a natural frequency of magnetization of the magnetization free layer of the magnetoresistive effect element.   The magnetic storage device according to claim 1, comprising a plurality of the magnetoresistive effect elements, wherein the current supply unit sweeps the frequency of the alternating current within a frequency range including the natural frequency for each of the magnetoresistive effect elements.   The magnetic storage device according to claim 1, wherein the magnetic field application unit includes a permanent magnet, and maintains the strength of the magnetic field constant.

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