JP2009239672A - High frequency power amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency power amplifier capable of achieving stable high-efficiency operations of a transistor without varying second harmonic wave input impedance of a fundamental wave set to an optimal efficiency condition of the transistor included in the high frequency power amplifier, with respect to the effect of external input impedance viewed from the high frequency power amplifier. <P>SOLUTION: A second harmonic wave resonance circuit 32 is a resonance circuit wherein a resonance inductor 321 and a resonance capacitor 322 are connected in series between a signal line and a ground line (GND). A resonant frequency of the second harmonic wave resonance circuit 32 is set to a second harmonic wave of a fundamental wave. A second harmonic wave phase control circuit 33 is configured by connecting a phase adjustment capacitor 331 in series to the signal line. By adjusting a capacitance value of the phase adjustment capacitor 331 from large to small, second harmonic wave input impedance viewed from a transistor 4 on a polar chart is controlled to perform phase rotation within a range of +180° to +360°. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a high-frequency power amplifier used in the field of wireless communication, and more particularly to a technique for realizing high-efficiency operation of a transistor by second harmonic processing in an input matching circuit of a high-frequency power amplification transistor included in the high-frequency power amplifier. .

  A high-frequency power amplifier is required to have low distortion in order to maintain linearity and high efficiency in order to reduce power consumption. In particular, high-frequency power amplifiers used in digital mobile phones are strongly required to have low distortion and high efficiency characteristics in order to directly reduce the size and weight of the set. The low-distortion characteristics and high-efficiency characteristics of high-frequency power amplifiers are in conflict with each other, so it is designed to maximize the efficiency so as to meet the distortion characteristics standards according to the mobile phone modulation method. It is normal.

  In recent years, as a high-efficiency circuit design of a high-frequency power amplifier, an output circuit of a transistor included in the high-frequency power amplifier is designed in consideration of harmonic components in addition to fundamental frequency matching. For example, in Patent Document 1 and Patent Document 2, in addition to impedance matching at the fundamental frequency at the output terminal of the transistor included in the high-frequency power amplifier, impedance is set for harmonic components having an even multiple of the fundamental frequency. It has been introduced that an optimum efficiency condition is realized in which the impedance is opened for a short-circuited harmonic component having an odd multiple of the fundamental frequency.

  However, since harmonic components also exist on the input side of the transistor, the waveform of the fundamental wave will collapse if the phase of the harmonic component of the even multiple frequency is not optimally matched to the fundamental wave at the input end of the transistor. Therefore, there is a problem that the voltage waveform and the current waveform overlap with each other to cause a loss and the efficiency deteriorates.

  Therefore, a technique has been proposed that achieves high efficiency by performing impedance matching on harmonic components not only at the output end of the transistor included in the high-frequency power amplifier but also at the input end of the transistor.

Patent Document 1 discloses a second harmonic phase adjusting resonance circuit having a resonance point at a frequency lower than the second harmonic of the fundamental frequency in an input impedance matching circuit on the input side of a transistor included in a high frequency power amplifier. A technique for setting the input impedance for the second harmonic of the fundamental frequency viewed from the transistor to the optimum efficiency condition is disclosed.
Further, in Patent Document 2, the input impedance matching circuit on the input side of the transistor included in the high frequency power amplifier has a resonance point with respect to a frequency higher than the second harmonic of the fundamental frequency. There is disclosed a technique that enables a higher efficiency by setting an input impedance for a second harmonic of a fundamental frequency viewed from a transistor to an optimum efficiency condition by having a resonance circuit.

These Patent Documents 1 and 2 differ only in the input impedance (phase) with respect to the second harmonic of the fundamental frequency that is the optimum efficiency condition due to the difference in the types of transistors and the operating conditions, and the basic principle is the same. Technology.
Hereinafter, referring to FIG. 8, a method for designing an input impedance for a second harmonic of a fundamental frequency viewed from a transistor, which is shown in Patent Document 1 and Patent Document 2, at a desired position on a polar chart. Will be described.

  The conventional circuit shown in FIG. 8 controls the fundamental impedance from 50Ω at the output port 6 to the optimum of the transistor 4 while controlling the impedance of the even harmonics to be short and the impedance of the odd harmonics to be open with respect to the fundamental wave. An output matching circuit 5 for converting to an output load is provided on the output side of the transistor 4. Further, the conventional circuit has a fundamental wave input matching circuit 2 that converts the fundamental wave impedance from 50Ω of the input port 1 to the optimum input load of the transistor 4, and a second harmonic that adjusts the impedance of the second harmonic with respect to the fundamental wave. A phase adjusting resonance circuit 300 is provided on the input side of the transistor 4.

  In Patent Document 1, the second harmonic phase adjusting resonance circuit 300 is a resonance circuit 300 including a transmission line 301 and a grounded capacitor 302. When the capacitor 302 has a capacity large enough to short-circuit the high-frequency signal, the resonance length of the resonance circuit 300 is adjusted by adjusting the transmission line 301 of the resonance circuit 300 to be longer than the quarter wavelength of the fundamental wave by a predetermined amount. The frequency is controlled to a frequency band lower than the second harmonic frequency of the fundamental wave. Thereby, the input side impedance of the second harmonic frequency of the fundamental wave viewed from the transistor 4 can be adjusted with a phase in the range of + 0 ° to + 180 ° on the polar chart. In an example in which an FET is used for the transistor 4 in Patent Document 1, the phase of the second harmonic is delayed by a phase difference (Δθ) ° with respect to the fundamental wave in the gate voltage signal of the transistor 4. Therefore, the line length of the transmission line 301 is adjusted to be longer than ¼ wavelength of the fundamental wave, and the phase of the input impedance of the second harmonic frequency of the fundamental wave seen from the transistor 4 is set to (+ 180−Δθ) °. In the input signal to the transistor 4, the second harmonic can be advanced in advance by a phase difference (Δθ) ° from the fundamental wave. For this reason, the phase difference (Δθ) ° between the fundamental wave and the second harmonic of the gate voltage signal of the transistor 4 is set to zero and in phase, thereby enabling the transistor 4 to operate with high efficiency.

The basic principle of Patent Document 2 is the same as that of Patent Document 1. However, in Patent Document 2, since the resonance frequency of the resonance circuit 300 is set higher than the second harmonic frequency, the phase + (180 + Δθ) ° of the second harmonic can be adjusted in the range of + 180 ° to + 360 °. However, within the range of + 170 ° to + 270 ° described in claim 2, adjustment in the range of + 170 ° to + 180 ° is impossible.
Japanese Patent No. 2695395 JP 2004-112158 A David M. Snyder, "Acheoretic Analysis and Experimental Confirmation of the Optimal Loaded and Overdriven Arf Power Amplifier", iTriple E Transaction・ On Electron Devices, Vol. ED-14, no. 12, 851-857 (December 1967) (David M. Snider, “Theoretical Analysis and Experientially Loaded and Overdrived”. 12, pp. 851-857, Dec. 1967) Love Frederick H, “Class F Power Amplifiers with Maximal Flat Wave Forms”, I Triple E Transaction on Microwave Theory and Techniques, Vol. 45, no. 11, 2007-2012, November 1997 (Raab, Frederick H., "Class-F Power Amplifiers with Maximum Flat Waves, IEEE Transactions on Micro. 11). -2012, Nov. 1997)

  However, in the conventional technique described in the above-mentioned patent document, as a method for controlling the input impedance for the second harmonic of the fundamental frequency, which is the optimum efficiency condition, as shown in FIG. By removing the resonance point from the second harmonic of the fundamental frequency in the circuit 300, the phase of the input impedance with respect to the second harmonic of the fundamental frequency viewed from the transistor 4 is adjusted.

  For this reason, the input impedance in the frequency band other than the resonance frequency located at the resonance point is likely to fluctuate due to the influence of the external input impedance viewed from the high frequency power amplifier, and reproduce or maintain the high efficiency characteristics of the high frequency power amplifier in the actual use environment It has a drawback that cannot be done. This is because, when a high-frequency power amplifier is mounted on the transmitter, the characteristics vary depending on the components and circuit configuration on the input side of the high-frequency power amplifier. It becomes a factor such as the deterioration of development efficiency such as occurrence of the optimal matching work between the two.

  FIG. 10 shows the second harmonic phase adjustment when the second harmonic input impedance of the fundamental wave viewed from the transistor 4 is adjusted to Mag≈0.95 / Ang = + 190 °, + 200 °, and + 210 °. The second harmonic of the fundamental wave seen from the transistor 4 when the second harmonic impedance outside the input terminal seen from the high frequency power amplifier including the resonance circuit 300 is set to Mag≈0.95 and Ang is changed in all phases. It is a figure which shows the influence degree to wave input impedance. FIG. 10A shows Mag fluctuations, and FIG. 10B shows Ang fluctuations.

  In the prior art, the second harmonic input impedance of the fundamental wave viewed from the transistor 4 is lower than the desired position on the polar chart by the influence of the fluctuation of the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier. It can be seen that Δ0.3 to Δ0.8 and Ang are ±± 30 ° to Δ50 °. The fluctuation of the second harmonic input impedance directly affects the efficiency characteristics. For example, the second harmonic input impedance of the fundamental wave viewed from the transistor 4 should be desired to be Mag≈0.95 / Ang = + 190 °. , Mag = 0.3 / Ang = + 160 ° causes a reduction in efficiency of about 10%.

  Therefore, an object of the present invention is to provide an input impedance for the second harmonic of the fundamental frequency set in the optimum efficiency condition of the transistor included in the high frequency power amplifier with respect to the influence of the external input impedance viewed from the high frequency power amplifier. It is an object of the present invention to provide a high-frequency power amplifier capable of realizing a stable and high-efficiency operation of a transistor without changing the voltage.

  The present invention is directed to a high frequency power amplifier composed of n stages of power transistors. In order to achieve the above object, a high-frequency power amplifier according to the present invention includes a fundamental wave matching circuit provided on the input side of a k-th power transistor (k is any one of 1 to n), a k-stage A second harmonic control circuit inserted between the power transistor of the eye and the fundamental matching circuit. The second-order harmonic control circuit includes a second-order harmonic resonance circuit in which the resonance frequency is matched to the second-order harmonic of the fundamental frequency, and the second-order harmonic of the fundamental frequency as viewed from the k-th power transistor. A second harmonic phase control circuit for controlling the wave input impedance to a desired position on the polar chart.

A typical second harmonic resonance circuit includes an inductor having one end connected to the signal line output from the fundamental matching circuit, and a capacitor having one end connected to the other end of the inductor and the other end grounded. The resonance frequency of the inductor and the capacitor is set to the second harmonic of the fundamental frequency. Here, a resistor may be inserted between the signal line and the inductor. In this case, if the resistance is set in the range of 0.1Ω to 6Ω, the Q value of the second harmonic resonance circuit can be controlled. Alternatively, a resistor may be inserted in parallel with the inductor. In this case, the Q value of the second harmonic resonance circuit can be controlled by setting the resistance in the range of 100Ω to 10 kΩ. Furthermore, when the inductor and the capacitor are formed of a semiconductor integrated circuit, the inductor is formed by wiring having a resistance component of sheet resistance of 0.001 [Ω / □] or more and 0.1 [Ω / □] or less. For example, the Q value of the second harmonic resonance circuit can be controlled by setting the wiring resistance of the inductor in the range of 0.1Ω to 6Ω.

  The second harmonic resonance circuit is a line having one end connected to the signal line output from the fundamental matching circuit and the other end grounded, and having a quarter electrical length of the wavelength λ of the fundamental frequency. It may be configured with a line having an electrical length of 1/8 of the wavelength λ of the fundamental frequency, one end connected to the signal line output from the fundamental matching circuit and the other end opened. Good.

  A typical second-order harmonic phase control circuit is composed of a capacitor inserted between the output of the fundamental matching circuit and the input of the power transistor, or an inductor, or a capacitor and an inductor connected in series. . With this configuration, the second harmonic input impedance of the fundamental frequency seen from the power transistor at the k-th stage is in the range of + 180 ° to + 360 ° on the polar chart when using only the capacitor, and polar when using only the inductor. In the case of an inductor and a capacitor connected in series within a range of + 0 ° to + 180 ° on the chart, control can be performed within a range of + 0 ° to + 360 ° on the polar chart. In the case of an inductor and a capacitor connected in series, a variable capacitor may be further connected between the connection point of the inductor and the capacitor and the ground.

  According to the present invention, the second harmonic input impedance of the fundamental wave viewed from the transistor is always fixed at a desired position on the polar chart with respect to the impedance outside the input terminal viewed from the high frequency power amplifier. Thereby, stable high-efficiency operation of the transistor can be realized.

In the following, an embodiment of the present invention will be described by taking as an example the control of the second harmonic of a high frequency power amplifier in a domestic WCDMA system 2 GHz band @ 1.95 GHz @ 3.9 GHz.
In each of the following embodiments, the configuration of a high-frequency power amplifier having only one transistor will be described. However, in some high-frequency power amplifiers having a plurality of transistors, the same configuration is applied to some or all transistors. It is possible to apply.

(First embodiment)
FIG. 1 is a diagram showing a configuration of a high-frequency power amplifier according to the first embodiment of the present invention. The high frequency power amplifier according to the first embodiment includes a fundamental wave input matching circuit 2, a second harmonic control circuit 3, a power transistor 4, and an output matching circuit 5.

The output matching circuit 5 is connected to the output side of the transistor 4. This output matching circuit 5 controls the impedance of the even-order harmonics to be short and the impedance of the odd-order harmonics to be open with respect to the fundamental wave, similarly to the output matching circuit 5 (FIG. 8) described in the prior art. Meanwhile, the fundamental impedance is converted from 50Ω of the output port 6 to the optimum output load of the transistor 4. Further, the fundamental wave input matching circuit 2 converts the fundamental wave impedance from 50Ω of the input port 1 to the optimum input load of the transistor 4 in the same manner as the fundamental wave input matching circuit 2 (FIG. 8) described in the prior art. The second harmonic control circuit 3 is provided between the fundamental wave input matching circuit 2 and the transistor 4 and controls the second harmonic impedance with respect to the fundamental wave to a desired position on the polar chart, and from the high frequency power amplifier. It is not affected by the impedance outside the input terminal as seen and always functions to be fixed at a desired position on the polar chart.

FIG. 2 is a diagram showing a circuit example of the fundamental wave input matching circuit 2 of the high-frequency power amplifier in the domestic WCDMA system 2 GHz band @ 1.95 GHz.
The fundamental wave input matching circuit 2 of FIG. 2 includes a shunt inductor 22 connected in parallel, a series capacitor 23 and a series inductor 24 connected in series, and the fundamental wave input from the input port 21 It has a function to convert impedance to the optimal input load. Further, since the shunt inductor 22 and the series capacitor 23 function as a high-pass filter, the suppression amount and the fundamental wave characteristic in the low frequency band are optimized while considering the stability of the high frequency power amplifier and the reception band noise characteristic. Can be set to conditions. In this example, a low-pass circuit configuration that suppresses the low frequency band is shown, but a high-pass circuit configuration that suppresses the high frequency band and a band-pass circuit configuration that passes the desired frequency band are also used for the fundamental wave input matching circuit 2. Is possible.

  FIG. 3A shows a detailed configuration example 1 of the second harmonic control circuit 3 of the first embodiment. The second harmonic control circuit 3 of the configuration example 1 includes a second harmonic resonance circuit 32 in which the resonance frequency is adjusted to the second harmonic of the fundamental wave input from the input port 31, and the fundamental wave viewed from the transistor 4. A second harmonic phase control circuit 33 for controlling the second harmonic input impedance to a desired position on the polar chart.

The second harmonic resonance circuit 32 is a resonance circuit in which a resonance inductor 321 and a resonance capacitor 322 are connected in series between a signal line and a ground line (GND). In order to match the resonance frequency of the second harmonic resonance circuit 32 with the second harmonic of the fundamental wave, the resonance inductor 321 and the resonance capacitor 322 are adjusted so as to satisfy the relationship of the following equation. Note that f0 is the fundamental frequency.
2f0 = 1 / (2π√ (LC))

  The second harmonic resonance circuit 32 can also be configured by using a pattern such as a microstrip line in place of the resonance inductor 321. Further, in the case of a pattern, it is possible to use resonance using a short stub or an open stub in addition to using resonance with a capacitor. In the case of a short stub, the resonance frequency can be adjusted to the second harmonic of the fundamental frequency f0 by setting the electrical length of the wiring to λ / 4 length of the wavelength corresponding to the fundamental frequency f0. In the case of an open stub, the resonance frequency can be adjusted to the second harmonic of the fundamental frequency f0 by setting the electrical length of the wiring to λ / 8 length of the wavelength corresponding to the fundamental frequency f0.

  The second harmonic phase control circuit 33 has a configuration in which a phase adjustment capacitor 331 is connected in series with the signal line. FIG. 5A shows the relationship between the value of the phase adjustment capacitor 331 and the phase of the second harmonic input impedance viewed from the transistor 4 to be controlled. In order to control the phase of the input impedance of the second harmonic as viewed from the transistor 4 by the second harmonic phase control circuit 33 equipped with one phase adjusting capacitor 331, the capacitance value of the phase adjusting capacitor 331 is set to By adjusting from large to small, it is possible to control the phase rotation of the input impedance of the second harmonic viewed from the transistor 4 on the polar chart counterclockwise in the range of + 180 ° to + 360 °.

Next, the effect when the second harmonic control circuit 3 of the configuration example 1 shown in FIG. 3A is used will be described.
FIG. 4 shows that the second harmonic input impedance of the fundamental wave viewed from the transistor 4 is controlled to Mag≈1, Ang = + 190 °, + 200 °, and + 210 ° by the second harmonic control circuit 3 of the configuration example 1. On the other hand, the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier including the second harmonic control circuit 3 is viewed from the transistor 4 when Ang is changed with Mag = 0.9 to 1. It is a figure which shows the influence degree to the input impedance of the 2nd harmonic of a fundamental wave. FIG. 4A shows Mag fluctuations, and FIG. 4B shows Ang fluctuations.

  The amount that the second harmonic input impedance of the fundamental wave seen from the transistor 4 fluctuates from a desired position on the polar chart due to the fluctuation of the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier is shown in FIG. From a), it can be seen that Mag ≦ Δ0.01, and from FIG. 4B, Ang ≦ ± Δ0.5 °. Therefore, according to the second harmonic control circuit 3 of the configuration example 1 of the present invention, since it is not affected at all by the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier, the second harmonic control circuit 3 is 2 in comparison with the prior art. It is possible to stably use the effects of the second harmonic processing.

Next, the influence of variations in the capacitance value C of the resonance capacitor 322 of the second harmonic resonance circuit 32 on the effect of the present invention and a technical example for reducing the influence will be described.
When the fundamental frequency is 1.95 GHz, the resonance inductor 321 and the resonance capacitor of the second harmonic resonance circuit 32 when the resonance frequency is adjusted to 3.9 GHz, which is the second harmonic of the fundamental frequency. 322 (0.5 pF to 6 pF), the transistor 4 due to the fluctuation of the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier when the capacitance value of the resonance capacitor 322 varies ± 5%. FIG. 4A shows the amount of change in Mag and FIG. 4B shows the amount of change in Ang as the influence of the fundamental wave on the second harmonic input impedance as seen from FIG.

  Usually, since the resistance component R exists in the inductor of the chip component, it is assumed that R = 0.1Ω is directly included in the resonance circuit, and C = 1 pF and L = 1.67 nH where the Q value is about 400. Consider a circuit and a circuit with C = 5.5 pF and L = 0.3 nH with a Q value of about 75.

  The influence on the input impedance of the second harmonic of the fundamental wave seen from the transistor 4 due to the fluctuation of the second harmonic impedance outside the input terminal seen from the high frequency power amplifier when the resonance capacitor 322 varies ± 5%. FIG. 6 shows that ΔMag≈0.23 / ΔAng≈16 ° in the C = 1 pF circuit having a high Q value, and ΔMag≈0.014 / ΔAng≈0.8 in the circuit having a low Q value of C = 5.5 pF. °. As described above, by setting the Q value of the second harmonic resonance circuit 32 to be low, it is possible to eliminate the influence of variations in the components constituting the second harmonic resonance circuit 32.

  Usually, in order to increase the capacitance value in order to reduce the Q value, there are methods of increasing the area of the parallel plates or reducing the distance between the plates if the dielectric materials constituting the capacitance are the same. Generally, in the capacity design of a semiconductor integrated circuit, the process conditions such as the distance between the dielectric material constituting the capacitor and the parallel plate are determined, so that the area of the parallel plate is optimally designed to obtain a desired capacitance value. . However, in actuality, in order to reduce the size and reduce the cost, the semiconductor integrated circuit constituting the second harmonic resonance circuit 32 is designed to have a minimum area. Therefore, the resonance capacitor 322 may be configured with a small capacitance value. is there. For this reason, there is a concern that the Q value of the second harmonic resonance circuit 32 becomes high and affects the constant variation. Therefore, FIG. 3B shows a configuration example 1 ′ in which a Q value control resistor 320 is inserted in series between the resonance inductor 321 and the signal line in order to control the Q value of the second harmonic resonance circuit 32.

  FIG. 6 shows a high-frequency power amplifier when the resistance value R of the Q-value control resistor 320 of the second harmonic resonance circuit 32 is R = 0.1Ω, 0.5Ω, 1Ω, 1.5Ω, and 3Ω. As an influence on the second harmonic input impedance of the fundamental wave seen from the transistor 4 due to the fluctuation of the second harmonic impedance outside the input terminal as seen, FIG. ) Shows the amount of change in Ang. R = 0.1Ω usually indicates an internal resistance component existing in an inductor as a chip component.

  As shown in FIG. 6, when the resonance capacitor 322 is 2 pF or less, by adjusting the Q value control resistor 320 to 0.5 to 1.5Ω, the internal resistance R = 0. Compared with the second harmonic resonance circuit 32 having only about 1Ω, it is possible to suppress changes in ΔMag and ΔAng.

  Further, here, a resonance circuit having a resonance frequency of 3.9 GHz has been described as an example, but in a resonance circuit of 1 GHz to 6 GHz, by inserting a Q value control resistor 320 in a range of 0.1Ω to 6Ω, The same effect as described above can be obtained. Further, the same effect as described above can be obtained by providing a Q value control resistor 320 of 100Ω or more in parallel with the resonance inductor 321 as in the configuration example 1 ″ shown in FIG. 3C.

  In the circuit configuration shown in FIG. 3C, the Q value control resistor 320 is realized by a semiconductor integrated circuit. For example, when the resonant inductor 321 is designed with a wiring pattern having a sheet resistance of 0.028 [Ω / □], a thickness of 3 μm, a width of 6 μm, and a length of 1160 μm in a semiconductor integrated circuit, the resonant inductor 321. Has a configuration in which L≈1.11 nH as an inductor and R≈1.25Ω as a resistor are connected in series. For this reason, the resonance frequency can be adjusted to 3.9 GHz which is the second harmonic of the fundamental frequency by combining with the resonance capacitor of C = 1.5 pF. The variation in circuit constants is mainly due to the influence of the capacitance value of the resonance capacitor depending on the thickness of the dielectric material in the semiconductor integrated circuit, but the wiring resistance component R≈1.25Ω of the resonance inductor 321 is used for resonance. Since it acts as a resistance component connected in series to the inductor 321, it is possible to reduce the influence on the variation in circuit constants as in the case where a series resistance is inserted.

  Further, the effect of adding a resistance component to the second harmonic resonance circuit 32 is an effective method for realizing more stable characteristics even in the second harmonic processing method of the prior art. Even in the technique of setting the input impedance (phase) of the second harmonic viewed from the transistor 4 at a desired position on the polar chart by shifting the resonance frequency of the resonance circuit from the second harmonic frequency, which is a conventional technique. By adding a resistance component to the harmonic resonance circuit and controlling the Q value to be low, the input impedance (phase) of the second harmonic viewed from the transistor 4 due to the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier can be reduced. It is possible to reduce the influence of deviating from a desired position on the polar chart.

  As described above, according to the high-frequency power amplifier according to the first embodiment of the present invention, the second harmonic resonance circuit 32 of the second-order harmonic control circuit 3 uses 2 2 outside the input terminal as viewed from the high-frequency power amplifier. The second harmonic input impedance of the fundamental wave viewed from the transistor 4 is adjusted to +180 on the polar chart by adjusting the phase adjusting capacitor 331 of the second harmonic phase control circuit 33 without being affected by the second harmonic impedance. The desired position is controlled in the range of ° to + 360 °. As a result, the high-frequency power amplifier can realize a stable and highly efficient characteristic that is not affected by the external impedance of the input terminal.

(Second Embodiment)
The high-frequency power amplifier according to the second embodiment of the present invention differs from the high-frequency power amplifier according to the first embodiment described above in the detailed circuit configuration of the second harmonic control circuit 3. Hereinafter, the second harmonic control circuit 3 will be described.

FIG. 3D shows a detailed configuration example 2 of the second harmonic control circuit 3 of the second embodiment. The second harmonic control circuit 3 of the configuration example 2 includes a second harmonic resonance circuit 32 in which the resonance frequency is matched to the second harmonic of the fundamental wave input from the input port 31, and the fundamental wave viewed from the transistor 4. A second harmonic phase control circuit 33 for controlling the second harmonic input impedance to a desired position on the polar chart. Similar to the first embodiment, the second harmonic resonance circuit 32 is a resonance circuit in which a resonance inductor 321 and a resonance capacitor 322 are connected in series between a signal line and a ground line (GND).

  The second harmonic phase control circuit 33 has a configuration in which a phase adjusting inductor 332 is connected in series with the signal line. The relationship between the value of the phase adjustment inductor 332 and the phase of the second harmonic input impedance viewed from the transistor 4 to be controlled is shown in FIG. 5B. In order to control the phase of the second harmonic input impedance viewed from the transistor 4 by the second harmonic phase control circuit 33 equipped with one phase adjusting inductor 332, the inductor value of the phase adjusting inductor 332 is reduced. By adjusting from to 大, the second harmonic input impedance viewed from the transistor 4 on the polar chart can be controlled in the clockwise direction in the range of + 0 ° to + 180 °.

  In the second harmonic control circuit 3 of the configuration example 2, the secondary harmonic of the fundamental wave when the second harmonic resonance circuit 32 sees the influence of the second harmonic impedance outside the input terminal seen from the high frequency power amplifier from the transistor 4. Since it functions so as not to be affected by the harmonic input impedance, the same effect as the second harmonic control circuit 3 of the configuration example 1 is obtained. The phase adjusting inductor 332 can be replaced with control of the electrical length by a strip line.

  As described above, according to the high-frequency power amplifier according to the second embodiment of the present invention, the second harmonic resonance circuit 32 of the second-order harmonic control circuit 3 uses 2 2 outside the input terminal as viewed from the high-frequency power amplifier. The second harmonic input impedance of the fundamental wave viewed from the transistor 4 is adjusted to +0 on the polar chart by adjusting the phase adjusting inductor 332 of the second harmonic phase control circuit 33 without being affected by the second harmonic impedance. The desired position is controlled in the range of ° to + 180 °. As a result, the high-frequency power amplifier can realize a stable and highly efficient characteristic that is not affected by the external impedance of the input terminal.

(Third embodiment)
The high-frequency power amplifier according to the third embodiment of the present invention is different from the high-frequency power amplifier according to the first embodiment described above in the detailed circuit configuration of the second harmonic control circuit 3. Hereinafter, the second harmonic control circuit 3 will be described.

  FIG. 3E shows a detailed configuration example 3 of the second harmonic control circuit 3 of the third embodiment. The second-order harmonic control circuit 3 of the configuration example 3 includes a second-order harmonic resonance circuit 32 in which the resonance frequency is matched to the second-order harmonic of the fundamental wave input from the input port 31, and the fundamental wave seen from the transistor 4. A second harmonic phase control circuit 33 for controlling the second harmonic input impedance to a desired position on the polar chart. Similar to the first embodiment, the second harmonic resonance circuit 32 is a resonance circuit in which a resonance inductor 321 and a resonance capacitor 322 are connected in series between a signal line and a ground line (GND).

  The second harmonic phase control circuit 33 has a configuration in which a phase adjustment capacitor 331 and a phase adjustment inductor 332 are connected in series with the signal line. In order to control the phase of the second harmonic input impedance viewed from the transistor 4, the second harmonic input impedance viewed from the transistor 4 on the polar chart is used for phase adjustment in the same manner as in the configuration example 1 and the configuration example 2. By adjusting the capacitance value of the capacitor 331 from large to small, phase rotation control can be performed counterclockwise in the range of + 180 ° to + 360 °, and the inductor value of the phase adjustment inductor 332 is adjusted from small to large. By doing so, it is possible to control the phase rotation clockwise in the range of + 0 ° to + 180 °.

Next, the effect when the second harmonic control circuit 3 of the configuration example 3 shown in FIG. 3E is used will be described.
In order to control the phase of the second harmonic input impedance viewed from the transistor 4 with only the phase adjustment capacitor 331 shown in the configuration example 1 within the range of + 180 ° to + 200 °, a very large capacitance value is required. However, by connecting the phase adjustment inductor 332 in series to the phase adjustment capacitor 331, the capacitance value of the phase adjustment capacitor 331 can be kept small, and the area on the semiconductor circuit can be reduced. Become.

  In FIG. 5C, when the phase of the second harmonic input impedance viewed from the transistor 4 when the second harmonic frequency is 3.9 GHz is controlled to + 190 °, the phase adjusting capacitor 331 and the phase connected in series are connected. A combination of values necessary for the adjustment inductor 332 is shown. When the phase of the second harmonic input impedance viewed from the transistor 4 is controlled to + 190 °, the configuration example 1 requires 8 pF for the phase adjustment capacitor 331, but the configuration example 3 requires 1. 5 pF is required for the phase adjustment inductor 332 to be 1 nH. This is an area reduction effect of about 40% when the amount of reduction of the capacitance value and the amount of increase of the inductor value (about 1 mm in the case of Au wiring having a width of 6 μm) are calculated.

  Note that the second harmonic control circuit 3 of the configuration example 3 also has a fundamental wave when the second harmonic resonance circuit 32 sees the influence of the second harmonic impedance outside the input terminal viewed from the high frequency power amplifier from the transistor 4. Since it functions so as not to be affected by the second harmonic input impedance, the same effect as the second harmonic control circuit 3 of the configuration example 1 is obtained.

  As described above, according to the high-frequency power amplifier according to the third embodiment of the present invention, the second harmonic resonance circuit 32 of the second-order harmonic control circuit 3 uses 2 2 outside the input terminal viewed from the high-frequency power amplifier. The second harmonic input of the fundamental wave viewed from the transistor 4 by adjusting the phase adjusting capacitor 331 and the phase adjusting inductor 332 of the second harmonic phase control circuit 33 while not being affected by the second harmonic impedance. Impedance is controlled to a desired position in the range of + 0 ° to + 360 ° on the polar chart. As a result, the high-frequency power amplifier can realize a stable and highly efficient characteristic that is not affected by the external impedance of the input terminal.

(Fourth embodiment)
The method for controlling the phase of the second harmonic input impedance viewed from the transistor 4 is a combination of the phase adjusting capacitor 331 and the phase adjusting inductor 332 as shown in the configuration example 3 described above, and the phase is adjusted to + 0 ° to + 360 °. It is possible to control within the range.

  However, when the phase adjusting capacitor 331 and the phase adjusting inductor 332 shown in the configuration example 3 are made into semiconductors, the circuit constants are fixed, so that the phase at the second harmonic input impedance viewed from the transistor 4 is optimal. Therefore, it is necessary to cut and try by simulation and experiment, and there is a problem that variations in semiconductors in the manufacturing process affect variations in efficiency characteristics through phase variations.

  Therefore, in the fourth embodiment of the present invention, the second harmonic control circuit 3 that can adjust the phase of the second harmonic input impedance viewed from the transistor 4 in the range of + 0 ° to + 360 ° will be described. To do.

  The high-frequency power amplifier according to the fourth embodiment of the present invention differs from the high-frequency power amplifier according to the first embodiment described above in the detailed circuit configuration of the second harmonic control circuit 3. Hereinafter, the second harmonic control circuit 3 will be described.

FIG. 3F shows a detailed configuration example 4 of the second harmonic control circuit 3 of the fourth embodiment. The second harmonic control circuit 3 of the configuration example 4 includes a second harmonic resonance circuit 32 in which the resonance frequency is matched with the second harmonic of the fundamental wave input from the input port 31, and the fundamental wave viewed from the transistor 4. A second harmonic phase control circuit 33 for controlling the second harmonic input impedance to a desired position on the polar chart. Similar to the first embodiment, the second harmonic resonance circuit 32 is a resonance circuit in which a resonance inductor 321 and a resonance capacitor 322 are connected in series between a signal line and a ground line (GND).

  In the second harmonic phase control circuit 33, a phase adjustment capacitor 331 and a phase adjustment inductor 332 are connected in series with the signal line, and a connection point between the phase adjustment capacitor 331 and the phase adjustment inductor 332 is connected. And GND, a variable capacitor for phase adjustment 333 is connected in a shunt connection. The change of the capacitance value of the phase adjustment variable capacitor 333 is performed using the variable capacitor control power source 334.

  When the phase adjustment inductor 332 is 0.5 nH and the phase adjustment capacitor 331 is 5 pF, the phase of the second harmonic input impedance of the fundamental wave viewed from the transistor 4 when the capacitance is operated by the phase adjustment variable capacitor 333 Is shown in FIG. When the second harmonic frequency is set to 3.9 GHz and the capacitance of the phase adjustment variable capacitor 333 is operated in the range of 0 pF to 30 pF, the phase of the second harmonic input impedance is in the range of 0 ° to + 190 ° and 200 ° to +360. It can be controlled with. Thus, the phase adjustment variable capacitor 333 makes it possible to control the phase of the second harmonic input impedance of the fundamental wave viewed from the transistor 4 in a range of approximately 360 °. When it is desired to change the control phase range, the control range can be changed by adjusting the phase adjustment inductor 332 and the phase adjustment capacitor 331.

  As described above, according to the high frequency power amplifier according to the fourth embodiment of the present invention, the phase adjusting variable capacitor 333 is used. As a result, it is possible to omit cuts and tries by simulations and experiments that had to be performed several times to optimize the second harmonic phase. In addition, by adjusting the voltage of the phase adjustment variable capacitor 333 in the final inspection process, it is possible to absorb the phase variation of the second harmonic generated in the manufacturing process and to improve the yield.

  INDUSTRIAL APPLICABILITY The present invention can be used for a high frequency power amplifier including a second harmonic control circuit used in the field of wireless communication, and is particularly useful when it is desired to realize a stable and highly efficient operation of a transmission unit.

The figure which shows the structure of the high frequency power amplifier which concerns on the 1st Embodiment of this invention. The figure which shows the circuit example of the fundamental wave input matching circuit 2 The figure which shows the detailed structural example 1 of the 2nd harmonic control circuit 3 of 1st Embodiment. The figure which shows the other detailed structural example 1 'of the 2nd harmonic control circuit 3 of 1st Embodiment. The figure which shows the other detailed structural example 1 '' of the 2nd harmonic control circuit 3 of 1st Embodiment The figure which shows the detailed structural example 2 of the 2nd harmonic control circuit 3 of 2nd Embodiment. The figure which shows the detailed structural example 3 of the 2nd harmonic control circuit 3 of 3rd Embodiment. The figure which shows the detailed structural example 4 of the 2nd harmonic control circuit 3 of 4th Embodiment. The figure explaining the influence on the 2nd harmonic input impedance from the input terminal external impedance of the high frequency power amplifier concerning a 1st embodiment The figure which shows the phase control amount by the 2nd harmonic phase control circuit 33 of 1st Embodiment The figure which shows the phase control amount by the 2nd harmonic phase control circuit 33 of 2nd Embodiment The figure which shows the example of a circuit constant combination of the 2nd harmonic phase control circuit 33 of 3rd Embodiment. The figure explaining the effect on the secondary harmonic input impedance at the time of adding the Q value control resistor 320 to the secondary harmonic resonance circuit 32 The figure which shows the phase control amount by the variable capacity | capacitance of the 2nd harmonic phase control circuit 33 which concerns on 4th Embodiment The figure which shows the structural example of the conventional high frequency power amplifier The figure explaining the characteristic of the resonant circuit 300 for the 2nd harmonic phase adjustment of FIG. The figure explaining the influence on the second harmonic input impedance from the input terminal external impedance of the conventional high frequency power amplifier

Explanation of symbols

1, 2, 31 Input port 2 Fundamental wave input matching circuit 3 Second harmonic control circuit 4 Transistor 5 Output matching circuit 6, 25, 34 Output port 22, 24, 321, 332 Inductor 23, 302, 322, 331 Capacitor 32 Second harmonic resonance circuit 33 Second harmonic phase control circuit 300 Second harmonic phase adjustment resonance circuit 301 Transmission line 320 Resistor 333 Variable capacitor 334 Variable capacitor control power supply

Claims (11)

A high-frequency power amplifier composed of n-stage power transistors,
A fundamental wave matching circuit provided on the input side of the power transistor in the k-th stage (k is any one of 1 to n);
A second harmonic control circuit inserted between the k-th power transistor and the fundamental matching circuit;
The second harmonic control circuit is:
A second harmonic resonance circuit in which the resonance frequency is matched to the second harmonic of the fundamental frequency;
A high frequency power amplifier comprising: a second harmonic phase control circuit for controlling a second harmonic input impedance of a fundamental frequency viewed from the k-th power transistor to a desired position on a polar chart. The second harmonic resonance circuit is:
An inductor connected at one end to a signal line output from the fundamental matching circuit;
A capacitor having one end connected to the other end of the inductor and the other end grounded;
The high frequency power amplifier according to claim 1, wherein a resonance frequency by the inductor and the capacitor is set to a second harmonic of a fundamental frequency. The second harmonic resonance circuit is:
A resistor having one end connected to a signal line output from the fundamental matching circuit;
An inductor having one end connected to the other end of the resistor;
A capacitor having one end connected to the other end of the inductor and the other end grounded;
The resonance frequency of the inductor and the capacitor is set to the second harmonic of the fundamental frequency, and the resistance is in the range of 0.1Ω to 6Ω in order to control the Q value of the second harmonic resonance circuit. The high frequency power amplifier according to claim 1, which is set. The second harmonic resonance circuit is:
An inductor connected at one end to a signal line output from the fundamental matching circuit;
A resistor connected in parallel with the inductor;
A capacitor having one end connected to the other end of the inductor and the other end grounded;
The resonance frequency of the inductor and the capacitor is set to the second harmonic of the fundamental frequency, and the resistance is set in a range of 100Ω to 10 kΩ to control the Q value of the second harmonic resonance circuit. The high frequency power amplifier according to claim 1. The second harmonic resonance circuit is:
An inductor connected at one end to a signal line output from the fundamental matching circuit;
A semiconductor integrated circuit including a capacitor having one end connected to the other end of the inductor and the other end grounded;
The inductor is formed of a wiring having a resistance component of sheet resistance of 0.001 [Ω / □] to 0.1 [Ω / □], and the resonance frequency of the inductor and the capacitor is a secondary frequency of the fundamental frequency. The high frequency power according to claim 1, wherein the high frequency power is set in a range of 0.1Ω or more and 6Ω or less in order to control a Q value of the second harmonic resonance circuit. amplifier. The second harmonic resonance circuit is a line having one end connected to a signal line output from the fundamental matching circuit and the other end grounded and having a quarter electrical length of the wavelength λ of the fundamental frequency. The high-frequency power amplifier according to claim 1 configured.   The second harmonic resonance circuit is a line having one end connected to a signal line output from the fundamental matching circuit and the other end opened and having an electrical length of 1/8 of the wavelength λ of the fundamental frequency. The high-frequency power amplifier according to claim 1 configured. The second harmonic phase control circuit is:
Consists of a capacitor inserted between the output of the fundamental matching circuit and the input of the power transistor,
2. The high frequency power amplifier according to claim 1, wherein a second harmonic input impedance of a fundamental frequency viewed from the k-th power transistor is controlled in a range of + 180 ° to + 360 ° on a polar chart. The second harmonic phase control circuit is:
It consists of an inductor inserted between the output of the fundamental matching circuit and the input of the power transistor,
2. The high-frequency power amplifier according to claim 1, wherein a second harmonic input impedance of a fundamental frequency viewed from the k-th power transistor is controlled in a range of + 0 ° to + 180 ° on a polar chart. The second harmonic phase control circuit is:
Consists of an inductor and a capacitor connected in series inserted between the output of the fundamental matching circuit and the input of the power transistor,
2. The high frequency power amplifier according to claim 1, wherein a second harmonic input impedance of a fundamental frequency viewed from the k-th power transistor is controlled in a range of + 0 ° to + 360 ° on a polar chart. The second harmonic phase control circuit is:
Inductor and capacitor connected in series inserted between the output of the fundamental matching circuit and the input of the power transistor;
A variable capacitor having one end connected to a connection point between the inductor and the capacitor and the other end grounded,
2. The high frequency power amplifier according to claim 1, wherein a second harmonic input impedance of a fundamental frequency viewed from the k-th power transistor is controlled in a range of + 0 ° to + 360 ° on a polar chart.

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