JP2009232578A - Control circuit provided in switching power supply circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce input voltage dependency and/or output voltage dependency at an output limiting point that is a threshold of output current to a load in a switching power supply circuit. <P>SOLUTION: The control circuit includes: a terminal (VH) input by input voltage (VH) based on a commercial power supply; a terminal (IS) input by DC voltage (IS) compared with a voltage threshold (IS) corresponding to the output limiting point, or the threshold of output current to a load; a terminal (VCC) input by DC voltage (VCC) based on voltage generated on an auxiliary winding of a transformer; and an output control circuit for turning off a switching element connected to a primary winding when the voltage threshold (IS) exceeds the DC voltage (IS). The control circuit includes a voltage threshold variable circuit for raising the voltage threshold (IS) when the input voltage (VH) is low, and/or, for lowering one threshold element value (IS_bias) of the voltage threshold (IS) when the DC voltage (VCC) is low. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a control circuit provided in a switch power supply circuit.

  In general, a switching power supply circuit includes a primary circuit connected to a commercial power supply, a secondary circuit connected to a load, and a transformer. The primary winding of the transformer is provided in the primary side circuit, and the secondary winding of the transformer is provided in the secondary side circuit. Such a switching power supply circuit may be provided with, for example, a MOS Oxide Semiconductor Field Effect Transistor (MOS FET) connected to the primary winding and a control IC (Integrated Circuit) connected to the gate terminal of the MOS FET. is there. In this case, the control IC can control the effective amount of current supplied to the primary winding by controlling the output to the gate terminal (by controlling the on / off ratio).

  Control ICs include ICs with built-in overcurrent protection circuits. The overcurrent protection circuit is a circuit for preventing an overcurrent from being output to the load. As an overcurrent protection circuit, for example, there is a circuit disclosed in Patent Document 1.

JP-A-6-233533

  The control IC can include a power limiting circuit in addition to the overcurrent protection circuit. The power limiting circuit is a circuit for limiting the power output from the secondary circuit to the load (hereinafter referred to as “output power Po”).

  In such a control IC, a power limit point and an overload detection point are defined. The power limit point is a first type load current threshold value for determining whether or not to apply power limit. When the voltage output from the secondary circuit to the load (hereinafter referred to as “output voltage Vo”) is a certain value, the current output from the secondary circuit to the load (hereinafter referred to as “load current Io”). When the power limit point is reached, the output voltage Vo is reduced, thereby limiting the output power Po. On the other hand, the overload detection point is a second type load current threshold value for determining whether to interrupt the power output. When the output voltage Vo is a certain value and the load current Io exceeds the power limit point and reaches the overload detection point, the MOS FET oscillation operation is stopped and the output of the output power Po is cut off .

  For example, the control IC can be configured to monitor the drain current of the MOS FET and perform power limitation and overcurrent protection based on the magnitude of the drain current.

  However, in this configuration, even if the output voltage Vo is the same, the power limit point and the overload detection point will change if the voltage input to the primary circuit (hereinafter referred to as “input voltage Vi”) is different. There's a problem. Specifically, for example, as shown in FIG. 1, when the value of the output voltage Vo is “output 1” and the value of the input voltage Vi is “input 2” higher than “input 1”, The power limit point and the overload detection point become larger than when the input voltage Vi is “input 1”. This is because power is supplied to the secondary side circuit, and when the input voltage Vi increases, the drain current decreases. Therefore, there is a difference between the drain current and the magnitude for power limitation or overcurrent protection. That's because it gets more.

  In addition, the switching power supply circuit can be an output variable type power supply circuit in which the output voltage Vo is variable. In this case, in the above configuration, even if the input voltage Vi is the same, the power is different if the output voltage Vo is different. There is also a problem that the limit point and the overload detection point change. Specifically, for example, as shown in FIG. 1, when the input voltage Vi is “input 1” and the value of the output voltage Vo is “output 2” lower than “output 1”, an overload occurs. The detection point becomes larger along the power limit curve than when the output voltage Vo is “output 1”.

  Accordingly, a first object of the present invention is to reduce the input voltage dependency of an output limit point (for example, a power limit point and / or an overload detection point) which is a threshold value of an output current to the load of the switching power supply circuit. is there.

  The second object of the present invention is to reduce the output voltage dependency of the overload detection point.

  The control circuit includes a terminal (VH) to which an input voltage (VH) based on a commercial power supply is input and a DC voltage (IS_th) that is compared with a voltage threshold (IS_th) corresponding to an output limit point that is a threshold of an output current to the load. (IS) is provided with a terminal (IS), and an output control circuit that turns off the switching element connected to the primary winding when the DC voltage (IS) exceeds the voltage threshold (IS_th).

  In the first aspect of the present invention, in such a control circuit, the voltage threshold value that lowers the voltage threshold value (IS_th) when the input voltage (VH) is high and increases the voltage threshold value (IS_th) when the input voltage (VH) is low. A variable circuit is provided.

  The control circuit includes a terminal (VCC) instead of or in addition to the terminal (VH). A DC voltage (VCC) based on a voltage generated in the auxiliary winding of the transformer (a winding provided in the primary circuit facing the secondary winding) is input to the terminal (VCC).

  In the second aspect of the present invention, when the DC voltage (VCC) is high in such a control circuit, one threshold element value (IS_bias) of the voltage threshold (IS_th) is increased and the DC voltage (VCC) is low. A voltage threshold variable circuit that lowers the threshold element value (IS_bias) is provided.

  FIG. 2 shows a switching power supply circuit according to an embodiment of the present invention.

  This switching power supply circuit is, for example, a self-oscillation type switching power supply circuit. This switching power supply circuit includes a primary side circuit 501 connected to the commercial power supply 101, a secondary side circuit 503 connected to a load (not shown), and a transformer 4. The primary side circuit 501 is provided with a primary winding 4 a and an auxiliary winding 4 c of the transformer 4, and the secondary side circuit 503 is provided with a secondary winding 4 b of the transformer 4. The secondary winding 4b is opposed to the primary winding 4a and the auxiliary winding 4c. The anode terminal of the rectifying diode D2 is connected to one end of the secondary winding 4b, and one end (high potential side output terminal) of the capacitor C2 is connected to the cathode terminal of the diode D2.

  When the electronic device including the switching power supply circuit is in the normal mode, the voltage “output 1” is output to the load, and when the electronic device is in the power saving mode, the voltage “output 2” (output 1>) Output 2) is output. The switching between the voltage “output 1” and the voltage “output 2” is performed, for example, by turning on / off a predetermined switching element in the secondary circuit 503 (for example, energizing a Zener diode connected to a power supply output control terminal of a load). (On / off of the transistor to be controlled). That is, in the normal mode, the predetermined switching element is on, and in the power saving mode, the predetermined switching element is off.

  The primary side circuit 501 includes an EMI (electromagnetic immunity) filter circuit 1, a diode bridge 2, a smoothing capacitor C 1, a MOS FET (Metal Oxide Semiconductor Field Effect Transistor) 61, and a control IC 53.

  The EMI filter circuit 1 is connected to the commercial power supply 101 and is a filter for suppressing EMI noise.

  The diode bridge 2 full-wave rectifies the AC voltage from the commercial power supply 101 via the EMI filter circuit 1. The smoothing capacitor C1 is connected between both output terminals of the diode bridge 2 and smoothes the DC power after full-wave rectification.

  The drain terminal of the MOS FET 61 is connected to one end of the primary winding 4 a of the transformer 4, and the gate terminal is connected to the secondary output voltage control terminal (hereinafter, OUT terminal) of the control IC 53.

  The control circuit IC53 is, for example, a PWM (Pulse Wide Modulation) controller. The control circuit IC53 includes, for example, a GND terminal, a first power supply terminal (hereinafter referred to as a VH terminal), a second power supply terminal (hereinafter referred to as a VCC terminal), an OUT terminal, and a power limiting input terminal (hereinafter referred to as a voltage reference). IS terminal) and a voltage control signal input terminal (hereinafter referred to as FB terminal).

  The VH terminal is a terminal that supplies a starting current when the power is started, and supplies power to the VCC terminal in place of the auxiliary winding 4c in the power saving mode. The VH terminal is connected to the high voltage line. The AC voltage from the commercial power supply 101 is rectified and smoothed to the VH terminal, and the DC voltage VH is input via the starting resistors R1 and R2. One ends of the start resistors R1 and R2 connected in series are connected to the high potential side output end of the diode bridge 2, and the other ends of the start resistors R1 and R2 are connected to the VH terminal. Note that a constant current circuit is built in the VH terminal, and according to the circuit diagram of FIG. 2, a DC voltage is input to the VH terminal, but an AC full-wave or AC half-end may be input to the VH terminal. .

  The VCC terminal is a terminal to which a DC voltage VCC based on the voltage generated in the auxiliary winding 4c is input. The DC voltage VCC is a DC voltage (for example, 16V) lower than the DC voltage (for example, 120V) from the capacitor C1. When a voltage is generated in the auxiliary winding 4c, the capacitor C3 is charged through the backflow prevention diode D3 and the resistor R4, and the DC voltage VCC is input from the capacitor C3 to the VCC terminal. The anode terminal of the backflow prevention diode D3 is connected to one end of the auxiliary winding 4c, and the cathode terminal is connected to one end of a resistor R4 whose other end is connected to the VCC terminal. One end (high potential side output end) of the capacitor C3 is connected to the VCC terminal, and the other end (low potential side output end) is connected to the low potential side output end of the diode bridge 2 and the other end of the auxiliary winding 4c. ing.

  The OUT terminal is a terminal from which a voltage signal (voltage signal input to the gate terminal of the MOS FET 61) for controlling power supply to the primary winding 4a (power supply to the secondary circuit 503) is output. . The OUT terminal is connected to the gate terminal of the MOS FET 61 through resistors R6 and R7 and a diode D4. From the OUT terminal, the MOS FET 61 is turned on in the H state (high state), and a voltage having the same value as the DC voltage VCC is output. The MOS FET 61 is turned off in the L state (low state). Thus, a voltage of approximately 0V is output.

  The IS terminal is connected to the source terminal of the MOS FET 61 via a resistor R8. A drain current signal flowing through the MOS FET 61 is input to the IS terminal. Specifically, a current detection resistor R5 is connected between the source terminal of the MOS FET 61 and GND, and the drain current flowing through the MOS FET 61 is converted into a voltage by the current detection resistor R5 (DC) at the IS terminal. Voltage IS) is input.

  A voltage control signal (DC voltage FB) from the photocoupler 7 is input to the FB terminal. The photocoupler 7 is provided in a voltage detection circuit (not shown). The voltage detection circuit uses the voltage across the capacitor C2 for stabilizing the secondary output voltage (the capacitor C2 to which the induced current from the secondary winding 4b is input via the diode D2) as the secondary output voltage of the transformer 4. As a circuit to be monitored. A voltage control signal according to the monitoring result is output from the photocoupler 7. The collector terminal of the phototransistor constituting the photocoupler 7 is connected to the FB terminal of the control IC 53 via the resistor R 3, and the emitter terminal is connected to the low potential side output terminal of the diode bridge 2.

  In the present embodiment, the above-described control IC 53 is designed to realize what is shown in FIG. Specifically, first, even when the input voltage Vin increases from “input 1” to “input 2”, the power limit point and the overload detection point can be maintained at design target values (desired values). Designed to be able to. Second, it is designed so that the power limit point and overload detection point can be maintained at the design target values (desired values) even when the output voltage Vo decreases from “Output 1” to “Output 2”. (In this embodiment, design target values of the power limit point and the overload detection point are values when the input voltage Vin is “input 1” and the output voltage Vo is “output 1”).

  Hereinafter, the internal configuration of the control IC 53 will be described with reference to FIG.

  The DC voltage IS input to the IS terminal is compared with the threshold value VIS_th. VIS_th is a voltage threshold corresponding to the power limit point, and is, for example, the sum of VIS_th (VH) and VIS_bias. VIS_th (VH) is the first element voltage of VIS_th, and VIS_bias is the second element voltage of VIS_th.

  The DC voltage FB input to the FB terminal is compared with the threshold value VFB_olp_th. VFB_olp_th is a voltage threshold corresponding to the overload detection point, and is, for example, a constant value.

  The control IC 53 includes a bias level shift circuit 301, a threshold level variable circuit 303, a VH monitoring circuit 83, a current comparator 81, an operational amplifier 85, an RS flip-flop (hereinafter referred to as “RS-FF”) 73, , An AND circuit 75, a driver circuit 79, and an oscillator 71.

  The bias level shift circuit 301 is a circuit that receives the DC voltage VCC from the VCC terminal and outputs VIS_bias. The bias level shift circuit 301 outputs VIS_bias1 if the DC voltage VCC is higher than the reference voltage Vstoff, and outputs VIS_bias2 (VIS_bias2 <VIS_bias1) if the DC voltage VCC is lower than the reference voltage Vstoff. Yes. Specifically, a comparator 317, a VIS_bias1 power source, a VIS_bias2 power source, a VIS_bias1 power source switch 311, a VIS_bias2 power source switch 313, and an inverting circuit 315 interposed between the output terminal of the comparator 317 and the switch 313 are provided. It is done. If the input voltage VCC is higher than the reference voltage Vstoff, as shown in FIG. 5A, the L level IN_IS signal is input from the comparator 317 to the switch 311 and the switch 311 is turned on. As a result, VIS_bias1 becomes a bias level shift circuit. 301 is output. On the other hand, if the input voltage VCC is lower than the reference voltage Vstoff, the H level IN_IS signal is output from the comparator 317 as shown in FIG. 5A, and the L level IN_IS signal inverted by the inversion circuit 315 is switched. As a result, VIS_bias2 is output from the bias level shift circuit 301. The logic that the IN_IS signal turns on / off each switch (311 313) may be reversed depending on the design. The DC voltage VCC is higher than the reference voltage Vstoff when the electronic device having the control IC 53 is in the normal mode, and is lower than the reference voltage Vstoff when the electronic device is in the power saving mode. When the DC voltage VCC is higher than the reference voltage Vstoff (for example, in the normal mode), the power supply of the control IC 53 is the VCC terminal (DC voltage VCC), and the DC voltage VCC is lower than the reference voltage Vstoff. In some cases (for example, at the time of startup or in the power saving mode), the power source of the control IC 53 is the VH terminal (DC voltage VH).

  The VH monitoring circuit 83 is interposed between the VH terminal and the threshold level variable circuit 303. The VH monitoring circuit 83 detects the DC voltage VH input to the VH terminal. The detected DC voltage VH is input to the threshold level variable circuit 303.

  The threshold level variable circuit 303 is a circuit that changes VIS_th (VH) in accordance with the input DC voltage VH. As shown in FIG. 5B, VIS_th (VH) is a function with the input voltage VH as a variable, specifically, a function in which VIS_th (VH) monotonously decreases when the input voltage VH monotonously increases. The threshold level variable circuit 303 is, for example, an inverting amplification amplifier as shown in FIG. 6A. As shown in FIG. 6B, the input voltage Vin of the inverting amplifier is a DC voltage VH, and the output voltage Vout is VIS_th (VH). The reference voltage Vref is a reference voltage for VIS_th. In this case, the slope of the graph shown in FIG. 5B is determined by (resistance value Rb / resistance value Ra).

  The threshold level variable circuit 303 is connected to the bias level shift circuit 301 and receives VIS_bias from the bias level shift circuit 301. Therefore, the output from the threshold level variable circuit 303 is VIS_th (see symbol B in FIG. 4) obtained by adding VIS_bias to VIS_th (VH) determined based on the DC voltage VH.

The IS terminal, the FB terminal, and the output side of the threshold level variable circuit 303 are connected to the input side of the current comparator 81. In the case of the following (1) or (2), the current comparator 81
(1) DC voltage IS> DC voltage FB,
(2) DC voltage IS> VIS_th,
A reset signal (for example, an L level signal) is output.

  The reference voltage of the operational amplifier 85 is VFB_olp_th, and the input voltage is the DC voltage FB. When the DC voltage FB is less than VFB_olp_th, an H level signal is input from the operational amplifier 85 to the AND circuit 75, and when the DC voltage FB exceeds VFB_olp_th, an L level signal is input from the operational amplifier 85 to the AND circuit 75. (In which case, which level of signal is output may be reversed depending on the design).

  The signal output from the oscillator 71 is input to the input S of the RS-FF 73, the signal output from the current comparator 81 is input to the input R, and the signal input to the input S and the input R from the output Q A signal of a level corresponding to the level is output and input to the AND circuit 75.

  The AND circuit 75 outputs an H level signal to the driver circuit 79 when both the input from the RS-FF 73 and the input from the operational amplifier 85 are at the H level, and when either one is at the L level, the L level is output. Is output to the driver circuit 79.

  The driver circuit 79 is a circuit that controls on / off of the MOS FET 61. The driver circuit 79 turns on the MOS FET 61 when an H level signal is input from the AND circuit 75, and turns off the MOS FET 61 when an L level signal is input from the AND circuit 75.

When an L level signal is output from the AND circuit 75, the following case (A) or (B):
(A) An L level signal was input from RS-FF73.
(B) An L level signal is input from the operational amplifier 85.
It is.

  The case (A) occurs when the reset signal is input from the current comparator 81 to the input R of the RS-FF 73. The reset signal is output from the current comparator 81 when the DC voltage IS> DC voltage FB or the DC voltage IS> VIS_th as described above. In short, when the DC voltage IS exceeds VIS_th, the MOS FET 61 is turned off as one of the power limiting operations. VIS_th (VH) constituting VIS_th is adjusted by the threshold level variable circuit 303 based on the DC voltage VH. For this reason, the input voltage dependency of the power limit point is reduced. Also, VIS_bias added to VIS_th (VH) is adjusted by the bias level shift circuit 301 based on the DC voltage VCC. For this reason, the output voltage dependency of the overload detection point is reduced. Note that when VIS_th is varied, not only the power limit point but also the overload detection point follows and becomes variable, thereby reducing the output voltage dependency of the overload detection point.

  The above is the description of the present embodiment.

  In the present embodiment, when an H level signal is input from the AND circuit 75 (that is, when the MOS FET 61 is turned on), an H level signal is output from the RS-FF 73 and the operational amplifier 85 This is also the case when an H level signal is output. A case where an H level signal is output from the RS-FF 73 is a case where an H level signal is input to the input S from the oscillator 71. Further, when the H level signal is output from the operational amplifier 85, as described above, the DC voltage VFB is less than VFB_olp_th.

  In the present embodiment, as shown in FIG. 7A, with the circuit configuration described above, the DC voltage FB increases as the output voltage to the load increases, but is at most VFB_olp_th. Further, in the range of DC voltage IS <VIS_th, the DC voltage FB becomes the threshold voltage of the DC voltage IS, and in the range of DC voltage IS ≧ VIS_th, power is limited and the output voltage starts to decrease. As shown in FIG. 7B, when the normal mode is changed to the power saving mode (when the DC voltage VCC becomes less than the reference voltage Vstoff), the output VIS_bias is switched from VIS_bias1 to VIS_bias2 (VIS_bias1> VIS_bias2).

  As mentioned above, although embodiment of this invention was described, this embodiment is only the illustration for description of this invention, and is not the meaning which limits the scope of the present invention only to this embodiment. The present invention can be implemented in various other modes without departing from the gist thereof. The switching power supply circuit according to the present invention can be mounted on various electronic devices such as a printer.

It is explanatory drawing of the subject of this invention. 1 shows a configuration example of a switching power supply circuit according to an embodiment of the present invention. It is explanatory drawing of the effect expected of the control IC provided in the switching power supply circuit of FIG. The outline | summary of the internal structure of the control IC provided in the switching power supply circuit of FIG. 2 is shown. FIG. 5A shows the characteristics of the bias level shift circuit. FIG. 5B shows characteristics of the threshold level variable circuit. FIG. 6A shows the configuration of the threshold level variable circuit. FIG. 6B shows the relationship between the input and output of the threshold level variable circuit. FIG. 7A shows the relationship between the DC voltages IS and FB and VIS_th and VFB_olp_th. FIG. 7B shows the relationship between the DC voltage VCC and VIS_bias.

Explanation of symbols

53 ... Control IC 301 ... Bias level shift circuit 303 ... Threshold level variable circuit

Claims (8)

In the control circuit provided in the switching power supply circuit,
The switching power supply circuit is
A primary circuit connected to a commercial power source;
A secondary circuit for supplying power to the load based on power supplied from the primary circuit connected to a load;
A primary winding provided in the primary side circuit, and a secondary winding opposed to the primary winding provided in the secondary side circuit, and a transformer.
The primary circuit comprises a switching element;
Power supply from the primary circuit to the secondary circuit is controlled by turning on / off the switching element,
The control circuit includes:
A terminal (OUT) connected to an on / off control terminal of the switching element;
A terminal (VH) to which an input voltage (VH) based on the commercial power source is input;
A terminal (IS) to which a direct current voltage (IS) based on a current flowing through the switching element is compared with a voltage threshold value (IS_th) corresponding to an output limit point which is a threshold value of the output current to the load, and
A circuit that changes the voltage threshold (IS_th) based on the input voltage (VH), and when the input voltage (VH) is high, the voltage threshold (IS_th) is lowered and the input voltage (VH) is low. And a voltage threshold variable circuit for increasing the voltage threshold (IS_th),
A circuit for controlling on / off of the switching element via the terminal (OUT), wherein the switching is performed when the DC voltage (IS) exceeds the voltage threshold (IS_th) after the change by the voltage threshold variable circuit. A control circuit comprising an output control circuit for turning off the element. The transformer is further provided with an auxiliary winding provided in the primary circuit and facing the secondary winding;
The voltage threshold (IS_th) is a value based on a first threshold element value (IS_th (VH)) and a second threshold element value (IS_bias), and the first threshold element value (IS_th (VH)) and If the second threshold element value (IS_bias) is high, the voltage threshold (IS_th) is also high, and the first threshold element value (IS_th (VH)) and / or the second threshold element value (IS_bias) Is low, the voltage threshold (IS_th) is also low,
The control circuit further includes a terminal (VCC) to which a DC voltage (VCC) based on the voltage generated in the auxiliary winding is input;
The voltage threshold variable circuit is
When the input voltage (VH) is high, the first threshold element value (IS_th (VH)) is lowered, and when the input voltage (VH) is low, the first threshold element value (IS_th (VH)) is set. A first sub-variable circuit to be raised,
A second sub-value that increases the second threshold element value (IS_bias) when the DC voltage (VCC) is high and decreases the second threshold element value (IS_bias) when the DC voltage (VCC) is low. With a variable circuit,
The voltage threshold value (IS_th) after the change is the first threshold element value (IS_th (VH)) after the change in the first sub variable circuit and the value after the conversion in the second sub variable circuit. A value based on the second threshold element value (IS_bias),
The control circuit according to claim 1. The DC voltage (VCC) is higher than a predetermined reference value when an electronic device provided with the switching power supply circuit is in a normal mode, and is higher than a predetermined reference value when the electronic device is in a power saving mode. Is low,
The first sub-variable circuit is a circuit that monotonically decreases the first threshold element value (IS_th (VH)) in response to a monotonic increase in the input voltage (VH);
The second sub-variable circuit is configured such that the DC voltage (VCC) is higher than the predetermined reference value among the high second threshold element value (IS_bias) and the low second threshold element value (IS_bias). In this case, the high second threshold element value (IS_bias) is selected, and the low second threshold element value (IS_bias) is selected when the DC voltage (VCC) is lower than the predetermined reference value. ,
The control circuit according to claim 2. The voltage variable circuit monotonously decreases the voltage threshold (IS_th) in response to a monotonic increase in the input voltage (VH).
The control circuit according to claim 1. In the control circuit provided in the switching power supply circuit,
The switching power supply circuit is
A primary circuit connected to a commercial power source;
A secondary circuit for supplying power to the load based on power supplied from the primary circuit connected to a load;
A primary winding and an auxiliary winding provided in the primary side circuit, and a transformer provided with a secondary winding facing the primary winding and the auxiliary winding in the secondary side circuit,
The primary side circuit comprises a switching element connected to one end of the primary winding;
Power supply from the primary circuit to the secondary circuit is controlled by turning on / off the switching element,
The control circuit includes:
A terminal (OUT) connected to an on / off control terminal of the switching element;
A terminal (VCC) to which a DC voltage (VCC) based on the voltage generated in the auxiliary winding is input;
A terminal (IS) to which a direct current voltage (IS) based on a current flowing through the switching element is compared with a voltage threshold value (IS_th) corresponding to an output limit point which is a threshold value of an output current to the load;
A voltage threshold variable circuit;
A circuit for controlling on / off of the switching element via the terminal (OUT), wherein the switching is performed when the DC voltage (IS) exceeds the voltage threshold (IS_th) after the change by the voltage threshold variable circuit. An output control circuit for turning off the element,
The voltage threshold (IS_th) is a value based on a first threshold element value (IS_th (VH)) and a second threshold element value (IS_bias), and the first threshold element value (IS_th (VH)) and If the second threshold element value (IS_bias) is high, the voltage threshold (IS_th) is also high, and the first threshold element value (IS_th (VH)) and / or the second threshold element value (IS_bias) Is low, the voltage threshold (IS_th) is also low,
The voltage threshold variable circuit is a circuit that changes the second threshold element value (IS_bias) based on the DC voltage (VCC), and when the DC voltage (VCC) is high, the second threshold element value (IS_bias) is increased, and when the DC voltage (VCC) is low, the second threshold element value (IS_bias) is decreased.
Control circuit. The DC voltage (VCC) is higher than a predetermined reference value when an electronic device provided with the switching power supply circuit is in a normal mode, and is higher than a predetermined reference value when the electronic device is in a power saving mode. Is low,
When the voltage threshold variable circuit has the DC voltage (VCC) higher than the predetermined reference value among the high second threshold element value (IS_bias) and the low second threshold element value (IS_bias). Selecting the high second threshold element value (IS_bias) and selecting the low second threshold element value (IS_bias) when the DC voltage (VCC) is lower than the predetermined reference value;
The control circuit according to claim 5. A primary circuit connected to a commercial power source;
A secondary circuit for supplying power to the load based on power supplied from the primary circuit connected to a load;
A transformer having a primary winding in the primary side circuit and a secondary winding facing the primary winding in the secondary side circuit; and the control circuit according to any one of claims 1 to 6. Switching power supply circuit with   An electronic device comprising the switching power supply circuit according to claim 7.

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