JP2009231453A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that although an IGBT using a conventional SOI substrate has a mainstream structure provided with a horizontal type bipolar structure and it is easy to adopt a high withstand voltage and large currents by making a main current flow in parallel with a semiconductor substrate surface, the current drive capability cannot be increased. <P>SOLUTION: In the semiconductor device, a bipolar transistor configuring the IGBT is constituted of two bipolar transistors of a vertical type and a horizontal type. Since the current drive capability of the vertical type bipolar transistor is added as well in addition to the current drive capability of the horizontal type bipolar transistor, high current drive capability is provided even under the demand of thinning a semiconductor substrate. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention is a semiconductor device having an MOS-type transistor and an insulated gate bipolar transistor by a bipolar transistor provided on an SOI substrate in which a buried insulating film and a semiconductor thin film layer are laminated on a semiconductor substrate.

  An insulated gate bipolar transistor (IGBT) has a MOS transistor in an input stage and a bipolar transistor in an output stage, which are configured as one transistor element. It is an element that combines a high input impedance due to an insulated gate configuration of a MOS transistor and a high current drive capability of a bipolar transistor. In the following description, the insulated gate bipolar transistor is denoted as IGBT.

In general, an IGBT has a shape in which a collector is added to a drain region when a channel region of a MOS transistor is used as an emitter (in this case, the drain region serves as a base).
When predetermined voltage signals are applied to the gate electrode and collector of the MOS transistor, the MOS transistor is turned on, carrier injection from the collector to the base occurs, and the bipolar transistor is also turned on. At this time, since the resistance of the base portion (drain region) is reduced by this carrier injection, the IGBT has a lower on-resistance as a switching element, and thus can have a high current driving capability.

Further, since the IGBT is an input stage, the IGBT can be driven as a switching element because a large drive current can be handled by a voltage signal. For this reason, it is utilized in the field of power electronics as a high voltage semiconductor element.
When the IGBT is configured as a discrete element, a vertical structure (vertical type) in which a current flows in the vertical direction in the semiconductor chip is often adopted, and it is known as a transistor element having a large current and a large power.

By the way, as already known, a semiconductor device using a single crystal substrate may generate a signal delay or a leakage current due to the influence of a parasitic diode or a stray capacitance of the semiconductor substrate. In order to solve this problem, a semiconductor device using an SOI (Silicon On Insulator) substrate has been proposed.
An SOI substrate has a structure in which a buried insulating film and a semiconductor thin film layer are sequentially stacked on a semiconductor substrate, so that it is more expensive than a single crystal substrate and may not be widely used. However, in recent years, this has been solved, and semiconductor devices using an SOI substrate have begun to be widely used for logic circuits and analog circuits.

  With the widespread use of SOI substrates, there have been cases where IGBTs are also composed of SOI substrates. There has also been an example in which a transistor element such as a MOS transistor or a bipolar transistor and an IGBT are mixedly mounted on an SOI substrate. These transistor elements are provided in a semiconductor thin film layer on a buried insulating film constituting an SOI substrate. In such a case, a lateral structure (horizontal type) IGBT in which a current flows in the lateral direction of the semiconductor thin film layer has been proposed.

[Description of general IGBT: FIG. 8]
Here, a horizontal IGBT using a general SOI substrate will be described with reference to FIG. In FIG. 8, 901 is a semiconductor substrate, 902 is a buried insulating film, 903 is a gate insulating film, 904 is a gate electrode, 905 is a source region, 907 is a channel region and an emitter, 908 is a collector, 910 is a base, and 911 is a semiconductor thin film. A layer 913 is a base drift region and a drain region, and 915 is a high concentration impurity region. Reference numerals 912 and 914 denote electrodes.

  In FIG. 8, in the notation for explaining the conductivity type of a semiconductor, P type or N type is simply indicated by a symbol “P” or “N”. Note that the notation “P +” or “N +” indicates that the impurity concentration is high even for the same conductivity type, and the notation “N−” indicates that the impurity concentration is low even for the same conductivity type. ing.

The drain region 913, the channel region 907, the source region 905, the gate insulating film 903, and the gate electrode 904 form a MOS transistor, and a predetermined voltage is applied to the gate electrode 904, whereby the channel region 907 below the gate insulating film 903 is formed. An inversion channel layer is formed on the surface, and the MOS transistor becomes conductive.
Thus, when a positive voltage is applied to the electrode 914, the induced channel passes from the collector 908 through the base 910 and the drain region 913, and a current flows to the source region 905.

  Further, when the MOS transistor is turned on, minority carriers (holes) are injected into the drain region 913 which is the base drift region through the channel, and holes also flow from the collector 908, so that the resistance of the base drift region is reduced.

  By injecting minority carriers, bipolar transistors including a channel region 907 (emitter), a collector 908, and a base 910 are turned on, and a current flows between the channel region 907 and the collector 908.

  In this way, by changing the voltage applied to the gate electrode 904 of the MOS transistor, the on / off state of the bipolar transistor is controlled, and the current flowing together can be controlled.

  Since the IGBT has a characteristic of a high breakdown voltage semiconductor element, a drift region 910 is provided in the drain region (base) 913 or a buried insulating film 902 is formed in the semiconductor thin film layer 911 in order to further improve the breakdown voltage value. A high-concentration region 915 is provided in contact with. Since multiple diffusion layers are formed in the semiconductor thin film layer 911 in this way, the overall film thickness of the semiconductor substrate tends to increase as a result.

  Along with the recent trend of downsizing and thinning of semiconductor devices, semiconductor devices using SOI substrates tend to follow that. In that case, the semiconductor thin film layer is often thinned, and there is a high demand for thinning the semiconductor thin film layer even for a IGBT having a horizontal structure. In view of this, there has been proposed a technique capable of reducing the thickness of even an IGBT having a horizontal structure (see, for example, Patent Document 1).

  The prior art shown in Patent Document 1 will be described with reference to FIG. In FIG. 9, 10 is a semiconductor substrate, 11 is a base, 12 is a buried insulating film, 13 is a gate insulating film, 14 is a gate electrode, 15 is a source region, 16 is a drain region and a base drift region, 17 is a channel region and an emitter. , 18 is a collector, 19 is a semiconductor thin film layer, and 20 and 22 are electrodes.

  The channel region 17 and the base 11 are configured to reach the buried insulating film 12. The electrode 20 is a collector electrode. The electrode 22 is an emitter electrode, and is a common electrode for the channel region (emitter) 17 and the source region 15.

The drain region 16, the channel region 17, the source region 15, the gate insulating film 13 and the gate electrode 14 constitute a MOS transistor, and a predetermined voltage is applied to the gate electrode 14 to turn on the MOS transistor.
The channel region 17 is used as an emitter, and the base 11, the collector 18, and the base drift region 16 constitute a bipolar transistor.
When a voltage is applied to the gate electrode 14, an inversion channel layer is formed on the surface of the channel region 17 under the gate insulating film 13, and when the MOS transistor becomes conductive, a base drift region that also serves as the drain region 16 of the MOS transistor is formed. Minority carriers are injected, the bipolar transistor is turned on, and a current flows. By changing the voltage applied to the gate electrode 14, this current can be controlled, and the IGBT operates.

In the prior art shown in Patent Document 1, an inversion channel layer is formed in the base 11 or the base drift region 16 facing the interface between the buried insulating film 12 and the transistor element side, so that the IGBT cannot be turned off. The collector 18 is taken into the base 11.
Then, the thickness of the semiconductor thin film layer 19 is increased only in the portion where the collector 18 and the base 11 are provided so that the collector 18 does not diffuse deeply and reach the buried insulating film 12.

The prior art disclosed in Patent Document 1 is such that a current flows between the channel region (emitter) 17 and the collector region 18 with the film thickness cross section of the semiconductor thin film layer 19 of the SOI substrate as the cross section of the base 11. .
Although the thickness of some of the semiconductor thin film layers 19 must be increased, the thickness of the base drift region 16 can be decreased.

JP-A-7-58319 (pages 3 to 4, FIGS. 1 to 8)

However, in the prior art disclosed in Patent Document 1, since the emitter-collector current, which is a portion through which a large current flows as a bipolar transistor, flows only in the lateral direction of the semiconductor thin film layer 19, the thickness of the base drift region 16 (semiconductor The energization amount is limited by the thickness cross section of the thin film layer 19.
As shown in FIG. 9, if the thickness of the base drift region 16 is increased, more current can flow, but the semiconductor thin film layer 19 becomes thicker as a whole, and the previous semiconductor It goes against the demand for thinning the substrate.
Therefore, since the prior art disclosed in Patent Document 1 can constitute a IGBT having a horizontal structure, it can be easily mounted with other transistor elements, and can be applied to a system equipped with a switching element that can drive a current with a voltage signal. Although it is a device, as a semiconductor device to be mounted in a miniaturized system, its current drive capability cannot be increased, and it has become a semiconductor device that is narrowly used.

  The semiconductor device of the present invention has been made in order to solve such a problem, and adopts a IGBT having a horizontal structure, facilitates mixed mounting with other transistor elements, and reduces the thickness of the semiconductor substrate. The present invention provides a semiconductor device that satisfies both requirements and mounting of an IGBT having a large driving current.

  In order to achieve the above object, the semiconductor device of the present invention employs the following structure.

A semiconductor device using an SOI substrate in which a buried insulating film and a semiconductor thin film layer are stacked on a semiconductor substrate, the semiconductor thin film layer having a source region, a drain region, and a channel region, and a gate above the semiconductor thin film layer. In a semiconductor device having an insulated gate bipolar transistor comprising a MOS transistor having a gate electrode through an insulating film, and a bipolar transistor having a base, an emitter, and a collector in a semiconductor thin film layer,
A semiconductor thin film layer is provided with a common region in contact with the drain region and spaced apart from the channel region, and an independent region is provided in the drain region or separated from the common region, with the drain region serving as a base, the common region serving as a collector, and a channel region. A first bipolar transistor having an emitter as a base, a second bipolar transistor having a drain region as a base, a common region as an emitter or collector, and an independent region as a collector or emitter, a MOS transistor, a first bipolar transistor, and a second bipolar transistor An insulated gate bipolar transistor is constituted by two bipolar transistors.

  The drain region, the source region, and the channel region have a first block provided such that an end portion in the depth direction reaches the buried insulating film, and a common region has a first block provided so that the end portion in the depth direction reaches the buried insulating film. A second block provided parallel to the insulating film and having an end portion spaced apart from the channel region, and the independent region is provided spaced apart from the first block and facing the second block. To do.

  The first block has a higher impurity concentration than the second block.

  The drain region is characterized by a high impurity concentration in a portion facing the second block.

  The gate insulating film and the gate electrode are provided so as to cover an upper portion of a portion having a high impurity concentration in the drain region.

In the semiconductor device of the present invention, the bipolar transistor portion of the IGBT to be mounted is composed of two bipolar transistors, a first bipolar transistor and a second bipolar transistor, and the current path is increased. By doing so, the current drive capability of the IGBT can be improved.
Since each of the two bipolar transistors allows a current to flow, it is possible to provide a semiconductor device equipped with an IGBT that does not reduce the current driving capability even under the demand for thinning the semiconductor substrate.

  Also, a difference can be provided in the current drive capability of the first and second bipolar transistors. For this reason, it is possible to obtain characteristics according to the purpose of circuit use, and to provide a versatile semiconductor device.

  The semiconductor device of the present invention will be described using an IGBT using an SOI substrate as an example. The SOI substrate will be described on the assumption that a P-type semiconductor thin film layer is provided above a one-conductivity-type semiconductor substrate via a buried insulating film. In the IGBT, an N-type source region and a drain region are provided in the semiconductor thin film layer, an N-channel MOS transistor having a P-type channel region, a P-type emitter, an N-type base, P A description will be given using an example of a PNP type bipolar transistor provided with a type collector.

This bipolar transistor is composed of two transistors, a first bipolar transistor and a second bipolar transistor. The first bipolar transistor is a horizontal type (horizontal type), and the second bipolar transistor is a vertical type (vertical type).
The channel region of the MOS transistor constituting the IGBT is the emitter of the horizontal bipolar transistor, the drain region is the base of the vertical and horizontal bipolar transistors, the common region described later is the collector of the vertical and horizontal bipolar transistors, and also described later. A description will be given using an example in which the independent region is an emitter of a vertical bipolar transistor.

In the drawings used in the description, portions unnecessary for the description are omitted and schematically shown so as to facilitate the description of the configuration or operation of the IGBT.
In the drawing, in the notation for explaining the conductivity type of a semiconductor, P type or N type is simply indicated by a symbol “P” or “N”, and the level of impurity concentration is “P +” or “N +”. ".

[Description of Structure of Semiconductor Device of the Present Invention 1: FIGS. 1 and 2]
The structure of the first embodiment of the semiconductor device having the IGBT of the present invention will be described with reference to FIG. FIG. 1A is a plan view schematically showing the structure of the IGBT, and FIG. 1B is a schematic view showing a state cut along a cutting line AA ′ in FIG. FIG. The equivalent circuit diagram is shown in FIG.
In FIG. 1 or 2, reference numeral 101 denotes a semiconductor substrate, 102 denotes a buried insulating film, 103 denotes a gate insulating film of a MOS transistor, 104 denotes a gate electrode, 105 denotes a source region, and 106 denotes a drain region of the MOS transistor. In addition, the bases of both the vertical and horizontal bipolar transistors 107 are a channel region of the MOS transistor and the emitter of the horizontal bipolar transistor. Hereinafter, this emitter is referred to as a first emitter.
108 and 109 constitute a common area, 108 is a first block of the common area, and 109 is a second block of the common area. These two blocks are the collectors of the vertical and horizontal bipolar transistors.
Reference numeral 110 denotes an independent region, which is an emitter of a vertical bipolar transistor. Hereinafter, this emitter is referred to as a second emitter.

  111a is a portion of the drain region 106 that is shown for easy explanation of the portion that becomes the base of the horizontal bipolar transistor. Similarly, 111b is a portion of the drain region 106 that is shown for easy explanation of the portion that becomes the base of the vertical bipolar transistor.

  130 is a semiconductor thin film layer. The diffusion regions of the MOS transistor and the bipolar transistor are configured to have a predetermined shape to be described later by introducing impurities into the semiconductor thin film layer 130.

Reference numeral 112 denotes a source electrode connected to the source region 105 of the MOS transistor. For example, it is made of a metal such as aluminum or copper and is electrically connected to the source region 105. Reference numeral 113 denotes a second emitter electrode connected to the second emitter 110 of the vertical bipolar transistor. Reference numeral 114 denotes a collector electrode connected to the collectors of vertical and horizontal bipolar transistors.
Reference numeral 117 denotes a first emitter electrode connected to the channel region 107 (first emitter) of the MOS transistor. As shown in FIG. 1A, the first emitter electrode 117 is used to apply a voltage to the first emitter, so that the channel region 107 and the gate electrode 104 are drawn out from a portion where they overlap in a plane. It is provided in the part where both electrodes are not in contact.

The first emitter electrode 117, the second emitter electrode 113, and the collector electrode 114 are, for example,
Like the source electrode 112, it is made of metal and is electrically connected to each semiconductor region.
Each diffusion region of the MOS transistor or bipolar transistor provided in the semiconductor thin film layer 130 and the above-described electrode are connected via an interlayer insulating film (not shown) provided on the semiconductor thin film layer 130. For example, in FIG. 1B, an interlayer insulating film is provided on the semiconductor thin film layer 130 and the above-described electrode is provided on the interlayer insulating film. The connection between the electrode and the region in the semiconductor thin film layer 130 is performed by opening a contact hole in the interlayer insulating film. Since FIG. 1 is a diagram schematically illustrating the configuration of the present invention, such a connection between the semiconductor layer and the electrode is omitted.

As shown in FIG. 1B, the source region 105, the channel region 107 (first emitter), and the drain region 106 (base) constituting the MOS transistor are configured to reach the buried insulating film 102. Yes.
Similarly, the first block 108 in the common region constituting the bipolar transistor is also configured to reach the buried insulating layer 102.

The second block 109 in the common region is disposed on the buried insulating film 102 side of the semiconductor thin film layer 130 so as to be in contact therewith. The second emitter 110 is disposed on the surface side of the semiconductor thin film layer 130.
Between these opposing portions, there is a drain region 106 which becomes the base of both the vertical and horizontal bipolar transistors. By doing in this way, the 2nd emitter 110 and the 2nd block 109 have the part which planarly opposes (part 111b). Since a current can be made to flow uniformly through this portion 111b, a large current can be made to flow as a vertical bipolar transistor.

  The second block 109 is provided so as to be parallel to the buried insulating film 102 and its end is provided so as to be separated from the channel region 107 (first emitter). The drain region 106 that is sandwiched between these becomes the base portion of the horizontal bipolar transistor. By doing so, the channel region 107 (first emitter) and the second block 109 form a portion facing the buried insulating film 102 in the immediate vicinity (portion 111a). Since current can flow through this portion 111a, current can flow as a horizontal bipolar transistor.

[Description of Features of Semiconductor Device of the Present Invention: FIGS. 1 and 2]
The semiconductor device of the present invention is characterized in that the bipolar transistor constituting the IGBT is composed of two transistors of a vertical type and a horizontal type as described above.
In the equivalent circuit diagram shown in FIG. 2, these two bipolar transistors are described so as to be arranged in parallel and have a common base, but in the drain region 106, the base portion is This is different in bipolar transistors.
A horizontal bipolar transistor has the first block 108 and the second block 109, which are common regions, as a common collector, the portion 111a of the drain region 106 as a base, and the channel region 107 as a first emitter. is there. Similarly, a vertical bipolar transistor has a common region as a common collector, a portion 111b of the drain region 106 as a base, and a second emitter 110 as an independent region as an emitter.

  Since these two bipolar transistors can pass a current between an independent emitter and a common collector, a larger current than that of a conventionally known configuration in which only one bipolar transistor is included in the IGBT. It will have driving ability.

[Example of IGBT configuration parameters]
In both the vertical bipolar transistor and the horizontal bipolar transistor, the physical distance of the base portion sandwiched between the emitter and the collector affects the current driving capability as a transistor element. The base distance (the distance between the emitter and the collector) in the drain region 106 serving as the base of the bipolar transistor may be the same or may be changed between the vertical bipolar transistor and the horizontal bipolar transistor.

  By changing the base distance, it is possible to change the electrical characteristics such as the on-resistance of the bipolar transistor (also the on-resistance of the IGBT) and the rising characteristics. Therefore, this base distance can be freely selected at the time of designing the IGBT. Of course, it may be designed in accordance with the requirements of the system side on which the semiconductor device provided with the IGBT is mounted.

  It goes without saying that the factors that determine the electrical characteristics of the IGBT are not only based on the above-mentioned base distance, but are also closely related to the constituent elements of the MOS transistors and bipolar transistors that constitute the IGBT. For example, the thickness of the gate insulating film 103, the source region 105, the channel region 107, the drain region 106 serving as a base, the impurity concentration of the first block 108 and the second block 109 in the common region, and the like.

Here, the preferable dimension for implementing each element which comprises IGBT is illustrated.
The film thickness of the semiconductor thin film layer 130 is preferably 1.0 to 1.6 μm, for example, although it depends on the value of the power supply voltage or signal voltage for driving the semiconductor device of the present invention.
The base distance of the portion 111b of the drain region 106 serving as the base of the vertical bipolar transistor is preferably at least 0.2 μm or more. The base distance of the portion 111a of the drain region 106 serving as the base of the horizontal bipolar transistor is preferably at least 0.2 μm or more. Of course, these two base distances do not have to be the same value.
The diffusion depth of the second emitter 110 is preferably 0.3 μm. The diffusion depth of the second block 109 serving as a common region and a common collector is preferably 0.5 μm. The thickness of the gate insulating film 103 of the MOS transistor is 200 to 500 mm.

Furthermore, the impurity concentration of each element constituting the IGBT is also exemplified. The drain region 106 serving as the base of the two bipolar transistors is preferably about 1E17 to 1E18 cm ⁻³ , the channel region 107 (first emitter) is about 1E15 cm ⁻³ , and the second emitter 110 is preferably about 1E20 cm ⁻³ .
The structure that can be configured is determined by the film thickness and impurity concentration of each part, but the breakdown voltage and amplification factor of the two bipolar transistors are also determined thereby.

  The operation of the IGBT is controlled by a MOS transistor, and whether the MOS transistor is turned on or off is determined by a gate voltage value applied to the gate electrode 104. The gate threshold voltage for the on / off operation is adjusted by ion implantation of the impurity concentration on the surface of the channel region 107 (first emitter) (just below the gate insulating film 103).

[Description of Operation of Semiconductor Device of the Present Invention: FIG. 3]
Next, the operation of the semiconductor device having the IGBT of the present invention will be described with reference to FIG. FIG. 3 is a schematic diagram showing a state in which a voltage signal is applied to the cross-sectional view schematically shown in FIG. The voltage signal is shown as a battery for easy explanation. In FIG. 3, Vec is an emitter-collector voltage, and Vbe is an emitter-base voltage.
The second emitter 110, the source region 105, and the channel region 107 (first emitter) are a second emitter electrode 113, a source electrode 112, and a first emitter electrode 117 (not shown in FIG. 3).
And are connected to the negative potential side of Vec and Vbe. The positive potential side of Vec is connected to the first block 108 and the second block 109 via the collector electrode 114. The positive potential side of Vbe is connected to the second emitter 110 via the second emitter electrode 113.

Thus, the voltage Vec is applied so that the first block 108 and the second block 109, which are common collectors, have a positive potential with reference to the channel region 107 and the source region 105.
In this state, both the horizontal bipolar transistor and the vertical bipolar transistor are in an off state, and no current flows.
Next, the voltage Vbe is applied so that the gate electrode 104 has a positive potential. When this voltage Vbe becomes equal to or higher than the threshold value of the MOS transistor, a channel is formed in the channel region 107, and the MOS transistor is turned on.

  By this channel formation, the source region 105 and the drain region 106 become conductive, and the first block 108 and the second block 109, the drain region 106 (base) and the channel region 107 (first emitter), which are common collectors, It becomes a diode configuration and a diode forward current flows.

Thereby, electrons are injected into the drain region 106 (base) from the source region 105 of the MOS transistor, and holes are injected into the drain region 106 (base) from the first block 108 and the second block 109 which are common collectors. A corresponding current flows through the drain region 106 (base).
By this minority carrier injection into the base, the horizontal and vertical bipolar transistors are turned on, and the first and second blocks 108 and 109, the channel region 107 (first emitter) and the second emitter, which are common collectors, are turned on. A current flows between each of them 110 and operates as an IGBT.

[Description of Structure of Semiconductor Device of the Present Invention 2: FIG. 4]
Next, the structure of the second embodiment of the semiconductor device having the IGBT of the present invention will be described with reference to FIG. The difference from the first embodiment shown in FIG. 1 is the structure of the second emitter. In FIG. 4, reference numeral 410 denotes a second emitter. The same numbers are assigned to the configurations already described.
In the second embodiment shown in FIG. 4, the second emitter 410 is provided on the semiconductor thin film layer 130.

  The second emitter 410 is a semiconductor layer using an epitaxial growth technique known above the semiconductor thin film layer 130, and is processed into a predetermined shape. In the first embodiment shown in FIG. 1, the second emitter 110 is provided in the drain region 106 serving as a base. However, in the example shown in FIG. It is provided at the top. In accordance with this, the thickness of the second block 109 is increased.

By adopting such a configuration, the current drive capability of both the horizontal type and vertical type bipolar transistors can be improved.
That is, since the cross-sectional area of the second block 109 is increased, the resistance (collector resistance) of this portion is reduced. When a current flows through the bipolar transistor, the current flowing between the emitter and the collector loses a resistance component called a so-called emitter resistance and collector resistance, so these are preferably as small as possible. Even when it is desired to reduce the thickness of the semiconductor thin film layer 130 due to demands for miniaturization and thinning of the semiconductor device, the current driving capability is not lowered by the configuration shown in FIG. is there.

  For example, even if the semiconductor thin film layer 130 has a thickness of about 1 μm and a semiconductor element different from the IGBT is formed in the semiconductor thin film layer 130, the second emitter 310 is formed in the semiconductor according to the configuration of the second embodiment. Since it can be provided on the thin film layer 130, it can be mounted together with these semiconductor elements without deteriorating the current drive capability of both the horizontal and vertical bipolar transistors.

[Description 3 of Structure of Semiconductor Device of the Present Invention: FIG. 5]
Next, the structure of the third embodiment of the semiconductor device having the IGBT of the present invention will be described with reference to FIG. The difference from the first embodiment shown in FIG. 1 is the shapes of the gate insulating film and the gate electrode. In FIG. 5, 111 c is a surface portion of the drain region 106. Reference numeral 503 denotes a gate insulating film, and reference numeral 504 denotes a gate electrode. The same numbers are assigned to the configurations already described.
In the third embodiment shown in FIG. 5, the gate insulating film 503 and the gate electrode 504 extend in the direction of the second emitter 110 and cover the upper portion of the drain region 106.

By adopting such a configuration, it is possible to shorten the rise time, which is the time when the IGBT is turned on, and to reduce the on-resistance of the IGBT.
That is, when a predetermined voltage, which is a voltage signal, is applied to the MOS transistor on the gate insulating film 503 and the gate electrode 504 extending in the direction of the second emitter 110, the portion 111c which is the surface portion of the drain region 106 is applied by the applied voltage. Will accumulate careers. This carrier accumulation reduces the resistance of the portion 111a. As a result, the resistance from the second block 109 to the channel region 107 is lowered, so that the injection of minority carriers into the base of the 111b vertical bipolar transistor is accelerated, and there is no delay in operation with the horizontal bipolar transistor. IGBT operation can be obtained.
Minority carriers are injected through the accumulation layer of carriers generated in the portion 111c, but holes from the collector 109 also flow.

[Description of Structure of Semiconductor Device of the Present Invention 4: FIG. 6]
Next, the structure of the fourth embodiment of the semiconductor device having the IGBT of the present invention will be described with reference to FIG. The difference from the first embodiment shown in FIG. 1 is that a drain region 106 is provided with a region having the same conductivity type and a high impurity concentration. Reference numeral 606 denotes a high concentration drain region. The same numbers are assigned to the configurations already described.
In the fourth embodiment shown in FIG. 6, a high concentration drain region 606 is provided between the drain region 106 and the channel region 107.

With such a configuration, the problem that the IGBT does not turn off can be solved.
By the way, the IGBT reduces the impurity concentration of the base of the bipolar transistor to increase the resistance to ensure the breakdown voltage because the bipolar transistor can obtain a high breakdown voltage operation.
In the example shown in FIG. 4, the impurity concentration of the drain region 106 and the vertical bipolar base portion 111b is lowered.
When the impurity concentration in the region serving as the base of the bipolar transistor is lowered, the horizontal bipolar transistor is turned on, and a current flows between the second block 109 serving as a collector and the channel region 107 serving as a first emitter. Even if the input voltage signal is removed from the gate electrode 104 of the MOS transistor, the horizontal bipolar transistor may remain on. This is said to prevent the bipolar transistor from turning off.

The cause of this phenomenon is that a parasitic channel is formed in the portion 111 a of the drain region 106 that is in contact with the buried insulating film 102.
There is an interface state between the oxide film and the semiconductor layer at the interface between the buried insulating film 102 and the portion 111a, and carriers are easily trapped by the influence of ions in the buried insulating film 102. Cheap. Minority carriers are injected from the MOS transistor, and holes are also injected from the collector of the horizontal bipolar transistor. However, holes are trapped in this trap.

After the control MOS transistor is turned off, carriers in the base region are absorbed by the collector and the emitter, but a part of the carriers remains near the interface of the portion 111a, and when a parasitic channel is formed, current flows in the IGBT. It may continue to flow.
When the high-concentration drain region 606 is provided, since the impurity concentration is high, the semiconductor layer in the vicinity of the interface is not easily inverted, so that it is difficult to form a channel.

  The high concentration drain region 606 is provided to prevent the formation of such a parasitic channel, and solves the problem that the IGBT does not turn off by suppressing the formation of the inversion layer due to the high impurity concentration. To do.

[Application Example of Structure of Semiconductor Device of the Present Invention: FIG. 7]
Next, as a fifth embodiment of the semiconductor device having the IGBT of the present invention, a structure to which the configuration described above is applied will be described with reference to FIG. The configuration shown in FIG. 7 is a configuration obtained by further improving the configuration obtained by combining the first to fourth embodiments described with reference to FIGS. 4 to 6.
An additional base layer is provided so as to be in contact with the second emitter 410 shown in FIG. The additional base layer is, for example, a semiconductor layer using an epitaxial growth technique and has the same conductivity type as the drain region 106. The structure of the gate insulating film 503 and the gate electrode 504 shown in FIG. 5 is applied, and the high concentration drain region 606 shown in FIG. 6 is provided.
In FIG. 7, 603 is a gate insulating film, 604 is a gate electrode, and 701 is an additional base layer. The same numbers are assigned to the configurations already described.

  As described above, the second emitter 410 and the additional base layer 701 form a semiconductor layer in a predetermined shape by using the known epitaxial growth technique on the semiconductor thin film layer 130.

  In the case of a horizontal bipolar transistor, the withstand voltage is changed by changing the impurity concentration of the drain region 106 (part 111a) between the high-concentration drain region 606 and the second block 109 or by changing the length (base width) thereof. However, the breakdown voltage of the vertical bipolar transistor is limited by the film thickness of the semiconductor layer 130 of the SOI substrate to be used.

  With this configuration, the impurity concentration and film thickness of the base portion (additional base layer 701 and portion 111b) of the vertical bipolar transistor can be easily controlled. For example, in controlling the film thickness, only a necessary portion can be laminated using an epitaxial growth technique. In this way, the device breakdown voltage can be changed without affecting the structure of other parts.

In the embodiment described above, an N-type source region and a drain region are provided in the semiconductor thin film layer 130, an N-channel MOS transistor having a P-type channel region, a P-type emitter in the semiconductor thin-film layer 130, The description has been given using an example in which an N-type base and a PNP-type bipolar transistor having a P-type collector are provided. Such a configuration is only one embodiment of the present invention, and it goes without saying that the polarity of the transistor such as a P-channel MOS transistor or an NPN bipolar transistor can be changed and the transistor structure can be modified. .
For example, although the first block 108 and the second block 109 in the common region have been described as a common collector, this may be used as a common emitter. At that time, although the channel region 107 is the first emitter, it becomes the first collector, and the second emitter 110 which is an independent region becomes the second collector.

  Even if the region is defined as described above and the polarity of the MOS transistor or bipolar transistor is changed, two characteristics of the IGBT used by the semiconductor device of the present invention are the first bipolar transistor and the second bipolar transistor. However, modifications can be made without departing from the gist of forming a bipolar transistor.

  In the semiconductor device of the present invention, even if the semiconductor substrate to be used is thinned, the current driving capability does not decrease. Therefore, it is suitable for a semiconductor device mounted on a system that is required to be small and light.

It is the top view and sectional drawing explaining 1st Embodiment of the semiconductor device of this invention. It is an equivalent circuit diagram explaining IGBT used for the semiconductor device of this invention. It is sectional drawing explaining operation | movement of IGBT used for the semiconductor device of this invention. It is sectional drawing explaining 2nd Embodiment of the semiconductor device of this invention. It is sectional drawing explaining 3rd Embodiment of the semiconductor device of this invention. It is sectional drawing explaining 4th Embodiment of the semiconductor device of this invention. It is sectional drawing explaining 5th Embodiment of the semiconductor device of this invention. It is sectional drawing explaining the semiconductor device conventionally known using the SOI substrate. It is sectional drawing for demonstrating the prior art shown in patent document 1. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Semiconductor substrate 102 Embedded insulating film 103 Gate insulating film 104 Gate electrode 105 Source region 106 Drain region 107 Channel region 108 First block of common region 109 Second block of common region 110 Independent region and second emitter 111a of drain region 106 Part 111b serving as the base of the horizontal bipolar transistor 111b Part serving as the base of the vertical bipolar transistor 111c Surface portion of the drain region 106 130 Semiconductor thin film layer

Claims (5)

A semiconductor device using an SOI substrate in which a buried insulating film and a semiconductor thin film layer are stacked on a semiconductor substrate,
A MOS transistor having a source region, a drain region, and a channel region in the semiconductor thin film layer, and having a gate electrode over the semiconductor thin film layer via a gate insulating film;
A bipolar transistor having a base, an emitter, and a collector in the semiconductor thin film layer;
In a semiconductor device having an insulated gate bipolar transistor comprising:
Providing a common region in contact with the drain region and spaced apart from the channel region in the semiconductor thin film layer, and providing an independent region separated from the common region in or on the drain region;
A first bipolar transistor having the drain region as a base, the common region as a collector, and the channel region as an emitter;
A second bipolar transistor having the drain region as a base, the common region as an emitter or collector, and the independent region as a collector or emitter;
Have
A semiconductor device, wherein the MOS transistor, the first bipolar transistor, and the second bipolar transistor constitute an insulated gate bipolar transistor.   The drain region, the source region, and the channel region are provided so that the end in the depth direction reaches the buried insulating film, and the common region is provided so that the end in the depth direction reaches the buried insulating film. A first block; and a second block provided in parallel with the buried insulating film and having an end portion spaced apart from the channel region. The independent region is separated from the first block, and The semiconductor device according to claim 1, wherein the semiconductor device is provided to face two blocks.   The semiconductor device according to claim 2, wherein the first block has an impurity concentration higher than that of the second block.   The semiconductor device according to claim 2, wherein the drain region has a high impurity concentration in a portion facing the second block.   The semiconductor device according to claim 4, wherein the gate insulating film and the gate electrode are provided so as to cover an upper portion of the portion of the drain region where the impurity concentration is high.

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