JP2009229968A - Liquid crystal panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal panel of a structure for preventing a routing wire, which is led out of a display area to a peripheral non display area and arranged, from being disconnected. <P>SOLUTION: The liquid crystal panel 1 is provided with a first substrate 2 and a second substrate 12 arranged opposite to the first substrate 2. The first substrate 2 includes: a plurality of routing wires GL, SL connected to wiring arranged in the display area DA, wired to the non display area NDA, and covered with an insulating layer; and a terminal area T in which the routing wires are connected to an external control circuit. A sealing material 10 is applied and stuck on a part corresponding to the non display area NDA of one of the first and second substrates. A projection-shaped protection member 11b for protecting the routing wires GL, SL is arranged on the insulating layer in the non display area NDA of the first substrate 2. After the second substrate 12 is stuck, the second substrate 12 is partially removed to expose the terminal area T. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

The present invention relates to a liquid crystal panel, and more particularly to a liquid crystal panel in which a lead-out preventing measure is taken for a lead-out wiring that is drawn from a display area and disposed in a non-display area.

The liquid crystal panel includes a first substrate provided with pixel electrodes and the like, and a second substrate disposed to face the substrate. Then, the liquid crystal panel applies a sealing material to a portion around either one of the first and second substrates except for the liquid crystal injection hole forming portion, and bonds the first and second substrates together, so that the liquid crystal injection The liquid crystal is manufactured through steps such as injecting liquid crystal into a space formed between the first and second substrates from the inlet and sealing the inlet with a sealing material.

In order to improve the productivity, this liquid crystal panel is usually manufactured by laminating two large glass substrates, so-called two mother substrates, and then dividing them. During this process, each liquid crystal panel is formed such that a terminal region provided on the other substrate is exposed by cutting one substrate.

However, the exposed terminal region is usually not a flat surface but an uneven surface having a height difference. For this reason, if foreign matter such as glass powder or cullet (debris) generated when cutting the substrate hits this uneven surface, the insulating film covering the wiring disposed in the terminal area is broken, and this wiring is damaged. It may break. Therefore, in order to prevent such damage and disconnection, a liquid crystal display device has been proposed in which a resin film is provided on the uppermost layer to protect the wiring (for example, see Patent Document 1 below).

12A is a plan view of a liquid crystal display panel provided in the liquid crystal display device, and FIG. 12B is a plan view of FIG. 12A.
XIIB-XIIB line sectional view, FIG. 12C is an enlarged sectional view of the XIIC portion of FIG. 12B. Hereinafter, a liquid crystal display device disclosed in Patent Document 1 described below will be described with reference to FIG.

The liquid crystal display device 20 includes first and second transparent substrates 22 and 23 bonded with a sealing material 24.
A liquid crystal panel 21 having The first transparent substrate 22 has a display region 25 surrounded by a sealing material 24 and a terminal region 27 in which wirings 26 are formed on the surface facing the second transparent substrate 23. A resin film 30 having a flat surface is provided on the uppermost layer of the terminal region 27 in addition to the portion where the wiring 26 is externally connected. The terminal region 27 of the first transparent substrate 22 is the first
After the second transparent substrates 22 and 23 are bonded together by the sealing material 24, the second transparent substrates 22 and 23 are produced so as to be exposed to the outside by cutting along the scribe lines 23a provided on the surface of the second transparent substrate 23. .

In the vicinity of the location where the second transparent substrate 23 is cut, there is no wiring 2 on the first transparent substrate 22.
6 is formed, and an insulating layer made of, for example, a gate insulating film 28 and a protective insulating film 29 is formed thereon, and a resin film 30 is laminated thereon. The liquid crystal panel 21 is bonded to the second transparent substrate 23 so that the sealing material 24 and the second transparent substrate 23 are positioned on the laminate on the first transparent substrate 22 side, and then the second transparent substrate. The terminal region 27 is exposed by cutting 23. According to this configuration, since the wiring 26 is protected by the resin film 30 at the time of cutting, the wiring 26 is hardly damaged by foreign matters such as glass powder and cullet, and as a result, disconnection of the wiring is suppressed.
JP 2007-78931 A (paragraphs [0029], [0030], FIG. 3) JP-A-9-311341 (paragraph [0010], FIG. 2) Japanese Unexamined Patent Publication No. 2007-25066 (paragraph [0050], FIG. 4)

In particular, in a liquid crystal panel mounted on a large liquid crystal display device such as a TV or a PC monitor, each wiring has a certain thickness, so that disconnection of the wiring due to glass powder or cullet does not occur much. However, a small liquid crystal panel mounted on a portable information terminal or the like typified by a mobile phone is required to be further downsized and high definition. However, since such a small liquid crystal panel tends to be further reduced in size and definition, each wiring is miniaturized and a gap between each wiring is also minimized. For this reason, for example, stress is applied to the lead wiring provided in the non-display area of the liquid crystal panel, so that the wiring is easily disconnected. Also in the terminal area, wiring damage, disconnection, and wiring due to the above foreign matter are also caused. A short circuit accident is likely to occur. Therefore, it is difficult to suppress the occurrence of such disconnection or short-circuit accident only by providing a resin film on the wiring as in the liquid crystal display device disclosed in Patent Document 1.

Further, in such a liquid crystal panel, a narrow frame is made to narrow the periphery of the display area in order to enlarge only the display area as much as possible without increasing the shape of the entire panel. Along with this narrowing of the frame, there is also known a technique in which routing wiring provided around the display area has a two-layer structure (for example, see Patent Document 2). However, even if the lead wiring has a two-layer wiring structure as in the liquid crystal panel disclosed in Patent Document 2, the upper lead wiring is only covered with a protective film, so that a disconnection of the wiring or a short-circuit accident occurs. There is a fear.

Furthermore, a liquid crystal panel in which photo spacers are arranged in a display area and in a non-display area around the display area is also known (see, for example, Patent Document 3). Note that the liquid crystal panel of Patent Document 3 has a photo spacer disposed on the color filter substrate side.

The present invention has been made in view of such a conventional technique, and an object of the present invention is a structure in which a lead-out wiring drawn out from a display area to a peripheral non-display area is not disconnected. It is an object of the present invention to provide a liquid crystal panel with improved reliability.

Another object of the present invention is to not only prevent disconnection of the lead-out wiring arranged from the display area to the surrounding non-display area, but also to maintain a uniform cell gap in the display area. It is to provide a liquid crystal panel.

Still another object of the present invention is to provide a liquid crystal panel that is improved in reliability and at the same time capable of being miniaturized by adopting a structure in which a routing wiring having a multilayer wiring structure does not break.

In order to achieve the above object, a liquid crystal panel of the present invention includes a first substrate and a second substrate disposed to face the first substrate, and the first substrate is provided in a display area. A plurality of lead wires connected to the non-display region and covered with an insulating layer, and a terminal region to which the lead wires are connected to an external control circuit, and In a liquid crystal panel in which a sealing material is applied and bonded to a location corresponding to the non-display area of one of the first and second substrates, the non-display area of the first substrate includes the insulating layer. A protrusion-shaped protective member for protecting the routing wiring is disposed on the top.

According to the liquid crystal panel of the present invention, the first substrate is connected to the second substrate in a state in which the routing wiring is protected by disposing a projection-shaped protection member on the insulating layer covering the routing wiring. Since they are bonded together, stress applied to the routing wiring can be reduced. As a result, when a part of the second substrate is cut off after being bonded to the second substrate, the protective member may lead the wiring to be damaged or disconnected, or a short circuit between the wires may occur. Can be suppressed.

In the liquid crystal panel according to the aspect of the invention, it is preferable that the protective member extends from the vicinity of the sealing material or from a cut line for cutting the second substrate to the terminal region.

According to the preferable aspect, since the protective member is extended to the terminal area from the vicinity of the sealing material or the cut line for cutting the second substrate, the lead wiring is damaged or disconnected in these areas. Or even a short-circuit accident between the wirings can be effectively suppressed.

In the liquid crystal panel of the present invention, the protective member is formed as a protruding spacer, a columnar photospacer is formed in the display area of the first substrate, and the protruding spacer is the same step as the columnar photospacer. And the same material.

According to the preferable aspect, since the protective member is formed of the protruding spacer, the cell gap can be uniformly maintained in cooperation with the photo spacer disposed in the display area. In particular, even in the non-display area, the gap between the first and second substrates can be maintained uniformly, and display unevenness especially in the vicinity of the sealing material can be eliminated. Further, since the protruding spacer is formed of the same process and the same material as the photo spacer, the protective member can be easily formed without increasing the number of special steps.

Further, in the liquid crystal panel of the present invention, the plurality of routing wires are wired in a two-layer structure with an insulating film interposed in the non-display area, and the routing wires arranged on the upper layer are arranged on the routing layer. A protective member is preferably formed.

According to the preferable aspect, since the lead wiring is configured in a two-layer wiring structure in the non-display region, two lead wirings can be wired in one space, and the panel size is increased. Without this, the non-display area, that is, the space around the display area can be narrowed, and the display area can be widened.

Further, in the liquid crystal panel of the present invention, the two-layer routing wiring has an upper routing wiring formed immediately above the lower routing wiring with an insulating film interposed therebetween, or It is preferable that the upper routing wiring is formed obliquely above the lower routing wiring.

According to the above preferred embodiment, if the upper wiring line is formed immediately above the lower wiring line, the distance between the wiring lines can be minimized, so that the space of the non-display area is reduced. If the upper routing wiring is formed obliquely above the lower routing wiring, the thickness of the entire structure formed on the first substrate can be reduced.

In the liquid crystal panel of the present invention, the insulating layer of the first substrate is formed on the protective insulating film covering the lead wiring or the protective insulating film covering the lead wiring and the protective insulating film. Preferably, it is a laminate composed of an interlayer film.

According to the preferable aspect, the insulating layer of the first substrate is composed of a type that is a protective insulating film that covers the routing wiring, a protective insulating film that covers the routing wiring, and an interlayer film formed thereon. A protective member can be disposed on any liquid crystal panel of the type that is a laminated body.

Hereinafter, the best embodiment of the present invention will be described with reference to the drawings. However, the embodiment described below exemplifies a liquid crystal panel for embodying the technical idea of the present invention, and is not intended to specify the present invention for this liquid crystal panel. Other embodiments within the scope are equally applicable.

FIG. 1 is a plan view illustrating a liquid crystal panel according to a first embodiment of the present invention so that the wiring of a TFT array substrate can be seen through from a laminated color filter substrate. 2 is a cross-sectional view taken along line II-II in FIG. FIG. 3 is an enlarged plan view of one pixel in the display area of FIG. 4 is an enlarged sectional view taken along line IV-IV in FIG. FIG. 5 is a cross-sectional view taken along line VV in FIG. FIG. 6 is an enlarged plan view of a portion VI in FIG. 7 is an enlarged cross-sectional view taken along line VII-VII in FIG. FIG. 8 is an enlarged plan view of one pixel in the display area of the liquid crystal panel according to the second embodiment of the present invention. 9 is a cross-sectional view taken along the line IX-IX in FIG. FIG. 10 is a cross-sectional view corresponding to FIG. 5 of the liquid crystal panel according to the second embodiment. FIG. 11 is an enlarged plan view corresponding to FIG. 7 of the liquid crystal panel according to the second embodiment.

[First Embodiment]
First, a liquid crystal panel according to a first embodiment of the present invention will be described with reference to FIGS.
The liquid crystal panel 1 is a liquid crystal panel that employs an active matrix system. The present invention is not limited to this type of liquid crystal panel, and can be applied to other types. The liquid crystal panel 1 includes a TFT array substrate (hereinafter simply referred to as an “array substrate”) 2 as a first substrate of the present invention, which is made of a substantially rectangular transparent material substrate, for example, a glass substrate, which is opposed to each other. The color filter substrate (hereinafter referred to as the second substrate of the invention)
12) (referred to simply as “CF substrate”). The liquid crystal panel 1 is bonded to the array substrate 2 and the CF substrate 12 by applying a sealing material 10 to the outer periphery of one of the substrates so that a space of a predetermined size is formed inside. The liquid crystal LC is sealed inside the space. After bonding, the CF substrate 12 is cut along the scribe lines SC provided on the CF substrate 12, whereby the terminal region T is exposed on the array substrate 2.
The terminal region T is provided with a liquid crystal driving driver Dr for driving the liquid crystal.
Further, polarizing plates 18a and 18b are provided on the outer surfaces of the array substrate 2 and the CF substrate 12, respectively. The array substrate 2 and the CF substrate are provided with various electrodes, wirings, color filters, and the like on their opposing surfaces. In FIG. 2, these wirings are illustrated as structures 3 and 13, respectively.

The array substrate 2 has a plurality of gate wirings GW _{1 to} GW _n (n = 1, 2, 3,...) On the surface thereof.
(Hereinafter, the generic term of these is also referred to as “gate wiring GW”) and a plurality of source wirings S
W _{1 to} SW _n (n = 1, 2, 3,...) (Hereinafter collectively referred to as “source wiring SW”)
Are also arranged in a matrix through the gate insulating film 4 (see FIG. 4) in the display area DA.

A non-display area NDA is provided around the display area DA. In the non-display area NDA,
A plurality of routing lines GL _{1 to} GL _n and SL _{1 to} SL _n are disposed. One end of each of the routing wirings GL _{1 to} GL _n and SL _{1 to} SL _n is each gate wiring GW in the display area DA.
_{1 to} GW _n and source wirings SW _{1 to} SW _n are connected. Further, the other ends of the routing wires GL _{1 to} GL _n and SL _{1 to} SL _n are extended to the driver mounting region T _{1 in} the terminal region T, and are connected to the liquid crystal driving driver Dr mounted in this region. It is connected.

These routing wires GL _{1 to} GL _n and SL _{1 to} SL _n have a two-layer wiring structure of low and high routing wires on the array substrate 2 via an insulating film as will be described later. A protruding protection member 11b (see FIG. 5) is formed on the high-order routing wiring via an insulating layer. The protruding protection member 11b is preferably formed by a protruding spacer having a predetermined shape.

By disposing the protruding protective member 11b on the high-order routing wiring, it is possible to relieve the problems that the prior art has, for example, the stress applied to the routing wiring, and damage to the routing wiring, disconnection, and the like. Short circuit accidents between wires can be suppressed. In addition, when the projecting protective member is formed of a projecting spacer, the cell gap can be uniformly maintained in cooperation with the photo spacer 11a disposed in the display area DA.

The manufacturing process of the liquid crystal panel 1 will be described with reference to FIGS. The liquid crystal panel 1 is manufactured from a mother glass substrate for a large array substrate and a mother glass substrate for a CF substrate (hereinafter simply referred to as “mother substrate”). That is, the liquid crystal panel 1 is formed by applying a sealing material to a cell region in which individual liquid crystal panels are formed on each of these substrates, forming a predetermined electrode and wiring, a color filter, and the like on a large mother board. A step of bonding a substrate so that a space of a predetermined size is formed inside each cell, a step of dividing the bonded substrate into individual cells, and a step of injecting liquid crystal into the internal space of each cell The liquid crystal injection port is manufactured through a process of sealing with a sealing material. Further, each liquid crystal panel 1 is cut along the scribe line SC provided on the CF substrate 12 so that the terminal region T is exposed on the array substrate 2.

The liquid crystal panel 1 is manufactured through the above manufacturing process using the mother substrate as described above. Hereinafter, for convenience of description, the manufacturing process of one liquid crystal panel will be described in detail.

On the upper surface of the glass substrate 2a constituting the array substrate 2, that is, the surface in contact with the liquid crystal LC, a plurality of gate wirings GW _{1 to} GW _n and auxiliary capacitance electrodes C are provided at predetermined intervals in the row direction (lateral direction). Are arranged in a predetermined arrangement. These gate wirings GW _{1 to} GW _n and the auxiliary capacitance electrode C are covered with a gate insulating film 4 made of an inorganic transparent insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN _X ). Next, source wirings SW _{1 to} SW _n are arranged in a matrix on the gate insulating film 4 so as to be orthogonal to the gate wirings GW _{1 to} GW _n, and these gate wirings GW ₁ to GW ₁ to GW ₁ to GW _n. A thin film transistor (TFT) TFT is provided at a location where the GW _n and the source wirings SW _{1 to} SW _n intersect.
These are covered with a passivation film (hereinafter also referred to as “protective insulating film”) 5 made of an inorganic transparent insulating material such as SiO ₂ or SiN _X. This TFT is configured by providing a semiconductor layer 6 on a gate insulating film 4 covering a gate electrode G formed on the upper surface of a glass substrate 2a, and connecting one end of a source electrode S and a drain electrode D to the semiconductor layer 6. Is done. The other end of the drain electrode D is superposed on the storage capacitor electrode C through the gate insulating film 4 in plan view.

The source electrode S connected to the TFT extends from the source line SW, and the drain electrode D is connected to the pixel electrode 8. These are covered with a protective insulating film 5. Also,
The gate electrode G extends from the gate wiring GW. These gate wirings GW _{1 to} GW _n
Each region surrounded by the source wirings SW _{1 to} SW _n constitutes a so-called one pixel (sub pixel), and these gate wirings GW _{1 to} GW _n , source wirings SW _{1 to} SW _n , and TFTs
The display area DA is an area where a plurality of pixels composed of An interlayer film 7 having a predetermined thickness is formed on the protective insulating film 5. A pixel electrode 8 is formed on the interlayer film 7. A contact hole CH is formed in the protective insulating film 5 and the interlayer film 6 immediately above the auxiliary capacitance electrode C, and the pixel electrode 8 and the drain electrode D are formed through the contact hole CH.
And are connected. Further, a columnar spacer 11a is formed above the TFT. The columnar spacer 11a is formed in a predetermined shape by applying a photosensitive resin, for example, an acrylic photosensitive agent to a desired thick film, and then performing exposure, development, heat treatment, and the like using a predetermined mask. .

Thereafter, the display area DA including the columnar spacer 11a is covered with the alignment film 9 (see FIG. 4). Further, the alignment film 9 is rubbed.

The periphery of the display area DA is a non-display area NDA. As shown in FIG. 1, the non-display area NDA is below the areas WA ₁ and WA ₂ and the scribe lines SC on both sides of the display area DA. Terminal region T. In the non-display area NDA, routing wirings GL and SL are arranged, and are connected to the gate wiring GW and the source wiring SW in the display area DA, respectively.

Next, referring to FIGS. 1 and 5 to 7, the routing wiring GL disposed in the non-display area NDA.
The wiring structure of SL will be described.
The gate wirings GW _{1 to} GW _n and the source wirings SW _{1 to} SW _n in the display area DA are drawn from the display area DA to the non-display area NDA, and the respective routing wirings GL _{1 to} GL _n , S
L _{1 to} SL _n are connected. That is, each of the gate wirings GW _{1 to} GW _n is drawn out of the display area DA of the array substrate 2, that is, to the areas WA ₁ and WA ₂ on both sides of the display area DA,
Each routing wiring GL _{1 to} GL _n (n = _n ) for the gate wiring provided along the column direction (vertical direction)
1, 2, 3 ...). At this time, gate wirings in odd rows, for example, GW ₁ , GW ₃ ,
GW ₅ ... Is led out to the area WA ₁ on the left side of FIG. 1, and the respective routing wirings GL ₁ , G
L ₂ , GL ₃ ... GL _m are connected. On the other hand, even-numbered gate wirings, for example, GW ₂ and GW ₄
, GW 6 _... are each drawn to the right of the area WA ₂ in FIG. 1 lead wirings _{GL m +} 1,
GL _{m + 2} , GL _{m + 3} ... GL _n are connected. In this way, by routing the gate wiring GW to the left and right, the routing wiring GL can be arranged on the substrate in a balanced manner.

Each routing wiring GL _{1 to} GL _n is wired in a two-layer structure in both areas WA ₁ and WA ₂ outside the display area DA. That is, odd-numbered routing wirings GL ₁ , GL ₃ ... Are directly formed on the glass substrate 2a, on which the gate insulating film 4 is formed, and further,
Even-numbered routing lines GL ₂ , GL ₄ adjacent to odd-numbered routing lines GL ₁ , GL ₃ .
Are wired slightly shifted left and right (in the horizontal direction) so as not to overlap in the vertical direction with respect to the odd-numbered routing lines GL ₁ , GL ₃ .

This wiring structure will be described using one odd-numbered routing wiring GL ₁ and one even-numbered routing wiring GL ₂ adjacent to this routing wiring GL ₁ , as shown in FIG. The odd-numbered routing wiring GL ₁ is formed on the glass substrate 2 a of the array substrate 2. Glass substrate 2a and the odd-numbered lead wirings GL ₁ is covered by the gate insulating film 4, even-numbered lead wirings GL ₂ is formed on this. Incidentally, the odd-numbered lead wirings GL ₁ in FIG. 5 formed on the glass substrate 2a, but the even-numbered lead wirings GL ₂ shows an example which is disposed on the gate insulating film 4, the reverse of this order The even-numbered routing wiring GL ₂ is formed on the glass substrate 2a,
The odd-numbered routing wiring GL ₁ may be disposed on the gate insulating film 4. Further, as shown in Figure 5, the even-numbered lead wirings GL ₂ adjacent thereto and odd lead wirings GL _1, but are wired so as not to overlap in the vertical direction, the vertical The wiring may be overlapped in the direction. By forming the even-numbered lead wirings GL ₂ of the upper right above the lower odd-numbered lead wirings GL _1, the minimum space of the non-display area NDA it is possible to minimize the distance between the lead wirings it is possible to, by forming the even-numbered lead wirings GL ₂ obliquely upwardly of the odd-numbered lead wirings GL _1, it is possible to reduce the structure of the entire thickness to be formed on a glass substrate 2a It becomes possible. A protective insulating film 5 is formed on the even-numbered lead wirings GL ₂ formed on the gate insulating film 4. Further, the protective insulating film 5 is formed of an interlayer film 7
Covered with. Other lead wirings are formed in the same manner.

When the odd-numbered routing lines GL ₁ and the even-numbered routing lines GL ₂ are formed in different layers with the gate insulating film 4 interposed therebetween, the odd-numbered routing lines GL ₁ are connected to the array substrate 2. It becomes a low-order routing wire in contact with the surface of the glass substrate 2a, and the even-numbered routing wire GL _2.
Is a high-level of lead wirings positioned on the upper layer relative to the odd-numbered routed wires GL _1. Then, a protruding spacer 11b as a protruding protective member is formed on the insulating layer composed of the protective insulating film 5 and the interlayer film 7 in the portion directly above the high-order routing wiring.

Each of the source lines SW _{1 to} SW _n is drawn out of the display area DA of the array substrate 2, that is, in the direction of the terminal area T below the display area DA, and each of the lead lines SL ₁ to SW _n for the source lines.
It is connected to SL _n (n = 1, 2, 3...). These routing lines SL _{1 to} SL _n are also 2
A layer wiring structure is formed. Protruding spacers 11b are formed on the high-level routing wires of the two-layer wiring structure. Therefore, these protruding spacers 11b include both areas WA ₁ and WA ₂ outside the display area DA, a terminal area T excluding the driver mounting area T ₁ , and
Is formed.

In the terminal region T, as shown in FIG. 7, a high-level lead wiring GL ₂ extends from the display region DA to the terminal region T, and the terminal t is connected to the end of the extended wiring GL ′ _2. It is connected. This terminal t is provided in a contact hole formed in the protective insulating film 5 and the interlayer film 7. Also lead wirings GL ₁ low potential terminal (not shown) is connected. Although not shown, this terminal is also provided in a contact hole formed in the gate insulating film 4, the protective insulating film 5 and the interlayer film 7. Therefore, the terminals connected to the lower and higher routing lines are provided as contact holes having different depths.

Next, an example of a method for forming the lead wiring and the photo spacer will be described.
First, the routing wirings GL _{1 to} GL _n (n = 1, _n) connected to the gate wirings GW _{1 to} GW _n .
2, 3, ...) will be described.

As shown in FIG. 1, first, a low-order routing wiring GL is formed on the glass substrate 2a of the array substrate 2.
₁ , GL ₃ ... Are formed. The lower routing wirings GL ₁ , GL ₃ ... Are gate wirings GW _{1 to} G GW wired in the display area DA in the areas WA ₁ and WA ₂ outside the display area DA.
Using W _n of the same material are formed in the same step as forming the gate wirings. After that, these lower routing wirings GL ₁ , GL ₃ ... Are covered with the gate insulating film 4 together with the gate wirings GW _{1 to} GW _n . Thereafter, high-level routing lines GL ₂ , GL ₄ ... On the gate insulating film ₄ .
Is formed. These high-level routing lines GL ₂ , GL ₄ ... Are formed in the same process as forming the source lines using the same material as the source lines SW _{1 to} SW _n wired in the display area DA.

Each of these routing wirings is a routing wiring formed in a different layer adjacent to each other. That is, the high-level routing lines GL ₂ , GL ₄ ... And the low-level routing lines GL ₁ , G
There is a height difference between L ₃ . Therefore, all the lead lines GL _{1 to} GL are arranged in the same layer.
It is possible to make the gap between the wirings smaller than when _n is formed. In addition, since the gate insulating film 4 is interposed between the high-level routing wirings GL ₂ , GL ₄ ... And the gate wirings GW _{1 to} GW _n , electrical connection cannot be performed as it is. Therefore, the high-level routing wirings GL ₂ , GL ₄ ... And the gate wirings GW _{1 to} GW _n are connected by forming a contact hole in the gate insulating film 4. In FIG. 1, the connection point Ja is illustrated.

Next, the high-order routing wirings GL ₂ , GL ₄ ... Are covered with the protective insulating film 5.
This protective insulating film 5 is further covered with an interlayer film 7. Further, the high-order routing wiring GL ₂
, GL ₄ ... A protruding spacer 11 directly above the insulating layer composed of the protective insulating film 5 and the interlayer film 7 covering GL ₄ .
b is formed. The protruding spacers 11b are formed in the same process as the columnar spacers 11a in the display area DA (see FIGS. 5 and 7).

As described above, the routing wirings GL _{1 to} GL _n (n = 1, 2, 3...) For the gate wirings GW _{1 to} GW _n .
) Has been described, the routing lines SL _{1 to} SL _n (n = 1, 2, 3...) Connected to the source lines SW _{1 to} SW _n are also formed by the same method. In particular, the protruding spacer 11b is formed on the high-level routing wiring (for example, SL ₂ , SL ₄ ...).

In the present embodiment, the protruding spacer 11b is connected to the high-order routing wirings GL ₂ and GL.
₄ ... or SL ₂ , SL ₄ ... formed only on the upper wiring lines GL ₂ , G
L ₄ ... Or SL ₂ , SL ₄ ... Is lower in routing wiring GL ₁ , GL ₃ .
_This is because the risk of disconnection or the like is higher than ₁ , SL ₃ . That is, the low-order routing wiring GL ₁
, GL 3 the _... or _SL 1, SL 3 _... the surface of the gate insulating film 4, the insulating material of three layers of the protective insulating film 5 and the interlayer film 7 is disposed, high in lead wirings GL ₂ , GL ₄ ... Or SL ₂ , SL ₄ ... Are provided with only two layers of insulating materials, that is, a protective insulating film 5 and an interlayer film 7. Therefore, if the insulating film is peeled off due to cullet or the like in the subsequent steps, the high-level routing wirings GL ₂ , GL ₄ ... Or SL ₂ , SL ₄ . However, as in the present invention, this high-order routing wiring GL ₂ , GL ₄ ... Or SL
₂ , if the protruding spacer 11 b is formed on the surface of SL ₄ ..., The higher-order routing wiring GL ₂
, GL ₄ ... Or SL ₂ , SL ₄ .

As described above, the protruding spacer 11b is formed in the two areas WA ₁ outside the display area DA,
It is formed in WA ₂ and terminal region T excluding driver mounting region T ₁ . Further, as described above, each of the routing wirings GL _{1 to} GL _n , SL _{1 to} SL _n and the insulating film that covers them are the wiring and insulating film provided in the display area DA, for example, the gate wiring GW _1. ~ GW _n
, The source wirings SW _{1 to} SW _n , the gate insulating film 4, the protective insulating film 5, the interlayer film 7, and the like are used and formed in substantially the same process. Thereby, these routing wirings GL ₁ to
GL _{n, SL} 1 ~SL _n there is no need to increase the special forming process for forming the like, formation of such lead wirings can be simplified.

On the other hand, as shown in FIG. 4, the CF substrate 12 has an array substrate 2 on the surface of the glass substrate 12a.
A black matrix 19 is provided in a matrix according to the pixel area. A region surrounded by the black matrix 19 is provided with color filters 14 of a plurality of colors, for example, red (R), green (G), and blue (B), and these are covered with a planarizing film 15. Next, the common electrode 16 is formed on the planarizing film 15 and the surface thereof is covered with the alignment film 17. The alignment film 17 is rubbed in a predetermined direction.

The array substrate 2 and the CF substrate 12 are bonded to each other by applying the sealing material 10 to the display area DA of the array substrate 2 after being created by the above process. At this time, a space having a predetermined size is formed between the substrates 2 and 12. By this bonding, the columnar spacers 11 a and the protruding spacers 11 b are in a state where their tops are in contact with the surface of the CF substrate 12. Next, liquid crystal LC is injected between the bonded substrates 2 and 12 from a liquid crystal injection port provided in the sealing material 10.

The liquid crystal panel 1 does not have a gap difference between the substrates 2 and 12 between the inner side and the outer side of the sealing material 10 due to the above configuration. That is, the gap corresponding to the height from the substrate surface in the display area DA to the top of the columnar spacer 11a, and the top of the protruding spacer 11b from the substrate surface in the non-display area NDA outside the display area DA. The cell thickness up to is equal. Therefore, a uniform gap is obtained over the entire liquid crystal panel 1 including the vicinity of the sealing material 10, and in particular, display unevenness in the vicinity of the sealing material 10 can be eliminated.

In addition, after the array substrate 2 and the CF substrate 12 are bonded together, the CF substrate 12 is cut from the scribe line SC, and a part thereof is cut off. This cutting is performed, for example, by a scribe break method. That is, first, the scribe line SC is inserted into a portion that becomes the cut surface 12 b on the outer surface of the CF substrate 12. Thereafter, the end surface 12c is broken by hitting the outer surface of the array substrate 2 facing the cut surface 12b. Conventionally, when the end material 12c is removed, the cut surface 1
When the corner 2b comes into contact with the laminated body P (see FIG. 5) composed of the protective insulating film 5 and the interlayer film 7, the laminated body P is peeled off by the impact, and the upper routing wiring (GL _{2 in} FIG. 5) is formed. There is a risk of disconnection. Further, when a part of the cut surface 12b is missing and remains on the laminate P as a cullet,
There is a risk that the cullet will be caught in a later process, and the upper routing wiring may be disconnected. However, in the present embodiment, since the protruding spacers 11b that protect the high-order routing wirings GL ₂ , GL ₄ ... Or SL ₂ , SL ₄ . And disconnection can be prevented.

Thus, when the end material 12 c of the CF substrate 12 is cut, the terminal region T is exposed on the surface of the array substrate 2. In the terminal region T, as shown in FIG.
L is the extended from the display area DA to the driver mounting area T ₁ of the terminal region T, the terminal t is formed at an end of the extended by the wiring GL '. This terminal t is connected to the terminal of the liquid crystal driving driver Dr.

[Second Embodiment]
A liquid crystal panel 1A according to a second embodiment of the present invention will be described with reference to FIGS.
As shown in FIGS. 8 and 9, the liquid crystal panel according to the second embodiment has substantially the same structure as the liquid crystal panel 1 according to the first embodiment except that the interlayer film 7 is omitted. Therefore, the same components are denoted by the same reference numerals, and detailed description thereof is omitted.

As shown in FIGS. 10 and 11, the liquid crystal panel 1 </ _b > A according to the _second embodiment has no interlayer film 7 on the protective insulating film 5, and is located above the high-level routing wiring GL ₂ of the protective insulating film 5. The protrusion-shaped spacer 11b is provided at a position corresponding to. With this configuration, the liquid crystal panel 1A can achieve the same effects as the liquid crystal panel 1 of the first embodiment. That is, when the CF substrate 12 is cut along the scribe line SC and the end material 12c is removed, the corners of the cut surface 12b come into contact with the protruding spacer 11b before coming into contact with the protective insulating film 5, thereby without film 5 is damaged, lead wiring GL ₂ of high is protected.

FIG. 2 is a plan view illustrating the liquid crystal panel according to the first embodiment of the present invention so that the wiring of the TFT array substrate can be seen through from the laminated color filter substrate. It is sectional drawing of the II-II line of FIG. It is the top view to which 1 pixel in the display area of FIG. 1 was expanded. It is an expanded sectional view of the IV-IV line of FIG. It is an expanded sectional view of the VV line of FIG. FIG. 2 is an enlarged plan view of a VI part in FIG. 1. It is sectional drawing of the VII-VII line of FIG. It is the top view to which 1 pixel in the display area of the liquid crystal panel which concerns on the 2nd Embodiment of this invention was expanded. It is sectional drawing of the IX-IX line of FIG. It is sectional drawing corresponding to FIG. 5 of the liquid crystal panel which concerns on 2nd Embodiment. It is an enlarged plan view corresponding to FIG. 7 of the liquid crystal panel which concerns on 2nd Embodiment. FIG. 12A is a plan view of a liquid crystal panel, FIG. 12B is a cross-sectional view taken along the line XIIB-XIIB in FIG. 12A, and FIG. 12C is an enlarged cross-sectional view of a VC portion in FIG.

Explanation of symbols

1: Liquid crystal panel 2: TFT array substrate (first substrate) 2a: Glass substrate 4: Gate insulating film 5: Protective insulating film 6: Semiconductor layer 7: Interlayer film 8: Pixel electrode 10: Sealing material 1
DESCRIPTION OF SYMBOLS 1a: Columnar spacer 11b: Protruding spacer (projection-shaped protection member) 12: Color filter substrate (second substrate) 12a: Glass substrate 12b: Cut surface 12c: End material 14:
Color filter 15: Planarization film 16: Common electrode 17: Alignment film 18a, 18b: Polarizing plate 19: Black matrix C: Auxiliary capacitance electrode D: Drain electrode G: Gate electrode Ja: Connection points GW _{1 to} GW _n : Gate wiring GL _{1 to} GL _n : Leading wiring SW ₁
To SW _n: source lines SL ₁ to SL _n: lead wirings S: scribe line (cutting line) D
A: Display area NDA: Non-display area T: Terminal area T ₁ : Driver mounting area Dr: Liquid crystal drive driver

Claims (6)

A first substrate; and a second substrate disposed opposite to the first substrate, the first substrate being connected to a wiring provided in a display area, being wired in a non-display area and insulated. A plurality of routing wirings covered with a layer, and a terminal region to which the routing wiring is connected to an external control circuit,
In a liquid crystal panel in which a sealing material is applied and pasted to a location corresponding to the non-display area of one of the first and second substrates,
In the non-display area of the first substrate, a projection-shaped protection member for protecting the routing wiring is disposed on the insulating layer. 2. The liquid crystal panel according to claim 1, wherein the protection member extends from the vicinity of the sealing material or a cut line for cutting the second substrate to the terminal region. The protective member is formed as a projecting spacer, a columnar photospacer is formed in the display area of the first substrate, and the projecting spacer is formed of the same process and the same material as the columnar photospacer. The liquid crystal panel according to claim 1. The plurality of routing wirings are wired in a two-layer structure with an insulating film interposed in the non-display region, and the protective member is formed on the routing wiring wired in an upper layer. The liquid crystal panel according to claim 1. The two-layer routing wiring has an insulating film interposed therebetween, and an upper routing wiring is formed immediately above the lower routing wiring, or obliquely above the lower routing wiring. 5. The liquid crystal panel according to claim 4, wherein an upper layer lead wiring is formed on the liquid crystal panel. The insulating layer of the first substrate includes a protective insulating film that covers the lead wiring, or a stacked layer that includes a protective insulating film that covers the lead wiring and an interlayer film formed on the protective insulating film. The liquid crystal panel according to claim 1, wherein the liquid crystal panel is a body.

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