JP2009212170A5 - - Google Patents

Claims (7)

A microcrystalline semiconductor layer overlapping with the gate electrode through the gate insulating layer;
A buffer layer provided over the microcrystalline semiconductor layer;
An amorphous semiconductor layer covering side surfaces of the buffer layer and the microcrystalline semiconductor layer;
One end portion overlaps the buffer layer, and is provided on the amorphous semiconductor layer, and has a pair of impurity semiconductor layers forming a source region and a drain region,
The buffer layer is made of an amorphous semiconductor material, an inorganic insulating material or an organic insulating material,
The upper surface of the microcrystalline semiconductor layer is all covered with the buffer layer,
A thin film transistor, wherein the buffer layer is thicker than the amorphous semiconductor layer. In claim 1,
A thin film transistor, wherein the microcrystalline semiconductor layer has an electric conductivity of 1 × 10 ⁻⁵ S / cm to 5 × 10 ⁻² S / cm. In claim 2,
The thin film transistor, wherein the microcrystalline semiconductor layer is a microcrystalline silicon layer . In any one of Claims 1 thru | or 3,
A thin film transistor, wherein the amorphous semiconductor layer is an amorphous silicon layer . In claim 1,
Thickness of the buffer layer, a thin film transistor, wherein thicker than the film thickness of the microcrystalline semiconductor layer and the amorphous semiconductor layer. In claim 1,
A thin film transistor, wherein the buffer layer has a thickness of 500 nm to 3000 nm, and the amorphous semiconductor layer has a thickness of 50 nm to less than 500 nm. A display device, wherein the thin film transistor according to claim 1 is provided in each pixel of a pixel portion.