JP2009212104A - Method of manufacturing printed-circuit board, printed-circuit board, and electronic apparatus with printed-circuit board thereof - Google Patents

Method of manufacturing printed-circuit board, printed-circuit board, and electronic apparatus with printed-circuit board thereof Download PDF

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Publication number
JP2009212104A
JP2009212104A JP2008050288A JP2008050288A JP2009212104A JP 2009212104 A JP2009212104 A JP 2009212104A JP 2008050288 A JP2008050288 A JP 2008050288A JP 2008050288 A JP2008050288 A JP 2008050288A JP 2009212104 A JP2009212104 A JP 2009212104A
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Prior art keywords
circuit board
wiring board
printed wiring
printed
semiconductor package
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Abandoned
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JP2008050288A
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Japanese (ja)
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Norihiro Ishii
憲弘 石井
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Toshiba Corp
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Toshiba Corp
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Priority to JP2008050288A priority Critical patent/JP2009212104A/en
Priority to US12/393,642 priority patent/US8101870B2/en
Priority to CN200910007930A priority patent/CN101534611A/en
Publication of JP2009212104A publication Critical patent/JP2009212104A/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09572—Solder filled plated through-hole in the final product
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09772—Conductors directly under a component but not electrically connected to the component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed-circuit board capable of easily manufacturing the printed-circuit board preventing a flow out of an underfill material to the backside, and to provide the printed-circuit board and an electronic apparatus with the printed-circuit board. <P>SOLUTION: The method of manufacturing the printed-circuit board includes: a step of preparing the printed-circuit board equipped with through-holes and a plurality of electrode pads with a plurality of bumps provided on one surface of a semiconductor package mounted; a step of applying a bonding material to respective surfaces of the plurality of electrode pads and through-holes of the printed-circuit board prepared by the step of preparing; a step of mounting the plurality of bumps of the semiconductor package faced each other on the plurality of electrode pads of the printed-circuit board with the bonding material applied by the step of applying; a step of bonding the bumps and the electrode pads by the bonding material by heating the printed-circuit board with the semiconductor package mounted by the step of mounting; and a step of casting filling material between the semiconductor package and the printed-circuit board. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、プリント配線板に半導体パッケージを実装して構成されるプリント回路板の製造方法、プリント回路板およびそのプリント回路板を備えた電子機器に関する。   The present invention relates to a method for manufacturing a printed circuit board configured by mounting a semiconductor package on a printed wiring board, a printed circuit board, and an electronic apparatus including the printed circuit board.

従来、パーソナルコンピュータ、ハードディスク装置等の電子機器はプリント回路板を有している。プリント回路板は、プリント配線板に半導体パッケージを実装して構成されている。従来のプリント回路板は、例えば、特許文献１に記載されている製造方法によって製造されている。この製造方法では、スルーホールを備えたプリント配線板へのＢＧＡ（Ball Grid Array）の実装工程と、プリント配線板とＢＧＡとの隙間へのアンダーフィル材の流し込み工程とが行われているが、それらの前に接着剤等の塞ぎ材でスルーホールを塞ぐ工程が行われている。
特開２００４−７９６２１号公報 Conventionally, electronic devices such as personal computers and hard disk devices have printed circuit boards. The printed circuit board is configured by mounting a semiconductor package on a printed wiring board. A conventional printed circuit board is manufactured by, for example, a manufacturing method described in Patent Document 1. In this manufacturing method, a BGA (Ball Grid Array) mounting process on a printed wiring board having a through hole and an underfill material pouring process into a gap between the printed wiring board and the BGA are performed. Before these, a process of closing the through hole with a closing material such as an adhesive is performed.
JP 2004-79621 A

従来、プリント回路板では、半導体パッケージとプリント配線板との接合部分の信頼性を高めるため、前述のプリント回路板のように半導体パッケージとプリント配線板との間にアンダーフィル材が流し込まれていることがある。   Conventionally, in a printed circuit board, an underfill material is poured between the semiconductor package and the printed wiring board as in the above-described printed circuit board in order to increase the reliability of the joint portion between the semiconductor package and the printed wiring board. Sometimes.

しかしながら、プリント配線板にスルーホールが形成されているときは、アンダーフィル材を流しこんだときにアンダーフィル材がスルーホールを通って裏面側に流れ出してしまうという課題があった。   However, when a through hole is formed in the printed wiring board, there is a problem that when the underfill material is poured, the underfill material flows out to the back side through the through hole.

この点、前述の特許文献１記載の製造方法のように、スルーホールを塞ぎ材で塞ぐ工程を行うことにより、アンダーフィル材の裏面側への流れ出しを防止することは可能である。   In this respect, it is possible to prevent the underfill material from flowing out to the back surface side by performing a process of closing the through hole with the closing material as in the manufacturing method described in Patent Document 1 described above.

しかしながら、特許文献１記載の製造方法では、半導体パッケージを実装する実装面の裏面（反対）側の面に塞ぎ材を接着しなければならないため、製造工程が煩雑になるという課題がある。しかも、スルーホールの反対側が塞がれていても、実装面側は開口していて、スルーホール内も中空のままなので、スルーホール内へのアンダーフィル材の進入を排除することができないし、実装面側での濡れ広がりを防止することもできない。したがって、アンダーフィル材がプリント配線板上を必要以上に広がってしまい、余計なアンダーフィル材を塗布しなければならない。   However, the manufacturing method described in Patent Document 1 has a problem that the manufacturing process becomes complicated because a closing material must be adhered to the back surface (opposite side) of the mounting surface on which the semiconductor package is mounted. Moreover, even if the opposite side of the through hole is blocked, the mounting surface side is open and the through hole remains hollow, so it is not possible to eliminate the entry of the underfill material into the through hole. It is also impossible to prevent wetting and spreading on the mounting surface side. Therefore, the underfill material spreads more than necessary on the printed wiring board, and an extra underfill material must be applied.

また、特許文献１には、半導体パッケージの実装面側を塞ぎ材で塞ぐことについても開示されている。しかし、この手法では、スルーホールを塞ぐのに半導体パッケージの実装とは別の材料を用いる必要があり、これによって、製造工程が煩雑になるし、接合部分における信頼性の低下を招くおそれがある。   Patent Document 1 also discloses that the mounting surface side of the semiconductor package is closed with a closing material. However, in this method, it is necessary to use a material different from that for mounting the semiconductor package in order to close the through hole, which makes the manufacturing process complicated and may reduce the reliability at the joint portion. .

さらに、スルーホールの場所を別の場所に移動させることによって、アンダーフィル材の流れ出しを回避するという考え方もあるが、配線の都合など、プリント配線板の電気的な特性を確保する上でその移動が困難なこともある。   In addition, there is an idea of avoiding the flow of the underfill material by moving the location of the through hole to another location, but this movement is necessary to ensure the electrical characteristics of the printed wiring board, such as the convenience of wiring. Can be difficult.

そこで、本発明は上記課題を解決するためになされたもので、アンダーフィル材の裏面側への流れ出しを防止したプリント回路板を簡易に製造できるプリント回路板の製造方法、プリント回路板およびそのプリント回路板を備えた電子機器を提供することを目的とする。   Accordingly, the present invention has been made to solve the above-described problems, and a printed circuit board manufacturing method, a printed circuit board, and a printed circuit board thereof that can easily manufacture a printed circuit board that prevents the underfill material from flowing out to the back surface side. An object is to provide an electronic device including a circuit board.

上記課題を解決するため、本発明は、スルーホールと、半導体パッケージの一方の面に設けられた複数のバンプが実装されるための複数の電極パッドとを備えたプリント配線板を準備する準備工程と、準備工程により準備されたプリント配線板における複数の電極パッドおよびスルーホールのそれぞれの表面に接合材を塗布する塗布工程と、塗布工程により接合材が塗布されたプリント配線板の複数の電極パッド上に半導体パッケージの複数のバンプを対向させて実装する実装工程と、実装工程により半導体パッケージが実装されたプリント配線板を加熱して接合材によりバンプと電極パッドとを接合する接合工程と、半導体パッケージと、プリント配線板との間に充填材を流し込む流込工程とを有するプリント回路板の製造方法を特徴とする。   In order to solve the above problems, the present invention provides a preparation process for preparing a printed wiring board including a through hole and a plurality of electrode pads for mounting a plurality of bumps provided on one surface of the semiconductor package. And an application step of applying a bonding material to each surface of the plurality of electrode pads and through holes in the printed wiring board prepared in the preparation step, and a plurality of electrode pads of the printed wiring board in which the bonding material is applied in the application step A mounting process in which a plurality of bumps of a semiconductor package are mounted facing each other, a bonding process in which a printed wiring board on which the semiconductor package is mounted in the mounting process is heated to bond the bumps and the electrode pads with a bonding material; Characterized by a method for manufacturing a printed circuit board having a casting step of pouring a filler between the package and the printed wiring board .

また、本発明は、複数のバンプを備えた半導体パッケージと、スルーホールと、半導体パッケージの一方の面に設けられた複数のバンプが実装されるための複数の電極パッドとを備えたプリント配線板とを有し、複数のバンプと複数の電極パッドとが接合材によって接合され、かつ半導体パッケージとプリント配線板との間に充填材が流し込まれることによって半導体パッケージがプリント配線板に実装され、スルーホールの開口部が接合材と同じ接合材によって閉鎖されているプリント回路板を提供する。   The present invention also provides a printed wiring board comprising a semiconductor package having a plurality of bumps, a through hole, and a plurality of electrode pads for mounting a plurality of bumps provided on one surface of the semiconductor package. A plurality of bumps and a plurality of electrode pads are bonded by a bonding material, and a filler is poured between the semiconductor package and the printed wiring board to mount the semiconductor package on the printed wiring board. Provided is a printed circuit board in which the opening of the hole is closed by the same bonding material as the bonding material.

さらに本発明は、プリント回路板を備えた電子機器であって、プリント回路板は、複数のバンプを備えた半導体パッケージと、スルーホールと、半導体パッケージの一方の面に設けられた複数のバンプが実装されるための複数の電極パッドとを備えたプリント配線板とを有し、複数のバンプと複数の電極パッドとが接合材によって接合され、かつ半導体パッケージとプリント配線板との間に充填材が流し込まれることによって半導体パッケージがプリント配線板に実装され、スルーホールの開口部が接合材と同じ接合材によって閉鎖されている電子機器を提供する。   Furthermore, the present invention is an electronic apparatus including a printed circuit board, and the printed circuit board includes a semiconductor package including a plurality of bumps, a through hole, and a plurality of bumps provided on one surface of the semiconductor package. A printed wiring board having a plurality of electrode pads to be mounted; a plurality of bumps and a plurality of electrode pads are bonded together by a bonding material; and a filler between the semiconductor package and the printed wiring board The electronic device in which the semiconductor package is mounted on the printed wiring board by being poured and the opening of the through hole is closed by the same bonding material as the bonding material is provided.

以上詳述したように、本発明によれば、アンダーフィル材の裏面側への流れ出しを防止したプリント回路板を簡易に製造できるプリント回路板の製造方法、プリント回路板およびそのプリント回路板を備えた電子機器が得られる。   As described above in detail, according to the present invention, there is provided a printed circuit board manufacturing method, a printed circuit board, and the printed circuit board capable of easily manufacturing a printed circuit board that prevents the underfill material from flowing out to the back side. Can be obtained.

以下、本発明の実施の形態について説明する。なお、同一要素には同一符号を用い、重複する説明は省略する。   Embodiments of the present invention will be described below. In addition, the same code | symbol is used for the same element and the overlapping description is abbreviate | omitted.

図１はパーソナルコンピュータ１の外観の構成を示す斜視図である。このパーソナルコンピュータ１は本発明の実施の形態に係る電子機器であって、後述するプリント回路板１０を有している。本実施の形態では、プリント回路板を備えた電子機器として、図１に示すようなパーソナルコンピュータ１を例にとって説明する。   FIG. 1 is a perspective view showing an external configuration of the personal computer 1. The personal computer 1 is an electronic device according to an embodiment of the present invention, and has a printed circuit board 10 to be described later. In this embodiment, a personal computer 1 as shown in FIG. 1 will be described as an example of an electronic device provided with a printed circuit board.

図１に示すパーソナルコンピュータ１は本体ハウジング２と、液晶表示パネルが組み込まれた表示ユニット３とを有する携帯可能なノート型のコンピュータである。   A personal computer 1 shown in FIG. 1 is a portable notebook computer having a main body housing 2 and a display unit 3 in which a liquid crystal display panel is incorporated.

本体ハウジング２は表側にキーボード４が設けられ、内部にプリント回路板１０が備えられている。   The main body housing 2 is provided with a keyboard 4 on the front side and a printed circuit board 10 inside.

ここで、図２は後述するプリント配線板１１の一部省略した平面図、図３はプリント配線板１１上に後述するＢＧＡ２０を実装するとともに、アンダーフィル材３０を流し込むことで得られるプリント回路板１０をIII-III線で切断した場合の断面図、図４は同じくIV-IV線で切断した場合の断面図である。   Here, FIG. 2 is a plan view in which a printed wiring board 11 to be described later is partially omitted, and FIG. 3 is a printed circuit board obtained by mounting a BGA 20 to be described later on the printed wiring board 11 and pouring an underfill material 30 thereon. 10 is a cross-sectional view taken along line III-III, and FIG. 4 is a cross-sectional view taken similarly along line IV-IV.

プリント回路板１０は、図３に示すように、プリント配線板１１と、半導体パッケージとしてのＢＧＡ２０と、充填材としてのアンダーフィル材３０とを有し、ＢＧＡ２０がプリント配線板１１に実装され、かつＢＧＡ２０とプリント配線板１１との間に、アンダーフィル材３０が流し込まれて構成されている。   As shown in FIG. 3, the printed circuit board 10 includes a printed wiring board 11, a BGA 20 as a semiconductor package, and an underfill material 30 as a filler, and the BGA 20 is mounted on the printed wiring board 11. An underfill material 30 is poured between the BGA 20 and the printed wiring board 11.

プリント配線板１１は図２に示すように、ＢＧＡ２０が実装される側の表面（実装面）１１ａに、ＢＧＡ２０が実装される実装領域１２が確保されている。また、プリント配線板１１は実装面１１ａにおける実装領域１２に、後述するはんだバンプ２５を実装するための電極パッドとしての複数の銅パッド１３が形成されるとともに、スルーホール１４が形成され、実装領域１２の外側近傍に別のスルーホール１５が形成されている。銅パッド１３はＢＧＡ２０の後述するはんだバンプ２５に対応して形成されている。   As shown in FIG. 2, the printed wiring board 11 has a mounting area 12 on which the BGA 20 is mounted on a surface (mounting surface) 11a on the side where the BGA 20 is mounted. Further, the printed wiring board 11 has a plurality of copper pads 13 as electrode pads for mounting solder bumps 25 to be described later and a through hole 14 formed in the mounting area 12 on the mounting surface 11a. Another through hole 15 is formed in the vicinity of the outer side of 12. The copper pad 13 is formed corresponding to a solder bump 25 described later of the BGA 20.

スルーホール１４、１５はプリント配線板１１の実装面１１ａと、その裏側の面（裏面）１１ｂとを貫通している。スルーホール１４、１５は、はんだ１７によって開口部が閉鎖され、かつ内部がはんだ１７によって埋め尽くされている。   The through holes 14 and 15 penetrate the mounting surface 11a of the printed wiring board 11 and the back surface (back surface) 11b. The through holes 14, 15 are closed by solder 17 and filled with solder 17.

ＢＧＡ２０はＩＣチップ２１と、封止樹脂２２と、コア材２３と、ソルダーレジスト２４と、はんだバンプ２５と、ダイアタッチフィルム２６とを有している。ＢＧＡ２０はコア材２３の表側にダイアタッチフィルム２６を介してＩＣチップ２１を搭載し、表側全体を封止樹脂２２により封止した樹脂パッケージであって、裏面側にはんだバンプ２５が複数設けられている。   The BGA 20 includes an IC chip 21, a sealing resin 22, a core material 23, a solder resist 24, a solder bump 25, and a die attach film 26. The BGA 20 is a resin package in which an IC chip 21 is mounted on the front side of a core material 23 via a die attach film 26, and the entire front side is sealed with a sealing resin 22, and a plurality of solder bumps 25 are provided on the back side. Yes.

さらにアンダーフィル材３０はスルーホール１５に配置されているはんだ１７の後述するはんだ凸部１７ａによって外側方向への流れ出しが抑制され、スルーホール１５よりも内側に配置されている。   Furthermore, the underfill material 30 is disposed on the inner side of the through hole 15 by preventing the solder 17 disposed in the through hole 15 from flowing out to the outside by a solder protrusion 17a described later.

以上の構成を有するプリント回路板１０は、次のようにして製造されている。ここで、図５は、ＢＧＡ２０の図３と同様の断面図、図６はプリント配線板１１の図３と同様の断面図である。   The printed circuit board 10 having the above configuration is manufactured as follows. Here, FIG. 5 is a cross-sectional view of the BGA 20 similar to FIG. 3, and FIG. 6 is a cross-sectional view of the printed wiring board 11 similar to FIG.

まず、前述した構成を備えたＢＧＡ２０と、プリント配線板１１とを準備する。ただし、プリント配線板１１のスルーホール１４，１５ははんだ１７が埋められることなく中空の状態である。   First, the BGA 20 having the above-described configuration and the printed wiring board 11 are prepared. However, the through holes 14 and 15 of the printed wiring board 11 are in a hollow state without being filled with the solder 17.

次に、プリント配線板１１を対象にしたはんだ印刷工程を行い、実装面１１ａに形成されている銅パッド１３とスルーホール１４、１５の表面に同じはんだを一度に塗布して、図６に示すように、銅パッド１３とスルーホール１４、１５の表面にはんだペースト１８を形成する。この場合、銅パッド１３については、その表面の大きさに対応した量のはんだを塗布し、スルーホール１４，１５については、スルーホール１４，１５それぞれの開口部を閉鎖可能でかつ内部を埋め尽くせる量のはんだを塗布する。この場合、はんだペースト１８の表面にはフラックス１９が塗布されている。また、スルーホール１４、１５については、それぞれの開口部を塞ぐようにしてはんだを塗布する。   Next, a solder printing process for the printed wiring board 11 is performed, and the same solder is applied to the surfaces of the copper pads 13 and the through holes 14 and 15 formed on the mounting surface 11a at a time, as shown in FIG. Thus, the solder paste 18 is formed on the surfaces of the copper pad 13 and the through holes 14 and 15. In this case, the copper pad 13 is coated with an amount of solder corresponding to the size of the surface thereof, and the through holes 14 and 15 can be closed and the interiors of the through holes 14 and 15 can be closed. Apply the amount of solder. In this case, a flux 19 is applied to the surface of the solder paste 18. Also, solder is applied to the through holes 14 and 15 so as to close the respective openings.

次に、はんだバンプ２５と銅パッド１３との位置を合わせて対向させ、はんだバンプ２５をはんだペースト１８を介して銅パッド１３上に載置して実装する。   Next, the positions of the solder bumps 25 and the copper pads 13 are made to face each other, and the solder bumps 25 are placed on the copper pads 13 via the solder paste 18 and mounted.

続いて、ＢＧＡ２０とともにプリント配線板１１を図示しないリフロー炉の中に納めて加熱し、はんだリフローを行う。こうすると、はんだペースト１８が溶けてはんだバンプ２５と銅パッド１３とがはんだで接合される。このとき、ＢＧＡ２０とともにプリント配線板１１を加熱することによって、はんだバンプ２５と銅パッド１３との接合を硬化させてもよい。プリント配線板１１を加熱する代わりに、ＢＧＡ２０とともにプリント配線板１１に紫外線を照射して、はんだバンプ２５と銅パッド１３との接合を硬化させてもよい。   Subsequently, the printed wiring board 11 together with the BGA 20 is placed in a reflow furnace (not shown) and heated to perform solder reflow. As a result, the solder paste 18 is melted and the solder bumps 25 and the copper pads 13 are joined by solder. At this time, the bonding between the solder bump 25 and the copper pad 13 may be cured by heating the printed wiring board 11 together with the BGA 20. Instead of heating the printed wiring board 11, the printed wiring board 11 may be irradiated with ultraviolet rays together with the BGA 20 to cure the bonding between the solder bump 25 and the copper pad 13.

また、このはんだリフローを行うと、図７（ｂ）、（ｃ）に示すように、スルーホール１４、１５上に塗布したはんだペースト１８も溶け、はんだペースト１８はスルーホール１４、１５の内部に入り込む。ただし、スルーホール１４，１５には、スルーホール１４，１５それぞれの開口部を閉鎖可能でかつ内部を埋め尽くせる量のはんだを塗布しているので、塗布したはんだの一部がスルーホール１４、１５の外側に位置し、開口部を外側から閉鎖する格好になる。そうすると、図７（ｃ）に示すように、はんだペースト１８が溶解して形成されるはんだ凸部１７ａがスルーホール１５上に形成される。また、はんだ凸部１７ａの表面にはフラックス１９が残っている。   When this solder reflow is performed, as shown in FIGS. 7B and 7C, the solder paste 18 applied to the through holes 14 and 15 is also melted, and the solder paste 18 is put inside the through holes 14 and 15. Get in. However, since the through holes 14 and 15 are coated with an amount of solder that can close the openings of the through holes 14 and 15 and fill the inside thereof, a part of the applied solder is formed in the through holes 14 and 15. It is located on the outside, and the opening is closed from the outside. As a result, as shown in FIG. 7C, solder protrusions 17 a formed by melting the solder paste 18 are formed on the through holes 15. Further, the flux 19 remains on the surface of the solder protrusion 17a.

続いて、ＢＧＡ２０とプリント配線板１１との間にアンダーフィル材３０を流し込む。こうして、前述したプリント回路板１０を製造することができる。   Subsequently, an underfill material 30 is poured between the BGA 20 and the printed wiring board 11. Thus, the above-described printed circuit board 10 can be manufactured.

ここで、図９〜１１を参照して、本発明に関連するプリント配線板１０１について説明する。図９に示すように、プリント配線板１０１は前述したプリント回路板１０と同様のＢＧＡ２０をプリント配線板９１に実装し、ＢＧＡ２０とプリント配線板９１との間にアンダーフィル材３０を流し込んだものである。   Here, with reference to FIGS. 9-11, the printed wiring board 101 relevant to this invention is demonstrated. As shown in FIG. 9, the printed wiring board 101 is obtained by mounting a BGA 20 similar to the printed circuit board 10 described above on a printed wiring board 91 and pouring an underfill material 30 between the BGA 20 and the printed wiring board 91. is there.

しかしながら、図１０に示すように、プリント配線板９１は、はんだ印刷工程が行われる際に、スルーホール１４，１５を除く銅パッド１３だけを対象にしたはんだ印刷が行われているため、銅パッド１３にははんだペースト１８が形成されているものの、スルーホール１４，１５にはんだペースト１８が形成されていない。そのため、スルーホール１４，１５ははんだが入り込むことなく貫通したままである。   However, as shown in FIG. 10, since the printed wiring board 91 is subjected to solder printing only for the copper pad 13 excluding the through holes 14 and 15 when the solder printing process is performed, Although solder paste 18 is formed on 13, solder paste 18 is not formed on the through holes 14 and 15. Therefore, the through holes 14 and 15 remain penetrating without entering the solder.

したがって、図１１に示すように、ＢＧＡ２０を実装し、続いてアンダーフィル材３０を流し込んだときに、丸印Ｐ１を付した箇所のようにアンダーフィル材３０が実装面９１ａ側からスルーホール１４，１５を通って裏面９１ｂ側に流れ出してしまう。しかも、丸印Ｐ２を付した箇所のように、実装面９１ａ上をアンダーフィル材３０がスルーホール１５よりも外側に広がってしまい、スルーホール１５よりも外側への濡れ広がりが発生してしまうといった課題がある。   Therefore, as shown in FIG. 11, when the BGA 20 is mounted and then the underfill material 30 is poured, the underfill material 30 is formed from the mounting surface 91a side through the through holes 14, as shown by the circle P1. 15 flows out to the back surface 91b side. In addition, the underfill material 30 spreads outside the through hole 15 on the mounting surface 91a like the part marked with the circle P2, and the wetting spread outside the through hole 15 occurs. There are challenges.

これに対し、プリント回路板１０では、製造段階で銅パッド１３およびスルーホール１４，１５を対象にしたはんだ印刷を行うことにより、銅パッド１３およびスルーホール１４，１５にはんだペースト１８を形成している。そのため、スルーホール１４，１５がはんだ１７（さらにはフラックス１９）で埋め尽くされている。   On the other hand, in the printed circuit board 10, solder paste 18 is formed on the copper pad 13 and the through holes 14 and 15 by performing solder printing on the copper pad 13 and the through holes 14 and 15 at the manufacturing stage. Yes. Therefore, the through holes 14 and 15 are filled with the solder 17 (and the flux 19).

そのため、プリント回路板１０では、アンダーフィル材３０を流し込んでも、アンダーフィル材３０がスルーホール１４，１５を通って、裏面１１ｂ側に流れ出すようなことはない。したがって、プリント回路板１０は余計なアンダーフィル材３０を流し込むことなく製造することができるから、必要とされるアンダーフィル材３０の量を抑えることができる。しかも、プリント回路板１０の場合は、はんだ凸部１７ａが形成されているため、はんだ凸部１７ａによってアンダーフィル材３０の移動が阻止され、スルーホール１５よりも外側へのアンダーフィル材３０の濡れ広がりが起き難くなっており、アンダーフィル材３０がスルーホール１５よりも内側に配置されるようになっている。そのため、必要とされるアンダーフィル材３０の量をいっそう抑えることができるようになっている。   Therefore, in the printed circuit board 10, even when the underfill material 30 is poured, the underfill material 30 does not flow out through the through holes 14 and 15 to the back surface 11 b side. Therefore, since the printed circuit board 10 can be manufactured without pouring an unnecessary underfill material 30, the amount of the underfill material 30 required can be suppressed. In addition, in the case of the printed circuit board 10, since the solder protrusions 17 a are formed, the movement of the underfill material 30 is prevented by the solder protrusions 17 a, and the underfill material 30 is wet outside the through holes 15. Expansion is difficult to occur, and the underfill material 30 is arranged inside the through hole 15. Therefore, the amount of the underfill material 30 required can be further suppressed.

さらに、アンダーフィル材３０の流れ出しを避けるためにスルーホール１４，１５の位置を移動させる必要もないので、スルーホール１４，１５は配線の都合など、電気的な特性を考慮して最適な位置に形成することができ、したがって、プリント回路板１０は設計自由度が高くなっている。   Further, since it is not necessary to move the positions of the through holes 14 and 15 in order to avoid the underfill material 30 from flowing out, the through holes 14 and 15 are optimally positioned in consideration of electrical characteristics such as the convenience of wiring. Therefore, the printed circuit board 10 has a high degree of design freedom.

その上、プリント回路板１０は、プリント配線板１１の実装面１１ａ側における銅パッド１３へのはんだ印刷工程の際に、銅パッド１３とともにスルーホール１４、１５の表面に対し、同じはんだを用いて同じタイミングに、はんだペースト１８を形成している。   In addition, the printed circuit board 10 uses the same solder for the surface of the through holes 14 and 15 together with the copper pad 13 during the solder printing process on the copper pad 13 on the mounting surface 11a side of the printed wiring board 11. The solder paste 18 is formed at the same timing.

このように、プリント回路板１０の製造方法では、はんだの印刷箇所を少し変更するだけでスルーホール１４、１５を閉鎖するようにしているから、特許文献１（特開２００４−７９６２１号公報）記載の製造方法のように、裏面側を塞ぎ材で塞ぐ場合と異なり、製造工程が煩雑になることはなく、プリント回路板１０を簡易に製造することができる。   As described above, in the method of manufacturing the printed circuit board 10, the through holes 14 and 15 are closed only by slightly changing the solder printing location. Therefore, it is described in Japanese Patent Application Laid-Open No. 2004-79621. Unlike the case where the back side is closed with a plugging material as in this manufacturing method, the manufacturing process is not complicated, and the printed circuit board 10 can be easily manufactured.

また、実装面１１ａ側に銅パッド１３と同じはんだを用いてスルーホール１４、１５を閉鎖しているから、接合部分における信頼性の低下を招くこともない。   Further, since the through holes 14 and 15 are closed using the same solder as the copper pad 13 on the mounting surface 11a side, the reliability at the joint portion is not lowered.

（変形例）
以上の実施の形態では、スルーホール１４、１５の実装面１１ａ側にはんだペースト１８を形成しているが、図８（ａ），（ｂ）に示すように、はんだペースト１８をスルーホール１４、１５の裏面１１ｂ側に形成してもよい。この場合、はんだ印刷を行う際に、スルーホール１４、１５には、開口部を閉鎖可能でかつ内部を埋め尽くせる量のはんだを塗布する。すると、はんだリフローを行い、プリント配線板１１を加熱したときに、はんだペースト１８が溶けてスルーホール１４、１５の内部に入り込み、図８（ｂ）に示すように、裏面１１ｂ側からスルーホール１４、１５内がはんだ１７で埋め尽くされてスルーホール１４、１５が閉鎖され、それぞれの開口部が塞がれる。塗布するはんだの量によっては、図８（ｃ）に示すように、実装面１１ａ側にはんだの濡れ広がり１８ａが少し残ることもあるが、この場合も、スルーホール１４、１５内がはんだ１７で埋め尽くされてスルーホール１４、１５が閉鎖される。 (Modification)
In the above embodiment, the solder paste 18 is formed on the mounting surface 11a side of the through holes 14 and 15, but as shown in FIGS. 15 may be formed on the back surface 11b side. In this case, when performing solder printing, the through holes 14 and 15 are coated with an amount of solder that can close the opening and fill the interior. Then, when solder reflow is performed and the printed wiring board 11 is heated, the solder paste 18 melts and enters the through holes 14 and 15, and as shown in FIG. , 15 is filled with solder 17, the through holes 14, 15 are closed, and the respective openings are closed. Depending on the amount of solder to be applied, as shown in FIG. 8C, there may be a small amount of solder wetting 18a remaining on the mounting surface 11a side. The through holes 14 and 15 are closed by being filled.

そのため、実装面１１ａ側にＢＧＡ２０を実装した後、アンダーフィル材３０の流し込みを行っても、アンダーフィル材３０がスルーホール１４、１５を通って裏面１１ｂ側に流れ出すようなことはない。したがって、このようにして製造しても、余計なアンダーフィル材３０の流し込みが不要になる。この製造方法では、裏面１１ｂ側にはんだ印刷を行う必要があるが、銅パッド１３に塗布するはんだと同じはんだを用いることができるので、製造工程が煩雑になることはない。この場合、スルーホール１４、１５の裏面１１ｂ側に塗布するはんだの量を増やして実装面１１ａ側にはんだが突出するようにしてもよい。こうすると、突出したはんだにより、アンダーフィル材３０の実装面１１ａ側における濡れ広がりを防止することができる。   Therefore, even if the underfill material 30 is poured after the BGA 20 is mounted on the mounting surface 11a side, the underfill material 30 does not flow through the through holes 14 and 15 to the back surface 11b side. Therefore, even if it manufactures in this way, the unnecessary pouring of the underfill material 30 becomes unnecessary. In this manufacturing method, it is necessary to perform solder printing on the back surface 11b side, but since the same solder as the solder applied to the copper pad 13 can be used, the manufacturing process is not complicated. In this case, the amount of solder applied to the back surface 11b side of the through holes 14 and 15 may be increased so that the solder protrudes to the mounting surface 11a side. If it carries out like this, the wetting spread in the mounting surface 11a side of the underfill material 30 can be prevented by the protruding solder.

さらに、以上の実施の形態では、実装面１１ａ、裏面１１ｂのいずれか一方にＢＧＡ２０を実装しているが、ＢＧＡ２０は実装面１１ａ、裏面１１ｂの双方に実装してもよい。この場合、例えば、実装面１１ａについては、銅パッド１３と、スルーホール１４、１５の双方にはんだを塗布する工程（拡張塗布工程）を行い、裏面１１ｂについては、銅パッド１３だけにはんだを塗布する工程（実装用塗布工程）を行えばよい。このようにしても、スルーホール１４、１５をはんだで閉鎖できるので、アンダーフィル材３０の裏面への流れ出しを防止することができる。   Furthermore, in the above embodiment, the BGA 20 is mounted on either the mounting surface 11a or the back surface 11b, but the BGA 20 may be mounted on both the mounting surface 11a and the back surface 11b. In this case, for example, the mounting surface 11a is subjected to a process of applying solder to both the copper pad 13 and the through holes 14 and 15 (extended application process), and the back surface 11b is applied only to the copper pad 13. What is necessary is just to perform the process (application | coating process for mounting). Even in this case, since the through holes 14 and 15 can be closed with solder, it is possible to prevent the underfill material 30 from flowing out to the back surface.

以上の説明は、本発明の実施の形態についての説明であって、この発明の装置及び方法を限定するものではなく、様々な変形例を容易に実施することができる。又、各実施形態における構成要素、機能、特徴あるいは方法ステップを適宜組み合わせて構成される装置又は方法も本発明に含まれるものである。   The above description is the description of the embodiment of the present invention, and does not limit the apparatus and method of the present invention, and various modifications can be easily implemented. In addition, an apparatus or method configured by appropriately combining components, functions, features, or method steps in each embodiment is also included in the present invention.

パーソナルコンピュータの外観の構成を示す斜視図ある。It is a perspective view which shows the structure of the external appearance of a personal computer. プリント配線板の一部省略した平面図である。It is the top view which abbreviate | omitted some printed wiring boards. プリント配線板上に後述するＢＧＡを実装するとともに、アンダーフィル材を流し込むことで得られるプリント回路板の図２におけるIII-III線断面図ある。FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2 of a printed circuit board obtained by mounting a BGA described later on a printed wiring board and pouring an underfill material. 同じくIV-IV線断面図である。Similarly, it is a sectional view taken along line IV-IV. ＢＧＡの図３と同様の断面図である。It is sectional drawing similar to FIG. 3 of BGA. プリント配線板の図３と同様の断面図である。It is sectional drawing similar to FIG. 3 of a printed wiring board. スルーホールとはんだペーストを示す図で、（ａ）ははんだペースト形成前、（ｂ）ははんだペースト形成後、（ｃ）ははんだリフロー後を示す断面図である。It is a figure which shows a through hole and a solder paste, (a) is before solder paste formation, (b) is after solder paste formation, (c) is sectional drawing which shows after solder reflow. 変形例にかかるスルーホールとはんだペーストを示す図で、（ａ）ははんだペースト形成後、（ｂ）ははんだリフロー後を示す断面図、（ｃ）は同じく別の断面図である。It is a figure which shows the through hole and solder paste concerning a modification, (a) is sectional drawing which shows after solder paste formation, (b) is after solder reflow, (c) is another sectional drawing. 本発明に関連するプリント回路板におけるＢＧＡの図３と同様の断面図である。It is sectional drawing similar to FIG. 3 of BGA in the printed circuit board relevant to this invention. 同じく、プリント配線板の図３と同様の断面図である。Similarly, it is sectional drawing similar to FIG. 3 of a printed wiring board. 同じく、プリント回路板の図４と同様の断面図である。Similarly, it is sectional drawing similar to FIG. 4 of a printed circuit board.

符号の説明Explanation of symbols

１…パーソナルコンピュータ、１０…プリント回路板、１１…プリント配線、１２…実装領域、１３…銅パッド、１４、１５…スルーホール、１７…はんだ、１８…はんだペースト、２０…ＢＧＡ、２１…ＩＣチップ、２５…はんだバンプ、３０…アンダーフィル材。   DESCRIPTION OF SYMBOLS 1 ... Personal computer, 10 ... Printed circuit board, 11 ... Printed wiring, 12 ... Mounting area, 13 ... Copper pad, 14, 15 ... Through-hole, 17 ... Solder, 18 ... Solder paste, 20 ... BGA, 21 ... IC chip 25 ... solder bumps, 30 ... underfill material.

Claims (12)

スルーホールと、半導体パッケージの一方の面に設けられた複数のバンプが実装されるための複数の電極パッドとを備えたプリント配線板を準備する準備工程と、
前記準備工程により準備された前記プリント配線板における前記複数の電極パッドおよび前記スルーホールのそれぞれの表面に接合材を塗布する塗布工程と、
前記塗布工程により前記接合材が塗布された前記プリント配線板の前記複数の電極パッド上に前記半導体パッケージの前記複数のバンプを対向させて実装する実装工程と、
前記実装工程により前記半導体パッケージが実装された前記プリント配線板を加熱して前記接合材により前記バンプと前記電極パッドとを接合する接合工程と、
前記半導体パッケージと、前記プリント配線板との間に充填材を流し込む流込工程とを有することを特徴とするプリント回路板の製造方法。 Preparing a printed wiring board including a through hole and a plurality of electrode pads for mounting a plurality of bumps provided on one surface of the semiconductor package;
An application step of applying a bonding material to each surface of the plurality of electrode pads and the through holes in the printed wiring board prepared by the preparation step;
A mounting step of mounting the plurality of bumps of the semiconductor package opposite to each other on the plurality of electrode pads of the printed wiring board to which the bonding material has been applied by the application step;
A bonding step of heating the printed wiring board on which the semiconductor package is mounted by the mounting step and bonding the bump and the electrode pad by the bonding material;
A method for producing a printed circuit board, comprising: a pouring step of pouring a filler between the semiconductor package and the printed wiring board. 前記塗布工程における前記スルーホールの表面への前記接合材の塗布は、前記スルーホールの開口部を塞ぐようにして行うことを特徴とする請求項１記載のプリント回路板の製造方法。   2. The method of manufacturing a printed circuit board according to claim 1, wherein the application of the bonding material to the surface of the through hole in the applying step is performed so as to close an opening of the through hole. 前記プリント配線板を加熱するときに、前記塗布工程において塗布された前記スルーホールの表面への前記接合材が、前記スルーホール内に流れ込み前記接合材が塗布された側とは反対側の前記スルーホールの開口部を塞ぐことを特徴とする請求項１記載のプリント回路板の製造方法。   When the printed wiring board is heated, the bonding material applied to the surface of the through-hole applied in the application step flows into the through-hole and the through-hole on the side opposite to the side on which the bonding material is applied. 2. The method of manufacturing a printed circuit board according to claim 1, wherein the opening of the hole is closed. 前記塗布工程において、前記スルーホールのうち、前記プリント配線板の前記半導体パッケージが実装される実装領域に配置されているスルーホールおよび該実装領域の外側近傍に配置されているスルーホールに前記接合材を塗布することを特徴とする請求項１記載のプリント回路板の製造方法。   In the coating step, the bonding material is inserted into a through hole disposed in a mounting region of the printed wiring board where the semiconductor package is mounted and a through hole disposed in the vicinity of the outside of the mounting region. The method for producing a printed circuit board according to claim 1, wherein: is applied. 前記接合材は、はんだであることを特徴とする請求項１記載のプリント回路板の製造方法。   The method for manufacturing a printed circuit board according to claim 1, wherein the bonding material is solder. 前記流込工程により前記充填材が流し込まれた前記プリント配線板について、前記バンプと前記電極パッドとの接合を硬化させる硬化工程を更に有することを特徴とする請求項１記載のプリント回路板の製造方法。   The printed circuit board according to claim 1, further comprising a curing step of curing the bonding between the bump and the electrode pad with respect to the printed wiring board into which the filler is poured by the casting step. Method. 前記硬化工程は、前記プリント配線板に紫外線を照射することにより行われることを特徴とする請求項６記載のプリント回路板の製造方法。   The method of manufacturing a printed circuit board according to claim 6, wherein the curing step is performed by irradiating the printed wiring board with ultraviolet rays. 前記流込工程により前記充填材が流し込まれた前記プリント配線板を加熱することによって、前記バンプと前記電極パッドとの接合を硬化させる硬化工程を更に有することを特徴とする請求項１記載のプリント回路板の製造方法。   The printed circuit board according to claim 1, further comprising a curing step of curing the bonding between the bump and the electrode pad by heating the printed wiring board into which the filler has been poured in the casting step. Circuit board manufacturing method. 複数のバンプを備えた半導体パッケージと、
スルーホールと、前記半導体パッケージの一方の面に設けられた複数のバンプが実装されるための複数の電極パッドとを備えたプリント配線板とを有し、
前記複数のバンプと前記複数の電極パッドとが接合材によって接合され、かつ前記半導体パッケージと前記プリント配線板との間に充填材が流し込まれることによって前記半導体パッケージが前記プリント配線板に実装され、
前記スルーホールの開口部が前記接合材と同じ接合材によって閉鎖されていることを特徴とするプリント回路板。 A semiconductor package with a plurality of bumps;
A printed wiring board having a through hole and a plurality of electrode pads for mounting a plurality of bumps provided on one surface of the semiconductor package;
The plurality of bumps and the plurality of electrode pads are bonded by a bonding material, and the semiconductor package is mounted on the printed wiring board by pouring a filler between the semiconductor package and the printed wiring board,
The printed circuit board, wherein an opening of the through hole is closed by the same bonding material as the bonding material. 前記スルーホールは、前記半導体パッケージが実装される実装領域の外側近傍に配置され、
前記充填材が前記スルーホールよりも内側に配置されていることを特徴とする請求項９記載のプリント回路板。 The through hole is arranged in the vicinity of the outside of the mounting area where the semiconductor package is mounted,
The printed circuit board according to claim 9, wherein the filler is disposed inside the through hole. 前記接合材がはんだであることを特徴とする請求項９記載のプリント回路板。   The printed circuit board according to claim 9, wherein the bonding material is solder. プリント回路板を備えた電子機器であって
前記プリント回路板は、複数のバンプを備えた半導体パッケージと、
スルーホールと、前記半導体パッケージの一方の面に設けられた複数のバンプが実装されるための複数の電極パッドとを備えたプリント配線板とを有し、
前記複数のバンプと前記複数の電極パッドとが接合材によって接合され、かつ前記半導体パッケージと前記プリント配線板との間に充填材が流し込まれることによって前記半導体パッケージが前記プリント配線板に実装され、
前記スルーホールの開口部が前記接合材と同じ接合材によって閉鎖されていることを特徴とする電子機器。 An electronic device including a printed circuit board, wherein the printed circuit board includes a semiconductor package including a plurality of bumps,
A printed wiring board having a through hole and a plurality of electrode pads for mounting a plurality of bumps provided on one surface of the semiconductor package;
The plurality of bumps and the plurality of electrode pads are bonded by a bonding material, and the semiconductor package is mounted on the printed wiring board by pouring a filler between the semiconductor package and the printed wiring board,
An electronic apparatus, wherein an opening of the through hole is closed by the same bonding material as the bonding material.
JP2008050288A 2008-02-29 2008-02-29 Method of manufacturing printed-circuit board, printed-circuit board, and electronic apparatus with printed-circuit board thereof Abandoned JP2009212104A (en)

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