JP2009208360A - Image forming controller, and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image forming controller which can reduce the consumption power more than a conventional one, and to provide an image forming apparatus using the image forming controller. <P>SOLUTION: This image forming controller 60 includes a main CPU 40, a main ASIC 30, an ICASIC 20, and an external memory 50. In the image forming controller 60, when the mode is shifted to a power saving mode, a subsidiary CPU 23 performs a process based on data which has been input through the I/OASIC 20 by using a memory 34 for image processing. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an image forming controller that acquires image data and forms an image, and an image forming apparatus using the image forming controller.

  2. Description of the Related Art Conventionally, an image forming apparatus that shifts to a power saving mode when a device does not execute a printing process or the like for a certain period is known. Here, the power saving mode is a mode in which the power consumption of the entire apparatus is reduced by stopping the driving of the portion with high power consumption for a certain period.

For example, a print controller that reduces power consumption in the entire image forming apparatus by stopping driving of a CPU with high power consumption that executes image processing on image data as well as a printer engine when shifting to a power saving mode. (For example, refer to Patent Document 1).
Japanese Patent No. 3360665

Circuits with high power consumption include arithmetic units such as CPU (Central Processing Unit), as well as external memories such as ROM (Read-Only Memory) and RAM (Random-Access Memory). If the drive of the memory is stopped, the power consumption of the entire apparatus can be further reduced.
However, in many cases, the image forming apparatus is connected to an external device or the like via a network, and the external device transmits predetermined data without determining that the image forming apparatus has shifted to the power saving mode. End up. Therefore, even in the power saving mode, the image forming apparatus needs to accept data via a network or the like in preparation for returning from the power saving mode, and the ROM, RAM, and the like cannot be stopped.

  The present invention has been made in view of the above problems, and an object thereof is to provide an image forming controller capable of reducing power consumption as compared to the prior art and an image forming apparatus using the image forming controller.

  In order to solve the above-described problem, according to one aspect of the present invention, there is provided an image forming controller that acquires image data and forms an image, and that performs a predetermined process on the acquired image data. A non-volatile memory and a volatile memory for storing predetermined data, a memory having a smaller storage capacity than the volatile memory, an image processing memory for storing the image data, the non-volatile memory, and a volatile memory Or a main control unit that switches between a normal mode and a power saving mode that consumes less power than the normal mode by controlling access to the image processing memory and driving of the first arithmetic unit, an operation panel, and an external An interface control unit that controls the connection between the device and the main control unit by a second calculation unit that consumes less power than the first calculation unit; When an access occurs through the interface control unit during the power saving mode, the main control unit determines whether target data to be processed based on the access is stored in the image processing memory. If the target data is not stored on the image processing memory, the main control unit stores the target data from the nonvolatile memory to the image processing memory, and the interface control unit Is configured to process the target data stored in the image processing memory using the second arithmetic unit, and when the target data is stored in the image processing memory, the interface control unit includes: When the stored target data is processed using the second arithmetic unit and the access does not occur for a predetermined time, the main control unit Sex memory and volatile memory to shift to the power saving mode.

In the invention configured as described above, when an access is generated via the interface control unit during the power saving mode of the image forming controller, the main control unit determines that the target data to be processed based on the access is the image data. It is determined whether or not the target data is stored in the image processing memory. If the target data is not stored in the image processing memory, the main control unit stores the target data from the nonvolatile memory into the image processing memory, and the interface The control unit processes the target data stored in the image processing memory using the second calculation unit. When the target data is stored in the image processing memory, the interface control unit processes the stored target data using the second calculation unit. Further, when the access does not occur for a predetermined time, the main control unit shifts the nonvolatile memory and the volatile memory to the power saving mode.
For this reason, in the power saving mode, processing of data and the like is executed using the image processing memory with low power consumption and the second arithmetic unit, so that the power consumption of the entire device can be reduced. Even when data or the like is input via the interface control unit in the power saving mode, the second arithmetic unit processes the image processing memory as a work area, so that access to the nonvolatile memory and the volatile memory does not occur. Therefore, the time for continuing the power saving mode can be extended.
Here, “target data processed based on access” means data processed by a control command input from an external device such as a PC (Personal Computer).

Preferably, the main control unit stores tag data for determining the target data, and refers to the tag data to determine whether the target data is stored in the image processing memory. to decide.
In the invention configured as described above, since the main control unit determines whether or not the target data is stored based on the tag data, the target data can be specified by a simpler process.

Preferably, the main control unit stores the data updated in the image processing memory in the volatile memory when shifting from the power saving mode to the normal mode.
In the invention configured as described above, since the data updated on the image processing memory is stored in the external memory when shifting from the power saving mode to the normal mode, there is less access to the external memory during power saving. Thus, the power consumption can be further reduced.

Preferably, the main control unit shifts to the normal mode when the storage capacity of the image processing memory becomes insufficient during the power saving mode.
In the invention configured as described above, when the storage capacity of the image processing memory is insufficient, the process can be continued by shifting to the normal mode, and the device can perform image processing with a small storage capacity. The present invention can be applied to a case where a memory is installed without incurring processing interruption.

Preferably, the main control unit may stop the first calculation unit when the mode is shifted to the power saving mode.
In the invention configured as described above, the power consumption of the first arithmetic unit is also reduced in addition to the reduction of the power consumption of the external memory, so that the power consumption of the device can be further reduced. .

  As another aspect of the present invention, it goes without saying that an image forming apparatus having the present image forming controller also has the same effect.

Hereinafter, embodiments of the present invention will be described in the following order with reference to the drawings. In addition, the part which attached | subjected the same code | symbol is the same or equivalent place, The description is not repeated.
1. First embodiment:
2. Second embodiment:
3. Other embodiments:

1. First embodiment:
1.1. Configuration of image forming apparatus:
FIG. 1 is a block diagram illustrating the configuration of the image forming apparatus. The image forming apparatus 100 is connected to a host PC (external device) 120 or the like via a network 110, and an image file or the like is supplied from the host PC 120 via the network 110. Thereafter, the image forming apparatus 100 executes print processing on the print medium based on the control command and the image data in the supplied image file. An example of the image forming apparatus 100 is a page printer such as a laser printer or a multi-function machine having a copying function.

  The image forming apparatus 100 is roughly classified into a controller (image forming controller) 60 that controls various operations of the image forming apparatus 100, a print engine 90 that executes print processing on a print medium based on the acquired image data, And an operation panel 80 for receiving an operation input from a user or the like. Note that a bus 70 is provided between each unit, and communicates with each other via the bus 70.

  The print engine 90 has a function of executing print processing on a print medium based on an image generated by the controller 60. When the image forming apparatus 100 is a laser printer, the print engine 90 is a semiconductor laser, a printing mechanism such as a polygon mirror, and a casing that accommodates the above-described units.

  The operation panel 80 has a function of receiving an operation input such as pressing from the user and outputting a predetermined control signal based on the received operation input to the controller 60. The operation panel may be a touch panel in addition to the operation keys.

  The controller 60 includes a main CPU (first arithmetic unit) 40 having a function of executing various programs corresponding to processing with a relatively large amount of computation such as image processing, an external memory 50 that stores a predetermined program, and the like. An IO_ASIC (interface control unit) 20 having a function as an interface for receiving a control command input by operating the operation panel 80 and an image file supplied from the host PC 120, the above-described main CPU 40, external memory 50, and further And a main ASIC (main control unit) 30 that is connected to the IO_ASIC 20 and has a function of controlling driving of the main CPU 40 and controlling access to the external memory 50.

  The main CPU 40 performs arithmetic processing on the image data stored in the image file according to a predetermined program stored in the external memory 50. The main CPU 40 is mainly for executing processing with a large amount of calculation, and has a high number of processing bits, and thus high power consumption. In the figure, the main CPU 40 and the main ASIC 30 are configured separately, but the present invention is not limited to this, and the main CPU 40 may be mounted in the main ASIC 30.

  The external memory 50 includes a ROM 51 (Read Only Memory) that is a nonvolatile memory and a RAM 52 (Random Access Memory) that is a volatile memory. In addition to application software for driving the controller 60, the ROM 51 stores various programs for processing various data supplied from the host PC 120. Further, the RAM 52 in the present embodiment is constituted by a DRAM (Dynamic Random-Access Memory), and the stored data is held by rewriting (refreshing) the data stored at a predetermined cycle.

  The main ASIC 30 includes a CPU control unit 31 having a function of controlling the main CPU 40, a memory control unit 32 having a function of controlling access to the external memory 50, and color conversion and half-processing for image data supplied to the print engine 90. An image processing unit 33 having a function of performing image processing such as tone processing, an image processing memory 34 in which image data processed by the main CPU 40 or the image processing unit 33 is temporarily stored, and an IO_ASIC 20 are input. Switching unit 35 for switching access to either the memory control unit 32 or the image processing memory 34, and a main_ASIC / IF (described later), and an IO_ASIC / IF having a function as an interface between the main ASIC 30 and the IO_ASIC 20 Part 36. It should be noted that a bus is provided between the components constituting the main ASIC 30 and communicates with each other via this bus.

  The image processing memory 34 functions as a buffer memory in the image processing unit 33. The image processing memory in the present embodiment is desirably a volatile memory having a relatively large storage capacity. As an example, the image processing memory in the present embodiment has a storage capacity of 1 Mbit to 2 Mbit, and is composed of an SRAM (Static Random-Access Memory) that does not require a refresh operation.

  The IO_ASIC 20 has a panel control unit 21 having a function as an interface for receiving a control command input from the operation panel 80, and a host having a function as an interface for receiving an image file transmitted from the host PC 120 via the network 110. The main ASIC / IF unit 24 having a function as an interface between the main ASIC 30 and the IO_ASIC 20 by connecting to the IF control unit 22 and the IO_ASIC / IF unit 36, and the functions of the respective units in the IO_ASIC 20 described above via the bus 25. A sub CPU (second arithmetic unit) 23 to be controlled is provided.

  The sub CPU 23 uses the control in the IO_ASIC 20 as a main function, and controls various functions executed in the main ASIC 30 when the image forming apparatus 100 shifts to the power saving mode. In addition, unlike the main CPU 40, the sub CPU 23 is intended for processing with a relatively small amount of computation, and thus is desirably a low power consumption type CPU with a small number of processing bits.

1.2. Power saving mode:
The operation of the image forming apparatus 100 in the power saving mode will be described below. In the power saving mode of the image forming apparatus 100, the driving of the main CPU 40 and the access to the external memory 50 are stopped to reduce the power consumption of the entire image forming apparatus 100. Specifically, in the power saving mode, the CPU control unit 31 stops driving the main CPU 40, and the memory control unit 32 stops access to the external memory 50. By stopping access to the external memory 50, the refresh operation of the RAM 52 is stopped as a result, and the power consumption of the external memory 50 is reduced. During this time, even when predetermined data is supplied from the host PC 120 via the network 110, the sub CPU 23 processes the supplied data by using the image processing memory 34 as a work area (cache memory). Can do.

FIG. 2 is a flowchart schematically showing a series of operations of the image forming apparatus. Note that this flowchart mainly describes the processing of the controller 60.
When the user or the like operates the operation panel 80 to turn on the power of the image forming apparatus 100, the image forming apparatus 100 shifts to a normal mode after a predetermined activation process (step S205). In the normal mode, the image forming apparatus 100 executes various processes in accordance with control commands output by operating the operation panel 80 and various control commands transmitted from the host PC 120.

  Next, when the user or the like operates the operation panel 80 to shift the image forming apparatus 100 to the power saving mode (step S210), the main ASIC 30 caches access to the external memory 50 via the image processing memory 34. Switching to operation (step S220). Further, the CPU control unit 31 stops the operation of the main CPU 20 and switches to control mainly using the sub CPU 23 below.

  After that, when there is no access to the external memory 50 for a certain time (step S230), the memory control unit 32 automatically switches the external memory 50 to the power saving mode (step S240). As will be described later, the memory control unit 32 includes an access monitoring timer 16 inside, and monitors access to the external memory 50 using the access monitoring timer 16. In the power saving mode in the image forming apparatus 100, the external memory 50 does not directly receive a control command, and therefore the refresh operation of the RAM 52 is not executed.

  Further, when the operation panel 80 is operated to input a control command for printing processing or the like to cancel the power saving mode (step S250), the main ASIC 30 stops the cache operation using the image processing memory 34 (step S260). . At this time, the command for canceling the power saving mode may be, for example, a control command input from the host PC 120 via the IO_ASIC 20 or a command generated by operating a cover unit in the casing of the print engine 90. Further, by canceling the power saving mode, the control subject is switched from the sub CPU 23 to the main CPU 20.

  Furthermore, when the main ASIC 30 receives access to the external memory 50 via the IO_ASIC 20 (step S270), the memory control unit 32 cancels the power saving mode of the external memory 50 (step S280). If access to the external memory 50 does not occur even when the power saving mode for the main CPU 40 or the like is canceled, if the power saving mode of the external memory 50 is maintained, the power consumption of the image forming apparatus 100 is continuously reduced. Can be made.

  Thereafter, the main ASIC 30 executes the operation in the normal mode while using the external memory 50 and the main CPU 40 (step S290).

  Hereinafter, functions of the respective units of the controller 60 in the power saving mode will be described in more detail with reference to FIGS. FIG. 3 is a block diagram for explaining the functions of the switching unit 35, the memory control unit 32, and the image processing memory 34 in more detail. FIG. 4 is a flowchart for explaining data read processing in the power saving mode. FIG. 5 is a flowchart for explaining data write processing in the power saving mode. Further, FIG. 6 is a flowchart illustrating a process for shifting from the power saving mode to the normal mode.

The switching unit 35 includes a request control unit 11 having a function of controlling access to the memory control unit 32, an SRAM control unit 12 having a function of controlling access to the image processing memory 34, an external memory 50, and an image processing memory. 34 is transmitted from the IO_ASIC 20, the data writing unit 13 having a function of storing an access history to the data storage 34, the TAG_HIT verification unit 15 having a function of determining the presence or absence of target data when accessing the image processing memory 34. And an address / data buffer unit 14 having a function as a buffer memory for temporarily storing access instructions.
Each unit in the switching unit 35 described above may be configured by an integrated circuit, or is realized by a calculation unit such as a CPU mounted in the switching unit 35 (not shown) and a program executed by the calculation unit. It may be a thing.

  The memory control unit 32 includes an access monitoring timer 16 having a function of monitoring the access frequency to the external memory 50 in addition to an access control function for the external memory 50. The access monitoring timer 16 has a function of monitoring the access frequency to the external memory 50 input through the switching unit 35 and storing it as a history.

1.3. Update process in power saving mode:
Hereinafter, the read processing of the sub CPU 23 in the power saving mode will be described with reference to FIG.
When the image forming apparatus 100 shifts to the power saving mode and the read access command for reading predetermined data stored in the ROM 51 is input from the host PC 120 to the IO_ASIC 20 in step S220 in FIG. 2, the sub CPU 23 sends the main ASIC 30 to the main ASIC 30. On the other hand, a read access signal is generated. In the main ASIC 30, the switching unit 35 receives the read access signal via the IO_ASIC / IF unit 36 (step S300).

  The switching unit 35 verifies the presence or absence of data stored in the image processing memory 34 (step S310). Specifically, the read access signal input to the switching unit 35 is temporarily stored in the address / data buffer unit 14, and then the presence or absence of data is determined by the TAG_HIT verification unit 15. The TAG_HIT verification unit 15 determines whether data corresponding to the read access signal is stored in the image processing memory 34 by referring to the TAG (tag data) stored in the image processing memory 34 corresponding to the data. To do.

  Here, the TAG is an identification code used for individually determining data stored in the image processing memory 34. The image processing memory 34 associates TAG with data corresponding to the TAG. Is remembered. The TAG_HIT verification unit 15 stores a table that associates each TAG with predetermined data, and data verification in the TAG_HIT verification unit 15 is executed using this table. Note that data verification may be performed using the address of each data instead of TAG.

  When the data corresponding to the read access signal is not stored in the image processing memory 34 (S320), the switching unit 35 accesses the memory control unit 32 (S330). When the image forming apparatus 100 shifts to the power saving mode and the first read access signal is input, naturally, no data is stored in the image processing memory 34, and the request control unit 11 The controller 32 is accessed to load predetermined data from the ROM 51 into the address / data buffer unit 14.

  The switching unit 35 loads the required data stored in the ROM 51 into the image processing memory 34 (step S340). Specifically, the SRAM control unit 12 writes the data stored in the address / data buffer unit 14 in a predetermined area of the image processing memory 34.

  The switching unit 35 updates the TAG corresponding to the data stored in the image processing memory 34 (step S350). Specifically, the SRAM control unit 12 updates or writes the TAG corresponding to the data stored in the image processing memory 34 and stores in the data writing unit 13 that the data has been stored in the image processing memory 34. To do. Thereafter, when the read access is made again to the switching unit 35 and the data stored in the image processing memory 34 is accessed in step S320, the data is read from the image processing memory 34 (step S360). .

  Next, the write process in the power saving mode will be described with reference to FIG. When a write process is commanded from the host PC 120 through the IO_ASIC 20 (step S400), the switching unit 35 first determines whether the remaining storage capacity of the image processing memory 34 is sufficient (step S410). Specifically, the remaining storage capacity of the image processing memory 34 is calculated, and the storage capacity is determined by comparing the calculation result with a predetermined threshold value. At this time, if the remaining storage capacity of the image processing memory 34 is equal to or smaller than the predetermined value, the process returns to S280 in FIG. 2 to cancel the power saving mode of the external memory 50. Therefore, the subsequent processing is processing using the external memory 50.

  When the storage capacity of the image processing memory 34 is sufficient in step S410, the switching unit 35 writes data in the image processing memory 34 (step S420). Specifically, the SRAM control unit 12 writes the data temporarily stored in the address / data buffer unit 14 to the image processing memory 34.

  The switching unit 35 updates the TAG of the data written in the image processing memory 34 (Step S430). Specifically, the SRAM control unit 12 updates the TAG corresponding to the data stored in the image processing memory 34. Furthermore, the SRAM control unit 12 stores in the data writing unit 13 that the TAG corresponding to the data written in the image processing memory 34 has been updated (step S440). Thereafter, the sub CPU 23 executes processing based on the data written in the image processing memory 34.

  By repeating the above read process and write process, most of the data to be accessed in the power saving mode is stored in the image processing memory 34. Thereby, thereafter, the access to the external memory 50 is not executed, and the sub CPU 23 can execute a predetermined process only by accessing the image processing memory 34. For this reason, only data actually accessed is stored in the image processing memory 34 and stored in the external memory 50 even if it is impossible to determine which data is accessed in the power saving mode. The complicated control for discriminating the recorded data is not required. Further, since only necessary data is stored in the image processing memory, the storage capacity of the image processing memory can be used efficiently.

1.4. Returning from power saving mode to normal mode:
Hereinafter, the return operation from the power saving mode to the normal mode will be described with reference to FIG.
In step S250 in FIG. 2, when a command for canceling the power saving mode is input to the sub CPU 23, a control command for returning to the normal mode is output to the switching unit 35. In the switching unit 35, the SRAM control unit 12 refers to the TAG of each data stored in the image processing memory 34, and determines the updated data (step S261). At this time, the SRAM control unit 12 determines which data stored in the image processing memory 34 has been updated while referring to the history stored in the data writing unit 13.

  The switching unit 35 writes the updated data in a predetermined storage area of the RAM 52 (S262). Specifically, the SRAM control unit 12 stores the data determined by referring to the TAG in the address / data buffer unit 14. Then, the request control unit 11 outputs the data stored in the address / data buffer unit 14 to the memory control unit 32. Thereafter, the memory control unit 32 writes the input data in a predetermined storage area of the RAM 52. As a result, when shifting from the power saving mode to the normal mode, the data updated on the image processing memory 34 is written into the RAM 52. Thereafter, the image forming apparatus 100 executes various processes using the ROM 51 and the RAM 52.

2. Second embodiment:
If the data to be accessed is determined in advance when the image forming apparatus 100 is in the power saving mode, the memory control unit 32 stores all of the target data stored in the ROM 51 in the image processing memory 34 when the mode is shifted to the power saving mode. It may be memorized. Only a few processes are executed in the power saving mode, and even if all of them are stored in the image processing memory 34, no problem occurs. By adopting this modification, since no access to the external memory 50 occurs in the power saving mode, the power consumption of the image forming apparatus 100 can be further reduced.

3. Other embodiments:
Further, the mounting location of the image processing memory 34 is not limited to the main ASIC 30. For example, as illustrated in FIG. 7, each unit including the image processing memory 34 may be mounted on the IO_ASIC 20. In other words, even when the entire main ASIC 30 is stopped in the power saving mode of the image forming apparatus 100, the sub CPU 23 and the image processing memory 34 are mounted in the IO_ASIC 20, so that the predetermined process can be executed only by the IO_ASIC 20. Thus, the power consumption can be further reduced.

  Further, the memory used in the power saving mode is not limited to the image processing memory 34. When the image forming apparatus 100 mounts a memory that consumes less power than the external memory 50 and has a certain storage capacity, the memory may be used to execute processing in the power saving mode.

  In addition, the present invention is not limited to the above-described embodiments and modifications, and the configurations disclosed in the above-described embodiments and modifications, the configurations that are replaced with each other and the combinations thereof are changed, known techniques, and the above-described configurations. Configurations in which the respective configurations disclosed in the embodiments and modifications are mutually replaced or combinations thereof are also included.

1 is a block diagram illustrating a configuration of an image forming apparatus. 3 is a flowchart schematically showing a series of operations of the image forming apparatus. 4 is a block diagram for explaining in detail each function of a switching unit 35, a memory control unit 32, and an image processing memory 34. FIG. 6 is a flowchart illustrating data read processing in a power saving mode. 5 is a flowchart illustrating data write processing in a power saving mode. It is a flowchart explaining the process which transfers to power saving mode from normal mode. It is a block diagram explaining the structure of the image forming apparatus as a modification.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Request control part, 12 ... SRAM control part, 13 ... Data writing part, 14 ... Data buffer part, 15 ... TAG HIT verification part, 16 ... Access monitoring timer, 20 ... IO_ASIC, 21 ... Panel control part, 22 ... Host IF control unit, 23 ... sub CPU, 24 ... main ASIC / IF unit, 25 ... bus, 30 ... main ASIC, 31 ... CPU control unit, 32 ... memory control unit, 33 ... image processing unit, 34 ... memory for image processing 35 ... Switching unit 36 ... IO_ASIC / IF unit 40 ... Main CPU 50 ... External memory 60 ... Controller 70 ... Bus 80 ... Operation panel 90 ... Print engine 100 ... Image forming apparatus 110 ... Network 120 ... Host PC

Claims (5)

An image forming controller that acquires image data and forms an image,
A first calculation unit that executes predetermined processing on the acquired image data;
A non-volatile memory and a volatile memory for storing predetermined data;
A memory having a smaller storage capacity than the volatile memory, and an image processing memory for storing the image data;
Switching between the normal mode and the power saving mode with lower power consumption than the normal mode by controlling access to the nonvolatile memory, volatile memory, or image processing memory and driving of the first arithmetic unit A control unit;
An interface control unit for controlling the connection between the operation panel and the external device and the main control unit by a second calculation unit whose power consumption is lower than that of the first calculation unit;
When an access occurs through the interface control unit during the power saving mode, the main control unit determines whether target data to be processed based on the access is stored in the image processing memory. Judgment
When the target data is not stored on the image processing memory, the main control unit stores the target data from the nonvolatile memory to the image processing memory, and the interface control unit stores the image data Process the target data stored in the processing memory using the second arithmetic unit,
When the target data is stored on the image processing memory, the interface control unit processes the stored target data using the second arithmetic unit,
When the access does not occur for a predetermined time, the main control unit shifts the nonvolatile memory and the volatile memory to a power saving mode.   The main control unit stores tag data for determining the target data, and determines whether the target data is stored in the image processing memory with reference to the tag data. The image forming controller according to claim 1.   The main control unit stores data updated in the image processing memory in the volatile memory when shifting from the power saving mode to the normal mode. The image forming controller according to any one of 2.   The main control unit shifts to the normal mode when the storage capacity of the image processing memory becomes insufficient during the power saving mode. The image forming controller described in 1. An image forming apparatus having an image forming controller that acquires image data and forms an image, and a print engine that executes a printing process on a print medium based on the formed image,
The image forming controller includes:
A first calculation unit that executes predetermined processing on the acquired image data;
A non-volatile memory and a volatile memory for storing predetermined data;
A memory having a smaller storage capacity than the volatile memory, and an image processing memory for storing the image data;
Switching between the normal mode and the power saving mode with lower power consumption than the normal mode by controlling access to the nonvolatile memory, volatile memory, or image processing memory and driving of the first arithmetic unit A control unit;
An interface control unit for controlling the connection between the operation panel and the external device and the main control unit by a second calculation unit whose power consumption is lower than that of the first calculation unit;
When an access occurs through the interface control unit during the power saving mode, the main control unit determines whether target data to be processed based on the access is stored in the image processing memory. Judgment
When the target data is not stored on the image processing memory, the main control unit stores the target data from the nonvolatile memory to the image processing memory, and the interface control unit stores the image data Process the target data stored in the processing memory using the second arithmetic unit,
When the target data is stored on the image processing memory, the interface control unit processes the stored target data using the second arithmetic unit,
When the access does not occur for a predetermined time, the main control unit shifts the nonvolatile memory and the volatile memory to a power saving mode.

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