JP2009191621A - Igniter for internal combustion engine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an igniter for an internal combustion engine having a lock preventing circuit for improving noise resistant performance, while being small to a similar extent as before. <P>SOLUTION: This igniter has an input terminal 2 for inputting a timing signal IGT, a lock preventing circuit 4 having a delay part 41 for setting the timing signal IGT as a delay signal SD by delaying the timing signal IGT, a timer part 42, 43 and 44 for turning on a set signal SS when elapsed time reaches a predetermined lock preventing time after turning on the delay signal SD and a latch part 45 for resetting a lock preventing signal SP by OFF of the delay signal SS by outputting and holding the lock preventing signal SP by ON of the set signal SS, a drive circuit (a NOR circuit 5) for turning on a current-carrying signal SC by ON of the timing signal IGT and turning off the current-carrying signal SC by OFF of the timing signal IGT or ON of the lock preventing signal SP, and a current-carrying control circuit IGBT6 for controlling current-carrying of an ignition coil by ON/OFF of the current-carrying signal SC. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an internal combustion engine ignition device used in an internal combustion engine such as a vehicle engine.

  2. Description of the Related Art Conventionally, an ignition device that generates a high voltage by interrupting a current flowing through an ignition coil, and discharges and ignites with an ignition plug has been used for a vehicle engine or the like. The ignition device is also called an igniter, and controls energization and shut-off of the ignition coil based on a timing signal input from the engine control device. As a circuit element for performing energization control, a semiconductor element such as an insulated gate bipolar transistor (IGBT) is generally used. In recent years, in order to reduce the size of the ignition device, it is formed of a one-chip IC or circuit board, and the ignition device is integrally assembled to the ignition coil.

Further, in order to protect the ignition device when a malfunction occurs in the timing signal, the ignition device is usually provided with a lock prevention circuit. The lock prevention circuit forcibly cuts off the energized current when the ignition coil is locked in the energized state, and keeps the temperature rise of the ignition coil and the ignition device itself below the allowable limit. As the lock prevention circuit, for example, a thermal shut-off circuit or a timed circuit disclosed in Patent Document 1 is used. The thermal shut-off circuit cuts off the current when the temperature detected on the ignition device reaches a specified temperature. The time limit circuit cuts off the current when the elapsed time after the start of energization reaches a predetermined lock prevention time. The time limit circuit is roughly classified into an analog system using a time constant for charging or discharging a capacitor and a digital system using a timer composed of an oscillator and a counter.
Japanese Patent Laid-Open No. 9-42129

  However, since the thermal shut-off circuit of Patent Document 1 detects the temperature on the ignition device, the temperature difference from the ignition coil becomes large depending on the structure and operation status of the ignition device, and the ignition coil may not be protected. In addition, the analog timed circuit is composed of capacitors, resistors, etc., but a relatively large circuit element is required to obtain the desired charge / discharge time constant, which is a constraint on miniaturization and circuit board abolition. It was.

  For these reasons, recently, a digital timer circuit that can be easily miniaturized has been adopted for the lock prevention circuit. However, another problem that lock prevention does not function well due to the influence of discharge noise generated during discharge of the spark plug occurs. For example, let us consider a case where the timing signal does not turn off for some reason, and when the timing signal is turned on, the timer starts and the energizing current of the ignition coil is forcibly cut off and protected when the lock prevention time is reached. In this case, a high voltage is generated in the ignition coil and a discharge is generated in the spark plug as in the normal operation in which the timing signal is turned off even if the forced shut-off is performed. Then, discharge noise may be superimposed on the timing signal, and the timing signal may be turned off instantaneously. When the timing signal is instantaneously turned off, the timer circuit is reset, which causes a problem that current flows again to the ignition coil. Due to such a failure of protection, energization of the ignition coil may continue and the ignition coil or the ignition device may be damaged.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an ignition device for an internal combustion engine having a lock prevention circuit that is improved in noise resistance while being small in size as in the past. .

  Therefore, the present inventor has intensively studied to solve this problem, and as a result of repeated trial and error, the inventors have come up with the idea of providing a delay unit in the lock prevention circuit to avoid the influence of discharge noise superimposed on the timing signal. The invention has been completed.

  That is, the ignition device for an internal combustion engine of the present invention includes an input terminal to which a timing signal for instructing ignition timing is input, a delay unit that is connected to the input terminal and delays the timing signal to obtain a delay signal; A timer unit that turns on the set signal when the elapsed time after the delay signal is turned on reaches a predetermined lock prevention time, and outputs and holds the lock prevention signal when the set signal is turned on, and the lock when the delay signal is turned off. A lock prevention circuit having a latch unit that resets a prevention signal, a drive circuit that turns on the energization signal when the timing signal is turned on, and turns off the conduction signal when the timing signal is turned off or when the lock prevention signal is turned on. When the energization signal is turned on, the ignition coil is energized, and when the energization signal is turned off, the ignition coil is energized. Characterized in that it and a conduction control circuit for generating a high voltage is shut off the electricity.

  Further, the delay unit may act as a filter for removing high frequency noise.

  The delay unit preferably includes a capacitor that starts discharging or charging when the timing signal is turned off, and a comparator that compares the charging voltage of the capacitor with a reference voltage and outputs the delay signal.

  It is preferable that the lock prevention circuit holds the lock prevention signal while avoiding an influence of superposition of discharge noise on the timing signal caused by the discharge generated by the high voltage.

  According to the ignition device for an internal combustion engine of the present invention, when the timing signal continues for some reason, the lock prevention circuit functions, the set signal and the lock prevention signal are turned on, and the energization current of the ignition coil is forcibly cut off. The At this time, even if high-frequency noise is superimposed on the timing signal, the delay signal that has passed through the delay section does not change sharply and does not turn off, so that the timer section is not reset. Therefore, the lock prevention circuit operates satisfactorily without being affected by the discharge noise, the energization current is reliably cut off, and re-energization does not occur.

  In particular, the present invention is effective for an ignition device disposed in the vicinity of a spark plug, and the lock prevention circuit operates well even when discharge noise generated by discharge at the spark plug is superimposed on the timing signal.

  In addition, since the delay unit can be composed of a capacitor with a small capacity, a comparator, and peripheral parts, it can be built in the control IC, and an ignition device can be formed with chip parts without using a circuit board. can do.

  Next, the present invention will be described in more detail with reference to embodiments. FIG. 1 is a block diagram illustrating an ignition unit and an ignition device of a general internal combustion engine such as a vehicle engine. First, the outline of an ignition unit and an ignition device of an engine will be described with reference to FIG.

  As illustrated, the ignition unit 91 includes an ignition device 92 and an ignition coil 93. The ignition device 92 is also called an igniter, and includes an input terminal 921, a waveform shaping circuit 922, a lock prevention circuit 923, a drive circuit 924, an energization control element 925, an overvoltage protection circuit 926, and an overcurrent protection circuit 927. The input terminal 921 is a part that receives the timing signal IGT output from the engine control unit (ECU) 94. The waveform shaping circuit 922 is a circuit that removes distortion of the received timing signal IGT and shapes the signal into a high / low clean binary signal. The lock prevention circuit 923 is a circuit for forcibly cutting off the energized current as protection when the ignition coil 93 is locked in the energized state. The drive circuit 924 is a circuit that outputs an energization signal SC based on the timing signal IGT and drives the energization control element 925. The energization control element 925 controls energization of the ignition coil 93 based on the energization signal SC, and a semiconductor element is generally used. In addition, a battery 95 is connected to the power supply terminal 928 of the ignition device 92, and each circuit 922, 923, 924 operates with a DC voltage VB or a constant voltage Vcc generated inside the ignition device 92. The overvoltage protection circuit 926 is a circuit that detects and protects the overvoltage of the DC voltage VB of the battery 95. When an overvoltage is detected, the drive circuit 924 turns off the energization signal SC and forcibly shuts off the energization control element 925. The overcurrent protection circuit 927 is a circuit that detects the current flowing through the ignition coil 93 and controls it to a certain current value.

  The ignition coil 93 includes a primary coil 931 and a secondary coil 932 that are magnetically coupled. The high voltage side terminal of the primary coil 931 is connected to the battery 95, and the low voltage side terminal is grounded via an energization control element 925 of the igniter 92. The high voltage side terminal of the secondary coil 932 is connected to the spark plug 96, and the low voltage side terminal is grounded via the Zener diode 933. The number of turns of the secondary coil 932 is larger than that of the primary coil 931. At the moment when the energization current of the primary coil 931 is cut off, a high voltage is induced in the secondary coil 932, and the spark plug 96 discharges and ignites. It is like that.

  Next, an internal combustion engine ignition device according to an embodiment will be described in detail with reference to FIG. FIG. 2 is a block diagram illustrating the configuration of the internal combustion engine ignition device according to the embodiment of the present invention. The ignition device 1 according to the embodiment includes an input terminal 2, a waveform shaping circuit 3, a lock prevention circuit 4, a NOR circuit 5 corresponding to the drive circuit of the present invention, and an insulated gate bipolar transistor 6 (hereinafter referred to as IGBT) corresponding to an energization control circuit. The overvoltage protection circuit 7 is provided. The lock prevention circuit 4 includes a delay unit 41, an oscillator 42, a counter 43, a counter logic unit 44, and a latch unit 45.

  The input terminal 2 is a place where a timing signal IGT for instructing ignition timing is input. The timing signal IGT is a binary signal of High / Low, and has a logic circuit configuration so that a current flows through the IGBT 6 in the High state and interrupts the current of the IGBT 6 in the Low state, as will be described later. The waveform shaping circuit 3 removes noise and distortion superimposed on the timing signal IGT during transmission to reshape the signal into a high / low clean binary signal and inverts the logic. In other words, the timing signal IGT is inverted to output the inverted signal RIG indicating ON in the Low state.

  The delay unit 41 of the lock prevention circuit 4 is a circuit unit that generates the delay signal SD by delaying the inverted signal RIG. The delay signal SD is connected so as to be input to the oscillator 42, the counter 43, and the reset terminal R of the latch unit 45. For the delay unit 41, for example, the delay circuit 8 shown in FIG. 3 can be used.

  FIG. 3 is a circuit diagram illustrating a delay circuit 8 which is a configuration example of the delay unit 41 of the present invention. The delay circuit 8 is configured using a capacitor 84, a comparator 86, and other circuit elements. More specifically, one end 811 of the constant current circuit 81 is connected to a constant voltage Vcc generated internally from the DC voltage VB of the battery 95, and the other end 812 has a collector C of an NPN transistor 82 and an anode 831 of a diode 83. And are connected. An inverted signal RIG is input to the base B of the transistor 82, and the emitter E is grounded to the housing G. The cathode 832 of the diode 83 is connected to the negative input terminal 861 of the comparator 86, and the capacitor 84 and the constant current circuit 85 are connected to the housing G. That is, the charging voltage VC of the capacitor 84 is input to the negative side input terminal 861 of the comparator 86. A reference power supply 87 having a reference voltage VD separately generated from the DC voltage VB is connected between the positive input terminal 862 of the comparator 86 and the housing G. A delay signal SD is output from the output terminal 863 of the comparator 86. In this circuit configuration, the transistor 82 functions as a negative element that inverts an input signal to the base B and outputs the inverted signal to the collector C. As is well known, the two constant current circuits 81 and 85 can be configured using, for example, transistors.

  Returning to FIG. 2, the oscillator 42 of the lock prevention circuit 4, the counter 43, and the counter logic unit 44 constitute a timer unit of the present invention. That is, the output of the oscillator 42 at a constant frequency is counted by the counter 43, and when the predetermined lock prevention time TP is reached, the counter logic unit 44 turns on the pulsed set signal SS. Note that the timer unit is configured to restart and restart when the delay signal SD falls (corresponding to the rise when the timing signal IGT is turned on).

  The latch unit 45 includes a set terminal S to which the set signal SS is input, a reset terminal R to which the delay signal SD is input, and an output terminal Q. When the set signal SS is input, the latch unit 45 outputs and holds the lock prevention signal SP at the output terminal Q, and the lock prevention signal SP is output by the rising edge of the delay signal SD (corresponding to the falling edge when the timing signal IGT is turned off). Configured to reset.

  The overvoltage protection circuit 7 monitors the DC voltage VB of the battery 95, detects the overvoltage, and outputs an overvoltage signal SV.

  The NOR circuit 5 corresponding to the drive circuit of the present invention can be configured using a transistor or the like, and is a circuit that performs a logical operation functionally. The NOR circuit 5 has three inputs: an inverted signal RIG obtained by inverting the timing signal IGT, a lock prevention signal SP, and an overvoltage signal SV, and the negation of the logical sum is output as the energization signal SC. That is, the logical sum is zero (Low state) only when the lock prevention signal SP and the overvoltage signal SV are in the normal state of OFF and the inverted signal RIG is in the Low state of ON (corresponding to the state in which the timing signal IGT is input). In this case, the energization signal SC is turned on by negating zero.

  The IGBT 6 corresponding to the energization control circuit of the present invention is interposed between the low-voltage side terminal of the primary coil 931 of the ignition coil 93 and the housing G. When the energization signal SC for controlling the gate voltage is turned on, the conductive state is turned on, and a current is passed through the primary coil 931. When the energization signal SC is turned off, the current is turned off, and the current of the primary coil 931 is cut off. .

  Next, the operation and action of the ignition device 1 of the embodiment configured as described above will be described. First, the operation of the delay circuit 8 will be described with reference to FIG. FIG. 4 is a timing chart for explaining the operation of the delay circuit 8 shown in FIG. In FIG. 4, before the time T41 when the timing signal IGT is not input, the inverted signal RIG is input to the base B of the transistor 82 at the high level in the off state, and the base current flows. Then, the collector current flows from the constant voltage Vcc to the collector C via the constant current circuit 81, and no current flows to the diode 83. The capacitor 84 is not charged, and the charging voltage VC becomes smaller than the reference voltage VD. Therefore, the condition of the comparator 86 is satisfied, and the delay signal SD at the output terminal 863 becomes High level.

  When the timing signal IGT is input at time T41, the inverted signal RIG falls and becomes an on-state low level, and the base current of the transistor 82 stops flowing. Then, the current passing through the constant current circuit 81 from the constant voltage Vcc does not flow to the collector C side, but flows into the capacitor 84 via the diode 83, and the charging voltage VC of the capacitor 84 rises and exceeds the reference voltage VD. . Therefore, the condition of the comparator 86 is not satisfied, and the delay signal SD at the output terminal 863 is switched to the low level in the on state. At this time, the current that can flow through the constant current circuit 81 is set large, and the charging voltage VC rises sharply, so that the delay signal SD is switched without much delay.

  When the timing signal IGT disappears at time T42, the inverted signal RIG rises and the base current of the transistor 82 flows, and the current from the constant voltage Vcc through the constant current circuit 81 flows as a collector current. At this time, the diode 83 becomes a reverse bias voltage, and the charge stored in the capacitor 84 at the charging voltage VC is discharged through the constant current circuit 85. The current that can flow through the constant current circuit 85 is set small, and the discharge proceeds gradually. Therefore, a delay time TD is required until the charging voltage VC reaches the reference voltage VD. Therefore, the delay signal SD at the output terminal 863 rises to the high level in the off state at time T43 delayed by the delay time TD.

  That is, the delay circuit 8 delays the rising edge of the inverted signal RIG by the delay time TD and outputs it as the rising edge of the delayed signal SD, and outputs the falling edge of the inverted signal RIG as the falling edge of the delayed signal SD without delaying. Has an effect. The delay circuit 8 can also be interpreted as acting as a filter that removes high-frequency noise such as discharge noise. The delay time TL can be freely set by appropriately designing the capacitor 84, the constant current circuit 85, and the reference voltage VD.

  Next, the operation and action of the entire ignition device 1 will be described in comparison with the conventional configuration. FIG. 5 is a timing chart for explaining the normal operation of the ignition device 1 of the embodiment shown in FIGS. In the timing chart of the embodiment of FIG. 5, when the timing signal IGT is input on at time T51, the inverted signal RIG falls and goes to the low level. Then, the condition of the NOR circuit 5 is satisfied, the output-side energization signal SC is turned on, the IGBT 6 is turned on, and a current flows through the primary coil 931 of the ignition coil 93. Further, the oscillator 42 and the counter 43 are reset at the falling edge of the delay signal SD that has almost no time delay with respect to the falling edge of the inverted signal RIG, and the output of the counter 43 is turned on and the timing is started. Under normal operating conditions, the timing signal IGT is turned off at time T52 when a certain control time TN has passed, and the energization signal SC of the NOR circuit 5 is turned off. Then, the IGBT 6 cuts off the energization current of the primary coil 931, a high voltage is induced in the secondary coil 932, and the spark plug 96 discharges to perform ignition. At this time, since the control time TN is shorter than the lock prevention time TP, the lock prevention circuit 4 does not operate, the counter output is reset at the time T53 delayed by the delay time TD, and the set signal SS and the lock prevention signal SP are not turned on. .

  Next, consider a case where the timing signal IGT continues in an ON state for some reason. FIG. 6 is a timing chart for explaining the lock prevention operation of the ignition device 1 of the embodiment shown in FIGS. In the timing chart of the embodiment of FIG. 6, when the timing signal IGT is turned on at time T61, the energization signal SC is turned on, the output of the counter 43 is turned on, and the timing is started as in FIG. Operate. Here, if the timing signal IGT continues in the ON state, the counter 43 detects the elapse of the lock prevention time TP and turns off the output at time T62. The counter logic unit 44 outputs the set signal SS on, and the latch unit 45 outputs and holds the lock prevention signal SP at the output terminal Q. With this lock prevention signal SP, the energization signal SC of the NOR circuit 5 is turned off, and the IGBT 6 forcibly interrupts the energization current of the primary coil 931. A discharge noise DN is generated by the discharge of the spark plug 96 due to this forced shut-off, and the discharge noise DN may be superimposed on the timing signal IGT to be instantaneously turned off. In this non-normal off state, the inverted signal RIG is instantaneously raised and then lowered again.

  The instantaneous change of the inverted signal RIG is input to the delay circuit 8, but the rise of the delay signal SD as an output is delayed by the delay time TD shown in FIG. Since the delay time TD is much longer than the duration of the discharge noise DN, the delay signal SD does not actually rise at the time T63 when the discharge noise occurs and maintains the low level. Therefore, the oscillator 42, the counter 43, and the latch unit 45 are not reset, the lock prevention signal SP is kept on, the energization signal SC is kept off, and the primary coil 931 is kept off. That is, the lock prevention functions reliably without being affected by the discharge noise DN.

  On the other hand, the lock preventing operation of the conventional igniter will be described with reference to the timing chart of FIG. The conventional igniter does not have the delay unit 41 in FIG. 2, and the inverted signal RIG of the timing signal IGT is directly input to the oscillator 42, the counter 43, and the reset terminal R of the latch unit 45. In the timing chart of the conventional configuration of FIG. 7, when the timing signal IGT is turned on at time T71, the energization signal SC is turned on, the output of the counter 43 is turned on, and the timing is started as in FIG. Operate. Here, when the timing signal IGT continues in the ON state, the counter 43 detects the elapse of the lock prevention time TP and turns off the output at time T72. The counter logic unit 44 outputs the set signal SS on, and the latch unit 45 outputs and holds the lock prevention signal SP at the output terminal Q. With this lock prevention signal SP, the energization signal SC of the NOR circuit 5 is turned off, and the IGBT 6 forcibly cuts off the current of the primary coil 931. A discharge noise DN is generated by the discharge of the spark plug 96 due to this forced shut-off, and the discharge noise DN may be superimposed on the timing signal IGT and may be turned off instantaneously. In this non-normal off state, the inverted signal RIG is instantaneously raised and then lowered again. At time T73 when the inverted signal RIG falls, the oscillator 42 and the counter 43 are reset, and the latch unit 45 is also reset and the lock prevention signal SP is turned off. Then, the condition on the input side of the NOR circuit 5 is satisfied again, the energization signal SC is turned on, and a current flows again through the primary coil 931. That is, there is a possibility that the lock prevention does not function and the current continues to flow through the primary coil 931.

  As described above, the ignition device 1 according to the present embodiment is provided with the delay unit 41, that is, the delay circuit 8, and prevents the latch unit 45 from being reset by the discharge noise superimposed on the timing signal IGT. The function of preventing lock, which was uncertain, can be operated reliably. In addition, since the delay circuit 8 can be comprised with a comparatively small electronic component, the ignition device 1 can be made into a chip component as small as the conventional one.

It is a block diagram explaining the ignition part and ignition device of a general internal combustion engine. It is a block diagram explaining the structure of the ignition device for internal combustion engines of the Example of this invention. It is a circuit diagram explaining the delay circuit which is a structural example of the delay part of this invention. 4 is a timing chart for explaining the operation of the delay circuit shown in FIG. 3. It is a timing chart explaining the normal operation | movement of the ignition device of the Example shown by FIGS. It is a timing chart explaining the lock | rock prevention operation | movement of the ignition device of the Example shown by FIGS. It is a timing chart explaining the lock | rock prevention operation | movement of the ignition device of a conventional structure.

Explanation of symbols

1: Ignition device for internal combustion engine 2: Input terminal 3: Waveform shaping circuit 4: Lock prevention circuit 41: Delay unit 42: Oscillator 43: Counter 44: Counter logic unit 45: Latch unit 5: NOR circuit (drive circuit)
6: Insulated gate bipolar transistor (IGBT) (energization control circuit)
7: Overvoltage protection circuit 8: Delay circuit (configuration example of delay unit)
84: Capacitor 86: Comparator 91: Ignition part of engine 92: Ignition device 93: Ignition coil 94: Engine control unit (ECU) 95: Battery 96: Ignition plug IGT: Timing signal RIG: Inversion signal of timing signal SD: Delay signal SS: Set signal SP: Lock prevention signal SC: Energization signal VB: DC voltage of battery Vcc: Constant voltage for driving internal circuit VC: Charging voltage of capacitor VD: Reference voltage of comparator TP: Lock prevention time

Claims (4)

An input terminal to which a timing signal for instructing ignition timing is input;
A delay unit that is connected to the input terminal and delays the timing signal to make a delay signal, and a timer unit that turns on a set signal when an elapsed time after the delay signal is turned on reaches a predetermined lock prevention time And a lock prevention circuit having a latch unit that outputs and holds the lock prevention signal when the set signal is turned on and resets the lock prevention signal when the delay signal is turned off.
A drive circuit for turning on the energization signal by turning on the timing signal, and turning off the energization signal by turning off the timing signal or turning on the lock prevention signal;
An energization control circuit that energizes the ignition coil by turning on the energization signal, and interrupts energization of the ignition coil by turning off the energization signal to generate a high voltage;
An ignition device for an internal combustion engine comprising:   The ignition device for an internal combustion engine according to claim 1, wherein the delay unit functions as a filter for removing high-frequency noise.   The delay unit includes: a capacitor that starts discharging or charging when the timing signal is turned off; and a comparator that compares the charging voltage of the capacitor with a reference voltage and outputs the delay signal. An ignition device for an internal combustion engine according to claim 1.   The said lock prevention circuit avoids the influence of the superimposition of the discharge noise on the said timing signal caused by the discharge which arises by the said high voltage, The said lock prevention signal is hold | maintained as described in any one of Claims 1-3. Ignition device for internal combustion engine.

Images