JP2009176788A - Manufacturing process and washing method of apparatus for fabricating semiconductor device - Google Patents

Manufacturing process and washing method of apparatus for fabricating semiconductor device Download PDF

Info

Publication number
JP2009176788A
JP2009176788A JP2008011037A JP2008011037A JP2009176788A JP 2009176788 A JP2009176788 A JP 2009176788A JP 2008011037 A JP2008011037 A JP 2008011037A JP 2008011037 A JP2008011037 A JP 2008011037A JP 2009176788 A JP2009176788 A JP 2009176788A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor device
cleaning
foreign matter
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008011037A
Other languages
Japanese (ja)
Other versions
JP5349805B2 (en
Inventor
Ryoji Fukuyama
良次 福山
Makoto Nawata
誠 縄田
Keitaro Ogawa
恵太郎 小川
Katsuji Matano
勝次 亦野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi High Tech Corp
Original Assignee
Hitachi High Technologies Corp
Hitachi High Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi High Technologies Corp, Hitachi High Tech Corp filed Critical Hitachi High Technologies Corp
Priority to JP2008011037A priority Critical patent/JP5349805B2/en
Publication of JP2009176788A publication Critical patent/JP2009176788A/en
Application granted granted Critical
Publication of JP5349805B2 publication Critical patent/JP5349805B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing process and a washing method of an apparatus for fabricating a semiconductor device which can enhance the yield by controlling generation of dust particles. <P>SOLUTION: A manufacturing process of an apparatus for fabricating a semiconductor device which processes a substrate to be processed mounted on a sample stand in a container comprises a step for forming a dielectric film on the upper surface of the sample stand by spraying and cleaning the dielectric film with fluid, and a step for mounting a wafer on the upper surface of the dielectric film and attracting the wafer electrostatically a plurality of times. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、半導体デバイス製造装置の製造方法または洗浄法に係り、特に、被処理基板の裏面に付着する異物を低減する半導体デバイス製造装置の製造方法または洗浄方法に関する。   The present invention relates to a manufacturing method or a cleaning method of a semiconductor device manufacturing apparatus, and more particularly to a manufacturing method or a cleaning method of a semiconductor device manufacturing apparatus that reduces foreign matter adhering to the back surface of a substrate to be processed.

半導体ウエハ等の被処理基板である試料の表面に薄膜を形成したりこれをエッチングしたりする工程を有する処理半導体デバイスの製造においては、サブミクロンレベルの異物が各々の製造工程に影響を及ぼす。例えば、上記エッチング処理の工程においては被処理基板上に付着した異物がマスクとなって正確な電気回路が形成されないため、製造歩留まりの悪化をもたらす虞がある。このような異物は種々の要因で発生するが、被処理基板の裏面に付着した異物が被処理基板の移動時や洗浄時に処理装置内で他の被処理基板に転写すること等が製造歩留まりの悪化をもたらす要因と考えられる。また、半導体デバイスへの重金属成分の混入もデバイス特性を悪化するため、極力排除することが求められている。   In manufacturing a processed semiconductor device having a process of forming a thin film on the surface of a sample, which is a substrate to be processed such as a semiconductor wafer, or etching the thin film, a submicron level foreign substance affects each manufacturing process. For example, in the above etching process, foreign substances adhering to the substrate to be processed serve as a mask and an accurate electric circuit is not formed, which may lead to a decrease in manufacturing yield. Such foreign matter is generated due to various factors, but the foreign matter adhering to the back surface of the substrate to be processed is transferred to another substrate in the processing apparatus when the substrate to be processed is moved or cleaned. This is thought to be a factor causing deterioration. Moreover, since the mixing of heavy metal components into semiconductor devices also deteriorates device characteristics, it is required to eliminate them as much as possible.

従来より、このような問題を解決することが検討されており、例えば、特開平8−321447号公報(特許文献1)には、ウエハの処理中にこれを静電吸着する静電吸着装置上にダミーウエハを載せて静電吸着することで静電吸着装置上面に付着している異物をダミーウエハに転写,捕獲して製品を製造するウエハへ付着する異物を低減しようとするものが開示されている。また、特開平10−321488号公報(特許文献2)には、裏面に粘着性を有する基板をウエハステージ上の接触部材上面に載せて基板裏面の粘着成分により接触部材表面に付着している異物を基板裏面に転写,捕獲するものが開示されている。   Conventionally, it has been studied to solve such a problem. For example, Japanese Patent Application Laid-Open No. 8-32447 (Patent Document 1) discloses an electrostatic chuck that electrostatically chucks a wafer during processing. It is disclosed that foreign substances adhering to the upper surface of the electrostatic adsorption device are transferred to and captured by the dummy wafer by placing the dummy wafer on the wafer and electrostatically adsorbed to reduce the foreign substances adhering to the wafer for manufacturing the product. . Japanese Patent Laid-Open No. 10-32488 (Patent Document 2) describes a foreign substance that has a substrate having adhesiveness on the back surface and is attached to the contact member surface by an adhesive component on the back surface of the substrate. Is disclosed in which the substrate is transferred and captured on the back surface of the substrate.

特開平8−321447号公報JP-A-8-32447 特開平10−321488号公報Japanese Patent Laid-Open No. 10-32488

しかし、近年、半導体デバイスはさらに微細化が進み、より微細な異物までもが問題となってきた、また被処理基板が処理される処理装置内部でこの基板に接触する部材の材質も多種多様となり、その表面状態も焼結材や溶射材が用いられるようになり、表面状態は微細面で見ればかなりの凹凸面を呈するようになっている。このため、従来の異物除去方法を用いただけでは、効率的に異物が除去できない場合が生じてきている。   However, in recent years, semiconductor devices have been further miniaturized, and even finer foreign matter has become a problem, and the materials of members that come into contact with the substrate inside the processing apparatus in which the substrate to be processed is processed are diverse. As for the surface state, a sintered material or a thermal spray material is used, and the surface state exhibits a considerably uneven surface when viewed from a fine surface. For this reason, there are cases where foreign matters cannot be removed efficiently only by using the conventional foreign matter removing method.

被処理基板と接触してこれを保持する部材、例えば、基板が載せられ保持される試料台上面の部分のセラミクスのような誘電体で構成された膜は、その表面に微細に見ればかなりの凹凸が形成されており、このような部分を形成した後には上記凹凸の表面に切片や破片が付着していたり、僅かの外力で遊離してしまう部分が存在している。このような部分は、処理の際に載せられた被処理基板に異物として付着してしまう虞が大きいので、超音波洗浄処理を実施する等の異物を低減するための処理が行われている。   A member that contacts and holds the substrate to be processed, for example, a film made of a dielectric material such as a ceramic on the upper surface of the sample table on which the substrate is placed and held, has a considerable amount on the surface. Concavities and convexities are formed, and after such a portion is formed, there are portions where pieces and fragments are attached to the surface of the concavity and convexity, or are separated by a slight external force. Since such a portion has a high possibility of adhering as a foreign substance to the substrate to be processed placed during the process, a process for reducing the foreign substance such as performing an ultrasonic cleaning process is performed.

しかしながら、従来のこのような処理を行ったとしても十分に異物を取り除くことが困難であった。例えば、超音波処理によって処理装置内で基板が載せられる部分の表面から異物となる粒子を低減させたとしても、粒子に覆われた部分からさらに異物が発生してしまったり、処理装置内の部材の表面に存在する粒子の大きさは広い範囲に渡るため、大きな大きさの粒子を取り除くことができてもより小さな大きさの粒子を取り除くことが困難であったり、その逆に大きな粒子を取り除くことができなかったりする問題が生じていた点については、上記従来技術では考慮されていなかった。   However, it has been difficult to sufficiently remove foreign matter even if such conventional processing is performed. For example, even if particles that become foreign substances are reduced from the surface of the part on which the substrate is placed in the processing apparatus by ultrasonic processing, foreign substances may be further generated from the part covered with the particles, or members in the processing apparatus Since the size of particles on the surface of a wide range can be removed, it is difficult to remove smaller particles even if large particles can be removed, and vice versa However, the above-described prior art has not taken into consideration that the problem that the problem cannot be made has occurred.

本発明の目的は、異物の発生を抑制して歩留まりを向上できる半導体デバイス製造装置の製造方法または半導体デバイス製造装置の洗浄方法を提供することにある。   An object of the present invention is to provide a manufacturing method of a semiconductor device manufacturing apparatus or a cleaning method of a semiconductor device manufacturing apparatus that can improve the yield by suppressing the generation of foreign matters.

上記目的は、容器の内部の試料台上に載置された被処理基板を処理する半導体デバイス製造装置の製造方法またはその洗浄方法であって、前記試料台の上面に誘電体製の膜を溶射により形成した後にこの誘電体製の膜を流体を用いて洗浄する工程と、前記誘電体製の膜の上面にウエハを載せて静電吸着させる処理を複数回行う工程とを備えたことにより達成される。   An object of the present invention is a manufacturing method of a semiconductor device manufacturing apparatus or a cleaning method thereof for processing a substrate to be processed placed on a sample stage inside a container, and spraying a dielectric film on the upper surface of the sample stage The dielectric film is formed by the step of cleaning with a fluid and the process of placing the wafer on the upper surface of the dielectric film and electrostatically attracting the dielectric film is performed a plurality of times. Is done.

さらには、前記誘電体製の膜上にウエハを載せて静電吸着させる処理を複数回行う工程の前に粘着性を有する膜を前記誘電体製の膜の前記上面への貼付及び剥離とを行う工程を備えたことにより達成される。   Furthermore, the adhesive film is attached to and peeled off from the upper surface of the dielectric film before the step of performing a process of placing the wafer on the dielectric film and electrostatically adsorbing it multiple times. This is achieved by providing a process for performing.

さらにまた、前記流体を用いた洗浄として超音波洗浄またはスチーム洗浄を行うことにより達成される。さらにまた、前記流体を用いた洗浄として二種類の流体を用いた洗浄を行うことにより達成される。   Furthermore, it is achieved by performing ultrasonic cleaning or steam cleaning as cleaning using the fluid. Furthermore, it is achieved by performing cleaning using two kinds of fluids as cleaning using the fluid.

以下、本発明の実施の形態を図表を用いて説明する。   Embodiments of the present invention will be described below with reference to the drawings.

図1は、本発明に係る半導体デバイス製造装置の構成の概略を示す縦断面図である。この図において、100は真空容器内に配置された空間である処理室、101は処理室100上方に配置された上部アンテナ、102は上部アンテナ101に高周波電力を供給する高周波電源、103はマッチング・フィルタ回路、104は処理室100内に磁場を供給するソレノイドコイル、105はプラズマ、106は側壁スリーブ、107は被処理基板載置電極、108は被処理基板、109マッチング・フィルタ回路、110はRFバイアス電源、111はサセプタリング、112は電極カバー、113は回転バルブ、114はターボ分子ポンプである。   FIG. 1 is a longitudinal sectional view showing an outline of a configuration of a semiconductor device manufacturing apparatus according to the present invention. In this figure, 100 is a processing chamber which is a space disposed in a vacuum vessel, 101 is an upper antenna disposed above the processing chamber 100, 102 is a high frequency power source for supplying high frequency power to the upper antenna 101, and 103 is a matching Filter circuit 104, solenoid coil for supplying a magnetic field into the processing chamber 100, 105 plasma, 106 side wall sleeve, 107 substrate to be processed, 108 substrate to be processed, 109 matching filter circuit, 110 RF Bias power supply, 111 is susceptor ring, 112 is an electrode cover, 113 is a rotary valve, and 114 is a turbo molecular pump.

図1に示したプラズマエッチング装置において、真空排気した処理室100内には、エッチングガスであるアルゴン(Ar),CF4,CHF3,窒素(N2)等のガスが選択構成され、図示割愛してあるが、ボンベからガス配管,マスフローコントローラを介して、上部アンテナ101の処理室100側に配置された円板形状のシャワープレートに配置された複数の貫通孔から、シャワー状に供給される。このようなガスの供給と、回転バルブ113及びターボ分子ポンプ114を含む排気装置による処理室100内部の排気,減圧とのバランスにより処理室100内の圧力が所望の値に調節される。 In the plasma etching apparatus shown in FIG. 1, an etching gas such as argon (Ar), CF 4 , CHF 3 , nitrogen (N 2 ) or the like is selectively configured in the evacuated processing chamber 100 and is not shown. However, it is supplied in a shower form from a plurality of through holes arranged in a disc-shaped shower plate arranged on the processing chamber 100 side of the upper antenna 101 from a cylinder via a gas pipe and a mass flow controller. . The pressure in the processing chamber 100 is adjusted to a desired value by the balance between the supply of such gas and the exhaust and decompression in the processing chamber 100 by the exhaust device including the rotary valve 113 and the turbo molecular pump 114.

また、高周波電源102(ここでは例えば、周波数450MHzのUHF電源および周波数13.56MHzのRF電源)から発生させた高周波をマッチング・フィルタ回路103,上部アンテナ101を介して処理室100内に導入する。これにより、処理室100の周辺に配置されたソレノイドコイル104により形成された磁場とUHF波との相互作用により、処理室100内にECR放電が生成され、エッチングガスが解離してプラズマ105が被処理基板載置電極107上方の処理室100内の空間で形成される。   In addition, a high frequency generated from the high frequency power source 102 (for example, a UHF power source having a frequency of 450 MHz and an RF power source having a frequency of 13.56 MHz) is introduced into the processing chamber 100 via the matching filter circuit 103 and the upper antenna 101. As a result, an ECR discharge is generated in the processing chamber 100 due to the interaction between the magnetic field formed by the solenoid coil 104 disposed around the processing chamber 100 and the UHF wave, the etching gas is dissociated, and the plasma 105 is covered. It is formed in a space inside the processing chamber 100 above the processing substrate mounting electrode 107.

処理室100内の下方に設けられた被処理基板載置電極107上には、ここでは、例えば直径200mmの被処理基板108が載置可能な被処理基板108に合わせてほぼ円形と見なせる形状にされた載置面が配置され、この載置面上に載せられた被処理基板108が保持される。被処理基板載置電極107には、ここでは例えば800KHzのRFバイアス電源110がマッチング・フィルタ回路109を介して接続されている。これにより、プラズマ中のイオンを被処理基板108上に引き込み、表面に吸着したラジカルとの相互作用によるイオンアシスト反応により、異方性エッチングを進行させる。エッチング中に生成した反応生成物は、ターボ分子ポンプ114の動作により処理室100内から排気される。   Here, on the processing substrate mounting electrode 107 provided below the processing chamber 100, here, for example, the processing substrate 108 having a diameter of 200 mm has a shape that can be regarded as a substantially circular shape in accordance with the processing substrate 108 that can be mounted. The placed placement surface is arranged, and the substrate to be processed 108 placed on the placement surface is held. Here, for example, an RF bias power source 110 of 800 KHz is connected to the substrate mounting electrode 107 via a matching filter circuit 109. As a result, ions in the plasma are attracted onto the substrate to be processed 108, and anisotropic etching is advanced by an ion-assisted reaction by interaction with radicals adsorbed on the surface. Reaction products generated during the etching are exhausted from the processing chamber 100 by the operation of the turbo molecular pump 114.

被処理基板108がその上面に載置される試料台である被処理基板載置電極107上の載置面上面には、エッチング処理時には図示しないが一般に被処理基板108の温度コントロールを行うため、被処理基板載置電極107と被処理基板108の間にヘリウムガス等の熱伝達性を有するガスを導入し、熱伝導性を良くしている。また、熱伝導性を安定させるため、被処理基板108は図示省略した電源装置による静電気力で被処理基板載置電極107へ吸着保持される。この際、被処理基板108の裏面には静電気力により被処理基板載置電極107表面上に残留する異物が転写される。このため、被処理基板載置電極107表面上には残留異物が少ない状態を形成することが重要となる。   In order to control the temperature of the substrate to be processed 108, although not shown in the drawings, generally on the mounting surface upper surface of the processing substrate mounting electrode 107, which is a sample stage on which the substrate to be processed 108 is mounted, A gas having heat transfer properties such as helium gas is introduced between the processing substrate mounting electrode 107 and the processing substrate 108 to improve the thermal conductivity. Further, in order to stabilize the thermal conductivity, the substrate to be processed 108 is attracted and held on the substrate mounting electrode 107 by electrostatic force from a power supply device (not shown). At this time, the foreign matter remaining on the surface of the substrate mounting electrode 107 is transferred to the back surface of the substrate 108 by electrostatic force. For this reason, it is important to form a state in which there is little residual foreign matter on the surface of the substrate mounting electrode 107.

図2,図3及び図4,図5に本発明の実施例を比較例とともに示す。図4は被処理基板載置部材に対する本発明の実施例と比較例の異物低減効果を示すものである。図4中の静電吸着による異物低減については、図1に示す半導体デバイス製造装置の被処理基板載置電極107について製品を製造するために用いられる半導体ウエハと同様またはこれ以上に表面の粗さが小さく形成された非製造用のウエハ(鏡面ウエハ)を用い、図2に示す非処理基板載置電極の構成により実施した。   Examples of the present invention are shown together with comparative examples in FIGS. FIG. 4 shows the foreign matter reduction effect of the embodiment of the present invention and the comparative example with respect to the substrate mounting member. Regarding the reduction of foreign matter by electrostatic attraction in FIG. 4, the surface roughness is the same as or higher than that of a semiconductor wafer used for manufacturing a product for the substrate mounting electrode 107 of the semiconductor device manufacturing apparatus shown in FIG. A non-manufacturing wafer (mirror wafer) formed with a small size was used, and the non-processed substrate mounting electrode configuration shown in FIG. 2 was used.

図2は、図1に示す実施の形態に係る被処理基板載置電極107の構成を模式的に示す縦断面図である。この図において、被処理基板載置電極107は載置台1,誘電体2,電極3により構成される。被処理基板載置電極107の上面の載置面を構成する誘電体2は、載置台1の上面を被覆するセラミクスの膜であって、内部に被処理基板108を誘電体2の膜上に吸着して保持するための電力が供給される電極3が配置されている。   FIG. 2 is a longitudinal sectional view schematically showing the configuration of the substrate mounting electrode 107 according to the embodiment shown in FIG. In this figure, the substrate mounting electrode 107 to be processed is composed of a mounting table 1, a dielectric 2 and an electrode 3. The dielectric 2 constituting the mounting surface of the upper surface of the processing substrate mounting electrode 107 is a ceramic film that covers the upper surface of the mounting table 1, and the processing target substrate 108 is placed on the dielectric 2 film inside. An electrode 3 to which power for adsorbing and holding is supplied is disposed.

膜としての誘電体2は、導電体から構成された載置台1の上面に適度な凸凹を形成して所定の粗さにした後にその上面を覆って形成される。この形成は、例えば溶射法により行われる。溶射によってアルミナ(Al23)やイットリア(Y23)等のセラミクス材料の微粒子が半ば溶解した状態で載置台1の上面に吹き付けられて各粒子の溶解した表面同士が結合した状態で冷却して、同一の材料による多孔室の膜が形成される。 The dielectric 2 as a film is formed so as to cover the upper surface after forming appropriate irregularities on the upper surface of the mounting table 1 made of a conductor to have a predetermined roughness. This formation is performed by, for example, a thermal spraying method. In a state where fine particles of a ceramic material such as alumina (Al 2 O 3 ) or yttria (Y 2 O 3 ) are sprayed on the upper surface of the mounting table 1 by the thermal spraying, and the dissolved surfaces of the particles are bonded to each other. Upon cooling, a porous chamber film of the same material is formed.

さらに、この膜である誘電体2の表面は、被処理基板108であるウエハ7の吸着,保持あるいはヘリウムガスによる熱伝達に適切な形状に切削または研磨されたり、溶射により結合した粒子同士の間の上記孔を塞ぐ処理が施される。本実施の形態では、被処理基板108の静電吸着は、電極3,誘電体2,ウエハ7間に電気回路4,スイッチ6を介して電圧可変機構を内設した直流電源5により電極3に印加された電圧によって発生した静電気による吸着力により実施した。   Further, the surface of the dielectric 2 which is this film is cut or polished into a shape suitable for adsorption and holding of the wafer 7 which is the substrate to be processed 108 or heat transfer by helium gas, or between particles bonded by thermal spraying. A process for closing the hole is performed. In the present embodiment, electrostatic attraction of the substrate to be processed 108 is applied to the electrode 3 by the DC power source 5 in which the voltage variable mechanism is provided via the electric circuit 4 and the switch 6 between the electrode 3, the dielectric 2 and the wafer 7. It was carried out by the adsorption force due to static electricity generated by the applied voltage.

異物の数はレーザ式の異物検査装置を用いて直径200mmの異物測定用のシリコン製ウエハの鏡面を被処理基板載置電極107の誘電体2上面に接触させるように載置して電極3に給電してウエハを静電吸着した後に遊離させ、鏡面上の1μm以上の異物数を計測した。ウエハの静電吸着による異物の除去は、各異物を低減する処理の組合せ毎に異物吸着用のウエハ複数枚を引き続いて静電吸着および遊離を行って実施した。特に、本実施例では5枚の新品のウエハを用いて実施した。なお、異物低減効果の評価は、超音波洗浄処理や粘着シートによる異物除去よりを実施しない処理条件(比較例1)の吸着1枚目の異物数を100%をした場合の相対的な異物残留割合として評価した。   The number of foreign matters is placed on the electrode 3 by using a laser type foreign matter inspection apparatus so that the mirror surface of a silicon wafer for measuring foreign matter having a diameter of 200 mm is brought into contact with the upper surface of the dielectric 2 of the substrate placement electrode 107. The wafer was electrostatically adsorbed and then released, and the number of foreign matters of 1 μm or more on the mirror surface was measured. The removal of foreign matter by electrostatic chucking of the wafer was performed by performing electrostatic chucking and separation successively on a plurality of wafers for foreign matter suction for each combination of processes for reducing each foreign matter. In particular, in the present example, five new wafers were used. The evaluation of the foreign matter reduction effect is based on the relative foreign matter remaining when the number of foreign matters on the first suction sheet is 100% under the processing conditions (Comparative Example 1) in which the ultrasonic cleaning process and the removal of the foreign matter by the adhesive sheet are not performed. Evaluated as a percentage.

図4中の処理の内容については図5に詳細な異物低減処理フローを実施例と比較例を併せて示している。図5に示した実施例1,実施例2,比較例3に示した異物除去処理のうち流体洗浄の処理としては超音波洗浄処理を実施した。また、実施例1,実施例2,比較例2に示した粘着成分を持った粘着シートによる異物の除去は、図3に示すように被処理基板載置電極107の誘電体2の上面に対して異物除去用のウエハの裏面に配置された粘着性を有する膜である粘着シート8を貼付させてウエハを離して粘着シート8を剥離する動作を4回繰り返して実施した。   As for the contents of the processing in FIG. 4, a detailed foreign matter reduction processing flow is shown in FIG. 5 together with the embodiment and the comparative example. Of the foreign matter removal processing shown in Example 1, Example 2 and Comparative Example 3 shown in FIG. 5, ultrasonic cleaning processing was performed as fluid cleaning processing. Further, the removal of foreign matter by the adhesive sheet having the adhesive component shown in Example 1, Example 2 and Comparative Example 2 is performed on the upper surface of the dielectric 2 of the substrate-mounted electrode 107 as shown in FIG. Then, the operation of attaching the adhesive sheet 8 that is an adhesive film disposed on the back surface of the wafer for removing foreign substances, separating the wafer and peeling the adhesive sheet 8 was repeated four times.

上記実施例では、流体による洗浄処理の工程では流体の運動エネルギーによって処理室内部材の表面付近に存在する異物の粒子を取り去るとともに、粘着性部材を用いて表面部付近の異物粒子を粘着力を用いて誘電体2上面の異物を除去する。その後、異物除去用のウエハの裏面を近接させ静電吸着力により微細な異物を鏡面ウエハに転写することによりさらに効率よく異物を除去することができる。粘着性部材を用いて表面部付近の異物粒子を粘着力により除去する工程を流体による洗浄処理工程の前段に付加することにより、さらに異物を効率よく低減できる。   In the above-described embodiment, in the cleaning process with the fluid, the foreign particles existing near the surface of the processing chamber member are removed by the kinetic energy of the fluid, and the foreign particles near the surface portion are used with the adhesive force by using the adhesive member. Then, the foreign matter on the upper surface of the dielectric 2 is removed. Thereafter, the back surface of the wafer for removing foreign matter is brought close to the surface, and the foreign matter can be removed more efficiently by transferring the fine foreign matter to the mirror surface wafer by electrostatic attraction force. By adding the step of removing the foreign particles near the surface portion by the adhesive force using the adhesive member to the preceding stage of the fluid cleaning treatment step, the foreign matters can be further efficiently reduced.

また、本実施例では、流体による洗浄処理に超音波洗浄,スチーム洗浄、あるいは複数の種類、例えば2種類の流体を用いて洗浄する二流体洗浄の少なくともいずれかを工程として実施する。このような流体による洗浄処理,粘着シートを用いた粘着力による異物除去,静電吸着力による異物除去の順列を選択することで被処理基板載置電極107の表面に残留する異物が効率よく除去される。このような異物の除去の処理は、半導体デバイス製造装置を製造する工程において、被処理基板載置電極107の上面に誘電体2の膜を溶射により形成した後実施することで、半導体デバイスの製造の歩留まりが向上し、半導体デバイスの製造の初期の故障や異常の発生を低減することで稼働率を増加させ半導体デバイスの製造コストが低減される。   Further, in this embodiment, at least one of ultrasonic cleaning, steam cleaning, and two-fluid cleaning using a plurality of types, for example, two types of fluid, is performed as a process. By selecting the permutation sequence of cleaning treatment with fluid, removal of foreign matter by adhesive force using an adhesive sheet, and removal of foreign matter by electrostatic attraction force, foreign matters remaining on the surface of the substrate mounting electrode 107 are efficiently removed. Is done. Such a foreign substance removal process is performed after a film of the dielectric 2 is formed on the upper surface of the substrate mounting electrode 107 by thermal spraying in a process of manufacturing a semiconductor device manufacturing apparatus, thereby manufacturing a semiconductor device. The yield of the semiconductor device is improved, and the operation rate is increased and the manufacturing cost of the semiconductor device is reduced by reducing the occurrence of an initial failure or abnormality in the manufacturing of the semiconductor device.

また、このような異物の除去の工程は所定の枚数の製品製造用のウエハを処理した後や検出した処理室100内の壁面への堆積物の量が所定値に達した場合に行っても良い。この場合、真空容器である処理室100内を大気側に開放して被処理基板載置電極107を取り外して半導体デバイス製造装置の外部で異物を除去する処理を行う必要が有り、このため半導体デバイスの製造が中断するが、一方で、このことにより製品を製造する動作を重ねることで誘電体2上に付着した付着物や誘電体2上面から剥がれやすくなったセラミクスの粒子による異物の発生を低減することができる。   Further, such a foreign matter removing step may be performed after processing a predetermined number of product manufacturing wafers or when the detected amount of deposits on the wall surface in the processing chamber 100 reaches a predetermined value. good. In this case, it is necessary to open the inside of the processing chamber 100, which is a vacuum vessel, to the atmosphere side, remove the substrate mounting electrode 107, and perform a process of removing foreign matter outside the semiconductor device manufacturing apparatus. On the other hand, this reduces the generation of foreign substances due to the deposits adhering to the dielectric 2 and the ceramic particles easily peeled off from the upper surface of the dielectric 2 by repeating the operation of manufacturing the product. can do.

以下、本発明の実施例1を図表を用いて説明する。なお、異物低減の効果については、前述したように比較例1の吸着1枚目の異物数を100%とした場合の相対的な異物の残留割合として示す。   Embodiment 1 of the present invention will be described below with reference to the drawings. In addition, as described above, the effect of reducing foreign matter is expressed as a relative foreign matter residual ratio when the number of foreign matters on the first suction sheet in Comparative Example 1 is 100%.

図4は、本実施の形態に係る被処理基板108と接触する半導体デバイス製造装置内部の部材、特に被処理基板載置電極107の表面の異物の状況、図5は、本発明の実施例及び比較例の異物除去の工程のフローを示すものである。実施例1の被処理基板載置電極107の異物を低減する処理は、図5に示すように流体洗浄による異物除去,粘着シートによる異物除去及び静電吸着力による異物除去を適切に構成したものである。被処理基板載置電極107は、流体洗浄処理(超音波洗浄処理実施)後、粘着シートによる異物除去については、図3に示すように被処理基板載置電極107の誘電体面に対し、4回粘着シートの貼付と剥離を繰り返し実施した。その後、図2に係る静電吸着処理をウエハ5枚用いて実施した。比較例1のウエハ吸着1枚目の異物数を100%とした際の吸着ウエハ1枚目から5枚目の異物の残留割合は、それぞれ58.5%,7.4%,4.1%,3.1%,2.6%と格段に減少している。   FIG. 4 shows the state of foreign matter on the surface of the substrate mounting electrode 107, in particular, the members inside the semiconductor device manufacturing apparatus in contact with the substrate to be processed 108 according to the present embodiment. FIG. The flow of the process of the foreign material removal of a comparative example is shown. As shown in FIG. 5, the processing for reducing foreign matter on the substrate-mounted electrode 107 of Example 1 is configured appropriately for foreign matter removal by fluid cleaning, foreign matter removal by an adhesive sheet, and foreign matter removal by electrostatic adsorption force. It is. After the fluid cleaning process (ultrasonic cleaning process) is performed on the substrate-to-be-processed electrode 107, foreign matter removal by the adhesive sheet is performed four times on the dielectric surface of the substrate-to-be-processed electrode 107 as shown in FIG. The sticking and peeling of the adhesive sheet were repeated. Thereafter, the electrostatic adsorption treatment according to FIG. 2 was performed using five wafers. When the number of foreign matter on the first wafer suction in Comparative Example 1 is 100%, the remaining ratio of foreign matter on the first to fifth wafers is 58.5%, 7.4%, and 4.1%, respectively. , 3.1%, 2.6%.

このように、本実施例では、流体による洗浄処理工程では流体の運動エネルギーにより、処理室内部材の表面付近に存在する異物粒子を除去するとともに、粘着性部材を用いて表面部付近の異物粒子を粘着力によりさらに除去する。その後、静電吸着力により微細な異物を鏡面ウエハに転写することによりさらに効率よく異物を除去することができる。   As described above, in this embodiment, in the cleaning process step with the fluid, the foreign particles existing near the surface of the processing chamber member are removed by the kinetic energy of the fluid, and the foreign particles near the surface portion are removed using the adhesive member. Further removal by adhesive force. Thereafter, the foreign matter can be more efficiently removed by transferring the fine foreign matter to the mirror surface wafer by electrostatic attraction force.

実施例2は実施例1の処理フローの前段に粘着シートによる異物除去工程を付加したもので、図4,図5の実施例2に異物評価状況と異物低減処理フローを示す。図4の実施例2に示すように吸着ウエハ1枚目から5枚目の異物の残留割合は、それぞれ35.4%,3.1%,2.2%,1.6%,1.4%と実施例1よりさらに異物を低減できる効果が得られた。   In Example 2, a foreign substance removing step using an adhesive sheet is added to the previous stage of the processing flow of Example 1, and the foreign substance evaluation status and the foreign substance reduction processing flow are shown in Example 2 of FIGS. As shown in Example 2 in FIG. 4, the residual ratios of the first to fifth foreign wafers are 35.4%, 3.1%, 2.2%, 1.6%, and 1.4, respectively. % And the effect of further reducing foreign matters than Example 1.

このように、本実施例では、粘着性部材の粘着力による異物除去工程を実施例1の前段に付加することにより、さらに異物除去効率を向上できる効果が得られる。   As described above, in this embodiment, by adding the foreign substance removing step by the adhesive force of the adhesive member to the previous stage of the first embodiment, an effect of further improving the foreign substance removing efficiency can be obtained.

〔比較例1〕
比較例1は図5の処理フローに示すように、本願実施例1の異物低減処理フローから流体洗浄(超音波洗浄)処理と粘着シートによる異物除去処理工程を除いたもので、静電吸着処理の繰り返しによる異物低減効果を評価したものである。図4の比較例1に示すようにウエハ1枚目から5枚目の異物の残留割合は、それぞれ100%,65.6%,50.9%,39.7%,33.1%と異物の残留割合は着実に減少し、異物低減効果は得られるが実施例1よりは異物の残留割合が多い。
[Comparative Example 1]
As shown in the processing flow of FIG. 5, Comparative Example 1 is obtained by removing the fluid cleaning (ultrasonic cleaning) processing and the foreign matter removal processing step using the adhesive sheet from the foreign matter reduction processing flow of Example 1 of the present application. This is an evaluation of the effect of reducing foreign matter by repeating the above. As shown in Comparative Example 1 in FIG. 4, the residual ratios of the first to fifth wafers are 100%, 65.6%, 50.9%, 39.7%, and 33.1%, respectively. However, the residual ratio of foreign matter is larger than that of the first embodiment.

〔比較例2〕
比較例2は図5の処理フローに示すように、本願実施例1の異物低減処理フローから流体洗浄(超音波洗浄)処理による異物除去処理工程を除いたもので、粘着シートと静電吸着処理の繰り返しによる異物低減効果を評価したものである。図4の比較例2に示すようにウエハ1枚目から5枚目の異物の残留割合は、それぞれ72.7%,33.4%,28.4%,28.3%,22.7%と異物の残留割合は着実に減少し、異物低減効果は得られるが実施例1よりは異物の残留割合が多い。
[Comparative Example 2]
As shown in the processing flow of FIG. 5, the comparative example 2 is the foreign matter reduction processing flow of the first embodiment of the present application except for the foreign matter removal processing step by the fluid cleaning (ultrasonic cleaning) processing. This is an evaluation of the effect of reducing foreign matter by repeating the above. As shown in Comparative Example 2 in FIG. 4, the residual ratios of foreign matters in the first to fifth wafers are 72.7%, 33.4%, 28.4%, 28.3%, and 22.7%, respectively. The residual ratio of foreign matter is steadily reduced, and the foreign matter reducing effect is obtained, but the residual ratio of foreign matter is larger than that in the first embodiment.

〔比較例3〕
比較例3は図5の処理フローに示すように、本願実施例の異物低減処理フローから粘着シートによる異物除去処理工程を除いたもので、流体洗浄(超音波洗浄)処理と静電吸着処理の繰り返しによる異物低減効果を評価したものである。図4の比較例3に示すようにウエハ1枚目から5枚目の異物の残留割合は、それぞれ89.3%,58.1%,47.9%,31.6%,25.8%と異物の残留割合は着実に減少し、異物低減効果は得られるが実施例1よりは異物の残留割合が多い。
[Comparative Example 3]
As shown in the processing flow of FIG. 5, the comparative example 3 is obtained by removing the foreign matter removal processing step by the adhesive sheet from the foreign matter reduction processing flow of the embodiment of the present application. The fluid cleaning (ultrasonic cleaning) processing and the electrostatic adsorption processing are performed. It evaluates the foreign matter reduction effect by repetition. As shown in Comparative Example 3 in FIG. 4, the residual ratios of foreign matters on the first to fifth wafers are 89.3%, 58.1%, 47.9%, 31.6%, and 25.8%, respectively. The residual ratio of foreign matter is steadily reduced, and the foreign matter reducing effect is obtained, but the residual ratio of foreign matter is larger than that in the first embodiment.

〔比較例4〕
比較例4は図5の処理フローに示すように、本願実施例1の異物低減処理フローの流体洗浄(超音波洗浄)と粘着シートによる洗浄処理の順序を入れ替えたものである。すなわち、被処理基板載置部材に対して最初に粘着シートによる処理を行った後に流体洗浄処理(超音波洗浄処理)を実施し、さらに静電吸着処理の繰り返しによる異物低減効果を評価したものである。
[Comparative Example 4]
In Comparative Example 4, as shown in the processing flow of FIG. 5, the order of fluid cleaning (ultrasonic cleaning) in the foreign matter reduction processing flow of Example 1 of the present application and cleaning processing using an adhesive sheet are interchanged. In other words, the substrate mounting member is first treated with an adhesive sheet and then subjected to a fluid cleaning process (ultrasonic cleaning process), and the evaluation of the foreign matter reduction effect by repeated electrostatic adsorption processes is performed. is there.

図4の比較例4に示すようにウエハ1枚目から5枚目の異物の残留割合は、それぞれ88.0%,56.7%,42.5%,31.3%,25.5%と異物の残留割合は着実に減少し、実施例1よりは異物の残留割合が多いが異物低減効果は得られる。   As shown in Comparative Example 4 in FIG. 4, the remaining ratios of the foreign matters in the first to fifth wafers are 88.0%, 56.7%, 42.5%, 31.3%, and 25.5%, respectively. The residual ratio of foreign matters steadily decreases, and the residual ratio of foreign matters is larger than in Example 1, but the foreign matter reducing effect can be obtained.

以上の実施例では、流体による洗浄処理の工程では流体の運動エネルギーにより、処理室100内部の部材の表面に存在する異物粒子を除去するとともに、粘着性部材を用いて表面部付近の異物粒子を粘着力によりさらに除去する。その後、静電吸着力により微細な異物を鏡面ウエハに転写することによりさらに効率よく異物を除去することができる。   In the above embodiment, in the cleaning process using the fluid, the foreign particles existing on the surface of the member inside the processing chamber 100 are removed by the kinetic energy of the fluid, and the foreign particles near the surface portion are removed using the adhesive member. Further removal by adhesive force. Thereafter, the foreign matter can be more efficiently removed by transferring the fine foreign matter to the mirror surface wafer by electrostatic attraction force.

被処理基板108を載置する部材の表面に存在する異物となる物質を効率よく除去でき、被処理基板108の裏面の異物の処理対称の表面への転写による処理の歩留まりの低下等の異物に係る問題の生起を抑制し、信頼性が高く生産効率が向上した半導体デバイスの製造装置を提供できる。   It is possible to efficiently remove foreign substances existing on the surface of the member on which the substrate to be processed 108 is placed, and to reduce foreign matter such as a decrease in processing yield due to transfer of foreign matters on the back surface of the substrate 108 to the processing symmetrical surface. Occurrence of such problems can be suppressed, and a semiconductor device manufacturing apparatus with high reliability and improved production efficiency can be provided.

本発明の実施の形態に係る半導体デバイス製造装置の構成の概略を示す縦断面図である。It is a longitudinal cross-sectional view which shows the outline of a structure of the semiconductor device manufacturing apparatus which concerns on embodiment of this invention. 図1に示す実施の形態に係る被処理基板載置電極の構成を模式的に示す縦断面図である。It is a longitudinal cross-sectional view which shows typically the structure of the to-be-processed substrate mounting electrode which concerns on embodiment shown in FIG. 粘着シートによる異物除去状況を示す図である。It is a figure which shows the foreign material removal condition by an adhesive sheet. 図1に示す実施の形態に係る実施例及び比較例を用いた鏡面ウエハに付着した異物の量の変化を示す表である。It is a table | surface which shows the change of the quantity of the foreign material adhering to the mirror surface wafer using the Example which concerns on embodiment shown in FIG. 1, and a comparative example. 図4に示す実施例及び比較例の被処理基板載置電極を洗浄または異物を除去する工程の流れを示す表である。It is a table | surface which shows the flow of the process of washing | cleaning or removing a foreign material of the to-be-processed substrate mounting electrode of the Example shown in FIG.

符号の説明Explanation of symbols

1 載置台
2 誘電体
3 電極
4 電気回路
5 直流電源
6 スイッチ
7 ウエハ
8 粘着シート
100 処理室
101 アンテナ
102 高周波電源
103,109 マッチング・フィルタ回路
104 ソレノイドコイル
105 プラズマ
106 側壁スリーブ
107 被処理基板載置電極
108 被処理基板
110 RFバイアス電源
111 サセプタリング
112 電極カバー
113 回転バルブ
114 ターボ分子ポンプ
DESCRIPTION OF SYMBOLS 1 Mounting stand 2 Dielectric material 3 Electrode 4 Electric circuit 5 DC power supply 6 Switch 7 Wafer 8 Adhesive sheet 100 Processing chamber 101 Antenna 102 High frequency power supply 103, 109 Matching filter circuit 104 Solenoid coil 105 Plasma 106 Side wall sleeve 107 Substrate mounting Electrode 108 Substrate 110 RF bias power supply 111 Susceptor ring 112 Electrode cover 113 Rotary valve 114 Turbo molecular pump

Claims (5)

容器の内部の試料台上に載置された被処理基板を処理する半導体デバイス製造装置の製造方法であって、前記試料台の上面に誘電体製の膜を溶射により形成した後にこの誘電体製の膜を流体を用いて洗浄する工程と、前記誘電体製の膜の上面にウエハを載せて静電吸着させる処理を複数回行う工程とを備えた半導体デバイス製造装置の製造方法。   A manufacturing method of a semiconductor device manufacturing apparatus for processing a substrate to be processed placed on a sample table inside a container, wherein a dielectric film is formed on the upper surface of the sample table by thermal spraying, and then the dielectric product is manufactured. A method of manufacturing a semiconductor device manufacturing apparatus, comprising: a step of cleaning the film using a fluid; and a step of performing a process of placing a wafer on the upper surface of the dielectric film and electrostatically attracting the film a plurality of times. 請求項1記載の半導体デバイス製造装置の製造方法であって、前記誘電体製の膜上にウエハを載せて静電吸着させる処理を複数回行う工程の前に粘着性を有する膜を前記誘電体製の膜の前記上面への貼付及び剥離とを行う工程を備えた半導体デバイス製造装置の製造方法。   2. The method of manufacturing a semiconductor device manufacturing apparatus according to claim 1, wherein a film having adhesiveness is formed before said step of performing a process of placing a wafer on said dielectric film and electrostatically adsorbing it multiple times. A manufacturing method of a semiconductor device manufacturing apparatus comprising a step of attaching and peeling a film made on the upper surface. 前記請求項1または2に記載の半導体デバイス製造装置の製造方法であって、前記流体を用いた洗浄として超音波洗浄またはスチーム洗浄を行う請求項1及び請求項2記載の半導体デバイス製造装置の製造方法。   3. The method of manufacturing a semiconductor device manufacturing apparatus according to claim 1, wherein ultrasonic cleaning or steam cleaning is performed as cleaning using the fluid. Method. 前記請求項1または2に記載の半導体デバイス製造装置の製造方法であって、前記流体を用いた洗浄として二種類の流体を用いた洗浄を行う請求項1及び請求項2記載の半導体デバイス製造装置の製造方法。   3. The method of manufacturing a semiconductor device manufacturing apparatus according to claim 1, wherein cleaning using two types of fluid is performed as cleaning using the fluid. Manufacturing method. 容器の内部の試料台上に載置された被処理基板を処理する半導体デバイス製造装置の洗浄方法であって、前記被処理基板を処理した後に、前記試料台の上面に誘電体製の膜を流体を用いて洗浄する工程と、前記誘電体製の膜の上面にウエハを載せて静電吸着させる処理を複数回行う工程とを有する洗浄の処理を行う半導体デバイス製造装置の洗浄方法。   A cleaning method of a semiconductor device manufacturing apparatus for processing a substrate to be processed placed on a sample stage inside a container, wherein after processing the substrate to be processed, a dielectric film is formed on an upper surface of the sample stage A cleaning method for a semiconductor device manufacturing apparatus, which performs a cleaning process including a process of cleaning using a fluid and a process of performing a process of placing a wafer on an upper surface of the dielectric film and electrostatically adsorbing it multiple times.
JP2008011037A 2008-01-22 2008-01-22 Semiconductor device manufacturing apparatus manufacturing method and semiconductor device manufacturing apparatus cleaning method Active JP5349805B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008011037A JP5349805B2 (en) 2008-01-22 2008-01-22 Semiconductor device manufacturing apparatus manufacturing method and semiconductor device manufacturing apparatus cleaning method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008011037A JP5349805B2 (en) 2008-01-22 2008-01-22 Semiconductor device manufacturing apparatus manufacturing method and semiconductor device manufacturing apparatus cleaning method

Publications (2)

Publication Number Publication Date
JP2009176788A true JP2009176788A (en) 2009-08-06
JP5349805B2 JP5349805B2 (en) 2013-11-20

Family

ID=41031616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008011037A Active JP5349805B2 (en) 2008-01-22 2008-01-22 Semiconductor device manufacturing apparatus manufacturing method and semiconductor device manufacturing apparatus cleaning method

Country Status (1)

Country Link
JP (1) JP5349805B2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08321447A (en) * 1995-05-25 1996-12-03 Hitachi Ltd Wafer processing method with foreign matter eliminating function
JPH10321488A (en) * 1997-05-21 1998-12-04 Hitachi Ltd Substrate with adhesive agent
JP2000254598A (en) * 1999-03-10 2000-09-19 Furontekku:Kk Substrate cleaning apparatus
WO2005091356A1 (en) * 2004-03-19 2005-09-29 Creative Technology Corporation Bipolar electrostatic chuck

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08321447A (en) * 1995-05-25 1996-12-03 Hitachi Ltd Wafer processing method with foreign matter eliminating function
JPH10321488A (en) * 1997-05-21 1998-12-04 Hitachi Ltd Substrate with adhesive agent
JP2000254598A (en) * 1999-03-10 2000-09-19 Furontekku:Kk Substrate cleaning apparatus
WO2005091356A1 (en) * 2004-03-19 2005-09-29 Creative Technology Corporation Bipolar electrostatic chuck

Also Published As

Publication number Publication date
JP5349805B2 (en) 2013-11-20

Similar Documents

Publication Publication Date Title
TWI440124B (en) A placing device, a plasma processing device, and a plasma processing method
CN101405857B (en) Apparatus and method for carrying substrates
US7628864B2 (en) Substrate cleaning apparatus and method
TWI567862B (en) A particle adhesion control method and a processing device for the substrate to be processed
TW201534407A (en) Electrostatic chuck cleaning fixture
JP5281811B2 (en) Annular parts for plasma processing, plasma processing apparatus, and outer annular member
JP6177601B2 (en) Cleaning method and substrate processing apparatus
KR100782621B1 (en) Plasma processing method and plasma processing device
TWI628711B (en) Method of processing target object
JP4642809B2 (en) Plasma processing method and plasma processing apparatus
JP4783094B2 (en) Annular parts for plasma processing, plasma processing apparatus, and outer annular member
JP5179219B2 (en) Deposit removal method and substrate processing method
JP2007266296A (en) Substrate processing apparatus and sidewall part
JP2016207788A (en) Surface treatment method for upper electrode, plasma processing apparatus, and upper electrode
JP5349805B2 (en) Semiconductor device manufacturing apparatus manufacturing method and semiconductor device manufacturing apparatus cleaning method
KR101323645B1 (en) Regeneration method for side of electrostatic chuck using aerosol coating and electrostatic chuck regenerated by the same
JP4832222B2 (en) Plasma processing equipment
TWI698928B (en) Plasma processing method
JP5352777B2 (en) Quartz device manufacturing method
US20050199183A1 (en) Plasma processing apparatus
JP2004071791A (en) Substrate placement member and substrate treatment apparatus using same
JP4033730B2 (en) Substrate mounting table for plasma processing apparatus, plasma processing apparatus, and base for plasma processing apparatus
JP2004119475A (en) Manufacturing method of component to be used in plasma processing apparatus and component used in plasma prossing apparatus
TWI440123B (en) Apparatus and method for carrying substrates
JP6067210B2 (en) Plasma processing equipment

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100830

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100830

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130219

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130221

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130412

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130507

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130703

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130723

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130821

R150 Certificate of patent or registration of utility model

Ref document number: 5349805

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350