JP2009165263A - Electric storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electric storage device capable of prolonging the lifetime of a capacitor by a simple operation. <P>SOLUTION: The electric storage device is provided with a plurality of capacitors 11 connected in series, a balance voltage adjusting means 13 connected to each of the capacitors 11, and a control circuit 15 connected to the balance voltage adjusting means 13. The control circuit 15 measures a non-charging/discharging both end voltage (V1i, i=1 to n, n is the number of the capacitors) in non-charging/discharging of the capacitors 11, measures a charging/discharging both end voltages (V2i) of the capacitors 11 when the capacitors 11 are only continuously charged or discharged after the above measurement, determines a balance voltage (Vri) of each capacitor 11 depending on an absolute value (ΔVi) of the difference between the non-charging/discharging both end voltage (V1i) and the charging/discharging both end voltage (V2i), and causes the balance voltage adjusting means 13 to control so that the capacitor both end voltages (Vi) are each the balance voltage (Vri). <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a power storage device that stores electric power in a capacitor and discharges it when necessary.

  In recent years, so-called electric vehicles and hybrid vehicles, in which all or part of driving is performed by a motor, are becoming popular due to environmental considerations.

  These automobiles (hereinafter referred to as vehicles) are supplied with electric power from the motor, but the battery changes its characteristics and deteriorates due to rapid and large current charging / discharging, so the current supplied to the motor is limited especially during sudden acceleration. is doing. As a result, sufficient acceleration may not be obtained.

  Therefore, a vehicle has been devised in which a capacitor capable of rapid charge / discharge is used in combination with a battery. As a result, since the power of the capacitor is supplied to the motor in addition to the battery during sudden acceleration, it is possible to accelerate more rapidly than with the battery alone.

  In order to obtain a voltage that can drive the motor with a capacitor, if the required voltage is about 750 V, 300 capacitors must be connected in series when a capacitor with a rated voltage of 2.5 V is used. . Moreover, in order to obtain a required capacity | capacitance, a parallel connection may be combined.

  However, there are variations in capacitors, and the voltage applied to the capacitors varies. Therefore, if charging is performed without taking this into account, there is a possibility that the deterioration of the capacitors will progress and the lifetime will be shortened.

  Thus, for example, Patent Document 1 proposes a power storage device that reduces variation in the degree of deterioration of a large number of capacitors and extends the life. Such a power storage device is shown in a block circuit diagram of FIG.

  Balance voltage adjusting means 103 is connected to both ends of each of the plurality of capacitors 101 connected in series. Further, a sampling capacitor 105 for measuring a voltage across the capacitor 101 is connected to both ends of each capacitor 101 via two switches 107. The balance voltage adjusting unit 103 and the switch 107 are connected to the control unit 109. The plurality of capacitors 101 connected in series are connected to a vehicle motor, a generator, a battery, a load, and the like through a charge / discharge circuit, but these are omitted in FIG.

  The balance voltage adjusting means 103 has the following configuration. First, a series circuit of a balance switch 111 and a balance resistor 113 is connected to both ends of the capacitor 101. Further, two voltage dividing resistors 115 connected in series are also connected to both ends of the capacitor 101. A connection point of the two voltage dividing resistors 115 is connected to one input of the comparator 117. A digital potentiometer 119 is connected to the other input of the comparator 117. Since the digital potentiometer 119 is connected to the reference power source 121 and the control unit 109, an arbitrary reference voltage can be output in accordance with an instruction from the control unit 109. The output of the comparator 117 is connected to the balance switch 111 and controls its on / off.

  Next, the operation of such a power storage device will be described. First, the control unit 109 obtains the degree of progress of deterioration of each capacitor 101. Specifically, the capacitance value C and the internal resistance value R are obtained from the slope of the voltage change at both ends when each capacitor 101 is charged with constant current and the voltage change at both ends when charging is interrupted, and these deterioration limits are obtained in advance. The difference up to the value is obtained as the deterioration progress. Accordingly, the smaller the difference is, the more the deterioration proceeds.

  Next, the control unit 109 obtains an average value of the degree of progress of deterioration of each capacitor 101, and obtains a balance voltage so that the variation width of the degree of progress of deterioration of each capacitor 101 becomes small. That is, for the capacitor 101 that has deteriorated, the balance voltage is determined so as to reduce the voltage across the terminal in order to delay the deterioration. Thereafter, the balance voltage adjusting means is controlled so that the voltage across each capacitor 101 becomes the balance voltage.

By controlling in this way, the balance voltage is adjusted so that the variation range of the deterioration progress of each capacitor 101 becomes small. Therefore, the deterioration progress of the capacitor 101 that has progressed can be delayed, and all capacitors can be The operating limit is reached at about the same time. As a result, the life of the power storage device can be extended.
JP 2007-124883 A

  According to the above power storage device, a long life can be surely obtained. For this purpose, the capacitance value C and the internal resistance value R of each capacitor 101 are measured during constant current charging, and the degree of deterioration is obtained therefrom. In addition, it is necessary to perform control for obtaining the balance voltage from the average value so that the variation width of the deterioration progress of each capacitor 101 becomes small, and there is a problem that the operation becomes complicated.

  An object of the present invention is to solve the above-described conventional problems, and to provide a power storage device capable of extending the life of a capacitor with simple operation and high accuracy.

  In order to solve the conventional problem, a power storage device according to the present invention includes a plurality of capacitors connected in series, a balance voltage adjusting unit connected to each of the plurality of capacitors, and a connection to the balance voltage adjusting unit. When the capacitor is not charged / discharged, the control circuit uses the balance voltage adjusting means to adjust the voltage across the capacitor when it is not charged / discharged (V1i, i = 1 to n, where n is the capacitance of the capacitor). Number) and after measuring the non-charging / discharging voltage (V1i), the charging / discharging voltage (V2i) of the capacitor when the capacitor is continuously charged or discharged only. Is measured by the balance voltage adjusting means, and the absolute value (ΔVi) of the difference between the non-charging / discharging voltage (V1i) and the charging / discharging voltage (V2i). And the balance voltage (Vri) of each capacitor is determined according to the absolute value (ΔVi), and the voltage across the capacitor (Vi) becomes the balance voltage (Vri) by the balance voltage adjusting means. It is intended to be controlled.

  According to the power storage device of the present invention, during the non-charging / discharging of the capacitor, the both-end voltage (V1i) during non-charging / discharging is measured, and the both-end voltage (V2i) during charging / discharging is measured during the charging / discharging of the capacitor. Therefore, it is not necessary to measure the capacitance value C or the internal resistance value R while the capacitor is in a constant current charge state as in the prior art. The balance voltage (Vri) reflecting these values can be determined. Furthermore, the conventional control for determining the balance voltage from the result of calculating the degree of deterioration and calculating the average value becomes unnecessary. Therefore, it is possible to obtain an effect that the life of the capacitor can be extended with a very simple operation and with high accuracy as compared with the prior art.

  The best mode for carrying out the present invention will be described below with reference to the drawings. Note that the embodiment describes the case where the power storage device is applied to a hybrid vehicle.

(Embodiment 1)
1 is a block circuit diagram of a power storage device according to Embodiment 1 of the present invention. FIG. 2 is a change diagram of the voltage across the capacitor at times t1 and t2 of the power storage device according to Embodiment 1 of the present invention. FIG. 3 is a time characteristic diagram of the total voltage of the power storage device according to Embodiment 1 of the present invention. FIG. 4 is a flowchart for obtaining a non-charging / discharging both-end voltage and a charging / discharging both-end voltage of the power storage device according to Embodiment 1 of the present invention. FIG. 5 is a flowchart for obtaining the balance voltage of each capacitor of the power storage device according to Embodiment 1 of the present invention. In FIG. 1, thick lines indicate power system wirings, and thin lines indicate signal system wirings.

  In FIG. 1, a plurality of capacitors 11 are connected in series. In the first embodiment, a large-capacity electric double layer capacitor is used as the capacitor 11. The capacitor 11 may be connected in series and parallel according to the required power specifications. In this case, the capacitor in the parallel connection portion is handled as a single capacitor 11, so that an equivalent circuit to FIG. Accordingly, each capacitor 11 may be one, or a plurality of capacitors 11 connected in parallel will be described below. 1 may be configured such that the outermost ends of capacitors 11 connected in series in the power storage device illustrated in FIG. 1 are connected to the outermost ends of other power storage devices. In the case of such a series-parallel connection, a balance voltage adjusting unit 13 described later is connected to each capacitor 11.

  Balance voltage adjusting means 13 is connected to both ends of each capacitor 11. Further, since the control circuit 15 is connected to the balance voltage adjusting means 13, the operation of the balance voltage adjusting means 13 is controlled by the control circuit 15. The control circuit 15 is composed of a plurality of peripheral circuits having functions such as the digital potentiometer 119 and the reference power supply 121 shown in FIG. 7 and a microcomputer for controlling them. The control circuit 15 also has a function of communicating data with a vehicle control circuit (not shown) by a data signal data.

  Next, the configuration of the balance voltage adjusting unit 13 will be described. First, a series circuit of a balance switch 17 and a balance resistor 19 is connected to both ends of the capacitor 11. The balance switch 17 has a configuration capable of on / off control from the outside, and for example, an FET or a transistor can be applied. Further, a series circuit of two voltage dividing resistors 21 is connected to both ends of the capacitor 11. A connection point of the two voltage dividing resistors 21 is connected to one input of the control circuit 15 and the comparator 23. As a result, the control circuit 15 can read the voltage Vi between both ends of the capacitor 11 (i = 1 to n, n is the number of capacitors 11 connected in series). Further, since the positive electrode of the top capacitor 11 shown in FIG. 1 is equal to the total voltage Vc of the capacitors 11 connected in series, the total voltage Vc is also controlled by the control circuit 15 via the top balance voltage adjusting means 13. It is wired so that it can be read.

  The other input of the comparator 23 is connected to the control circuit 15. As a result, the balance voltage Vri generated from the control circuit 15 is input to the comparator 23. The output of the comparator 23 is connected to the balance switch 17. Therefore, on / off of the balance switch 17 is controlled by the output of the comparator 23.

  A temperature sensor 25 is disposed in the vicinity of the capacitor 11. As the temperature sensor 25, a thermistor having a large resistance change with respect to temperature was used. The output of the temperature sensor 25 is connected to the control circuit 15. Therefore, the control circuit 15 can read the temperature T detected by the temperature sensor 25.

  The positive terminal 27 and the negative terminal 29 which are the two ends of the capacitor 11 connected in series are connected to a motor, a generator, a battery, a load, etc. of the vehicle through a charge / discharge circuit. Omitted.

  Next, operation of the power storage device having such a configuration will be described with reference to FIGS. In FIG. 2, the horizontal axis represents time t, and the vertical axis represents the capacitor both-ends voltage Vi. In FIG. 3, the horizontal axis represents time t, and the vertical axis represents the total voltage Vc of the capacitor. In the case of a hybrid vehicle, as described above, about several hundred capacitors 11 are connected in series. In the following description, it is assumed that four capacitors 11 are in series for easy understanding. Therefore, the number n of capacitors 11 is 4, and the range of the subscript i is 1 to 4.

  First, in FIG. 2, it is assumed that an ignition switch (not shown) of the vehicle is turned on at time t1 and the vehicle is activated. The control circuit 15 recognizes the start of the vehicle by receiving an ON signal of the ignition switch as the data signal data from the vehicle control circuit. In addition, since the drive voltage is applied to the control circuit 15 when the ignition switch is turned on, the start of the vehicle may be recognized accordingly.

  Since the capacitor 11 has not yet been charged / discharged when the vehicle is started, the control circuit 15 immediately uses the current non-charging / discharging voltage V1i (i = 1 to 4) of each capacitor 11 to the balance voltage adjusting means 13. The data are sequentially read and stored in a memory built in the control circuit 15. At the same time, the time t1 is also stored in the memory as the first point time t1. Thereby, the first point time t1 is measured. Details of these operations will be described with reference to FIG. 4 described later. Further, both-end voltages V11 to V14 at the time of non-charging / discharging are in a state of being lowered by self-discharge from the end of the previous vehicle use until the time t1. Furthermore, the voltage V11 to V14 at the time of non-charging / discharging varies due to variation in characteristics of each capacitor 11 and variation in deterioration.

  Here, the time of non-charging / discharging is defined as a state where charging / discharging of the capacitor 11 by a charging / discharging circuit (not shown) is not actively performed. Therefore, not only when the current does not completely flow through the capacitor 11, but also when a slight leakage current flows through the capacitor 11 even when the charge / discharge circuit is not operated, this is included during non-charge / discharge.

  Thereafter, each capacitor 11 is charged with regenerative power during braking by use of the vehicle. As a result, each capacitor voltage Vi increases with time. The details of the change with time of the voltage Vi across the capacitor are omitted in FIG. Thus, after the measurement of the voltage V1i at both ends during non-charging / discharging, when the capacitor 11 is continuously charged only (time t2), the control circuit 15 charges the voltage V2i (i = 1 to 4) are measured by the balance voltage adjusting means 13 and stored in the memory, and the time t2 is also stored as the second time t2. Thus, the second point time t2 is measured. Details of these operations will also be described with reference to FIG. Further, since the regenerative electric power at the time of braking is charged in each capacitor 11, the voltage V2i at the time of charging / discharging of each capacitor 11 at time t2 in FIG. 2 is more than the voltage V1i at the time of non-charging / discharging at time t1. Also grows.

  Note that the capacitor both-end voltage Vi has a characteristic that varies with temperature. Therefore, the control circuit 15 stores the temperature dependence of the capacitor both-end voltage Vi obtained in advance, and according to the temperature T obtained from the temperature sensor 25, the non-charge / discharge both-end voltage V1i and the charge-discharge both-end voltage are stored. The voltage V2i is corrected.

  Specifically, at the reference temperature To (for example, 25 ° C.), the temperature dependence characteristic of the capacitor both-ends voltage Vi when the temperature T is changed while the capacitor 11 is charged to a known voltage is obtained. This is obtained for each predetermined voltage width (for example, 0.1 V) until the known voltage reaches the rated voltage (for example, 2.5 V) of the capacitor 11. That is, the temperature dependency characteristic of the voltage Vi across the capacitor when the temperature T is changed while the capacitor 11 is charged to 0.1 V at the reference temperature To (25 ° C.), and then charged to 0.2 V at 25 ° C. Then, the temperature dependence characteristic is obtained, and then the temperature dependence characteristic is obtained by charging to 25V at 0.3 ° C. In this manner, the temperature dependence characteristic is obtained repeatedly up to the rated voltage (2.5V). A plurality of temperature dependence characteristics obtained in this way are stored in advance in the memory of the control circuit 15.

  Next, if the temperature T and an arbitrary capacitor voltage Vi are obtained, a temperature dependent characteristic having the capacitor voltage Vi at the temperature T is selected from a plurality of temperature dependent characteristics. Next, the voltage Vi across the capacitor at the reference temperature To is obtained from the selected temperature-dependent characteristic. The voltage V i across the capacitor thus obtained is a value after temperature correction.

  Thereby, even if the temperatures are different at times t1 and t2 in FIG. 2, the correction is made to the capacitor both-ends voltage Vi at the reference temperature To, so that the calculation accuracy of the balance voltage Vri described in FIG. 5 can be improved. Therefore, it is possible to reduce the progress of deterioration of each capacitor 11 (details will be described later) with high accuracy, and thus it is possible to contribute to extending the life of the capacitor 11 by performing temperature correction.

  Here, the magnitude relationship between the both-end voltages V21 to V24 during charging / discharging is not necessarily the same as the magnitude relationship between the both-end voltages V11 to V14 during non-charging / discharging. That is, the magnitude relationship may be reversed depending on the characteristics of each capacitor 11 and variations in the progress of deterioration. Specifically, in FIG. 2, the capacitor 11 having the maximum non-charging / discharging voltage V11 at time t1 has the minimum charging / discharging voltage V21 at time t2, and the minimum non-charging / discharging voltage at time t1. The capacitor 11 having the voltage V14 is at the maximum charging / discharging voltage V24 at time t2. Therefore, in the first embodiment, the balance voltage Vri of each capacitor 11 is determined based on the slopes of the thick arrows in FIG. 2 obtained from the two capacitor voltages V1i and V2i at two points at time t1 and time t2. ing.

  Here, the determination method of the 1st point time t1 and the 2nd point time t2 is demonstrated using FIG.

  First, the first point time t1 is determined to be an arbitrary time during which the capacitor 11 is in a non-charge / discharge state. In FIG. The time is determined as the first point time t1. At this time, the control circuit 15 reads the voltage V1i between the capacitors 11 at the time of non-charging / discharging.

  Next, it is assumed that regenerative electric power is generated by vehicle braking at time ta. As a result, the regenerative power is charged in the capacitors 11, but an initial voltage rise due to the internal resistance value R of all the capacitors 11 occurs immediately after the start of charging. The magnitude of the voltage rise ΔVca is represented by ΔVca = I · R, where I is the charging current to the capacitor 11. As shown in FIG. 3, this voltage increase occurs steeply in a very short time until time tb, and then the total voltage Vc increases with time as the capacitor 11 is charged. The control circuit 15 obtains the voltage gradient ΔVc of the total voltage Vc every predetermined time ts after the time tb after the steep voltage rise. Here, the predetermined time ts is determined in advance as a time for obtaining the voltage gradient ΔVc with sufficient measurement accuracy, and is set to 0.1 seconds in the first embodiment. As is clear from FIG. 3, the voltage slope ΔVc is, for example, a difference ΔVcb (= Vcc−Vcb) between the total voltage Vcb at time tb and the total voltage Vcc at time tc obtained by adding the predetermined time ts from time tb. Although it is obtained by dividing by the time ts, since the predetermined time ts is constant, the difference ΔVcb corresponds to the voltage slope ΔVc. Therefore, in the following description, the difference (for example, ΔVcb) is described as a voltage gradient ΔVc.

  The control circuit 15 obtains the voltage gradient ΔVc every predetermined time ts when the capacitor 11 is continuously charged after the time tc. That is, the total voltage Vcd is obtained at time td when the predetermined time ts has elapsed from time tc, and the voltage slope ΔVcc is calculated by ΔVcc = Vcd−Vcc.

  Here, after the time tb, as the regenerative power is charged in the capacitor 11, the charging current I to the capacitor 11 increases with time and eventually reaches the maximum current value. However, when the vehicle speed decreases and vehicle braking approaches the end. The charging current I decreases. Correspondingly, the voltage slope ΔVc of the total voltage Vc of the capacitor 11 increases with time after the time tb, eventually has a maximum value, and thereafter decreases with time. That is, as shown in FIG. 3, the voltage gradient ΔVcc from time tc to time td becomes larger than the voltage gradient ΔVcb from time tb to time tc. Eventually, the voltage gradient ΔVce from time te to time tf becomes the maximum value, and thereafter, voltage gradient ΔVcf from time tf to time tg decreases. Thus, when the voltage slope ΔVcf becomes smaller than the voltage slope ΔVce, that is, when the voltage slope ΔVc (ΔVcf in FIG. 3) becomes smaller than the previous voltage slope ΔVco (ΔVce in FIG. 3) (time tg in FIG. 3). ) Is determined as the second time t2. At this time, the control circuit 15 reads the both-ends voltage V2i when charging / discharging each capacitor 11. As a result, the difference between the total voltage Vcg at the second point time t2 and the total voltage Vc1 at the first point time t1 is sufficiently large. The absolute value ΔVi of the difference between the both-end voltage V2i during charging / discharging at the second time point t2 becomes larger than the voltage reading accuracy by the control circuit 15, and high accuracy can be achieved.

  In FIG. 3, the second time t2 is determined when the capacitor 11 is charged, but this may be determined when the capacitor 11 is changed from the non-charge / discharge state to the discharge state. . The determination method in this case is almost the same as that in FIG. 3, but the total voltage Vc decreases with time due to discharge, so that the voltage gradient ΔVc is all obtained as an absolute value. Thus, the time when the absolute value of the voltage gradient ΔVc becomes smaller than the absolute value of the previous voltage gradient ΔVco may be determined as the second point time t2.

  Further, when the second time t2 is determined during charging or discharging of the capacitor 11, if the positive / negative of the voltage slope ΔVc is different from the positive / negative of the previous voltage slope ΔVco, the capacitor 11 suddenly changes from the charged state. The battery is in a discharged state or has changed from a discharged state to a charged state. At this time, if the former, a voltage drop due to the internal resistance value R of all capacitors 11 occurs at that time, and if the latter, a voltage rise occurs. When the second time t2 is determined at an arbitrary time after this voltage drop or voltage rise, the absolute value ΔVi of the difference between the charge / discharge end voltage V2i and the non-charge / discharge end voltage V1i at that time. Changes in the direction of decreasing. Therefore, depending on the determination time of the second point time t2, the absolute value ΔVi becomes relatively small with respect to the voltage measurement accuracy, and the accuracy of the absolute value ΔVi may be deteriorated. Therefore, the control circuit 15 determines the second point time t2 only when the positive / negative of the voltage gradient ΔVc is the same as the positive / negative of the previous voltage gradient ΔVco.

  From the above description, the determination operation of the second point time t2 is as follows. The control circuit 15 is connected in series every predetermined time ts after an initial voltage rise or voltage drop due to the internal resistance value R of all capacitors 11 immediately after the start of charging or discharging of the capacitors 11. When the voltage slope ΔVc of the total voltage Vc of the capacitor 11 is obtained, the sign of the voltage slope ΔVc is the same as the previous voltage slope ΔVco, and the absolute value of the voltage slope ΔVc is smaller than the absolute value of the previous voltage slope ΔVco. The time t2 is determined as the second point time, and the voltage V2i at both ends during charge / discharge is measured.

  Next, the overall operation for determining the balance voltage Vri, including the operations of FIGS. 2 and 3, will be described with reference to the flowcharts of FIGS. Since the control circuit 15 controls the overall operation of the power storage device by executing various subroutines from the main routine, the flowcharts of FIGS. 4 and 5 are shown in the form of subroutines.

  The control circuit 15 executes the subroutine shown in FIG. 4 in order to determine the balance voltage Vri every predetermined time (for example, minute order) from the main routine. Thus, by determining the balance voltage Vri at regular intervals, it is possible to obtain the balance voltage Vri reflecting the latest state of the capacitor 11 (degradation progress state, etc.).

  When the subroutine of FIG. 4 is executed, the control circuit 15 first clears the previous voltage gradient ΔVco (step number S11). In this specific operation, 0 is substituted for the previous voltage gradient ΔVco, which is a memory variable built in the control circuit 15. Such an operation is expressed as ΔVco = 0 as shown in S11 of FIG. This is defined below as meaning that the value (0) on the right side is substituted for the variable on the left side (previous voltage gradient ΔVco).

  Next, the control circuit 15 determines whether or not the capacitor 11 is currently in a non-charge / discharge state (S13). For this determination, the control circuit 15 receives the current charge / discharge state of the capacitor 11 from the vehicle control circuit (not shown) by the data signal data. The charge / discharge state is obtained, for example, by receiving a data signal data indicating whether or not the vehicle control circuit operates the charge / discharge circuit.

  If the capacitor 11 is not in the non-charging / discharging state (No in S13), the control circuit 15 does not determine the balance voltage Vri and ends the subroutine of FIG. 4 and returns to the main routine. As a result, the control circuit 15 can control to determine the balance voltage Vri every time the capacitor 11 enters the non-charge / discharge state. As described above, the balance voltage Vri reflecting the latest state of the capacitor 11 is obtained. can get. The reason why the balance voltage Vri is not determined when not in the non-charge / discharge state is as follows.

  If the first point time t1 is determined at the time of charging / discharging, for example, in the case of FIG. 3, the first point time t1 is after the time ta. On the other hand, since the second point time t2 is a charging time tg, both the first point time t1 and the second point time t2 are being charged. In this case, when the absolute value ΔVi of the difference between the capacitor voltages Vi at the first time t1 and the second time t2 shown in FIG. 2 is obtained, the influence of the voltage rise due to the internal resistance value R of each capacitor 11 is included. Only the influence of the capacitance value C (corresponding to the slope of the thick arrow in FIG. 2) is reflected. Therefore, it is impossible to determine the balance voltage Vri in consideration of the influence of the internal resistance value R, and the accuracy is reduced accordingly. For this reason, in the first embodiment, the first point time t1 is set to the non-charge / discharge state so that the influence of the internal resistance value R is included in the absolute value ΔVi. Thereby, since the influence of the internal resistance value R is added to the balance voltage Vri, high accuracy can be achieved.

  Here, returning to S13, if the capacitor 11 is in a non-charge / discharge state (Yes in S13), the control circuit 15 determines whether or not the use of the power storage device is finished (S15). Here, the end of use of the power storage device is assumed to be the same timing as the end of use of the vehicle. Therefore, the control circuit 15 can determine the end of use by reading the state of an ignition key (not shown) transmitted from the vehicle control circuit.

  If it is the end of use (Yes in S15), it is Yes in S13, and thus the use is finished while the capacitor 11 is in a non-charge / discharge state. This means that braking is performed to stop the vehicle, and the use of the vehicle is terminated in a state where the regenerative power generated thereby is charged in the capacitor 11. In this case, since the capacitor 11 is not actively charged / discharged thereafter, the second time t2 cannot be determined. Therefore, the control circuit 15 stops the measurement of the voltage V2i at both ends during charging / discharging. At this time, the control circuit 15 ends the subroutine of FIG. 4 and returns to the main routine.

  On the other hand, if the use is not finished (No in S15), the control circuit 15 reads the non-charging / discharging voltage V1i of each capacitor 11 by the balance voltage adjusting means 13 (S17). The time is stored as the first point time t1 (S19). Next, the control circuit 15 reads the temperature T from the temperature sensor 25 (S21), and corrects the non-charging / discharging voltage V1i by the temperature T (S23). The details of the temperature correction method are as described above.

  Next, the control circuit 15 determines whether or not the capacitor 11 is in a charge / discharge state (S25). The detailed operation of this determination is the same as S13. If it is not in the charge / discharge state (No in S25), it is determined again whether or not the use of the power storage device is terminated at this time (S26). If the use is completed (Yes in S26), the ignition key is turned off after a while after stopping the vehicle. In this case as well, the subroutine of FIG. Return to the main routine.

  On the other hand, if the use is not finished (No in S26), since the second time t2 cannot be determined, the process returns to S25 and waits until a charge / discharge state is reached.

  If it will be in a charging / discharging state (Yes of S25), the control circuit 15 will judge whether the initial waiting time passed (S27). Here, the initial waiting time is the time until the initial voltage rise or voltage drop due to the internal resistance value R of all the capacitors 11 immediately after the start of charging or discharging of the capacitors 11, This corresponds to the period from time ta to time tb. If the initial waiting time has not elapsed (No in S27), the process returns to S27 and waits until the initial waiting time elapses.

  If the initial waiting time has elapsed (Yes in S27), the control circuit 15 reads the total voltage Vc of the capacitor 11 via the top balance voltage adjusting means 13 in FIG. 1 (S29). Thereafter, the read all voltage Vc is substituted for the previous all voltage Vco, and the previous all voltage Vco is updated (S31).

  Next, the control circuit 15 determines whether or not the predetermined time ts has elapsed (S33). The predetermined time ts is as described in FIG. If the predetermined time ts has not elapsed (No in S33), the process returns to S33 and waits until the predetermined time ts elapses. On the other hand, if the predetermined time ts has elapsed (Yes in S33), the control circuit 15 reads the entire voltage Vc of the capacitor 11 again (S35). Thereafter, the voltage gradient ΔVc described with reference to FIG. 3 is obtained from ΔVc = Vc−Vco from the obtained total voltage Vc and the previous total voltage Vco (S37). Next, a product F of the obtained voltage gradient ΔVc and the previous voltage gradient ΔVco is calculated (S39). Here, the reason why the product F is calculated is to determine whether the positive / negative of the voltage gradient ΔVc is the same as the positive / negative of the previous voltage gradient ΔVco. That is, if the sign is the same, the product F is positive, and if the sign is different, the product F is negative. If the product F is 0, it is found that the previous voltage gradient ΔVco remains cleared to 0 in S11. When such a product F becomes 0, it means that the voltage gradient ΔVc is obtained for the first time after the execution of the subroutine of FIG. Therefore, if the product F is 0 (Yes in S41), the previous voltage gradient ΔVco does not exist, so that it cannot be compared with the voltage gradient ΔVc. Therefore, the process jumps to S47 described later.

  On the other hand, if the product F is not 0 (No in S41), the control circuit 15 next determines whether or not the product F is positive (S43). If the product F is negative (No in S43), the sign of the voltage slope ΔVc is different from the previous voltage slope ΔVco, and charging and discharging are suddenly reversed. Stop, end the flowchart of FIG. 4 and return to the main routine. As a result, the balance voltage Vri is not updated and the current value is held. Further, as described above, the main routine executes the subroutine of FIG. 4 at regular intervals, so that the operation of determining the balance voltage Vri can be performed if the capacitor 11 is in a non-charge / discharge state again.

  On the other hand, if the product F is positive (Yes in S43), since the positive / negative of the voltage slope ΔVc is the same as the previous voltage slope ΔVco, the control circuit 15 next determines the absolute value of the voltage slope ΔVc and the absolute value of the previous voltage slope ΔVco. The values are compared (S45). If the absolute value of the voltage gradient ΔVc is greater than or equal to the absolute value of the previous voltage gradient ΔVco (No in S45), the voltage gradient ΔVc is increasing from time tb to time te in FIG. Thus, the second point time t2 cannot be determined yet. In this case, the control circuit 15 assigns and updates the value of the voltage gradient ΔVc to the previous voltage gradient ΔVco (S47), and returns to S31. As a result, the operation after the operation for obtaining the voltage gradient ΔVc after the elapse of the predetermined time ts is repeated.

  On the other hand, if the absolute value of the voltage gradient ΔVc is smaller than the absolute value of the previous voltage gradient ΔVco (Yes in S45), this corresponds to the state from the time te to the time tg shown in FIG. Then, the both-end voltage V2i at the time of charging / discharging is read (S49). The time is stored as the second point time t2 (S51). Next, the control circuit 15 reads the temperature T from the temperature sensor 25 (S53) and corrects the both-end voltage V2i during charging / discharging by the temperature T (S55). The details of the temperature correction method are as described above.

  By the operation so far, the values of the first point time t1, the non-charging / discharging both-ends voltage V1i, the second point time t2, and the charging / discharging both-ends voltage V2i are obtained. A subroutine for determining the balance voltage Vri is executed (S57). Therefore, the following description will be made with reference to FIG.

  First, the control circuit 15 substitutes 1 for the built-in variable memory i (S61). Here, the variable memory i is defined to have the same meaning as the subscript i, and is hereinafter referred to as the subscript i. Next, the control circuit 15 obtains the absolute value ΔVi of the difference between the non-charging / discharging voltage V1i and the charging / discharging voltage V2i from ΔVi = | V2i−V1i | (S63). Next, a time difference Δt is obtained by subtracting the first point time t1 from the second point time t2 (S64). That is, the time difference Δt is obtained from Δt = t2−t1. Next, the voltage adjustment width ΔVbi of each capacitor 11 is obtained from the absolute value ΔVi, the time difference Δt, and the predetermined coefficient A by ΔVbi = A × ΔVi / Δt (S65). Here, ΔVi / Δt is the slope of the thick arrow in FIG. This inclination corresponds to the reciprocal of the capacitance value C of each capacitor 11. That is, since all the capacitors 11 are connected in series, both are charged with the same charging current I. The amount of charge Q stored in the capacitor 11 at this time is Q = C · ΔVi = I · Δt. When this is deformed, C = I · Δt / ΔVi. Here, since the charging current I is the same for each capacitor 11, it can be seen that the reciprocal of the slope ΔVi / Δt in FIG. 2 is proportional to the capacitance value C of each capacitor 11.

  Here, as the capacitor 11 deteriorates, the capacitance value C decreases, and the internal resistance value Ri of each capacitor 11 increases. Therefore, as the deterioration progresses, the voltage increase ΔVca caused by the internal resistance value R immediately after the start of charging in FIG. 3 also increases. Thus, since the internal resistance value R is the sum of the internal resistance values Ri of the capacitors 11, the internal resistance value Ri of each capacitor 11 also increases and deteriorates. Therefore, in FIG. 2, the absolute value ΔVi is expressed as the sum of the voltage increase due to the internal resistance value Ri of each capacitor 11 and the voltage increase over time due to charging of the capacitor 11. Therefore, the slope ΔVi / Δt is a value reflecting the internal resistance value Ri and the capacitance value C of each capacitor 11, and it can be seen that the capacitor 11 whose deterioration has progressed becomes larger. Therefore, since the capacitor 11 with the suffix i = 4 in FIG. 2 has the largest inclination, the deterioration is most advanced. Thereby, the balance voltage Vri is adjusted according to the magnitude of the inclination.

  For this purpose, first, the voltage adjustment width ΔVbi is obtained in S65. That is, the voltage adjustment width ΔVbi is an initial balance voltage Vro that is set when the capacitor 11 is in an initial state where deterioration has not progressed (for example, if the capacitor 11 has a rated voltage of 2.5V, the initial balance voltage Vro = 2.5V). Represents how much the voltage is reduced. This is obtained by multiplying the slope by a predetermined coefficient A. Therefore, as the capacitor 11 is further deteriorated and has a larger inclination, the voltage adjustment width ΔVbi becomes larger. The predetermined coefficient A is a coefficient for adjusting the balance voltage Vri so that it falls within the normal range in the next step (S67), and is experimentally obtained in advance and stored in the memory.

  Next, the control circuit 15 obtains the balance voltage Vri from Vri = Vro−ΔVbi (S67). Here, as described above, the voltage adjustment width ΔVbi increases as the deterioration of the capacitor 11 progresses. On the other hand, since the initial balance voltage Vro is a constant, the balance voltage Vri decreases. Thereby, the balance voltage adjusting means 13 adjusts the capacitor both-ends voltage Vi so as to become the balance voltage Vri, so that the capacitor 11 that has deteriorated becomes smaller in the capacitor both-ends voltage Vi. As a result, the progress of the deterioration of the capacitor 11 is suppressed by the other capacitors 11, so that the life of the capacitor 11 can be extended accordingly. Note that a predetermined coefficient A is obtained in advance so that the balance voltage Vri does not become extremely small or negative in the equation of S67, and the inclination is multiplied by the predetermined coefficient A in S65.

  Next, the control circuit 15 compares the balance voltage Vri and the deterioration limit value Vg (S69). Here, the deterioration limit value Vg is a value of the balance voltage Vri when the capacitor 11 deteriorates to a limit state where it can no longer be used, and this is also experimentally obtained in advance. Therefore, if the balance voltage Vri becomes equal to or lower than the deterioration limit value Vg (Yes in S69), the power storage device cannot be used any more, so the control circuit 15 transmits the power storage device deterioration signal as a data signal to the vehicle control circuit. (S71). In response to this, the vehicle control circuit warns the driver of the deterioration of the power storage device, prompts repair, and prohibits the use of the power storage device. Thereby, since it does not continue using the degraded electrical storage apparatus, high reliability is obtained. Thereafter, the control circuit 15 ends the subroutine of FIG. 5 and returns to the subroutine of FIG. In the subroutine of FIG. 4, after the execution of S57 (subroutine of FIG. 5), the subroutine of FIG. 4 is also terminated and the process returns to the main routine.

  On the other hand, if the balance voltage Vri is larger than the deterioration limit value Vg (No in S69), the power storage device can be used continuously, so the control circuit 15 then adds 1 to the subscript i and updates the content of the subscript i ( S73). Thereafter, it is determined whether or not the updated subscript i is equal to a value obtained by adding 1 to the number n (here, n = 4) of the capacitors 11 (S75). If the subscript i is not n + 1 (No in S75), the balance voltage Vri of all the capacitors 11 has not been determined yet, so the process returns to S63 and the subsequent operations are repeated.

  On the other hand, if the subscript i is equal to n + 1 (Yes in S75), the balance voltage Vri for all the capacitors 11 has been determined, so the subroutine of FIG. 5 is terminated and the process returns to the subroutine of FIG. In the subroutine of FIG. 4, after the execution of S57 (subroutine of FIG. 5), the subroutine of FIG. 4 is also terminated and the process returns to the main routine.

  The operation of the subroutine according to the flowchart of FIG. 5 described above is summarized as follows.

  The control circuit 15 measures the first point time t1 when measuring the both-end voltage V1i at the time of non-charging / discharging and the second point time t2 when measuring the both-end voltage V2i at the time of charging / discharging, and from the second point time t2. A time difference Δt is obtained by subtracting the first time t1, and a voltage adjustment width ΔVbi of each capacitor 11 is calculated by dividing the absolute value ΔVi by the time difference Δt and multiplying by a predetermined coefficient A, and the voltage is calculated from the initial balance voltage Vro. The balance voltage Vri is determined by subtracting the adjustment width ΔVbi. In this way, the balance voltage Vri of each capacitor 11 corresponding to the absolute value ΔVi is obtained.

  Since the main routine executes the subroutine of FIG. 4 at regular intervals while the vehicle is in use, the balance voltage Vri continues to be updated if the condition for obtaining the balance voltage Vri is satisfied. Thereafter, when the use of the vehicle is finished, the control circuit 15 outputs the latest balance voltage Vri updated last to each balance voltage adjusting means 13. Thereby, each balance voltage adjustment means 13 controls the balance switch 17 so that the both-ends voltage Vi of the connected capacitor 11 becomes the balance voltage Vri. That is, if the capacitor both-ends voltage Vi is larger than the balance voltage Vri, the comparator 23 turns on the balance switch 17. As a result, the capacitor 11 is discharged by the balance resistor 19, and the voltage Vi across the capacitor decreases. Thereafter, when the voltage V i across the capacitor becomes substantially equal to the balance voltage Vri, the comparator 23 turns off the balance switch 17. As a result, the discharge of the capacitor 11 is stopped, and the voltage Vi across the capacitor becomes the target balance voltage Vri. As a result, since the voltage applied to the capacitor 11 is lowered, the progress of deterioration can be reduced. After that, the voltage V i across the capacitor gradually decreases due to self-discharge when the vehicle is not used.

  Further, by operating in this way, the voltage V i across the capacitor 11 (V24 in FIG. 2) of the capacitor 11 that has deteriorated at the end of use of the vehicle is lowered, and the voltage V i across the capacitor 11 of the capacitor 11 where the deterioration has not progressed relatively. (V21 in FIG. 2) remains high, so that the deterioration of the former is reduced and the deterioration of the latter is relatively advanced, so that the deterioration of each capacitor 11 can be made uniform. Become. As a result, the possibility that only one arbitrary capacitor 11 reaches the deterioration limit and the entire power storage device cannot be used can be reduced, and the life of the power storage device can be extended.

  With the above configuration and operation, when the capacitor 11 is not charged / discharged, the both-end voltage V1i during non-charging / discharging is measured, and the both-end voltage V2i during charging / discharging is measured during charging / discharging, and the absolute value ΔVi of these differences is measured. Therefore, the balance voltage Vri is determined, so that a power storage device capable of extending the life of the capacitor 11 with a very simple operation and high accuracy can be realized.

  In the first embodiment, the case where the balance voltage Vri is obtained when charging the capacitor 11 has been described. However, this may be performed when the capacitor 11 is discharged. However, in any case, the first point time t1 needs to be during non-charging / discharging, and the second point time t2 needs to be during charging / discharging. This is due to the following reason. If the first time t1 is charged and the subsequent second time t2 is non-charged, the voltage drop caused by the internal resistance value Ri of the capacitor 11 when the charging is stopped and the battery is not charged. Will occur. As a result, the voltage across the capacitor Vi has increased before the charging is stopped, but the voltage across the capacitor Vi decreases due to the stop of the charging. Therefore, the absolute value ΔVi is reduced by the voltage drop. As a result, if the absolute value ΔVi becomes too small, the influence of the voltage measurement accuracy increases, and the accuracy of the balance voltage Vri determined based on the absolute value ΔVi also decreases. Further, depending on the charging time and the magnitude of the internal resistance value Ri of the capacitor 11 due to the progress of deterioration, the voltage drop at the time of stopping charging becomes larger than the increase of the voltage Vi across the capacitor due to charging. There is also a possibility that the slope ΔVi / Δt becomes negative. Thus, if the magnitude relationship of the slope ΔVi / Δt varies depending on the state of charge or the deterioration state, the balance voltage Vri cannot be determined correctly. Therefore, the first point time t1 is determined during non-charging and the second point time t2 is determined during charging. As a result, the slope ΔVi / Δt can be obtained according to the sum of the voltage rise at the start of charging and the rise of the voltage across the capacitor Vi due to charging, so a highly accurate balance voltage Vri reflecting the influence of the charged state and the deteriorated state is determined. can do. The same applies to the discharge.

(Embodiment 2)
FIG. 6 is a flowchart for obtaining the balance voltage of each capacitor of the power storage device according to Embodiment 2 of the present invention. Note that the structure of the power storage device in Embodiment 2 is the same as that in FIG. 1, and thus the description of the structure is omitted. That is, since the feature of the second embodiment is the operation part, the operation will be described in detail below.

  First, the operation of FIG. 4 may be basically the same as that of the first embodiment, but since the first time t1 and the second time t2 are not used in the second embodiment, the operations of S19 and S51 are performed. Is unnecessary. Therefore, the control is simplified accordingly. In the second embodiment, the subroutine for determining the balance voltage Vri is different from that in the first embodiment, and this portion will be described with reference to FIG.

  If the non-charging / discharging both-ends voltage V1i and charging / discharging both-ends voltage V2i are obtained by executing the subroutine of FIG. 4, the control circuit 15 executes the subroutine of FIG. 6 in S57 of FIG. Thereby, first, 1 is substituted into the subscript i (S81). Next, the control circuit 15 obtains the absolute value ΔVi of the difference between the non-charging / discharging voltage V1i and the charging / discharging voltage V2i from ΔVi = | V2i−V1i | (S83). Next, the index i is updated by adding 1 (S85), and it is determined whether the index i has reached the value obtained by adding 1 to the number n of capacitors 11 (S87). If the subscript i is not equal to n + 1 (No in S87), the process returns to S83, and the operation for obtaining the absolute value ΔVi of the next capacitor 11 is repeated.

  If the subscript i is equal to n + 1 (Yes in S87), the control circuit 15 obtains the minimum value ΔVmin from the obtained absolute values ΔVi (S89). In the case of FIG. 2, ΔV1 is the minimum value ΔVmin. Next, the control circuit 15 again substitutes 1 for the subscript i (S91), and obtains the ratio Δi between each absolute value ΔVi and the minimum value ΔVmin from Δi = ΔVi / ΔVmin (S93). Since the ratio Δi thus obtained is a value indicating how much the absolute value ΔVi is larger than the minimum value ΔVmin, the ratio Δi is a numerical value of 1 or more. For the capacitor 11 corresponding to the minimum value ΔVmin, the voltage across the capacitor ΔVi (ΔV1 in FIG. 2) is equal to the minimum value ΔVmin, so Δi = 1.

  Accordingly, the ratio Δi of 1 corresponds to the one having the smallest inclination as apparent from FIG. 2, and therefore the progress of deterioration is the slowest. The other capacitors 11 are more degraded as the ratio Δi is larger. In FIG. 2, it can be seen that the capacitor 11 with the suffix i = 4 is most degraded. Therefore, the ratio Δi is an indicator of the progress of deterioration of each capacitor 11. Accordingly, the voltage adjustment width ΔVbi of the capacitor 11 with the suffix i is obtained from the correlation between the ratio Δi and the voltage adjustment width ΔVb (S95). Here, as described in the first embodiment, the voltage adjustment width ΔVbi is set to a larger value as the deterioration progresses. Therefore, the control circuit 15 determines the ratio Δi and the voltage obtained experimentally in advance. The correlation of the adjustment width ΔVb is stored in the memory, and the voltage adjustment width ΔVbi corresponding to the ratio Δi obtained in S93 is obtained. Since the correlation between the ratio Δi and the voltage adjustment width ΔVb is a positive correlation function, this is obtained as an equation by the least square method, and the voltage adjustment for each capacitor 11 is performed by substituting the ratio Δi into the equation. The width ΔVbi is calculated. Thereby, the memory can be saved as compared with the case where the correlation is stored in the memory as a data table.

  Next, the control circuit 15 obtains the balance voltage Vri from Vri = Vro−ΔVbi (S97). The initial balance voltage Vro is the rated voltage (2.5 V) of the capacitor 11 as in the first embodiment. Thereby, the balance voltage Vri becomes smaller as the capacitor 11 is further deteriorated. Accordingly, the progress of the deterioration of the capacitor 11 is suppressed by the other capacitors 11, so that the life of the capacitor 11 can be extended accordingly.

  Next, the control circuit 15 compares the balance voltage Vri and the deterioration limit value Vg (S99). Here, the meaning of the deterioration limit value Vg is the same as in the first embodiment. If the balance voltage Vri is equal to or lower than the deterioration limit value Vg (Yes in S99), the power storage device cannot be used any more, so the control circuit 15 transmits a deterioration signal of the power storage device to the vehicle control circuit as a data signal (S101). ), The subroutine of FIG. 6 is terminated and the process returns to the subroutine of FIG.

  On the other hand, if the balance voltage Vri is larger than the deterioration limit value Vg (No in S99), the power storage device can be used continuously. Next, the control circuit 15 adds 1 to the subscript i and updates the content of the subscript i ( S103). Thereafter, it is determined whether or not the updated subscript i is equal to a value obtained by adding 1 to the number n of capacitors 11 (S105). If the subscript i is not n + 1 (No in S105), the balance voltage Vri of all the capacitors 11 has not been determined yet, so the process returns to S93 and the subsequent operations are repeated.

  On the other hand, if the subscript i is equal to n + 1 (Yes in S105), since the balance voltage Vri for all the capacitors 11 has been determined, the subroutine of FIG. 6 is terminated and the process returns to the subroutine of FIG.

  The operation of the subroutine according to the flowchart of FIG. 6 described above is summarized as follows.

  The control circuit 15 obtains the minimum value ΔVmin of each absolute value ΔVi, and the voltage adjustment width ΔVbi for each capacitor 11 from the correlation obtained in advance in the ratio Δi between each absolute value ΔVi and the minimum value ΔVmin and the voltage adjustment width ΔVb. And the balance voltage Vri is determined by subtracting the voltage adjustment width ΔVbi from the initial balance voltage Vro. In this way, the balance voltage Vri of each capacitor 11 corresponding to the absolute value ΔVi is obtained. At this time, as described in the first embodiment, the absolute value ΔVi is a value reflecting the internal resistance value Ri and the capacitance value C of the capacitor 11, and therefore, according to the second embodiment, the balance voltage is based on the absolute value ΔVi. High accuracy can also be achieved by determining Vri.

  Similar to the first embodiment, the subsequent operation is adjusted by the balance voltage adjusting means 13 so that the voltage Vi between both ends of each capacitor 11 becomes the determined balance voltage Vri at the end of vehicle use. As a result, the applied voltage of the capacitor 11 that has deteriorated decreases, so that further progress of deterioration can be reduced and the deterioration of each capacitor 11 can be aligned with high accuracy. Accordingly, the life of the power storage device can be extended.

  With the above configuration and operation, when the capacitor 11 is not charged / discharged, the both-end voltage V1i during non-charging / discharging is measured, and the both-end voltage V2i during charging / discharging is measured during charging / discharging, and the absolute value ΔVi of these differences is measured. Since the balance voltage Vri is determined by the ratio Δi to the minimum value ΔVmin, it is not necessary to measure the times t1 and t2 as compared with the first embodiment, and the length of the capacitor 11 can be increased with simple operation and high accuracy. A power storage device capable of extending the life can be realized.

  In the first and second embodiments, the temperature sensor 25 is arranged in the vicinity of the capacitor 11. However, this is because, for example, when the temperature T does not change so much as in the case where the power storage device is used as an emergency auxiliary power supply. Therefore, it is not necessary to correct the temperature T of the capacitor both-ends voltage Vi. Therefore, in this case, the temperature sensor 25 may not be used.

  In the first and second embodiments, the control circuit 15 outputs a deterioration signal when the balance voltage Vri becomes equal to or lower than the deterioration limit value Vg. However, this means that the absolute value ΔVi becomes equal to or higher than the deterioration upper limit value ΔVg. May be output. Here, the deterioration upper limit value ΔVg is an absolute value ΔVi at a limit when the power storage device cannot be used any more, and may be obtained in advance and stored in the memory of the control circuit 15. Since the absolute value ΔVi increases as the capacitor 11 deteriorates as described above, the absolute value ΔVi is determined to be deteriorated when the balance voltage Vri becomes equal to or lower than the deterioration limit value Vg. If it becomes above, it will be judged as deterioration. Thereby, particularly in Embodiment 2, it is possible to determine the deterioration of the power storage device at an early stage. Further, both of these two determinations may be performed, and a deterioration signal may be output if at least one of the conditions is satisfied. Thereby, since deterioration determination is performed twice, deterioration determination accuracy is improved.

  In the first and second embodiments, the deterioration limit value Vg and the deterioration upper limit value ΔVg may be set in two stages. In this case, for example, in the first stage, the vehicle control circuit issues a warning to the driver and performs control to limit the charging current. In the second stage, control is performed so as to stop charging the power storage device together with a warning. As a result, the possibility of continuing to use the deteriorated power storage device can be greatly reduced.

  In the first and second embodiments, the voltage V2i during charging / discharging has the same voltage slope ΔVc as the previous voltage slope ΔVco, and the absolute value of the voltage slope ΔVc is smaller than the absolute value of the previous voltage slope ΔVco. Although sometimes measured, the charging / discharging current I to the capacitor 11 may be used instead of the voltage gradient ΔVc, and the previous charging / discharging current Io may be used instead of the previous voltage gradient ΔVco. The charge / discharge current I may be obtained, for example, when the control circuit 15 receives the data signal data from a current detection circuit (not shown) built in the charge / discharge circuit as a data signal data via the vehicle control circuit. Alternatively, a current detection circuit may be provided in series to detect the current. Regarding the operation, in the flowchart of FIG. 4, the voltage gradient ΔVc is replaced with the charge / discharge current I, the previous voltage gradient ΔVco is replaced with the previous charge / discharge current Io, and the operation of reading the charge / discharge current I is performed in S37. The operations relating to the total voltage Vc and the previous total voltage Vco (S29, S31, S35) may be deleted. As a result, a current detection circuit is required in terms of configuration, but the operation can be further simplified as compared with FIG. 4, and the balance voltage Vri can be determined earlier because of less operation. In this case, if the charge / discharge current I is different from the previous charge / discharge current Io, the measurement of the both-end voltage V2i at the time of charge / discharge is stopped and the balance voltage Vri is not updated, and the capacitor 11 enters the non-charge / discharge state again. If so, the balance voltage Vri may be determined.

  In the first and second embodiments, an electric double layer capacitor is used as the capacitor 11, but this may be another capacitor such as an electrochemical capacitor.

  Further, in the first and second embodiments, the case where the power storage device is applied to a hybrid vehicle has been described. However, the present invention is not limited thereto, and a vehicle regeneration system, an idling stop, an electric power steering, a vehicle braking system, an electric supercharger, etc. It can also be applied to an auxiliary power source for vehicles in each of the above systems. Furthermore, it can be applied as long as a plurality of capacitors are connected in series and charged and discharged, such as an emergency auxiliary power supply other than for vehicles.

  The power storage device according to the present invention can extend the life of the capacitor with extremely simple operation with high accuracy, and is particularly useful as a power storage device for a vehicle that stores power in the capacitor and discharges it when necessary.

1 is a block circuit diagram of a power storage device according to Embodiment 1 of the present invention. Variation diagram of voltage across capacitor at time t1 and t2 of the power storage device in Embodiment 1 of the present invention Time-dependent characteristic diagram of total voltage of power storage device in Embodiment 1 of the present invention The flowchart which calculates | requires the both-ends voltage at the time of non-charging / discharging of the electrical storage apparatus in Embodiment 1 of this invention, and the both-ends voltage at the time of charging / discharging. The flowchart which calculates | requires the balance voltage of each capacitor of the electrical storage apparatus in Embodiment 1 of this invention The flowchart which calculates | requires the balance voltage of each capacitor of the electrical storage apparatus in Embodiment 2 of this invention Block diagram of a conventional power storage device

Explanation of symbols

11 Capacitor 13 Balance voltage adjusting means 15 Control circuit 25 Temperature sensor

Claims (11)

A plurality of capacitors connected in series;
A balance voltage adjusting means connected to each of the plurality of capacitors;
A control circuit connected to the balance voltage adjusting means;
The control circuit measures the voltage at both ends of the capacitor at the time of non-charging / discharging of the capacitor (V1i, i = 1 to n, n is the number of the capacitors) by the balance voltage adjusting unit at the time of non-charging / discharging of the capacitor,
After the measurement of the non-charging / discharging voltage (V1i), the charging / discharging voltage (V2i) of the capacitor when the capacitor is continuously charged or discharged only is adjusted to the balance voltage. Measured by means,
The absolute value (ΔVi) of the difference between the non-charging / discharging voltage (V1i) and the charging / discharging voltage (V2i) is obtained,
A balance voltage (Vri) of each capacitor is determined according to the absolute value (ΔVi),
A power storage device in which the balance voltage adjusting means controls the voltage across the capacitor (Vi) to be the balance voltage (Vri). The control circuit includes a first point time (t1) for measuring the both-end voltage (V1i) at the time of non-charging / discharging,
Measure the second point time (t2) when measuring the both-end voltage (V2i) during the charge and discharge,
A time difference (Δt) is obtained by subtracting the first point time (t1) from the second point time (t2).
A voltage adjustment width (ΔVbi) of each capacitor is calculated by dividing the absolute value (ΔVi) by the time difference (Δt) and multiplying by a predetermined coefficient (A),
The power storage device according to claim 1, wherein the balance voltage (Vri) is determined by subtracting the voltage adjustment width (ΔVbi) from an initial balance voltage (Vro). The control circuit obtains a minimum value (ΔVmin) of each absolute value (ΔVi),
The voltage adjustment width (ΔVbi) for each capacitor is obtained from the correlation obtained in advance in the ratio (Δi) between the absolute value (ΔVi) and the minimum value (ΔVmin) and the voltage adjustment width (ΔVb). ,
The power storage device according to claim 1, wherein the balance voltage (Vri) is determined by subtracting the voltage adjustment width (ΔVbi) from an initial balance voltage (Vro). 2. The power storage device according to claim 1, wherein the control circuit determines the balance voltage (Vri) each time the capacitor enters a non-charge / discharge state. The control circuit, after the initial voltage rise or voltage drop due to the internal resistance value (R) of all the capacitors immediately after the start of charging or discharging of the capacitor,
For each predetermined time (ts), a voltage slope (ΔVc) of the total voltage (Vc) of the capacitors connected in series is obtained.
When the voltage slope (ΔVc) is the same as the previous voltage slope (ΔVco) and the absolute value of the voltage slope (ΔVc) is smaller than the absolute value of the previous voltage slope (ΔVco), The power storage device according to claim 1, wherein the both-end voltage (V2i) is measured. The control circuit, when measuring the voltage (V2i) at both ends of charge / discharge, if the positive / negative of the voltage slope (ΔVc) is different from the previous voltage slope (ΔVco), Without stopping the measurement and updating the balance voltage (Vri),
The power storage device according to claim 5, wherein the balance voltage (Vri) is determined when the capacitor is in a non-charge / discharge state again. The control circuit, after the initial voltage rise or voltage drop due to the internal resistance value (R) of all the capacitors immediately after the start of charging or discharging of the capacitor,
At every predetermined time (ts), the charge / discharge current (I) of the capacitor input to the control circuit is the same as the previous charge / discharge current (Io), and the absolute value of the charge / discharge current (I) is The power storage device according to claim 1, wherein when the charge / discharge current (Io) becomes smaller than an absolute value of the previous charge / discharge current (Io), the charge / discharge both-ends voltage (V2i) is measured. When the charge / discharge current (I) is different from the previous charge / discharge current (Io) in measuring the charge / discharge voltage (V2i), the control circuit determines the charge / discharge voltage (V2i). ) Measurement is not stopped and the balance voltage (Vri) is not updated.
The power storage device according to claim 7, wherein the balance voltage (Vri) is determined when the capacitor is in a non-charge / discharge state again. 2. The power storage device according to claim 1, wherein the control circuit stops measuring the both-end voltage during charging / discharging (V <b> 2 i) when the use is completed while the capacitor is in a non-charging / discharging state. A temperature sensor is disposed in the capacitor, and an output of the temperature sensor is connected to the control circuit,
The control circuit determines the non-charging / discharging voltage (V1i) and the charging / discharging voltage according to the temperature (T) obtained from the temperature sensor due to the temperature dependence of the capacitor voltage (Vi) determined in advance. The power storage device according to claim 1, wherein the both-end voltage (V2i) is corrected. The control circuit has at least one of the case where the balance voltage (Vri) is equal to or lower than the deterioration limit value (Vg) or the absolute value (ΔVi) is equal to or higher than the deterioration upper limit value (ΔVg). The power storage device according to claim 1, wherein a deterioration signal is output.

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