JP2009164524A - Method for forming electrode - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for forming an electrode capable of improving the freedom of the kind and the selection of the composition of the electrode for external connection at the time of forming an electrode for external connection such as a solder bump and the like, easily controlling the composition of the electrode for external connection and further reducing the number of steps of a cleansing process. <P>SOLUTION: The method for forming the electrode includes a step of preparing a substrate to be treated 31 with a conductor layer 36 exposed to the surface, a step of forming a first mask 37A having a first aperture 37Aa for exposing the conductor layer 36 to the surface of the substrate to be treated 31, a step of forming a first metal layer 39 made of a first metal in the first aperture 37Aa by plating, a step of forming a second metal layer 40 made of a second metal on the first metal layer 39 by a process different from the plating, and a step of processing the first metal layer 39 and the second metal layer 40 into an alloy by a heat treatment. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electrode forming method, and more particularly to an electrode forming method used to connect an electronic component and an electrode on a substrate on which the electronic component is mounted.

  In recent years, in order to enable high-density mounting of a semiconductor element such as a semiconductor integrated circuit element on a support substrate such as a wiring board, a convex shape (protruding shape) called a bump disposed on the semiconductor element. A so-called flip-chip connection structure using an external connection electrode having the above is employed.

  That is, as a support substrate, for example, a wiring substrate in which an insulating resin such as a glass epoxy resin is used as a base material and a conductive layer made of copper (Cu) or the like is selectively disposed on at least one main surface thereof is used. A semiconductor element is mounted on the wiring board by connecting bumps mainly composed of solder disposed on the main surface thereof to the conductive layer.

  When forming a semiconductor device having such a flip-chip connection structure, a so-called plating method is employed as a method for forming bumps in a semiconductor element.

  A first example of a conventional bump forming process using such a plating method is shown in FIGS.

  Here, active elements such as transistors formed on the semiconductor substrate 1, passive elements such as resistance elements / capacitance elements, an isolation region for insulating and isolating these functional elements, and interconnections between the elements The wiring layer, the interlayer insulating layer, etc. are not shown.

In the bump formation process by the conventional plating method, first, aluminum (Al) is formed on the upper surface (circuit element formation surface) of the semiconductor substrate 1 made of silicon (Si) through an insulating film (layer) 2 such as silicon oxide. ) And the like and an electrode pad (electrode layer) 3 are disposed, and a surface protective film (passivation film) 4 made of silicon nitride (SiN) or the like is formed on the semiconductor substrate including the wiring layer and the electrode pad 3. Cover with. (See Fig. 1 (a))
Openings 5 are formed in the surface protective film 4 corresponding to the positions where solder bumps are to be formed on the electrode pads 2, and the electrode pads 2 are selectively exposed.

Next, a power feeding layer 6 composed of a titanium (Ti) layer and a copper (Cu) layer is formed by a sputtering method so as to cover the electrode pad 3 and the surface protective film 4. (See Fig. 1 (b))
Next, a photoresist layer 7 is formed on the power feeding layer 6 by spin coating or the like. (See Fig. 1 (c))
Next, selective exposure processing / development processing / curing processing is performed on the photoresist layer 7, and openings 7 a are formed in the photoresist layer 7 corresponding to the positions where solder bumps are to be formed on the electrode pads 3. Form. (See Fig. 1 (d))
Thereafter, an electroplating process (electrolytic plating process) is performed to form a barrier metal layer 8 made of nickel (Ni) on the power feeding layer 6 in the opening 7a of the photoresist layer 7. The barrier metal layer 8 prevents diffusion of a solder layer, which will be described later, into the wiring layer. (See Fig. 2 (e))
When the electroplating process for forming the barrier metal layer 8 is completed, a cleaning process such as washing with water is performed.

Next, electroplating is performed using the photoresist layer 7 as a mask to form a tin (Sn) -silver (Ag) solder layer 9 on the barrier metal layer 8. (See Fig. 2 (f))
After the electroplating process is completed, a cleaning process is performed by washing with water or the like.

Thereafter, the photoresist layer 7 is stripped and removed using a stripping solution (see FIG. 2G), and the power supply layer 6 is unnecessary by a so-called wet etching method using the solder layer 9 as an etching mask. Remove the part. (See Fig. 2 (h))
Next, the gas contained in the solder layer 9 is removed by annealing treatment (see FIG. 3 (i)), and the solder layer 9 is melted by reflow heating and shaped into a substantially spherical shape. (See Fig. 3 (j))
In this manner, spherical solder bumps (solder balls) 9A, which serve as external connection protruding electrodes, are formed on the electrode pads 2 of the semiconductor substrate 1.

  On the other hand, an aspect (second example of a conventional bump forming process) in which the process shown in FIGS. 4 and 5 is performed after the process shown in FIG. 2 (e) is also known.

  4 and 5, the same reference numerals are given to the portions corresponding to the portions shown in FIGS. Similarly, illustration of functional elements formed on the semiconductor substrate 1, an insulation (isolation) region that isolates and isolates the functional elements, an inter-element interconnection wiring layer, an interlayer insulating layer, and the like is omitted. is doing.

After the step shown in FIG. 2 (e), electroplating is performed, and copper, which is the first metal constituting solder bumps, is formed on the barrier metal layer 8 in the opening 7a of the photoresist layer 7. The (Cu) layer 10 is formed. (See FIG. 4 (f '))
When the plating process is completed, a cleaning process such as washing with water is performed.

Next, electroplating is performed using the photoresist layer 7 as a mask to form a tin (Sn) -silver (Ag) layer 11 on the copper (Cu) layer 10 layer. (See Fig. 4 (g '))
When the electroplating process is completed, the cleaning process is performed by washing with water or the like.

  In the formation method shown in FIG. 4, a tin (Sn) -silver (Ag) layer 11 is formed on the copper (Cu) layer 10, and the barrier metal layer 8 is electroplated. After forming the tin (Sn) -silver (Ag) layer, a copper (Cu) layer may be formed by electroplating.

  Also in this case, after the tin (Sn) -silver (Ag) layer 11 is formed and after the copper (Cu) layer 10 is formed, a cleaning process is required.

Next, the photoresist layer 7 is removed using a stripping solution (see FIG. 4 (h ′)), and the power supply layer is formed by wet etching using the tin (Sn) -silver (Ag) 11 as an etching mask. 6 unnecessary parts are removed. (See FIG. 4 (i ′))
Next, an alloying annealing process is performed to form a solder layer 12 made of copper (Cu) and tin (Sn) -silver (Ag). (See FIG. 5 (j ′))
Thereafter, the solder layer 12 is melted by reflow heating, and the solder layer 12 is shaped into a substantially spherical shape. In this way, spherical solder bumps (solder balls) 12A serving as external connection protruding electrodes are formed on the electrode pads 2 of the semiconductor substrate 1.

  From the viewpoint of mounting reliability of the semiconductor element on the wiring board, it is desirable that there are various types and options as the composition of the solder bump.

  For example, when an electrode pad is formed by electroless plating on a wiring substrate on which a semiconductor element is flip-chip mounted, nickel (Ni) or the like is plated to prevent formation of an oxide film on the pad.

  In this case, when the composition of the solder bump formed on the electrode pad of the semiconductor element is tin (Sn) -silver (Ag), the nickel (Ni) film formed by electroless plating and the tin (Sn)- Kirkendall voids are easily formed at the joint interface with the solder bumps made of silver (Ag). When the Kirkendall void grows, it develops into a crack, which may destroy the solder joint.

  Therefore, in this case, tin (Sn) -silver (Ag) -copper (Cu), which is a three element metal having good compatibility with nickel (Ni), is used as the solder bump, thereby suppressing the generation of the Kirkendall void. Thus, excellent reliability of the bump connection can be obtained.

  Thus, it is desirable that the solder bump composition has a high degree of freedom in the type and selection of the composition.

  However, in the bump formation by the conventional plating method, there is a restriction on the metal species that can be plated or the composition of the metal that can be plated.

  For example, in the first example of the conventional bump forming process, a tin (Sn) -silver (Ag) solder layer 9 is formed on the barrier metal layer 8 at once.

  However, there is almost no plating solution that can form a metal of three or more elements at once (in one solution). Although tin (Sn) -silver (Ag) -copper (Cu) alloy plating itself exists, it is difficult to put it to practical use from the viewpoint of the stability of the plating solution and the composition control in the deposited film.

  Furthermore, in the first example of the conventional bump forming process, since the current density is different between the outer peripheral side and the central side of the semiconductor substrate 1, it is difficult to control the composition of the plating in the semiconductor substrate 1. Since it is difficult to control the plating composition of the plurality of semiconductor substrates 1, it is difficult to control the state in which the solder bumps are formed.

  On the other hand, in the second example of the conventional bump forming process, a copper (Cu) 10 layer constituting the solder layer 12 is formed by plating, and then the solder layer 12 is formed on the copper (Cu) 10 layer. The constituent tin (Sn) -silver (Ag) layer 11 is formed by plating.

  That is, in order to form the solder layer 12, the plating process is performed twice. A cleaning process is performed after each plating process.

  According to the second example of the conventional bump forming process, the number of plating processes and the number of cleaning processes corresponding to the number of plating processes are increased as compared with the forming process in the first example of the conventional bump forming process. The number of forming steps will increase.

  Further, in the bump forming process in the second example of the conventional bump forming process, the distribution of the thickness of the plating layer laminated by the plating process is large, and the control of the composition of the solder bumps is large. Is difficult.

  The present invention has been made in view of such problems in the prior art, and in the formation of external connection electrodes such as solder bumps, the type and selection of the composition of the external connection electrodes are free. It is an object of the present invention to provide a method for forming an electrode that can increase the degree, can easily control the composition of the external connection electrode, and can further reduce the number of cleaning treatment steps.

  According to one aspect of the present invention, a step of preparing a substrate to be processed in which a conductor layer is exposed on the surface, and a first mask having a first opening in which the conductor layer is exposed on the surface of the substrate to be processed. Forming a first metal layer made of a first metal in the first opening by plating, and forming a second metal made of a second metal on the first metal layer. Forming a metal layer by a method different from the plating process, and alloying the first metal layer and the second metal layer by heat treatment. Is provided.

  The step of forming the second metal layer includes the step of forming the second metal layer on the first mask and the first metal layer, and the second mask on the second metal layer. And a step of etching the second metal layer using the second mask to leave the second metal layer only on the first metal layer. May be.

  The second metal layer is formed on the first mask and the first metal layer, and the step of melting the first and second metal layers is performed on the first mask. It may be performed while the two metal layers remain.

  Furthermore, the step of forming the second metal layer includes the step of removing the first mask and the second metal layer on the substrate to be processed and the first metal layer after the removal of the first mask. And a step of forming the metal layer.

  The first metal may include tin (Sn) and silver (Ag), and the second metal may include copper (Cu).

  According to the present invention, it is a method for forming an external connection electrode such as a solder bump, and the degree of freedom of the type and selection of the composition of the external connection electrode can be improved. It is possible to provide a method of forming an electrode that can be easily controlled and that can suppress the number of cleaning treatment steps.

  Embodiments of the present invention will be described below.

1. First Embodiment A method for forming an external connection electrode according to a first embodiment of the present invention will be described with reference to FIGS.

  In the present embodiment, an active element such as a transistor, a passive element such as a resistance element / capacitance element formed on the semiconductor substrate 31, and an insulation (isolation) region that isolates and isolates these elements. The inter-element interconnection wiring layer, the interlayer insulating layer, and the like are not shown.

In the external connection electrode forming method according to the present embodiment, first, an insulating film (layer) 32 such as silicon oxide is formed on the upper surface (circuit element forming surface) of a semiconductor substrate 31 made of silicon (Si). A wiring layer made of aluminum (Al) or the like and an electrode pad (electrode layer) 33 having a thickness of about 2.0 μm are disposed, and the semiconductor substrate 31 including the wiring layer, the electrode pad 33 and the like is disposed. A surface protective film (passivation film) 34 made of silicon nitride (SiN) or the like is covered. (See Fig. 6 (a))
In the surface protective film 34, openings 35 are formed corresponding to the positions where external connection electrodes made of solder bumps in the respective electrode pads 33 are to be formed.

Next, a power feeding layer 36 composed of two layers of titanium (Ti) and copper (Cu) is formed by a sputtering method so as to cover the electrode pad 32 and the surface protective film 34 on the semiconductor substrate 31. (See FIG. 6 (b))
The power supply layer 36 supplies a plating current in a plating process described later, and a copper (Cu) layer having a thickness of about 200 nm is formed on a titanium (Ti) layer having a thickness of about 100 nm. Arranged and formed.

Next, a photoresist layer (first resist layer) 37A is formed on the power feeding layer 36 by spin coating (spin coating) or the like. (See FIG. 6 (c))
The film thickness of the photoresist layer 37A is set to 10 μm, for example.

Next, selective exposure processing / development processing / curing processing is performed on the photoresist layer 37A, and an opening 37Aa corresponding to a position where the external connection protruding electrode made of a solder bump is to be formed on the electrode pad 32 is formed. Form. (See Fig. 6 (d))
Thereafter, an electroplating process is performed using the power feeding layer 36 to form a barrier metal layer 38 made of nickel (Ni) in the opening 37Aa of the photoresist layer 37A. (See Fig. 7 (e))
The barrier metal layer 38 prevents diffusion of solder constituting a solder layer, which will be described later, into the wiring layer and the like, and prevents a decrease in connection reliability. The thickness of the barrier metal layer 38 is set to 2.0 μm, for example.

  When the electroplating process for forming the barrier metal layer 38 is completed, a cleaning process such as washing with water is performed.

Next, electroplating is performed using the photoresist layer 37A as a mask to form a first metal layer 39 made of tin (Sn) -silver (Ag) on the barrier metal layer 38 (first metal layer). Forming step). (See Fig. 7 (f))
The composition of the first metal layer 39 is, for example, 97 wt% tin (Sn) and 3 wt% silver (Ag). The thickness of the tin (Sn) -silver (Ag) layer 39 is, for example, 40 μm.

  When the electrolytic plating process is completed, the cleaning process is performed by washing with water or the like.

In this embodiment, after that, the second metal layer 40 made of copper (Cu) is deposited on the tin (Sn) -silver (Ag) layer 39 and the photoresist layer 37A by sputtering. Form (second metal layer forming step). (See Fig. 7 (g))
At this time, the film thickness of the copper (Cu) layer 40 is set to 200 nm.

  That is, in the present embodiment, a sputtering method is selected and applied as a method for depositing and forming the second metal layer layer 40 made of copper (Cu).

  Therefore, copper (Cu), which is a metal to be added to the tin (Sn) -silver (Ag) layer 39, can be deposited with a uniform thickness while controlling the deposition amount.

  Further, the cleaning process that is necessary in the plating process is not required.

  In addition, as a deposition method of the copper (Cu) layer 40, a vapor deposition method such as a vacuum vapor deposition method can be applied instead of the sputtering method.

  Even with the vapor deposition method, it is possible to deposit a uniform thickness while controlling the deposition amount of copper (Cu) which is a metal to be added to the tin (Sn) -silver (Ag) layer 39. . Also in this case, the cleaning process that is necessary in the plating process is not necessary.

Next, a second photoresist layer 37B is formed on the copper (Cu) layer 40 by spin coating or the like. (See Fig. 7 (h))
Next, selective exposure processing / development processing / curing processing is performed on the photoresist layer 37 </ b> B, and the photoresist layer 37 </ b> B is selectively positioned immediately above the tin (Sn) -silver (Ag) layer 39. leave. (See Fig. 8 (i))
Next, the copper (Cu) layer 40 is selectively etched and removed using the photoresist layer 37B as a mask. (See FIG. 8 (j))
As a result, part of the side surfaces of the copper (Cu) layer 40 and the tin (Sn) -silver (Ag) layer 39 are exposed.

Thereafter, the photoresist layer 37B and the photoresist layer 37A are peeled and removed. (Refer to FIG. 8 (k))
Next, unnecessary portions of the power feeding layer 36 are removed by a so-called wet etching method using the copper (Cu) layer 40 and the tin (Sn) -silver (Ag) layer 39 as an etching mask. (See Fig. 8 (l))
At this time, the copper (Cu) layer constituting the power feeding layer 36 is removed by etching using, for example, an etching solution mainly containing hydrogen peroxide, and the titanium (Ti) layer is mainly containing hydrofluoric acid, for example. Etching is removed using the etching solution.

Next, heat treatment is performed to alloy the copper (Cu) 40 and the tin (Sn) -silver (Ag) layer 39, and the solder composed of tin (Sn) -silver (Ag) containing the copper (Cu). A lump 41 is formed. (See Fig. 9 (m))
The heat treatment is performed by heating to about 200 ° C. in a vacuum.

  The gas component contained in the solder lump 41 is removed by this heat treatment. Even if this processing is not performed, this processing is not necessary when a desired solder bump shape is finally obtained.

Thereafter, the solder lump 41 is subjected to a reflow heating process, and the solder lump 41 is shaped into a solder bump 41A having a substantially spherical shape (ball shape). (See Fig. 9 (n))
The reflow processing temperature is set to a temperature equal to or higher than the melting point of the solder lump 41. When the solder lump 41 is made of tin (Sn) -3.0 silver (Ag) -0.5 copper (Cu), the reflow heat treatment is performed at about 270 ° C.

  This reflow process may be performed in a reducing atmosphere such as formic acid (HCOOH) gas.

  As a result, on the electrode pad 32 disposed on the semiconductor substrate 31, a spherical solder bump 41A composed of tin (Sn) -silver (Ag) -copper (Cu) (solder ball, in this example, tin). (Sn) -3.0 silver (Ag) -0.5 copper (Cu)) is formed.

  As described above, in this embodiment, after the tin (Sn) -silver (Ag) layer 39 is formed by plating, the tin (Sn) -silver (Ag) layer 39 is added. Copper (Cu) 40, which is a metal, is deposited by sputtering or vapor deposition with a desired composition thickness after reflow heat treatment.

  Therefore, compared with the bump forming step according to the first example of the bump forming step by the conventional plating method, the deposition amount of copper (Cu) 40 which is a metal to be added to the tin (Sn) -silver (Ag) layer 39. The copper (Cu) layer 40 can be deposited with a uniform thickness on the tin (Sn) -silver (Ag) layer 38 while easily controlling the above.

  Further, as in the second example of the bump forming process by the conventional plating method, the cleaning process after the plating process is unnecessary in the method of forming the bump by performing the plating process a plurality of times.

  Furthermore, in this embodiment, spherical solder bumps (solder balls) made of three kinds of elements are formed. By applying a plurality of sputtering treatments or vapor deposition treatments, four or more kinds of elements are used. It is also possible to form a protruding electrode for external connection made of spherical solder bumps 41A (solder balls) composed of

  That is, according to the present embodiment, bumps made of alloys of various compositions are formed according to the required type and deposition amount, as long as the element can be formed by sputtering or vapor deposition. be able to.

  For example, by depositing and forming an aluminum (Al) layer having a predetermined thickness on the tin (Sn) -silver (Ag) layer 39 and reflowing these metals, tin (Sn) -2. Solder balls made of 0 silver (Ag) -0.1 aluminum (Al) can be formed.

  FIG. 10 shows a state in which the semiconductor element having the external connection protruding electrode formed of the spherical solder bump 41A formed in this manner is mounted on the circuit board. Here, in FIG. 10A, a portion surrounded by a dotted line is shown in an enlarged manner in FIG.

  The semiconductor element 70 in which the solder bump 41A made of tin (Sn) -silver (Ag) -copper (Cu) is formed on the semiconductor substrate 31 is supported by a flip-chip connection method as shown in FIG. It is mounted on a circuit board 80 to be a board.

  The circuit board 80 is formed by laminating a plurality of boards each having an insulating resin such as a glass epoxy resin as a base material and a wiring layer made of copper (Cu) or the like selectively disposed on the surface thereof. The circuit board 80 is also referred to as an interposer or a wiring board.

  On one main surface (upper surface) of the circuit board 80, a conductive layer 81 made of a copper (Cu) layer is selectively disposed. The conductive layer 81 is selectively covered with a solder resist layer 82 except for a region to which the solder bump 41 </ b> A formed on the semiconductor element 70 is connected. That is, the solder resist layer 82 defines a connection region with the semiconductor element 70 in the conductive layer 81.

A conductive layer is also selectively disposed on the other main surface (lower surface) of the circuit board 80, and the conductive layer is selectively covered with a solder resist layer and not covered with a solder resist layer. Convex-shaped external connection terminals mainly composed of solder are disposed at the locations. (Not shown)
A semiconductor element 70 in which spherical solder bumps 41A composed of tin (Sn) -silver (Ag) -copper (Cu) are formed on the upper surface of the circuit board 80 having such a structure is provided on its main surface (electronic circuit). Place (fixed surface) (face-down), and mount / fix.

  In this way, a semiconductor device in which the semiconductor element 70 in which the spherical solder bump 41A composed of tin (Sn) -silver (Ag) -copper (Cu) is formed on the circuit board 80 is flip-chip connected. 100 is formed.

2. Second Embodiment In the first embodiment, a copper (Cu) layer 40 is deposited on the tin (Sn) -silver (Ag) layer 39 and the photoresist layer 37a by sputtering. After the formation, the photoresist layer 37b is selectively placed on the copper (Cu) layer 40, and then the copper (Cu) layer 40 is selectively etched using the photoresist layer 37b as a mask, thereby the photoresist layer 37b. Then, unnecessary portions of the power feeding layer 36 are removed, and then heat treatment and reflow heat treatment are performed.

  However, the present invention is not limited to such an embodiment, and the following steps can be taken after the step shown in FIG.

  This is shown in FIG. 11 as a second embodiment. In FIG. 11, parts corresponding to those shown in FIGS. 6 to 9 are given the same reference numerals, and the description thereof is omitted.

  Also in the second embodiment, the same steps as those shown in FIGS. 6A to 7G are first performed.

  However, in the step shown in FIG. 6 (c), as the photoresist layer 37a formed on the entire surface of the power supply layer 36, one that can withstand the processing temperature in the annealing process described later is selected. For example, a dry film resist is used. Applied.

  After the step shown in FIG. 7 (g), annealing is first performed.

As a result, the copper (Cu) layer 40 deposited on the tin (Sn) -silver (Ag) layer 39, and the vicinity of the tin (Sn) -silver (Ag) layer 39 and the photoresist layer. The copper (Cu) layer 40 deposited on 37A diffuses into the tin (Sn) -silver (Ag) layer 38, and a solder lump 41 is formed. (See FIG. 11 (h ′))
As a result, a copper (Cu) layer 40 that is not integrated with the tin (Sn) -silver (Ag) layer 39 remains on the photoresist layer 37A.
Thereafter, the copper (Cu) layer 40 remaining on the photoresist layer 37A is removed by etching. (See FIG. 11 (i '))
Next, after removing the photoresist layer 37A using a stripping solution, unnecessary portions of the power feeding layer 36 are removed by a so-called wet etching method using the solder lump 41 as a mask. (See FIG. 11 (j ′))
As described above, the copper (Cu) layer constituting the power feeding layer 36 is removed by etching using, for example, an etching solution mainly containing hydrogen peroxide, and the titanium (Ti) layer is mainly made of hydrofluoric acid, for example. Etching is removed using an etchant as a component.

Thereafter, the solder layer 41 is melted by reflow heating, and the solder layer 41 is shaped into a substantially spherical shape. (See FIG. 11 (k ′))
As described above, a temperature equal to or higher than the melting point of the solder lump 41 is set. When the solder lump 41 is made of tin (Sn) -3.0 silver (Ag) -0.5 copper (Cu), the reflow heat treatment is performed at about 270 ° C. This reflow process may be performed in a reducing atmosphere such as formic acid (HCOOH) gas.

  As a result, on the electrode pad 32 disposed on the semiconductor substrate 31, a spherical solder bump 41A composed of tin (Sn) -silver (Ag) -copper (Cu) (solder ball, in this example, tin). (Sn) -3.0 silver (Ag) -0.5 copper (Cu)) is formed.

  As described above, also in the present embodiment, after the tin (Sn) -silver (Ag) layer 39 is formed by plating, the tin (Sn) -silver (Ag) layer 39 is added. Copper (Cu) 40, which is a metal, is deposited by a sputtering method so as to have a desired composition after the reflow heat treatment.

  Therefore, the same effects as those of the first embodiment can be obtained.

  Further, even in this embodiment, spherical solder bumps (solder balls) made of three kinds of elements are formed. By applying a plurality of sputtering treatments, it is made up of four or more kinds of elements. It is also possible to form external connection protruding electrodes made of spherical solder bumps 41A (solder balls).

  That is, according to the present embodiment, as long as the element can form a film by a sputtering method, bumps made of alloys of various compositions can be formed according to the required type and deposition amount. .

  The semiconductor element having the external connection protruding electrode formed of the spherical solder bump 41A formed in this manner is mounted on the circuit board 80 by the flip chip connection method, similarly to the configuration shown in FIG.

  Even in the present embodiment, as a method for depositing copper (Cu) 40, it is needless to say that a vapor deposition method can be applied instead of the sputtering method.

3. Third Embodiment In the first embodiment, electroplating is performed using the photoresist layer 37 a as a mask, and a tin (Sn) -silver (Ag) layer 39 is formed on the barrier metal layer 38. Then, a copper (Cu) layer 40 is deposited on the top surfaces of the tin (Sn) -silver (Ag) layer 39 and the photoresist layer 37a by sputtering.

  However, the present invention is not limited to such an embodiment, and the following steps can be taken after the step shown in FIG.

  This is shown as a third embodiment with the steps shown in FIGS. In FIGS. 12 and 13, parts corresponding to those shown in FIGS. 6 to 9 are given the same reference numerals, and the description thereof is omitted.

  Also in the third embodiment, the same steps as those shown in FIGS. 6A to 7F are first performed.

After the step shown in FIG. 7F, the photoresist layer 37a formed on the power feeding layer 36 is peeled off using a stripping solution. (See FIG. 12 (g ″))
Next, unnecessary portions of the power feeding layer 36 are removed by wet etching using the tin (Sn) -silver (Ag) layer 39 as an etching mask. (Refer to FIG. 12 (h ″))
As described above, the copper (Cu) layer constituting the power feeding layer 36 is removed by etching using, for example, an etching solution mainly containing hydrogen peroxide, and the titanium (Ti) layer is mainly made of hydrofluoric acid, for example. Etching is removed using an etchant as a component.

Thereafter, a copper (Cu) layer 40 is deposited on the entire upper surface of the tin (Sn) -silver (Ag) layer 39 and the upper surface of the surface protective film 35 by sputtering. (Refer to Fig. 12 (i "))
The film thickness of the copper (Cu) layer 40 is set to 200 nm, for example.

  That is, also in the present embodiment, the sputtering method is applied as a method for depositing and forming the second metal layer layer 40 made of copper (Cu).

  Therefore, copper (Cu), which is a metal to be added to the tin (Sn) -silver (Ag) layer 39, can be deposited with a uniform thickness while controlling its content.

  Further, the cleaning process that is necessary in the plating process is not required.

  In addition, as a deposition method of the copper (Cu) layer 40, a deposition method such as a vacuum deposition method can be applied instead of the sputtering method.

  Even with this deposition method, it is possible to deposit a uniform thickness while controlling the deposition amount of copper (Cu), which is a metal to be added to the tin (Sn) -silver (Ag) layer 39. it can. Also in this case, the cleaning process that is necessary in the plating process is not necessary.

Next, heat treatment is performed to alloy the copper (Cu) 39 and the tin (Sn) -silver (Ag) layer 39, and the solder composed of tin (Sn) -silver (Ag) containing the copper (Cu). A lump 41 is formed. (See FIG. 12 (j ″))
Next, the copper (Cu) layer 40 remaining on the upper surface of the surface protective film 35 is removed by etching. (See FIG. 13 (k ″))
Thereafter, the solder lump 41 is subjected to a reflow heating process, and the solder lump 41 is shaped into a solder bump 41A having a substantially spherical shape (ball shape). (See Fig. 13 (l "))
The reflow processing temperature is set to a temperature equal to or higher than the melting point of the solder lump 41. When the solder lump 41 is made of tin (Sn) -3.0 silver (Ag) -0.5 copper (Cu), the reflow heat treatment is performed at about 270 ° C.

  This reflow process may be performed in a reducing atmosphere such as formic acid (HCOOH) gas.

  As a result, on the electrode pad 32 disposed on the semiconductor substrate 31, a spherical solder bump 41A composed of tin (Sn) -silver (Ag) -copper (Cu) (solder ball, in this example, tin). (Sn) -3.0 silver (Ag) -0.5 copper (Cu)) is formed.

  As described above, even in the present embodiment, after the tin (Sn) -silver (Ag) layer 39 is formed by plating, the tin (Sn) -silver (Ag) layer 39 is added. Copper (Cu), which is a metal, is deposited by sputtering or vapor deposition with a desired composition thickness after the reflow heat treatment.

  Thereby, the same effects as those of the first embodiment can be obtained.

  Further, compared with the bump forming step according to the first example of the bump forming step by the conventional plating method, the deposition amount of copper (Cu) which is a metal to be added to the tin (Sn) -silver (Ag) layer 39 is increased. The copper (Cu) layer 40 can be deposited with a uniform thickness on the tin (Sn) -silver (Ag) layer 39 while being easily controlled.

  Further, as in the second example of the bump forming process by the conventional plating method, the cleaning process after the plating process is unnecessary in the method of forming the bump by performing the plating process a plurality of times.

  Furthermore, in this embodiment, spherical solder bumps (solder balls) made of three kinds of elements are formed. By applying a plurality of sputtering treatments or vapor deposition treatments, four or more kinds of elements are used. It is also possible to form a protruding electrode for external connection made of spherical solder bumps 41A (solder balls) composed of

  That is, even in the method of this embodiment, as long as it is an element that can form a film by sputtering, bumps made of alloys of various compositions are formed according to the required type and the amount of deposition. be able to.

  The semiconductor element provided with the protruding electrodes for external connection made of the spherical solder bumps 41A formed in this way is also mounted on the circuit board 80 by the flip chip connection method, similarly to the configuration shown in FIG.

  The embodiment of the present invention has been described above, but the present invention is not limited to the specific embodiment, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. Is possible.

  That is, in the embodiment of the present invention, a processing method for forming solder bumps on a semiconductor substrate has been described. However, the present invention is not limited to this, and the terminals or terminals on an arbitrary substrate can be used. The present invention can also be applied to a process for forming external connection protrusions made of solder bumps on a pad.

  For example, in a wiring board (also referred to as a circuit board or interposer) mainly composed of an insulating resin such as glass epoxy or ceramic, and at least a surface of which wiring / electrodes are disposed, solder is applied to the electrodes. The present invention can also be applied to the process of forming the external connection protruding electrode.

It is FIG. (1) which shows the 1st example of the bump formation process by the plating method. It is FIG. (2) which shows the 1st example of the bump formation process by the plating method. It is FIG. (The 3) which shows the 1st example of the bump formation process by the plating method. It is FIG. (1) which shows the 2nd example of the bump formation process by the plating method. It is FIG. (2) which shows the 2nd example of the bump formation process by the plating method. It is FIG. (1) which shows the formation method of the electrode for external connection which concerns on the 1st Embodiment of this invention. FIG. 6 is a diagram (No. 2) illustrating the method for forming the external connection electrode according to the first embodiment of the invention. It is FIG. (3) which shows the formation method of the electrode for external connection which concerns on the 1st Embodiment of this invention. It is FIG. (4) which shows the formation method of the electrode for external connection which concerns on the 1st Embodiment of this invention. It is a figure which shows the state which connected the semiconductor element provided with the electrode for external connection formed with the 1st Embodiment of this invention to the circuit board. It is a figure which shows the formation method of the electrode for external connection which concerns on the 2nd Embodiment of this invention. It is FIG. (1) which shows the formation method of the electrode for external connection which concerns on the 3rd Embodiment of this invention. It is FIG. (2) which shows the formation method of the electrode for external connection which concerns on the 3rd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 31 Semiconductor substrate 2, 32 Inorganic insulating film 3, 33 Electrode pad 4, 34 Surface protective film 6, 36 Feed layer 7, 37A, 37B Photoresist layer 8, 38 Barrier metal layer 9, 11, 39 Tin (Sn) -Silver (Ag) layer
10, 40 Copper (Cu) layer 9A, 12A, 41A Spherical solder bump

Claims (5)

Preparing a substrate to be processed with the conductor layer exposed on the surface;
Forming a first mask having a first opening exposing the conductor layer on a surface of the substrate to be processed;
Forming a first metal layer made of a first metal in the first opening by a plating process;
Forming a second metal layer made of a second metal on the first metal layer by a method different from the plating process;
Alloying the first metal layer and the second metal layer by heat treatment;
A method of forming an electrode comprising: The step of forming the second metal layer includes
Forming the second metal layer on the first mask and the first metal layer;
Forming a second mask on the second metal layer;
Etching the second metal layer using the second mask to leave the second metal layer only on the first metal layer;
The method of forming an electrode according to claim 1, comprising: The second metal layer is formed on the first mask and the first metal layer,
2. The method for forming an electrode according to claim 1, wherein the step of melting the first and second metal layers is performed while the second metal layer remains on the first mask. The step of forming the second metal layer includes
Removing the first mask;
Forming the second metal layer on the substrate to be processed and the first metal layer after removing the first mask;
2. The method for forming an electrode according to claim 1, comprising: The first metal includes tin (Sn) and silver (Ag),
The method for forming an electrode according to claim 1, wherein the second metal includes copper (Cu).

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