JP2009139474A - Optical waveguide circuit chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical waveguide circuit chip which has high mechanical strength in a chip end face by suppressing a warp around the chip end face while maintaining optical characteristics of an optical circuit, with a warp left in a part of the optical circuit, among warps due to difference in a thermal expansion coefficient between a substrate and a pattern layer, for the purpose of solving the following problems of a conventional optical waveguide circuit chip: cracks and fragments are likely to occur in a waveguide part or its end face when a reinforcement plate for thickness adjustment is stuck on the chip, causing a problem in mechanical strength; and since warp is forcedly suppressed by vacuum suction, a stress is imparted to the optical waveguide, which is apt to affect optical characteristics such as a transmission wavelength band or polarization dependency of an optical waveguide circuit. <P>SOLUTION: The optical waveguide circuit chip is characterized in that a groove is formed from an upper clad film to a substrate along the waveguide of an optical input/output waveguide circuit. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an optical waveguide circuit chip used in an optical communication system.

  With the rapid spread of the Internet, the amount of data distributed through communication networks has increased explosively. Correspondingly, in order to increase the communication capacity, a wavelength division multiplexing (WDM) communication system using a plurality of optical wavelengths has been put into practical use. Initially, wavelength multiplexing was performed at several wave levels, but at present, high-density wavelength multiplexing systems of 80 waves or more have come to be commercialized.

  In such a WDM system, in order to handle a large number of wavelengths, various optical functional parts such as a wavelength multiplexer / demultiplexer and an optical space switch have been increased in number of channels. In particular, silica-based optical waveguide circuit modules have low loss, can be manufactured with high density and high precision by microfabrication technology, and can be manufactured with high productivity and low cost. It has been.

  As an example, FIG. 22 shows a configuration example of an optical waveguide circuit module having a 1 × 8 splitter function, which is a main component of the optical functional component. Such a module is generally manufactured by attaching an optical fiber array component to an optical waveguide circuit chip and optically connecting them, and then fixing and integrating them with an adhesive.

  The optical waveguide circuit chip is usually manufactured as follows. For example, a silica-based glass particle for cladding and a silica-based glass particle for core are sequentially laminated to a desired thickness on a Si substrate by a flame deposition method (for example, see Patent Document 1), and then the whole is subjected to heat treatment. Then, the quartz glass fine particles of each layer are sintered to form a lower clad film and a core film of the quartz glass. Next, a desired optical circuit pattern is formed on the core film using photolithography and dry etching. Then, again, after depositing the silica glass fine particles for cladding on the exposed surface of the lower clad film by the flame deposition method and embedding the waveguide pattern in the silica fine glass particles for clad, the whole is subjected to heat treatment. Then, the clad silica glass fine particles are sintered to form an upper clad film of the silica glass.

Usually, when a clad film and a core film are formed by a flame deposition method, the clad glass is heated to a temperature near the melting point of the quartz glass (for example, about 1000 ° C. to 1300 ° C.) and then cooled to room temperature. The thermal expansion coefficient of the Si substrate is a value on the order of 10 ⁻⁶ , while the thermal expansion coefficient of the quartz-based glass is a value on the order of 10 ^−7. In the process, the Si substrate contracts relatively larger than the quartz glass. As a result, residual stress is generated in the Si substrate, and a convex warp is generated on the upper surface of the substrate.

Thereafter, the warp also remains in the optical waveguide circuit chip after the substrate is cut into chips, and the following problems arise when connecting the optical waveguide circuit chip and the optical fiber array component. In other words, the end portion of the waveguide exposed on the chip end face of the optical waveguide circuit chip is not aligned in a straight line due to the warp of the optical waveguide circuit chip. On the other hand, the axes of the optical fibers of the optical fiber array component are arranged in a straight line. For this reason, a number of channels in which the optical axes are shifted and connection loss increases are generated. In particular, the warpage of the optical waveguide circuit chip, which has not been a problem in the conventional small-scale optical waveguide circuit chip of about 8 channels, due to the progress of multi-channelization accompanying the recent enhancement of functionality and performance of the optical waveguide circuit chip. It is required to reduce the connection loss due to.
JP 58-105111 A Japanese Patent Laid-Open No. 7-27933 JP 2000-147307 A

  As a means for eliminating connection loss due to warping of an optical waveguide circuit chip, it is known to remove a silica-based clad layer other than the waveguide pattern from the substrate (for example, see Patent Document 2). FIG. 23 shows an optical waveguide circuit chip described in Patent Document 2. FIG. 23A shows a top view of the chip, and FIG. 23B shows a cross-sectional view taken along the line A-A ′ of FIG. In the optical waveguide circuit chip of FIG. 23, the warp of the optical waveguide circuit chip is eliminated by removing the silica-based clad layer other than the waveguide pattern from the substrate.

  Normally, when connecting an optical fiber array component and an optical waveguide circuit chip, a reinforcing plate for adjusting the thickness is attached on the optical waveguide circuit chip so that the thickness of the connection surface is substantially equal to the thickness of the optical fiber array component. As a result, the adhesive strength is improved. However, in the optical waveguide circuit chip disclosed in Patent Document 2, only about 70 μm width of the peripheral portion of the waveguide is left with silica glass, so that the thickness is adjusted when the optical waveguide circuit chip is cut out or on the optical waveguide circuit chip. When a reinforcing plate is applied, cracks and chips are likely to occur in the waveguide portion and the waveguide end face, and there is a problem in mechanical strength.

  As another means for eliminating the connection loss due to the warp of the optical waveguide circuit chip, it is known to attach a reinforcing plate while forcibly correcting the warp (see, for example, Patent Document 3). FIG. 24 shows a schematic diagram of an optical waveguide circuit module described in Patent Document 3. As shown in FIG. In this invention, the optical waveguide circuit chip is placed on the vacuum chuck, vacuum suction is performed, and the warp of the optical waveguide circuit chip is corrected, and the reinforcing plate 905 is attached and fixed to the entire upper surface of the optical waveguide circuit chip. This suppresses the warp of the optical waveguide circuit chip.

  However, in an optical circuit in which a λ / 2 wavelength plate needs to be inserted on the optical waveguide, or an optical circuit in which electrical wiring is formed on the optical waveguide and power is supplied to the electrical wiring from the upper surface of the chip, this method is used. Tip warping cannot be corrected. Further, since the warping is forcibly suppressed by vacuum suction, there is a problem that stress is applied to the optical circuit and optical characteristics such as the transmission wavelength band and polarization dependency of the optical circuit are likely to be affected.

  Therefore, in order to solve such a problem, the present invention provides a technique for maintaining the optical characteristics of the optical circuit while maintaining the optical characteristics of the optical circuit while maintaining the optical characteristics of the warp due to the difference in thermal expansion coefficient between the substrate and the pattern layer. An object of the present invention is to provide an optical waveguide circuit chip that can suppress warping and has high mechanical strength at the end face of the chip.

  In order to achieve the above object, the optical waveguide circuit chip according to the present invention is characterized in that a groove is formed from the upper clad film toward the substrate along the waveguide of the input / output waveguide circuit.

  Specifically, the optical waveguide circuit chip according to the present invention is an optical waveguide chip comprising a planar substrate and a pattern layer stacked on one surface of the substrate and including an optical circuit, At least part of the light input / output of the circuit is performed at the end of the light input / output waveguide circuit formed in the pattern layer up to the chip end surface, and the pattern layer includes a lower clad film on the substrate surface, A core film formed in a planar shape on the lower clad film; and an upper clad film formed on the core film and on a portion of the lower clad film where the core film is not formed; And a groove from the upper clad film side disposed so as to exist on both sides of the waveguide included in the optical input / output waveguide circuit formed up to the chip end face.

  Occurred during the sintering process due to the difference in thermal expansion coefficient between the substrate and the pattern layer by providing a groove between the waveguide of the optical input / output waveguide circuit arranged near the chip end face of the optical waveguide circuit chip Residual stress can be released by the groove, and the warpage of the substrate in the vicinity of the chip end face can be suppressed. Also, since the groove is formed, the mechanical strength of the chip end face can be maintained, and when the optical waveguide circuit chip is cut out or when a reinforcing plate for thickness adjustment is pasted on the optical waveguide circuit chip, Cracks and chips are unlikely to occur on the end face of the waveguide. On the other hand, in the optical circuit portion, the substrate remains covered with the clad, the residual stress is maintained, and the fluctuation of the stress applied to the optical circuit is small.

  Therefore, the present invention can suppress the warpage of the chip end face while maintaining the optical characteristics of the optical circuit while leaving the warp of the optical circuit portion out of the warp due to the difference in thermal expansion coefficient between the substrate and the pattern layer. It is possible to provide an optical waveguide circuit chip having a high mechanical strength.

  Further, since the connection strength with the optical fiber array component is high and the stress fluctuation to the optical circuit is small, it is possible to realize a low-loss and stable optical waveguide circuit module with little axial deviation over a long period of time.

  The groove of the optical waveguide circuit chip according to the present invention is characterized in that it is separated from the chip end surface including the end of the optical input / output waveguide circuit of the pattern layer. Since the groove is formed on the inner side of the end face of the optical waveguide circuit chip, the mechanical strength is further increased, and cracking and chipping due to chipping of the end face of the chip can be prevented when cutting from the substrate.

  The groove of the optical waveguide circuit chip according to the present invention has a depth reaching the substrate. The amount of warpage can be reduced most.

  The optical waveguide circuit chip according to the present invention further includes a resin filled in the groove up to a height of a surface of the upper clad film and adjusted to have a thermal expansion coefficient substantially equal to that of the substrate. By filling the groove with resin, the bonding area is increased when the thickness adjusting substrate and the optical waveguide circuit chip are bonded together, and the bonding strength is increased. For this reason, an optical waveguide chip excellent in long-term reliability can be obtained.

  The optical waveguide circuit chip according to the present invention has protrusions on one surface at intervals of the grooves, the protrusions are fitted into the grooves, and one side surface is the optical input / output waveguide of the pattern layer. It further comprises a reinforcing plate disposed on the edge of the pattern layer so as to be in the same plane as the chip end surface including the end portion of the circuit. When the optical waveguide circuit chip and the thickness adjustment reinforcing plate are bonded together, it is possible to reduce minute bubbles mixed in the adhesive, increase the adhesive strength, and realize an optical waveguide chip with excellent long-term reliability. be able to.

  ADVANTAGE OF THE INVENTION According to this invention, the curvature of a chip end surface can be suppressed, maintaining the optical characteristic of an optical circuit, leaving the curvature of the part of an optical circuit among the curvature by the difference of the thermal expansion coefficient of a board | substrate and a pattern layer, and a chip end surface An optical waveguide circuit chip with high mechanical strength can be provided.

  Embodiments of the present invention will be described with reference to the accompanying drawings. The embodiments described below are examples of the present invention, and the present invention is not limited to the following embodiments. In the present specification and drawings, the same reference numerals denote the same components.

  In the following examples, silicon is used as a substrate, quartz glass material is used as a waveguide material, and borosilicate glass is used as a reinforcing plate for thickness adjustment.However, the present invention is not limited to these, for example, A quartz substrate, a ceramic substrate, a semiconductor substrate, an organic material substrate, or the like can be used as the substrate, and a ceramic material, a semiconductor material, an organic material, or the like can be used as the waveguide material. In the following examples, a flame deposition method is used as a method for producing an optical waveguide. However, the present invention is not limited to these, and various methods such as a sputtering method, a vapor phase method (CVD method), or a sol-gel method are used. This method can be used.

(Embodiment 1)
FIG. 1 is an external view of an optical waveguide circuit module 301 when a 16-channel wavelength-independent coupler (hereinafter, abbreviated as 16ch-WINC) is applied to the optical waveguide circuit chip 1 of the present embodiment. is there. The optical waveguide circuit module 301 includes an optical waveguide circuit chip 1, a tape-shaped optical fiber core wire 2, a grooved substrate 3, a pressing lid 4, an optical fiber array component 5, and a thickness adjusting reinforcing plate 6. In FIG. 1, reference numeral 1 a denotes a chip end face of the optical waveguide circuit chip 1.

  FIG. 2 is a top view of an optical waveguide circuit chip 1-1 that is an example of the optical waveguide circuit chip 1 of the present embodiment. FIG. 3 is a sectional view taken along the line A-A ′ of the optical waveguide circuit chip 1-1 in FIG. 2. FIG. 4 is a cross-sectional view taken along line B-B ′ of the optical waveguide circuit chip 1-1 in FIG. 2. FIG. 5 is a sectional view taken along line C-C ′ of the optical waveguide circuit chip 1-1 in FIG. 2. FIG. 6 is a sectional view taken along line D-D ′ of the optical waveguide circuit chip 1-1 in FIG. 2.

  The optical waveguide circuit chip 1-1 is laminated on a planar substrate 13 and one surface of the substrate 13, and the optical circuit 101 and the optical circuit 101 are connected to the chip end surface 1a to input / output light of the optical circuit 101. And a pattern layer 25 including an optical input / output waveguide circuit 111 that performs at the end portion of the chip end surface 1a. The pattern layer 25 includes a lower clad film 14a on the surface of the substrate 13, and the optical circuit 101 includes a lower clad film. A core film 15 formed flat on 14a, an upper clad film 14b formed on the core film 15 and a portion of the lower clad film 14a where the core film 15 is not formed, and an optical input / output waveguide And a groove 16 from the upper clad film 14b side, which is disposed so as to exist on both sides of the waveguide included in the circuit 111.

  The substrate 13 is a Si substrate having a thickness of 1 mm. In FIG. 2, the substrate 13 is not shown because it is hidden behind the upper clad film 14b. The thickness of the lower cladding film 14a is 30 [μm], and the thickness of the upper cladding film 14b is 30 [μm]. The core film 15 is patterned and surrounded by the lower clad film 14a and the upper clad film 14b and functions as the core of the optical waveguide. The cross-sectional size of the patterned core film 15 is 7 [μm] × 7 [μm]. The relative refractive index difference between the lower cladding film 14a and the upper cladding film 14b of the core film 15 is 0.75 [%].

  The optical circuit 101 of the optical waveguide circuit chip 1-1 has a set of configurations in which an optical directional coupler 11a and an optical directional coupler 11b having different coupling rates are connected by two waveguides 12a and 12b. It is a WINC circuit. The optical waveguide circuit chip 1-1 is a 16ch-WINC chip in which 16 sets of the WINC circuits are arranged in parallel at intervals of 500 μm. By designing the waveguide 12a to be longer than the waveguide 12b by about 0.25 [μm] corresponding to a quarter wavelength (λ = 1.55 [μm]) in quartz glass, the wavelength dependence of the branching ratio is independent. Has been realized.

  The groove 16 is formed between the waveguides 121 constituting the optical input / output waveguide circuit 111. The groove 16 is a groove having a length of 5 mm from the chip end surface 1a and a depth at which the substrate 13 is exposed, that is, 60 [μm]. The groove 16 has a groove width of 220 [μm] so as not to affect the electromagnetic field distribution of the propagating light, leaving a clad in the confinement region of the optical power spreading to the outside of the waveguide.

  The optical waveguide circuit chip 1-1 was produced as follows. First, up to the upper clad film 14b is formed on the substrate 13 by a known manufacturing method described in the background art. Next, the grooves 16 are formed only between the waveguides 121 of the optical input / output waveguide circuit 111 using photolithography and dry etching. In this embodiment and the following embodiments, photolithography and dry etching are used to form the grooves. However, the present invention is not limited to this, and various methods such as sandblasting and dicing are used. It is possible.

  Warpage in the upper surface direction in the vicinity of the chip end surface 1a was measured with a stylus type surface shape measuring instrument. When the warp was expressed by a radius of curvature, the radius of curvature was 3 [m] before the formation of the groove 16, but the radius of curvature was 10 [m] after the formation of the groove 16. This indicates that the warpage is extremely small by the formation of the groove 16. Further, due to the formation of the groove 16, the positional deviation in the thickness direction of the substrate 13 is also reduced at the end portion of the optical input / output waveguide circuit 111 exposed on the chip end surface 1 a. Specifically, in the thickness direction of the substrate 13, the center position of the waveguide 121 at both ends of the waveguide 121 on the chip end face 1a and the center position of the waveguide 121 at the center of the waveguide 121 on the chip end face 1a. The difference was 1.5 [μm] before the formation of the groove 16, but decreased to 0.4 [μm] after the formation of the groove 16.

  Further, after the thickness adjusting reinforcing plate 6 shown in FIG. 1 was attached and fixed to the optical waveguide circuit chip 1 with an ultraviolet curable adhesive, the optical end polishing of the chip end surface 1 a of the optical waveguide circuit chip 1 was performed. Finally, the optical waveguide circuit chip 1 and the optical fiber array component 5 were connected. When connecting, the optical fiber array component 5 is aligned while the amount of light emitted from the optical fiber on the output side is monitored while the amount of light emitted from the optical fiber on the output side is monitored. Fixed with. The connection loss of each port of the optical waveguide circuit module 301 manufactured in this way was as low as 0.5 dB and uniform, and the variation in connection loss was a good value of 0.1 dB or less.

  As shown in the present embodiment, by forming the groove 16 between the waveguides 121, the warpage in the vicinity of the chip end face 1a can be reduced. In order to form the groove 16 in an optical waveguide circuit chip having another optical circuit, it is necessary to confirm the warpage in more detail. Therefore, a new simulation chip for warpage evaluation was produced, and the amount of warpage of the optical waveguide circuit chip when the length or depth of the groove was changed was clarified in detail.

  FIG. 7 is a top view of the simulation chip 201 for warpage evaluation. 8 and 9 are cross-sectional views taken along the line A-A 'of the warp evaluation simulation chip 201 of FIG. The thicknesses of the lower clad film 14a, the upper clad film 14b, and the core film 15 of the warp evaluation simulated chip 201 are the same as those of the optical waveguide circuit chip 1-1 described in FIG. It was evaluated how the warpage amount in the vicinity of the chip end surface 201a of the simulation tip for warpage evaluation 201 changes depending on the length L of the groove 16 and the depth H of the groove 16 in the simulation tip 201 for warpage evaluation.

  The chip size of the warp evaluation simulated chip 201 was 12 [mm] in width and 30 [mm] in length. The optical circuit and the optical input / output waveguide circuit of the simulation chip 201 for warpage evaluation are a straight waveguide 17 for simplicity. The straight waveguide 17 penetrates linearly from one chip end surface 201a to the other chip end surface 201a. In the simulation chip 201 for warpage evaluation, 32 straight waveguides 17 are arranged at intervals of 250 [μm].

  Further, grooves 16 are respectively provided between the linear waveguides 17 in the vicinity of the chip end surface 201a. The width of the groove 16 is 200 [μm]. Two kinds of simulation chips 201 for warpage evaluation, in which the depth H of the groove 16 is 50 [μm] and 60 [μm], were produced. FIG. 8 is a cross-sectional view when the depth H of the groove 16 is 60 [μm]. FIG. 9 is a cross-sectional view when the groove depth H is 50 [μm].

  Furthermore, six types of simulation chips 201 for warpage evaluation in which the length L of the groove 16 is 0, 0.5, 1, 2, 5, 15 [mm] were produced. When the length L of the groove 16 is 15 [mm], the groove 16 is formed from one chip end surface 201a to the other chip end surface 201a. Since the other schematic configuration and manufacturing procedure are the same as those of the optical waveguide circuit chip 1, detailed description thereof is omitted.

  The warpage in the vicinity of the chip end surface 201a of the simulated chip 201 for warpage evaluation was measured. The amount of warpage was measured by a stylus type surface shape measuring instrument, and the surface of the simulation tip 201 for warpage evaluation inside 0.5 [mm] from the tip end surface 201 a was measured in the thickness direction of the substrate 13. The scanning distance was set to 9 [mm] in the width direction of the warp evaluation simulation chip 201.

  FIG. 10 is a measurement result showing the relationship between the warpage amount of the simulation tip 201 for warpage evaluation and the length L of the groove 16. (A-1) shows the case where the depth H of the groove 16 is 50 [μm], and (a-2) shows the case where the depth H of the groove 16 is 60 [μm]. The warpage amount of the simulation tip 201 for warpage evaluation was 3.5 [μm] before the groove formation, but the warpage amount becomes smaller as the length L becomes longer. When L = 15 [mm], the warpage of the chip end face is reduced. The warpage was almost zero. It was also found that a sufficient warp reduction effect can be obtained even when the depth H is 50 [μm]. For example, when the length L = 5 [mm], the amount of warpage is 1.5 [μm], and the variation in connection loss when connected to a 32-core fiber array component with an interval of 250 [μm] is 0.2 [dB]. It was a good value as follows.

  FIG. 11 shows measurement results showing the relationship between the warpage amount of the simulation tip 201 for warpage evaluation and the depth H of the groove 16. (B-1) shows the case where the length L of the groove 16 is 15 [mm], and (b-2) shows the case where the length L of the groove 16 is 5 [mm]. In both cases, the amount of warpage decreases linearly as the depth H of the groove 16 increases. When the depth of the groove 16 is equal to the thickness of the pattern layer 25, the amount of warpage is reduced most.

  As apparent from FIGS. 10 and 11, by combining the length L of the groove 16 and the depth H of the groove 16, the amount of warpage can be suppressed regardless of the type of the optical circuit of the optical waveguide circuit chip. Yes, it is possible to suppress the variation in connection loss between the optical waveguide circuit chip and the fiber array component to an allowable amount. Therefore, the optical waveguide circuit chip according to the present invention has a high degree of design freedom, and it is necessary to insert a λ / 2 wavelength plate on the optical waveguide, or an electric wiring is formed on the optical waveguide to form the upper surface of the chip. Even in an optical circuit that feeds power to the electrical wiring from the optical waveguide circuit chip, the warp of the optical waveguide circuit chip can be corrected.

  Since the optical waveguide circuit chip of the embodiment described below is the same as the optical waveguide circuit chip 1-1 except for the specific description, detailed description of the configuration and manufacturing procedure of the chip and module will be omitted.

(Embodiment 2)
FIG. 12 is a top view of an optical waveguide circuit chip 1-2 which is another example of the optical waveguide circuit chip 1 of the present embodiment. The optical circuit 102 of the optical waveguide circuit chip 1-2 is a 16ch-WINC chip like the optical waveguide circuit chip 1-1 of FIG. The groove 16 of the optical waveguide circuit chip 1-2 is characterized by being separated from the chip end surface 1a including the end of the optical input / output waveguide circuit 111 of the pattern layer 25. The groove 16 is formed from a position 1 [mm] inside from the chip end surface 1a of the optical waveguide circuit chip 1-2.

  The warpage in the vicinity of the chip end face 1a of the optical waveguide circuit chip 1-2 was measured. When the warp was expressed by a radius of curvature, the warp after forming the groove 16 was a radius of curvature of 7 [m]. Specifically, in the thickness direction of the substrate 13, the center position of the waveguide 121 at both ends of the waveguide 121 on the chip end face 1a and the center position of the waveguide 121 at the center of the waveguide 121 on the chip end face 1a. The difference was as small as 0.9 [μm]. As shown in FIG. 1, loss evaluation was performed on an optical waveguide circuit module to which the optical fiber array component 5 was connected. The dispersion of the connection loss of each port of the optical waveguide circuit module was also small and good at 0.4 [dB] or less.

  Since each groove 16 is formed on the inner side of the chip end surface, the mechanical strength is enhanced, and when the optical waveguide circuit chip 1-2 is cut out with a dicing saw, the chip end surface 1a is prevented from being cracked or chipped. Can do. Further, since it is not necessary to protect the vicinity of the chip end surface 1a in order to prevent cracking due to chipping of the chip end surface 1a, a process for protecting the groove 16 is unnecessary, and the manufacturing time can be shortened.

  As shown in the present embodiment, the groove 16 is formed on the inner side of the chip end face, so that the workability at the time of cutting and the chip handleability are facilitated, and the warpage near the chip end face can be reduced to a practically sufficient level. In addition, connection loss and their variation could be suppressed.

(Embodiment 3)
FIG. 13 is a top view of an optical waveguide circuit chip 1-3 which is another example of the optical waveguide circuit chip 1 of the present embodiment. The optical circuit 103 of the optical waveguide circuit chip 1-3 is a 16ch-WINC chip like the optical waveguide circuit chip 1-1 of FIG. The difference between the optical waveguide circuit chip 1-3 and the optical waveguide circuit chip 1-1 is that, in the optical waveguide circuit chip 1-3, the waveguide 121 of one optical input / output waveguide circuit 111 reaches the chip end surface 1a. In other words, the end of the waveguide 121 of the optical input / output waveguide circuit 111 is connected to the optical element 23.

  The optical element 23 is, for example, a light receiving element, a light emitting element, or an optical path changing element. The light receiving element is, for example, a photodiode. The light emitting element is, for example, a laser diode. The optical path conversion element is, for example, a mirror. When the optical element 23 is a light receiving element, the optical waveguide circuit chip 1-3 receives light input from the optical input / output waveguide circuit 111 and propagated through the optical circuit 103 and the optical input / output waveguide circuit 113 by the optical element 23. can do. When the optical element 23 is a light-emitting element, the optical waveguide circuit chip 1-3 outputs light output from the optical element 23 and propagated through the optical input / output waveguide circuit 113, the optical circuit 103, and the optical input / output waveguide circuit 111. It can output from the end surface 1a. When the optical element 23 is an optical path conversion element, the optical waveguide circuit chip 1-3 receives the optical axis of the light input from the optical input / output waveguide circuit 111 and propagated through the optical circuit 103 and the optical input / output waveguide circuit 113. The direction can be changed by the element 23 and output perpendicular to the surface of the upper clad film 14b.

  The optical waveguide circuit chip 1-3 can suppress warpage in the vicinity of the chip end surface 1a on the optical input / output waveguide circuit 111 side, similarly to the optical waveguide circuit chip 1-1 in FIG. On the other hand, since no optical fiber array component is connected to the chip end surface 1a on the side of the optical input / output waveguide circuit 113, it is not necessary to suppress warpage in the vicinity of the chip end surface 1a, and the groove 16 is not formed.

(Embodiment 4)
FIG. 14 is a top view of an optical waveguide circuit chip 1-4 that is another example of the optical waveguide circuit chip 1 of the present embodiment. The optical circuit 104 of the optical waveguide circuit chip 1-4 is a 1 × 32 optical splitter. The optical input / output waveguide circuit 114-1 and the optical input / output waveguide circuit 114-2 are connected to both sides of the optical circuit 104. The optical input / output waveguide circuit 114-1 is composed of a single waveguide 131. The optical input / output waveguide circuit 114-2 is composed of 32 waveguides 121. The grooves of the optical waveguide circuit chip 1-4 are composed of grooves 16a and 16b having different lengths, and are provided only on the output side.

  The groove 16a and the groove 16b have the same width and depth as the groove 16 of the optical waveguide circuit chip 1-1 described in FIG. The groove 16a and the groove 16b are formed between the waveguide 121 and the waveguide 121 of the optical input / output waveguide circuit 114-2. The grooves 16a and 16b are alternately formed on the chip end surface 1a on the output side of the optical waveguide circuit chip 1-4. The groove 16a extends from the fifth-stage Y branch to the chip end face 1a side, and its length L is 2.5 [mm]. The groove 16b extends from the fourth Y branch to the chip end face 1a side, and its length L is 6 [mm]. There is one waveguide 131 on the input side, and the increase in connection loss due to the influence of warpage is small, and no groove is provided on the input side.

  The warpage in the vicinity of the chip end surface 1a of the optical waveguide circuit chip 1-4 was measured. When the warp was expressed by a radius of curvature, the warp after forming the groove 16 was a radius of curvature of 10 [m]. Specifically, in the thickness direction of the substrate 13, the center position of the waveguide 121 at both ends of the waveguide 121 on the chip end face 1a and the center position of the waveguide 121 at the center of the waveguide 121 on the chip end face 1a. The difference was 0.4 [μm]. Loss evaluation was performed with an optical waveguide circuit module (1 × 32 optical splitter module) to which the optical fiber array component 5 was connected as shown in FIG. The variation in connection loss of each port of the optical waveguide circuit module was also reduced to 0.1 [dB] or less.

  As shown in this embodiment, even when a plurality of types of grooves whose length L of the groove 16 is not constant are combined, the warpage of the chip end surface 1a is reduced. For this reason, even when the linear portion of the optical input / output waveguide circuit cannot be elongated due to the design of the optical waveguide circuit chip, a groove longer than the optical input / output waveguide circuit can be formed. This can suppress the amount of warpage regardless of the type of the optical circuit of the optical waveguide circuit chip, and the degree of freedom in designing the optical waveguide circuit chip is improved.

(Embodiment 5)
FIG. 15 is a top view of an optical waveguide circuit chip 1-5 that is another example of the optical waveguide circuit chip 1 of the present embodiment. The optical circuit 105 of the optical waveguide circuit chip 1-5 is a 1 × 32 channel arrayed waveguide grating (Arrayed Waveguide Grating, hereinafter abbreviated as AWG) having a wavelength division function with a frequency interval of 100 GHz. The AWG is composed of one input side waveguide and 32 output side waveguides. The optical input / output waveguide circuit 115-1 and the optical input / output waveguide circuit 115-2 are connected to both sides of the optical circuit 105. The optical input / output waveguide circuit 115-1 is composed of a single waveguide 131. The optical input / output waveguide circuit 115-2 includes 32 waveguides 121.

  The groove 16 is formed between the waveguide 121 and the waveguide 121 of the optical input / output waveguide circuit 115-2. The output-side waveguide interval is 250 [μm]. The groove 16 was formed from the chip end face 1a on the output side of the optical waveguide circuit chip 1-5, and the length L was 5 [mm]. There is one waveguide 131 on the input side, and the increase in connection loss due to the influence of warpage is small, and no groove is provided on the input side.

  In order to eliminate the polarization dependence, the optical waveguide circuit chip 1-5 was cut out, and then a λ / 2 wavelength plate 18 was inserted into the central portion of the arrayed waveguide.

  The warpage in the vicinity of the chip end face 1a of the optical waveguide circuit chip 1-5 was measured. When the warp was expressed by a radius of curvature, the warp after forming the groove 16 was a radius of curvature of 10 [m]. Specifically, in the thickness direction of the substrate 13, the center position of the waveguide 121 at both ends of the waveguide 121 on the chip end face 1a and the center position of the waveguide 121 at the center of the waveguide 121 on the chip end face 1a. The difference was as small as 0.4 [μm]. Loss evaluation was performed with an optical waveguide circuit module (AWG module) to which the optical fiber array component 5 was connected as shown in FIG. The variation in connection loss at each port of the optical waveguide circuit module was also reduced to 0.1 [dB] or less.

  In general, characteristics such as PDL and PDλ change due to a change in stress applied to an optical circuit including an AWG. Here, PDL is a loss difference in light output power when TE light is input or TM light is input. PDλ is a difference in peak wavelength of light emission power when TE light is input or when TM light is input. In the optical circuit 105, no change in PDL and PDλ was observed with or without the groove 16. This means that the stress applied to the optical circuit 105 was not changed by the formation of the groove 16.

(Embodiment 6)
FIG. 16 is a top view of an optical waveguide circuit chip 1-6 that is another example of the optical waveguide circuit chip 1 of the present embodiment. Since the optical circuit 106 of the optical waveguide circuit chip 1-6 realizes the wavelength division function / multiplexing function of 1 × 32 channels at a frequency interval of 100 GHz simultaneously and independently, 2 × 1 × 32 DEMUX type and 32 × 1 MUX type 2 It is configured by combining AWGs. The optical input / output waveguide circuit 116-1 and the optical input / output waveguide circuit 116-2 are connected to both sides of the optical circuit 106. The optical input / output waveguide circuit 116-1 and the optical input / output waveguide circuit 116-2 are configured by one waveguide 131 and 32 waveguides 121.

  For this reason, there are 33 input-side waveguides and output-side waveguides in the optical waveguide circuit chip 1-6. Further, the chip end face 1a is divided into a region of the waveguide 121 and a region of the waveguide 131, and the groove 16 is also formed mainly in the two regions.

  The groove 16 is formed between the waveguide 121 and the waveguide 121 and on both sides of the waveguide 131. The waveguide interval of the waveguide 121 is 250 [μm]. The groove 16 was formed from the chip end surface 1a, and the length was 5 [mm]. Further, λ / 2 wavelength plates 18a and 18b were inserted in the same manner as the optical waveguide circuit chip 1-5 shown in FIG.

  The warpage of the chip end face 1a of the optical waveguide circuit chip 1-6 in the vicinity of the waveguide 121 was measured. When the warp was expressed by a radius of curvature, the warp after forming the groove 16 was a radius of curvature of 10 [m]. Specifically, in the thickness direction of the substrate 13, the center position of the waveguide 121 at both ends of the waveguide 121 on the chip end face 1a and the center position of the waveguide 121 at the center of the waveguide 121 on the chip end face 1a. The difference was as small as 0.4 [μm]. In addition, the formation of the groove 16 did not cause deterioration in characteristics of the optical circuit 106 such as PDL and PDλ.

  Since a wave plate or the like is attached to the upper surface like the optical waveguide circuit chip 1-5 in FIG. 15 and the optical waveguide circuit chip 1-6 in FIG. 16, a reinforcing plate cannot be stretched over the entire optical waveguide circuit chip. Even in this case, it is possible to suppress variations in connection loss between the optical waveguide circuit chip and the optical fiber array component without deteriorating circuit characteristics.

  In FIG. 16, the groove 16 is formed mainly in the region of the waveguide 121 and the region of the waveguide 131 in the vicinity of the chip end surface 1a, and no groove is provided between the regions. It is not limited to. For example, as shown in FIG. 17, the warpage in the vicinity of the chip end surface 1a can be further reduced by forming the groove 16 in the vicinity of the chip end surface 1a without any gap. Further, for example, as shown in FIG. 18, the adhesive strength with the thickness adjusting reinforcing plate 6 can be sufficiently secured, or within a range that does not adversely affect the optical signal power propagating through the core and the surrounding clad portion, The amount of warpage of the chip end surface 1a can also be reduced by providing the groove 16c having a width or length different from that of the groove 16 in the clad portion where the waveguide does not exist.

(Embodiment 7)
In order to manufacture the optical waveguide circuit module 301 of FIG. 1, after manufacturing the optical waveguide circuit chip 1 as described in the first to sixth embodiments, the optical waveguide circuit chip 1 and the optical fiber array component 5 are securely connected. In order to connect and fix to the optical waveguide circuit chip, there is a step of attaching the thickness adjusting reinforcing plate 6 to the surface of the optical waveguide circuit chip near the chip end face 1a with an ultraviolet curable adhesive. However, if the number of the grooves 16 provided in the pattern layer 25 in the vicinity of the chip end surface 1a is large, the adhesion area between the thickness adjusting reinforcing plate 6 and the surface of the optical waveguide circuit chip 1 is reduced, and the adhesive force is lowered. Then, the Example which improves this adhesive force fall is described next. The optical waveguide circuit chip 1 described in this example may be any of the optical waveguide circuit chip 1-1 to the optical waveguide circuit chip 1-6 described in the first to sixth embodiments.

  FIG. 19 is a cross-sectional view in the vicinity of the chip end face 1a of the optical waveguide circuit chip 1 to which the thickness adjusting reinforcing plate 6 is bonded. The optical waveguide circuit chip 1 further includes a resin 19 that fills the groove 16 to the height of the surface of the upper clad film 14 b and is adjusted to have a thermal expansion coefficient substantially equal to that of the substrate 13.

  The groove 16 formed in the pattern layer 25 in the vicinity of the chip end surface 1a is coated and filled with a low thermal expansion resin 19 having a small volume variation with respect to a change in environmental temperature, cured, and then the surface is polished and flattened. Turned into. The resin 19 desirably has a thermal expansion coefficient substantially equal to that of the substrate 13. Since the amount of expansion with the substrate is equal, durability against changes in environmental temperature can be enhanced. Thereafter, the thickness adjusting substrate 6 is attached and fixed to the optical waveguide circuit chip 1 with an ultraviolet curable adhesive 20.

  Thus, by filling the resin 19, the bonding area between the thickness adjusting substrate 6 and the optical waveguide circuit chip 1 is widened, and the bonding strength is increased. Furthermore, since the volume of the resin 19 is small with respect to changes in the environmental temperature, the optical waveguide module 301 having excellent long-term reliability can be obtained.

  The resin filling the grooves 16 is preferably an ultraviolet curable resin, but is not limited to this, and may be a thermosetting resin or a two-component mixed resin.

(Embodiment 8)
FIG. 20 is an assembly work diagram for attaching the reinforcing plate 21 to the optical waveguide circuit chip 1. FIG. 21 is a cross-sectional view of the vicinity of the chip end surface 1a of the optical waveguide circuit chip 1 to which the reinforcing plate 21 is attached. The reinforcing plate 21 has protrusions 31 at intervals of the grooves 16 on one surface. In the optical waveguide circuit chip 1, the protrusion 31 of the reinforcing plate 21 is fitted into the groove 16, and one side surface of the reinforcing plate 21 is flush with the chip end surface 1 a including the end of the optical input / output waveguide circuit of the pattern layer 25. The reinforcing plate 21 is arranged on the edge of the pattern layer 25 as shown in FIG. The optical waveguide circuit chip 1 of FIGS. 20 and 21 uses a comb-shaped reinforcing plate as the reinforcing plate 21. The reinforcing plate 21 can be substituted for the thickness adjusting reinforcing plate 6 of FIG. The optical waveguide circuit chip 1 described in this example may be any of the optical waveguide circuit chip 1-1 to the optical waveguide circuit chip 1-6 described in the first to sixth embodiments.

  As shown in FIG. 20, the reinforcing plate 21 is formed with a protrusion 31 that fits into the groove 16 formed in the pattern layer 25 in the vicinity of the chip end surface 1a. The protrusion 31 of the reinforcing plate 21 was fitted into the groove 16 and fixed with the ultraviolet curable adhesive 20.

  As described above, when the protrusion 31 is fitted in the groove 16, minute bubbles mixed in the ultraviolet curable adhesive 20 can be reduced, and the adhesive strength is increased. Therefore, the optical waveguide module 301 excellent in long-term reliability can be obtained.

  An optical waveguide circuit chip having a groove on the chip end surface does not require an external force to eliminate warpage in the manufacturing process, so an optical waveguide circuit chip in which a λ / 2 wavelength plate is inserted on the optical circuit or an electrical circuit on the optical circuit The present invention can also be applied to an optical waveguide circuit chip that forms wiring.

It is a figure which shows the optical waveguide circuit module containing the optical waveguide circuit chip concerning this invention. It is a top view of the optical waveguide circuit chip concerning the present invention. FIG. 3 is a cross-sectional view taken along line A-A ′ of the optical waveguide circuit chip of FIG. 2. FIG. 3 is a sectional view taken along line B-B ′ of the optical waveguide circuit chip of FIG. 2. FIG. 3 is a cross-sectional view taken along line C-C ′ of the optical waveguide circuit chip of FIG. 2. FIG. 3 is a sectional view taken along line D-D ′ of the optical waveguide circuit chip of FIG. 2. It is a top view of the simulation chip | tip for curvature evaluation. It is sectional drawing which follows the A-A 'line of the simulation chip | tip for the curvature evaluation of FIG. It is sectional drawing which follows the A-A 'line of the simulation chip | tip for the curvature evaluation of FIG. It is a measurement result which shows the relationship between the curvature amount of the simulation chip | tip for curvature evaluation, and the length of a groove | channel. (A-1) shows the case where the groove depth is 50 [μm], and (a-2) shows the case where the groove depth is 60 [μm]. It is a measurement result which shows the relationship between the curvature amount of the simulation chip | tip for curvature evaluation, and the depth of a groove | channel. (B-1) shows the case where the groove length is 15 [mm], and (b-2) shows the case where the groove length is 5 [mm]. It is a top view of the optical waveguide circuit chip concerning the present invention. It is a top view of the optical waveguide circuit chip concerning the present invention. It is a top view of the optical waveguide circuit chip concerning the present invention. It is a top view of the optical waveguide circuit chip concerning the present invention. It is a top view of the optical waveguide circuit chip concerning the present invention. It is a top view of the optical waveguide circuit chip concerning the present invention. It is a top view of the optical waveguide circuit chip concerning the present invention. It is sectional drawing in the chip | tip end surface vicinity of the optical waveguide circuit chip to which the reinforcing plate for thickness adjustment was adhere | attached. It is an assembly work figure which attaches a reinforcement board to an optical waveguide circuit chip. It is sectional drawing of the chip | tip end surface vicinity of the optical waveguide circuit chip which attached the reinforcement board. It is a figure which shows an example of the conventional optical waveguide circuit module. It is a figure which shows an example of the conventional optical waveguide circuit chip. (A) is a top view of the chip, and (b) is a cross-sectional view taken along line A-A ′ of (a). It is a figure which shows an example of the conventional optical waveguide circuit module.

Explanation of symbols

1, 1-1 to 1-6: Optical waveguide circuit chip 1a: Chip end face 2: Tape-shaped optical fiber core wire 3: Substrate with groove 4: Holding lid 5: Optical fiber array component 6: Reinforcing plate 11a for adjusting thickness 11b: optical directional couplers 12a, 12b, 121, 131: waveguide 13: substrate 14a: lower cladding film 14b: upper cladding film 15: cores 16, 16a, 16b: groove 17: linear waveguides 18, 18a, 18b : Λ / 2 wavelength plate 19: Resin 20: UV curable adhesive 21: Reinforcing plate 23: Optical element 25: Pattern layer 31: Protrusions 101 to 106: Optical circuits 111, 113, 114-1, 114-2, 115 -1, 115-2, 116-1 to 6: Optical input / output waveguide circuit 201: Warpage evaluation simulation chip 301: Optical waveguide module 701: Optical waveguide circuit chip 702: 1 × 8 splitter circuit 70 3a, 703b: grooved substrates 704a, 704b: presser lids 705a, 705b: thickness adjusting reinforcing plate 706: optical fiber core wire 707: tape optical fiber core wire 801: Si substrate 802: clad film 803: channel waveguide 901: Optical waveguide circuit chips 902a, 902b: optical fiber array component 903: optical fiber core wire 904: tape-shaped optical fiber core wire 905: reinforcing plate

Claims (5)

A planar substrate;
A pattern layer laminated on one surface of the substrate and including an optical circuit;
An optical waveguide chip comprising:
At least part of the light input / output of the optical circuit is performed at the end of the optical input / output waveguide circuit formed in the pattern layer up to the chip end surface,
The pattern layer is
A lower clad film on the substrate surface;
A core film in which the optical circuit is formed in a planar shape on the lower clad film;
An upper clad film formed on the core film and a portion of the lower clad film where the core film is not formed;
A groove from the upper clad film side disposed to be present on both sides of the waveguide included in the optical input / output waveguide circuit formed up to the chip end face;
An optical waveguide circuit chip comprising:   2. The optical waveguide circuit chip according to claim 1, wherein the groove is separated from the chip end surface including an end of the optical input / output waveguide circuit of the pattern layer.   The optical waveguide circuit chip according to claim 1, wherein the groove has a depth reaching the substrate.   4. The optical waveguide circuit according to claim 1, further comprising a resin filled in the groove up to a height of a surface of the upper clad film and adjusted to a thermal expansion coefficient substantially equal to that of the substrate. Chip.   Protrusions on one surface at intervals of the grooves, the protrusions are fitted into the grooves, and one side surface of the chip end surface including the end of the optical input / output waveguide circuit of the pattern layer; 4. The optical waveguide circuit chip according to claim 1, further comprising a reinforcing plate disposed on an edge of the pattern layer so as to be in the same plane.

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