JP2009134185A - Display control device and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a display control device which allows a display drive unit of a display device constituted so that the resetting from the stop state of display is performed by a control command from a host, to perform automatic resetting of display without exerting a large burden on a host side from an abnormal display state caused by an ESD. <P>SOLUTION: In compliance with a control command received from a host, upon detection of the flow of data to a bus within the constant time from a stop start state (S2) during stop state (S2 to S6) of display due to resetting in the display device performing the display using the display data received via the bus from the host, the display device is made to shift to the state (S7) to perform drive of the ordinary display regardless of the presence or absence of the signal reception of the control command by the display drive unit and on the other hand, after elapse of constant time, the display drive unit is made to continue to drive the display of the stop state (S6). <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display return function in a display device.

  An interface for transmitting display data in a liquid crystal display device is shifting from a parallel transmission system digital RGB system having a large number of signal lines to a high-speed serial transmission system having a small number of signal lines. In particular, in a mobile device such as a mobile phone, the serial transmission method is an important technology because it has the purpose of reducing the number of wirings, saving wiring installation space, and preventing disconnection of the wiring. Further, by performing differential transmission, high speed and low power consumption transmission can be achieved. In such serial transmission, display data and control commands are transmitted on the same bus.

For example, in the MIPI (Mobile Industry Processor Interface) standard that defines a common specification for an interface between an application processor of a mobile device and a peripheral device, the operation of the peripheral device is controlled using the application processor as a host side. In the display driving device using the control signal, the normal display operation is started by command control, and when the start command is sent from the host side to the display driving device after the power is turned on, the screen is driven accordingly. Display starts.
JP-A-5-158598 (published on June 25, 1993)

  On the other hand, an electronic device may malfunction due to ESD (Electro Static Discharge), but when the display driving device is reset due to ESD, the display is turned off. Since a command is required to start display, the display will not return unless the host detects that the display device has been reset.

  This will be described with reference to FIG. 8 for a MIPI specification display device.

  FIG. 8 shows a sequence example of power control in the MIPI specification display device.

  The MIPI standard stipulates that the device enters the sleep mode shown in S102 (enter sleep mode) after a reset such as power-on or hardware (HW) / software (SW) reset shown in S101 occurs. ing. In order to shift from this sleep mode to the normal display state shown in S103, that is, to sleep mode off (exit sleep mode), it is necessary to transmit an exit_sleep_mode command from the host side to the display driving device.

  When this rule is completely followed, if a reset occurs due to an ESD event, the state is switched to the power-on sequence state, and then the sleep mode ON state is maintained and the screen on the display is not displayed. . That is, when viewed from the user, it is recognized that an abnormal display state has occurred.

  As a means for avoiding this, a method of generating a command for instructing to exit from the display stop state periodically on the host side, or an initial operation when it is determined that the operation is stopped by periodically reading the state of the display device A general method is to put a burden on the host-side software unrelated to normal processing, such as generating an enable command. However, such a software method is not desirable because it places a heavy burden on the host side.

  As described above, the display drive device of the display device in which the return from the display stop state is conventionally performed by the control command from the host, the abnormal display state caused by the ESD is greatly increased on the host side. There was a problem that the display could not be automatically restored without imposing a burden.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide a display drive device for a display device in which a return from a display stop state is performed by a control command from a host. Thus, it is an object of the present invention to provide a display control device and a display device capable of automatically returning a display from an abnormal display state caused by ESD without imposing a heavy burden on the host side.

  In order to solve the above problems, a display control device of the present invention is a display drive device that performs display drive using display data received via a bus in relation to the control command in accordance with a control command received from a host. On the other hand, when it is detected that the display data is flowing in the bus within a predetermined time from the start of the stop state when the display is stopped due to reset, regardless of whether the control command is received by the display driving device, The display driving device outputs a signal for shifting to a state in which normal display driving is performed, and after the predetermined time has elapsed, the display driving device stops the display unless the display driving device receives the control command. It is characterized by outputting a signal for continuing to drive the display of the state.

  According to the above invention, when the display is stopped due to a reset, if it is detected that display data is flowing on the bus within a certain time, it is determined that the display is abnormal due to ESD, and the host The normal display state can be restored regardless of the presence or absence of the control command, and after a certain period of time, the normal display state is maintained unless a control command is received from the host even if display data is flowing on the bus. Since the display is not restored, it is possible to avoid the display restoration when a problem occurs if the display rises immediately. Further, since this display control device can be configured by hardware such as logic, it is not necessary to cause the host to perform burdensome software processing.

  As described above, the display drive device of the display device in which the return from the display stop state is performed by the control command from the host does not place a large burden on the host side from the abnormal display state caused by ESD. Thus, it is possible to realize a display control device capable of automatically returning the display.

  In order to solve the above problems, a display control device of the present invention is a display drive device that performs display drive using display data received via a bus in relation to the control command in accordance with a control command received from a host. Comparing whether or not a timer that counts the time from the start of the stop state when the display is stopped by a reset and whether the count output of the timer has reached a certain time And a detection means for detecting whether or not the display data is flowing in the bus, and the detection means indicates that the count output by the comparison means has not reached a predetermined time. When it is detected that the display data is flowing through the bus while the signal is input, the display driving device is shifted to a state where normal display driving is performed. When a result indicating that the count output by the comparison means has reached a predetermined time is input while detecting that the display data is flowing in the bus, Unless the driving device receives the control command, the display driving device outputs a signal for continuing to drive the display in the stopped state.

  According to the above invention, when the display is stopped due to a reset, if it is detected that display data is flowing on the bus within a certain time, it is determined that the display is abnormal due to ESD, and the host The normal display state can be restored regardless of the presence or absence of the control command, and after a certain period of time, the normal display state is maintained unless a control command is received from the host even if display data is flowing on the bus. Since the display is not restored, it is possible to avoid the display restoration when a problem occurs if the display rises immediately. Further, since this display control device can be configured by hardware such as logic, it is not necessary to cause the host to perform burdensome software processing.

  As described above, the display drive device of the display device in which the return from the display stop state is performed by the control command from the host does not place a large burden on the host side from the abnormal display state caused by ESD. Thus, it is possible to realize a display control device capable of automatically returning the display.

  In order to solve the above problem, a display control device according to the present invention performs display driving using display data written in an internal memory in relation to the control command in accordance with a control command received from a host. On the other hand, when it is detected that the display data has been written to the memory within a predetermined time from the start of the stop state when the display is stopped due to a reset, the display drive device determines whether or not the control command is received. In the meantime, a signal for causing the display driving device to shift to a state in which normal display driving is performed is output, and after the predetermined time has elapsed, the display driving device receives the control command unless the display driving device receives the control command. A signal for continuing to drive the display in the stopped state is output.

  According to the above invention, when it is detected that display data has been written to the memory within a predetermined time when the display is stopped due to reset, it is determined that the display is abnormal due to ESD, and the host The normal display state can be restored regardless of the presence or absence of the control command from, and after a certain time has passed, the normal display will continue unless a control command is received from the host even if display data has been written to the memory. Since the display does not return to the state, it is possible to avoid the display return when a problem occurs if the display immediately rises. Further, since this display control device can be configured by hardware such as logic, it is not necessary to cause the host to perform burdensome software processing.

  As described above, the display drive device of the display device in which the return from the display stop state is performed by the control command from the host does not place a large burden on the host side from the abnormal display state caused by ESD. Thus, it is possible to realize a display control device capable of automatically returning the display.

  In order to solve the above problem, a display control device according to the present invention performs display driving using display data written in an internal memory in relation to the control command in accordance with a control command received from a host. A display control device for controlling the operation of the display, a timer for counting time from the start of the stop state when the display is stopped by reset, and whether or not the count output of the timer has reached a certain time Comparing means for performing comparison, and detecting means for detecting whether or not the display data is written in the memory, the detecting means confirms that the count output by the comparing means has not reached a predetermined time. When it is detected that the display data is written in the memory while the result shown is input, the display driver is normally displayed. The display data is written to the memory when a result indicating that the count output by the comparison means has reached a certain time is input while a signal for shifting to a state in which driving is performed is output. When the display drive device detects that the display drive device does not receive the control command, the display drive device outputs a signal that causes the display drive device to continue driving the display in the stopped state.

  According to the above invention, when the display is stopped, when it is detected that the display data is written in the memory within a predetermined time, it is determined that the display is abnormal due to ESD, Regardless of the presence or absence of a control command, it can be restored to the normal display state.After a certain period of time has passed, even if display data has been written to the memory, it will return to the normal display state unless a control command is received from the host. Since the display is not restored, it is possible to avoid the display restoration when a problem occurs if the display rises immediately. Further, since this display control device can be configured by hardware such as logic, it is not necessary to cause the host to perform burdensome software processing.

  As described above, the display drive device of the display device in which the return from the display stop state is performed by the control command from the host does not place a large burden on the host side from the abnormal display state caused by ESD. Thus, it is possible to realize a display control device capable of automatically returning the display.

  In order to solve the above problems, the display control apparatus of the present invention is characterized in that the bus is a MIPI interface bus.

  According to the above-described invention, there is an effect that it is possible to appropriately select the subsequent processing for the transition to the sleep mode in the MIPI specification apparatus.

  In order to solve the above problems, the display control apparatus according to the present invention is characterized in that the bus is a bus for parallel transmission of digital RGB signals as the display data.

  According to said invention, there exists an effect that the subsequent process with respect to transfer to the stop state of a display can be selected appropriately in the apparatus of the specification which transmits digital RGB in parallel.

  In order to solve the above problems, the display control apparatus of the present invention is characterized in that the bus is an MDDI interface bus.

  According to the above invention, there is an effect that it is possible to appropriately select the subsequent processing for the transition to the display stop state in the MDDI specification apparatus.

  In order to solve the above-described problems, a display device according to the present invention includes the display control device.

  According to the above invention, the display device is configured to return from the display stop state by a control command from the host, and does not place a large burden on the host side from the abnormal display state caused by ESD. Thus, it is possible to realize a display device capable of automatically returning the display.

  As described above, the display control device of the present invention resets the display drive device that performs display drive using the display data received via the bus in relation to the control command in accordance with the control command received from the host. When it is detected that the display data is flowing in the bus within a certain time from the start of the stop state when the display is stopped by the display drive, the display drive is performed regardless of whether the display drive device receives the control command. A signal for causing the device to shift to a state for driving normal display is output, and after the predetermined time has elapsed, the display drive device displays the stop state unless the display drive device receives the control command. A signal for continuing the driving is output.

  Further, as described above, the display control device of the present invention is a display drive device that performs display drive using display data written in an internal memory in relation to the control command in accordance with the control command received from the host. On the other hand, when it is detected that the display data is written in the memory within a predetermined time from the start of the stop state when the display is stopped by reset, regardless of whether the control command is received by the display driving device or not. The display driving device outputs a signal for shifting to a state in which normal display driving is performed, and after the predetermined time has elapsed, the display driving device receives the control command unless the display driving device receives the control command. A signal for continuing to drive the display in the stopped state is output.

  As described above, the display drive device of the display device in which the return from the display stop state is performed by the control command from the host does not place a large burden on the host side from the abnormal display state caused by ESD. Thus, it is possible to realize a display control device capable of automatically returning the display.

  An embodiment of the present invention will be described below with reference to FIGS.

  FIG. 6 shows a configuration of a liquid crystal display device (display device) 1 according to the present embodiment.

  The liquid crystal display device 1 is in the form of a mobile phone, and includes a display unit 2, a liquid crystal driver 3, an antenna 4, an RF circuit 5, a baseband processor 6, an application processor 7, and a display control circuit 8. The display control circuit 8 is incorporated in the liquid crystal driver 3 here, but may be provided outside the liquid crystal driver 3.

  The display unit 2 has pixels PIX arranged in a matrix. The pixel PIX includes a TFT 11, which is a selection element, a liquid crystal capacitor CL, and an auxiliary capacitor Cs. A counter voltage Vcom is applied to the counter electrode, and a storage capacitor voltage Vcs is applied to the storage capacitor wiring. Data signals are written to the pixels PIX via the source bus lines SL1 to SLn. The source bus lines SL1 to SLn are supplied with data signals from the liquid crystal driver 3. In addition, in order to write a data signal to the pixel PIX, a scanning signal for selecting each row composed of a plurality of pixels PIX is sequentially supplied from the liquid crystal driver 3 to the gate bus lines GL1 to GLn.

  The liquid crystal driver (display drive device, display control device) 3 is a circuit for driving the display of the display unit 2 composed of one chip or a plurality of chips, and displays such as a timing generator, a source driver, a gate driver, a power supply circuit, and a memory. Each circuit part related to operation is included. In addition, the liquid crystal driver 3 is controlled here using the application processor 7 as a host, and the interface is also included therein. In some embodiments described later, the liquid crystal driver 3 can be controlled using a baseband LSI including the baseband processor 6 as a host.

  The antenna 4 is an antenna for transmitting / receiving a mobile phone. The RF circuit 5 processes a high-frequency signal accompanying transmission / reception. The baseband processor 6 processes the baseband signal demodulated by the RF circuit 5 and controls operations of a call signal processing circuit and a data communication processing circuit (not shown). The application processor 7 controls the liquid crystal driver 3 and peripheral devices that perform processing such as moving images, music, and games (not shown).

  The display control circuit 8 is configured as an IC or a part of the IC, and whether a video stream exists on the bus I / F BUS connecting the application processor 7 and the liquid crystal driver 3, that is, whether display data is flowing. Is monitored, and the content of the control signal APS output to the liquid crystal driver 3 is changed depending on the presence or absence of display data. Details of this processing will be described later. Here, since the display control circuit 8 is incorporated in the liquid crystal driver 3, the liquid crystal driver 3 is handled as a display driving device and at the same time as the display control device of the present invention. Even if it is not comprised, it is possible to treat it as the display control device only by the display control circuit 8.

  As an operation of the display control circuit 8, the one shown in FIG.

  After a reset such as power ON or hardware (HW) / software (SW) reset shown in S201, the display drive by the liquid crystal driver 3 shifts to the sleep mode shown in S202, that is, the display stopped state (enter sleep mode). Further, when an exit_sleep_mode command is transmitted from the host application processor 7 to the liquid crystal driver 3, the driving of the liquid crystal driver 3 shifts from the sleep mode to the sleep mode off shown in S203, that is, the normal display state (exit sleep). mode). Up to this point, the operation is the same as that described with reference to FIG. 8 and is determined only between the application processor 7 and the liquid crystal driver 3. When the display control circuit 8 detects that a video stream is present on the bus I / F BUS in S202, the display control circuit 8 outputs a control signal APS having a content for causing the liquid crystal driver 3 to perform an automatic power ON sequence. Then, the display drive of the liquid crystal driver 3 shifts to the sleep mode off.

  According to this method, not only when the power is normally turned on, but also when the liquid crystal driver 3 is abnormally reset due to ESD and the display is stopped, the display control circuit 8 can display the video on the bus I / F BUS. The liquid crystal driver 3 is activated by detecting the stream. Therefore, even if the display on the display unit 2 disappears for a moment, it can be restored immediately, and the user can be prevented from recognizing an abnormality.

  However, if the rise in the video stream detection is allowed indefinitely, not only will the deviation from the interface standard between the host such as the application processor 7 and the baseband processor 6 and the peripheral device such as the liquid crystal driver 3 occur, but the video stream If it exists, the bad effect that a display stands up will be produced.

  Examples that cause such adverse effects are listed below.

  The display data may generally flow through a common bus for a plurality of display devices, for example, depending on the bus specifications. In such a case, it is conceivable that by performing the operation of FIG. 7, all the display devices are activated from the display stopped state in response to the video stream to other display devices.

  In addition, even when the transmission / reception device has a one-to-one connection, the timing at which display data transmission starts depends on the host side, and the display data starts flowing before the original display device is started up. When the display is performed before the original display starts and an unnecessary screen appears, or when the video stream is detected automatically during the power-on sequence, the register setting is There is a possibility that the combination status is temporarily changed, and the display device may fall into an abnormal state. This is a situation that must be avoided.

  The above is an example in which the adverse effect that the display rises only by the presence of the video stream occurs.

  However, in an example in which such an adverse effect occurs, a video stream does not exist immediately after canceling the display reset, whereas in an abnormal display state caused by ESD, a video stream exists immediately after canceling the display reset. Therefore, it is possible to discriminate whether or not to return to the normal display state depending on whether or not a video stream exists on the bus within a certain limited time immediately after canceling the display reset.

  Therefore, in the present embodiment, the display control circuit 8 is configured as shown in FIG. 2 and the operation shown in FIG. 1 is performed using the display control circuit 8 so that the control from the host is performed only in the case of an abnormal display state caused by ESD. Even if there is no command, the normal display state is automatically restored.

  As shown in FIG. 2, the display control circuit 8 is composed only of hardware such as logic, and includes an oscillation circuit 8a, a timer 8b, a comparison unit (comparison means) 8c, a D flip-flop 8d, and a video stream detection unit. (Detection means) 8e is provided.

  When the display is reset due to power ON or hardware (HW) / software (SW) reset in S1, the timer 8b is reset by the reset signal RESET (Timer = 0) and the D flip-flop 8d is connected to the D terminal. By setting the input value to “H”, the flag VSINH which is the output of the D flip-flop 8d is set to zero. Thus, the timer 8b starts counting the clock output from the oscillation circuit 8a. Then, the liquid crystal driver 3 shifts to the sleep mode shown in S2, that is, the display stopped state.

  In S3, the video stream detection unit 8e acquires the value of the bus I / F BUS, and detects whether a video stream exists on the bus I / F BUS. The video stream detector 8e receives the output VSINH of the D flip-flop 8d. If a video stream exists in S3, the flag VSINH = 0 at the same time, so that the sleep mode is immediately turned off in S7, that is, the normal display state. Migrate to At this time, the video stream detection unit 8e outputs a signal instructing the automatic power ON sequence as the control signal APS and inputs the signal to the liquid crystal driver 3. The liquid crystal driver 3 performs a normal display operation accordingly. The automatic power ON sequence is a generally known technique, and details thereof are omitted here. If there is no video stream in S3, it waits for the count output of the timer 8b to increase by 1 in S4. The count output of the timer 8b may be obtained by outputting a result obtained by dividing the output from the oscillation circuit OSC.

  In S5, the comparison unit 8c compares the count output (Value) of the timer 8b with the upper limit (limit), and outputs 0 if the count output is smaller than the upper limit, and outputs 1 if the count output is larger than the upper limit. To do. The output of the comparison unit 8c is input to the clock input terminal of the D flip-flop 8d. At this time, if the comparator 8c outputs 0, the D flip-flop 8d continues to output the flag VSINH = 0, and if the comparator 8c outputs 1, the D flip-flop 8e outputs the flag VSINH = 1. . In S6, if the flag VSINH = 0 in S5, the process returns to S3. If the flag VSINH = 1 in S5, an operation of waiting for a control command from the application processor 7 is performed. When the flag VSINH = 1, the control signal APS output from the video stream detection unit 8e is a signal having a content that keeps the liquid crystal driver 3 waiting for transmission of a control command from the application processor 7.

  Thus, it is detected whether or not there is a video stream within a certain period of time from the start of the display stop state until the timer count output reaches the upper limit value, and the timer count output reaches the upper limit value. After a certain period of time has elapsed, it is not detected whether or not a video stream exists. If the video stream is detected within the predetermined time, the display returns to the normal state. After the predetermined time has elapsed, the start of the automatic power ON sequence due to the presence of the video stream is prohibited.

  In the example of FIG. 1, the control command received from the application processor 7 is checked only in the state of S6. However, the control command may be received in any state, and the liquid crystal driver 3 receives the control command. If it does so, it cannot be overemphasized that it can shift to sleep mode off irrespective of the present state position. Further, the logic of FIG. 2 constituting the display control circuit 8 is conceptual only, and when the logic is actually formed, various configurations including the configuration accompanying the logic operation such as a configuration for synchronization are included. Of course, circuits can be added.

  Next, FIG. 3 to FIG. 5 will explain differences in the structural relationship between the display control circuit 8 and the liquid crystal driver 3 depending on the type of interface between the host and the liquid crystal driver.

  FIG. 3 shows a configuration when MIPI is adopted as an interface as an example of the configuration of the liquid crystal driver 3 shown in FIG. The display control circuit 8 is included in the MIPI interface 31. In the liquid crystal driver 3, a control command and display data are received by the MIPI interface 31 from the serial transmission bus I / F BUS, and the control command is written in the register 32. Further, the timing generator 35 generates a timing signal based on the reception timing. Based on the timing signal, display data is sequentially sent from the MIPI interface 31 to the shift register 33 and the source drive circuit 34, and the data signal is supplied to the source bus line SL. At this time, the display control circuit 8 can detect a video packet as a video stream from the bus I / F BUS. Further, the display control circuit 8 outputs a control signal APS to the timing generator 35.

  FIG. 4 shows a configuration of a liquid crystal driver 31 that uses serial communication SPI (Serial Peripheral Interface) as a control interface and supplies digital RGB signals as display data by parallel transmission under the control of the host. In this case, the bus provided between the baseband LSI including the baseband processor and the liquid crystal driver 31 has a general configuration, but the application processor may be the host as in FIG. In the liquid crystal driver 31, a control command is written from the SPI bus to the register 311, and the timing generator 314 generates a timing signal based on this reception timing. Based on the timing signal, the digital RGB signal is sequentially sent to the shift register 312 and the source driver circuit 313, and the data signal is supplied to the source bus line SL. At this time, the display control circuit 8 can detect the digital RGB video stream from the digital RGB signal bus by detecting the vertical synchronization timing and the horizontal synchronization timing. Further, the display control circuit 8 outputs a control signal APS to the timing generator 314.

  FIG. 5 shows the configuration of the liquid crystal driver 32 when MDDI (Mobile Display Digital Interface) is adopted as the interface. In this case, the bus provided between the baseband LSI including the baseband processor and the liquid crystal driver 31 has a general configuration, but the application processor may be the host as in FIG. The display control circuit 8 is included in the MDDI interface 321. In the liquid crystal driver 32, the control command is received by the MDDI interface 321 from the serial transmission bus I / F BUS, and the control command is written in the register 322. Further, the timing generator 325 generates a timing signal based on the control command written in the register 322. Display data is written to the display RAM 323 by the timing signal. The display data of the display RAM 323 is sent to the source driving circuit 324 based on the timing signal of the timing generator 325, and the data signal is supplied to the source bus line SL. The display control circuit 8 can detect display data written from the timing generator 325 to the display RAM 323 as a video stream. In addition, the display control circuit 8 outputs a control signal APS to the timing generator 325.

  In the case of FIGS. 4 and 5, the expression “stopped display” may be used instead of the sleep mode in FIGS.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims. That is, embodiments obtained by combining technical means appropriately modified within the scope of the claims are also included in the technical scope of the present invention. For example, the present invention can be applied to an EL display device.

  The present invention can be particularly preferably used for a portable terminal.

FIG. 9 is a transition diagram illustrating the display control / driving state according to the embodiment of the present invention. 1, showing an embodiment of the present invention, is a circuit block diagram showing a configuration of a display control circuit. FIG. It is a block diagram which shows the structure of the liquid crystal driver in the case of using a 1st interface. It is a block diagram which shows the structure of the liquid crystal driver in the case of using a 2nd interface. It is a block diagram which shows the structure of the liquid crystal driver in the case of using a 3rd interface. 1, showing an embodiment of the present invention, is a block diagram illustrating a configuration of a display device. FIG. It is a transition diagram which shows the state of other display control and drive states. It is a transition diagram which shows a prior art and shows the state of a display control and a drive state.

Explanation of symbols

1 Liquid crystal display device (display device)
3 Liquid crystal driver (display drive device, display control device)
7 Application processor (host)
8. Display control circuit (display control device)
8c Comparison part (comparison means)
8e Video stream detector (detection means)
I / F BUS bus

Claims (8)

  In accordance with the control command received from the host, the display drive device that performs display drive using the display data received via the bus in relation to the control command is constant from the start of the stop state when the display is stopped by reset. When detecting that the display data is flowing in the bus in time, a signal for causing the display driving device to shift to a state in which the display driving device is driven regardless of whether the control command is received by the display driving device. On the other hand, after the predetermined time has elapsed, unless the display driving device receives the control command, the display driving device outputs a signal for continuing to drive the display in the stopped state. A display control device. In accordance with a control command received from a host, a display control device that controls operation of a display drive device that performs display drive using display data received via a bus in relation to the control command,
A timer that counts the time from the start of the stop state when the display is stopped by reset, a comparison unit that compares whether the count output of the timer has reached a certain time, and the display data flows to the bus Detecting means for detecting whether or not
When the detection means detects that the display data is flowing in the bus when a result indicating that the count output by the comparison means has not reached a predetermined time is input, the display driving device When a result indicating that the count output by the comparison means has reached a predetermined time is input, the display data is input to the bus. When it is detected that the current is flowing, unless the display driving device receives the control command, the display driving device outputs a signal for continuing to drive the display in the stopped state to the display driving device. apparatus.   In accordance with the control command received from the host, the display driving device that performs display driving using the display data written in the internal memory in relation to the control command, from the start of the stop state when the display is stopped by reset When it is detected that the display data is written to the memory within a certain time, the display driving device is shifted to a state in which the display driving device is driven for normal display regardless of whether the control command is received by the display driving device. On the other hand, after the predetermined time has passed, the display driving device outputs a signal for continuing to drive the display in the stopped state unless the display driving device receives the control command. A display control device. In accordance with a control command received from a host, a display control device that performs operation control on a display drive device that performs display drive using display data written in an internal memory in association with the control command,
A timer that counts the time from the start of the stop state when the display is stopped by reset, a comparison unit that compares whether the count output of the timer has reached a certain time, and the display data is written to the memory Detecting means for detecting whether or not
When the detection means detects that the display data is written in the memory when a result indicating that the count output by the comparison means has not reached a predetermined time is input, the display drive The display data is output to the memory when a result indicating that the count output by the comparison means has reached a certain time is input while outputting a signal for causing the apparatus to shift to a state in which normal display driving is performed. When it is detected that the display driving device receives the control command, the display driving device outputs a signal for continuing to drive the display in the stopped state. Display control device.   The display control apparatus according to claim 1, wherein the bus is a MIPI interface bus.   The display control apparatus according to claim 1, wherein the bus is a bus for transmitting digital RGB signals as the display data in parallel.   5. The display control apparatus according to claim 3, wherein the bus is an MDDI interface bus.   A display device comprising the display control device according to claim 1.

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