JP2009130170A - Method of manufacturing semiconductor device and method of manufacturing mask - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device that prevents a resist pattern shape from becoming an inverted tapered shape, while a resist sidewall is prevented from being rounded and a resist bottom opening is prevented from varying in opening length, and to provide a method of manufacturing a mask. <P>SOLUTION: The method of manufacturing the semiconductor device includes a resist film forming step of forming a resist film on a substrate, an exposure light irradiating step of selectively irradiating the resist film formed on the substrate with exposure light, a developing step of developing the resist film irradiated with the exposure light to form an opening in the resist film, a shape control film forming step of forming a shape control film on the resist film and in the opening, and a baking step of heating the resist film and shape control film, the elastic modulus of the shape control film being higher than that of the resist film at heating temperature of the baking step. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufacturing method and a mask manufacturing method, and more particularly to a semiconductor device manufacturing method and a mask manufacturing method used in manufacturing a semiconductor device, a magnetic head, and a mask.

  At present, with the progress of high integration of semiconductor integrated circuits, the wiring pattern is miniaturized to a size of 0.1 μm or less, and to a minimum of 0.05 μm or less. In order to form the wiring pattern finely, a substrate to be processed is covered with a resist film, and after the resist film is subjected to selective exposure, the resist pattern is formed by development, and the resist pattern is used as a mask. A lithography technique that obtains a desired pattern (for example, a wiring pattern) by performing dry etching on the substrate to be processed and then removing the resist pattern is very important. In this lithography technique, by using a shorter wavelength of exposure light (light used for exposure), further formation of a finer pattern has been studied by using an electron beam, an X-ray, or the like.

As a resist material corresponding to a short wavelength light source (KrF, ArF, F ₂ excimer laser), electron beam, and soft X-ray lithography, a chemically amplified resist containing an acid generator is promising. This chemically amplified resist is, for example, a catalyst in which an acid is generated from a photoacid generator by exposure to ultraviolet rays, electron beams, soft X-rays, focused ion beams, and the like, and a baking treatment is performed after the exposure. Using the reaction, the exposed area is changed to an alkali-soluble (positive type) or alkali-insoluble (negative type) substance. For this reason, an apparent quantum yield can be improved and high sensitivity can be achieved. Such a chemically amplified resist generally comprises a base resin, a photoacid generator, various additives, and a solvent. In the negative resist, a crosslinking agent is further added.

  However, in photolithography using the short-wavelength light source, the resist film itself absorbs exposure light during exposure, the irradiation area becomes smaller at the bottom than the resist film surface, and the pattern shape obtained after development is positive. In the case of a type resist, it becomes a forward taper shape (FIG. 28), and in the case of a negative type resist, it becomes a reverse taper shape (FIG. 29).

  In electron beam lithography, since electrons incident on a resist have a charge, an interaction with atomic nuclei and electrons of a substance constituting the resist occurs during exposure. For this reason, whenever an electron beam enters the resist film, scattering always occurs (forward scattering). Therefore, in the electron beam irradiation area, the irradiation area is larger at the bottom than the resist film surface, and the pattern shape obtained after development is a reverse taper shape (FIG. 29) in the case of a positive resist, and in the case of a negative resist. Then, it becomes a forward taper shape (FIG. 28).

  When such a resist pattern shape abnormality, particularly a reverse taper shape occurs (for example, Patent Documents 1 and 2), it is difficult to accurately measure the dimensions when observing from the upper surface of the pattern, and it is difficult to finely process a semiconductor device. And

  Therefore, when a reverse taper shape occurs, heat treatment (registry flow method) is applied to the resist pattern to avoid the resist pattern shape becoming a reverse taper shape, and a vertical pattern, and if necessary In this heat treatment (registry flow method), as shown in FIG. 30, the resist sidewall 300 is rounded due to the influence of the surface tension when the resist film is softened. The problem that the resist bottom opening length 400 fluctuates due to the flow of the resist film has occurred.

Japanese Patent No. 3858730 JP 2006-31817 A

An object of the present invention is to solve the conventional problems and achieve the following objects.
That is, the present invention avoids the resist pattern shape from becoming a reverse taper shape while preventing the resist side wall from being rounded and the resist bottom opening length from fluctuating. An object of the present invention is to provide a method for manufacturing a semiconductor device and a method for manufacturing a mask capable of forming a forward tapered pattern.

  As a result of intensive studies in view of the above problems, the present inventors have obtained the following knowledge. That is, when a shape control film whose elastic modulus at the heating temperature in the baking process is higher than the elastic modulus of the resist film is formed on the resist film and in the opening provided in the resist film, the opening has a highly elastic shape control film. Therefore, it is possible to suppress the roundness of the resist side wall and the fluctuation of the resist bottom opening length, thereby realizing the formation of a stable taper pattern.

Means for solving the above-described problems are as listed in the appendix to be described later. That is,
A semiconductor device manufacturing method (mask manufacturing method) according to the present invention includes a resist film forming step of forming a resist film on a substrate, and exposure light irradiation that selectively irradiates the formed resist film with exposure light. Developing a resist film irradiated with the exposure light to provide an opening in the resist film; forming a shape control film on the resist film and in the opening; and And a baking step of heating the resist film and the shape control film (mask manufacturing method), wherein the elastic modulus of the shape control film is the resist film at a heating temperature of the baking step. It is characterized by a higher modulus of elasticity.

  In the semiconductor device manufacturing method (mask manufacturing method), the resist film is formed on the substrate in the resist film forming step, and the resist film is selectively formed with respect to the formed resist film in the exposure light irradiation step. In the developing step, the resist film irradiated with the exposure light is developed and an opening is provided in the resist film. In the shape control film forming step, the resist film and the opening are formed. A shape control film whose elastic modulus at the heating temperature in the baking process is higher than the elastic modulus of the resist film is formed in the part, and the resist film and the shape control film are heated in the baking process. As a result, a shape control film whose elastic modulus at the heating temperature in the baking process is higher than the elastic modulus of the resist film is formed on the resist film and in the opening provided in the resist film, and the inside of the opening has a highly elastic shape. Fixing with the control film can prevent the resist side wall from being rounded and the resist bottom opening length from fluctuating.

  According to the present invention, conventional problems can be solved, and the above object can be achieved. Further, according to the present invention, while preventing the resist side wall from being rounded and the resist bottom opening length from fluctuating, the resist pattern shape is prevented from becoming an inversely tapered shape, and a vertical pattern is further obtained. Thus, it is possible to provide a method for manufacturing a semiconductor device and a method for manufacturing a mask capable of forming a forward tapered pattern.

(Manufacturing method of semiconductor device and manufacturing method of mask)
The semiconductor device manufacturing method and mask manufacturing method (resist pattern forming method) of the present invention include a resist film forming step, an exposure light irradiation step, a developing step, a shape control film forming step, and a baking step. Furthermore, other processes appropriately selected as necessary are included.

<Resist film formation process>
The resist film forming step is not particularly limited except that a resist film is formed on the substrate, and can be appropriately selected according to the purpose.
The material of the resist film is not particularly limited and can be appropriately selected from known resist materials according to the purpose, and may be either negative type or positive type, for example, g-line, i Preferable examples include g-line resist, i-line resist, KrF resist, ArF resist, F ₂ resist, and electron beam resist that can be patterned with an X-ray, KrF excimer laser, ArF excimer laser, F ₂ excimer laser, and electron beam. These may be chemically amplified or non-chemically amplified. Among these, a KrF resist, an ArF resist, a resist containing an acrylic resin, and the like are preferable. From the viewpoint of finer patterning, an improvement in throughput, and the like, an ArF resist whose extension of the resolution limit is urgently required. And at least one of resists comprising an acrylic resin is more preferable.

  Specific examples of the resist film material include novolak resist, PHS resist, acrylic resist, cycloolefin-maleic anhydride (COMA) resist, cycloolefin resist, and hybrid (alicyclic acrylic). -COMA copolymer) resist and the like. These may be modified with fluorine.

<Exposure light irradiation process>
The exposure light irradiation step is not particularly limited except that the exposure light is selectively irradiated to the formed resist film, and can be appropriately selected according to the purpose.
Irradiation of the exposure light can be suitably performed by a known exposure apparatus. By exposure to the exposure light, reactions such as decomposition, desorption, and crosslinking occur in the resist film in the exposure region, and a pattern latent image is formed.
Irradiation of the exposure light is performed on a partial region of the resist film, so that the polarity of the partial region changes in the partial region. An unreacted region other than the changed partial region remains (in the case of a positive resist) or is removed (in the case of a negative resist) to form a resist pattern.
There is no restriction | limiting in particular as said exposure light, According to the objective, it can select suitably, For example, ionizing radiation (an ultraviolet ray, an electron beam, a focused ion beam, a positron beam, an alpha ray, a beta ray, a mu particle beam, pi It is preferable to use at least one kind of charged particle beam selected from particle beam, proton beam, deuteron beam, and heavy ion beam, and activities such as ultraviolet rays, X-rays, electron beams, excimer laser beams, focused ion beams, etc. More preferably, energy rays are used.
When the excimer laser line is used, KrF excimer laser light (wavelength 248 nm), ArF excimer laser light (wavelength 193 nm), F ₂ excimer laser light (wavelength 157 nm), and the like are preferable.

<Development process>
As shown in FIG. 1A, the developing step is not particularly limited except that the resist film irradiated with exposure light (201 in FIG. 1A) is developed and an opening is provided in the resist film, depending on the purpose. Can be selected as appropriate.
The development is performed by removing uncured regions. There is no restriction | limiting in particular as the removal method of the said unhardened area | region, According to the objective, it can select suitably, For example, the method etc. which remove using a developing solution are mentioned.

  There is no restriction | limiting in particular as said developing solution, Although it can select suitably according to the objective, It is preferable that it is water or alkaline aqueous solution, and can reduce the burden on an environment.

  Examples of the alkali include inorganic alkalis such as sodium hydroxide, potassium hydroxide, sodium silicate and ammonia; primary amines such as ethylamine and propylamine; secondary amines such as diethylamine and dipropylamine; trimethylamine and triethylamine Tertiary amines; alcohol amines such as diethylethanolamine and triethanolamine; quaternary ammonium hydroxides such as tetramethylammonium hydroxide, tetraethylammonium hydroxide, triethylhydroxymethylammonium hydroxide, trimethylhydroxyethylammonium; etc. Is mentioned.

  If necessary, a water-soluble organic solvent such as methyl alcohol, ethyl alcohol, propyl alcohol, and ethylene glycol, a surfactant, a resin dissolution inhibitor, and the like can be added to the alkaline aqueous solution.

  The surfactant is not particularly limited and may be appropriately selected depending on the intended purpose. Examples thereof include nonionic surfactants, cationic surfactants, anionic surfactants, and amphoteric surfactants. It is done. These may be used individually by 1 type and may use 2 or more types together. Among these, nonionic surfactants are preferable in that they do not contain metal ions.

  The nonionic surfactant is preferably selected from an alkoxylate surfactant, a fatty acid ester surfactant, an amide surfactant, an alcohol surfactant, and an ethylenediamine surfactant. Can be mentioned. Specific examples of these include polyoxyethylene-polyoxypropylene condensate compounds, polyoxyalkylene alkyl ether compounds, polyoxyethylene alkyl ether compounds, polyoxyethylene derivative compounds, sorbitan fatty acid ester compounds, glycerin fatty acid ester compounds, Primary alcohol ethoxylate compound, phenol ethoxylate compound, nonylphenol ethoxylate, octylphenol ethoxylate, lauryl alcohol ethoxylate, oleyl alcohol ethoxylate, fatty acid ester, amide, natural alcohol, ethylenediamine, Secondary alcohol ethoxylate type and the like.

  The cationic surfactant is not particularly limited and may be appropriately selected depending on the intended purpose. Examples thereof include alkyl cationic surfactants, amide type quaternary cationic surfactants, and ester type quaternary cationic types. Surfactant etc. are mentioned.

  There is no restriction | limiting in particular as said amphoteric surfactant, According to the objective, it can select suitably, For example, an amine oxide type surfactant, a betaine type surfactant, etc. are mentioned.

  The content of the surfactant in the shape control material can be appropriately determined according to the type and content of each component.

<Shape control film formation process>
As shown in FIG. 1B, the shape control film forming step has a shape in which the elastic modulus at the heating temperature in the baking step described later is higher than the elastic modulus of the resist film on the resist film and in the opening provided in the resist film. There is no particular limitation other than the formation of the control film (202 in FIG. 1B), and it can be appropriately selected according to the purpose.

-Shape control membrane-
The shape control film is not particularly limited as long as the elastic modulus at the heating temperature in the baking process is higher than the elastic modulus of the resist film. For example, various metal films (for example, Au film), various metal oxide films (for example, , Al ₂ O ₃ film), various semiconductor films, and inorganic films such as oxide films and nitride films of various semiconductors. In particular, when a plating process is performed after the development step, various metal films that can serve as a plating base are particularly preferable.

  Further, an organic polymer material can be used as the shape control film. In this case, the glass transition temperature of the base resin contained in the shape control film is higher than the glass transition temperature of the base resin constituting the resist film. By increasing the height, it is possible to form a shape control film whose elastic modulus at the heating temperature in the baking step is higher than that of the resist film. In addition, it is preferable that the difference of the glass transition temperature of base-material resin contained in a shape control film | membrane and the glass transition temperature of base-material resin which comprises a resist film is 30 degreeC or more.

  As a material higher than the glass transition temperature of the base resin constituting the resist film, for example, a resin containing any of polyimide, polyamide as a polyimide precursor, and aromatic polymer can be given. Examples of the base resin containing an aromatic polymer include polystyrene derivatives, polyallyl ether derivatives, polyphenol derivatives, and the like.

  The method for forming the shape control film is not particularly limited, and various known methods can be used.

When an inorganic film is used as the shape control film, an RF sputtering method, a vacuum deposition method, or the like can be used as a method for forming the shape control film.
When an organic polymer material is used as the shape control film, a spin coating method or the like can be used as a method for forming the shape control film.

  In the spin coating method, it is preferable to use glycol ether esters, glycol ethers, esters, ketones, cyclic esters, alcohols, water and the like as a solvent.

Examples of the glycol ether esters include ethyl cellosolve acetate, methyl cellosolve acetate, propylene glycol monomethyl ether acetate, propylene glycol monoethyl ether acetate, and the like.
Examples of the ethers include ethyl cellosolve, methyl cellosolve, propylene glycol monomethyl ether, propylene glycol monoethyl ether, and the like.
Examples of the esters include ethyl lactate, butyl acetate, amyl acetate, and ethyl pyruvate.
Examples of the ketones include 2-heptanone and cyclohexanone.
Examples of the cyclic esters include γ-butyrolactone.
Examples of the alcohols include methanol, ethanol, propanol, isopropanol, butanol, and the like.
These solvents may be used alone or in combination of two or more.

  Further, the other components are not particularly limited as long as they do not impair the effects of the present invention, and can be appropriately selected according to the purpose. Examples include various known additives, such as solubility and coating of the composition. For the purpose of improving the properties, isopropyl alcohol, a surfactant and the like can be added.

  There is no restriction | limiting in particular as said surfactant, Although it can select suitably according to the objective, For example, what was described in the said image development process can be used.

  Further, for the purpose of increasing the elastic modulus of the shape control film, the base resin contained in the shape control film may be cross-linked. There is no restriction | limiting in particular as a crosslinking agent which bridge | crosslinks base-material resin, According to the objective, it can select suitably, For example, an amino type crosslinking agent is mentioned.

  Suitable examples of the amino crosslinking agent include melamine derivatives, urea derivatives, uril derivatives, and the like. These may be used individually by 1 type and may use 2 or more types together.

Examples of the urea derivative include urea, alkoxymethylene urea, N-alkoxymethylene urea, ethylene urea, ethylene urea carboxylic acid, and derivatives thereof.
Examples of the melamine derivative include alkoxymethylmelamine and derivatives thereof.
Examples of the uril derivative include benzoguanamine, glycoluril, and derivatives thereof.
It is more preferable to add a known thermal acid generator as a crosslinking accelerator.

  The thickness of the shape control film is preferably ½ or less of the thickness of the resist film. If the thickness of the shape control film is larger than ½ of the resist thickness, the resist does not deform during baking, and a vertical or forward tapered pattern may not be obtained.

<Baking process>
As shown in FIG. 1C, the baking process is not particularly limited except that the resist film and the shape control film are baked (heated), and can be appropriately selected according to the purpose. Preferably, it is done. If the baking temperature is lower than 80 ° C., the deformation of the resist does not proceed sufficiently. If the baking temperature is higher than 180 ° C., the flow of the resist becomes violent and a uniform film may not be formed.

<Other processes>
There is no restriction | limiting in particular as said other process, Although it can select suitably according to the objective, For example, a shape control film | membrane removal process, post-exposure baking (PEB), etc. are mentioned.

-Shape control film removal process-
As shown in FIG. 1D, the shape control film removing step is a step of removing the shape control film. However, if the resist film is left and only the shape control film is removed, the method and material are limited. It can be appropriately selected depending on the purpose.

In addition, the semiconductor device manufacturing method and mask manufacturing method (resist pattern forming method) of the present invention can be easily and efficiently formed with a high resolution and a fine resist pattern at low cost without pattern loss or dimensional variation. Suitable for forming various resist patterns such as line & space patterns, hole patterns (for contact holes, etc.), pillar (pillar) patterns, trench (groove) patterns, line patterns, etc. The resist pattern formed by the above can be used, for example, as a mask pattern, a reticle pattern, etc., such as a metal plug, various wirings, a magnetic head, an LCD (liquid crystal display), a PDP (plasma display panel), a SAW filter (elastic surface) Functional components such as wave filters), light distribution Optical components used in the connection, fine components such as microactuators, can be suitably used for manufacturing a semiconductor device, it can be suitably used in the method of manufacturing a semiconductor device of the present invention to be described later.
More specifically, as a pattern, by using the resist pattern formed by the resist pattern forming method as a mask and performing selective vapor deposition, etching, etc., a fine line made of metal or other material having a constant and very narrow line width. A device having a processed pattern can be manufactured. For example, a semiconductor device having a wiring with a line width of about 50 nm can be manufactured.

(Resist pattern shape control material)
The resist pattern shape control material forms a shape control film formed in the resist pattern forming method.

(Semiconductor device)
In the semiconductor device, a resist pattern is formed by the resist pattern forming method.

(Magnetic head)
The magnetic head has a resist pattern formed by the resist pattern forming method.

(mask)
The mask is a resist pattern formed by the resist pattern forming method.

  Examples of the present invention will be described below, but the present invention is not limited to the following examples.

(Preparation Example 1)
A resist (main chain breaking type positive resist) material having the following composition was prepared, and the prepared material was designated as resist 1.
(1) Base resin: Polymethylmethacrylate (Sigma Aldrich Japan Co., Ltd., Mw = 35,000) / 100 parts by weight (2) Solvent: Anisole (Kanto Chemical Co., Inc.) / 900 parts by weight

  In addition, it was 109 degreeC when the glass transition temperature of base-material resin (polymethylmethacrylate) of the said resist 1 was measured with the Seiko Instruments Inc. differential scanning calorimeter DSC6220.

(Preparation Example 2)
A resist (chemically amplified resist) material having the following composition was prepared, and the prepared material was designated as resist 2.
(1) Base resin: 30% t-butoxycarbonyl (t-Boc) -modified poly p-hydroxystyrene (manufactured by Maruzen Petrochemical Co., Ltd.) / 100 parts by weight (2) Photoacid generator: diphenyliodonium nonafluorobutane Sulfonate (Midori Chemical Co., Ltd.) / 5 parts by weight (3) Additive: Hexylamine (Kanto Chemical Co., Ltd.) / 0.2 part by weight (4) Solvent: Propylene glycol monomethyl ether acetate (Kanto Chemical Co., Ltd.) ) / 700 parts by weight

  In addition, when the glass transition temperature of the base resin (30% t-butoxycarbonyl (t-Boc) -modified poly p-hydroxystyrene) of the resist 2 was measured with a differential scanning calorimeter DSC6220 manufactured by Seiko Instruments Inc., 146 ° C.

(Preparation Example 3)
A resist pattern shape control material having the following composition was prepared, and the prepared material was used as a film A forming material.
(1) Base resin: poly-p-hydroxystyrene (Nippon Soda Co., Ltd.) / 100 parts by weight (2) Solvent: ethyl lactate (Kanto Chemical Co., Ltd.)

  Here, the addition amount of the ethyl lactate is adjusted according to the thickness of the shape control film (coating A) to be formed, and is 1,350 weight when the thickness of the shape control film (coating A) is 500 angstroms. Parts, and when the thickness of the shape control film (coating A) was 2,000 angstroms or 2,100 angstroms, it was 1,100 parts by weight.

  In addition, it was 142 degreeC when the glass transition temperature of base-material resin (poly-p-hydroxystyrene) of the said film A formation material was measured with the Seiko Instruments Inc. differential scanning calorimeter DSC6220.

(Preparation Example 4)
A resist pattern shape control material having the following composition was prepared, and the prepared material was used as a film B forming material.
(1) Base resin: poly-p-hydroxystyrene (Nippon Soda Co., Ltd.) / 100 parts by weight (2) Thermal acid generator: 2-nitrobenzyl tosylate (Midori Chemical Co., Ltd.) / 2 weight Part (3) Crosslinker: Hexamethoxymethylmelamine (Tokyo Chemical Industry Co., Ltd.) / 6 parts by weight (4) Solvent: Ethyl lactate (Kanto Chemical Co., Ltd.) / 1,450 parts by weight

  The glass transition temperature of the base resin (poly-p-hydroxystyrene) cross-linked with the cross-linking agent (hexamethoxymethylmelamine) of the coating film B forming material was measured with a differential scanning calorimeter DSC 6220 manufactured by Seiko Instruments Inc. As a result, it was 158 degreeC.

(Preparation Example 5)
A resist pattern shape control material having the following composition was prepared, and the prepared material was used as a film C forming material.
(1) Resin solution: NANO PMGI SF (manufactured by MICROCHEM)
(2) Diluent: cyclopentanone (manufactured by Kanto Chemical Co., Inc.)

  In addition, the solvent of the resin solution of the coating film C forming material was dried, and the glass transition temperature of the solid containing the base resin (polydimethylglutarimide) was measured with a differential scanning calorimeter DSC 6220 manufactured by Seiko Instruments Inc. However, it was 186 degreeC.

(Example 1)
-Formation of resist pattern-
The resist 1 obtained in Preparation Example 1 was applied on a Si substrate by spin coating (conditions: 2500 rpm, 60 seconds). Next, the applied resist 1 was baked (heated) at 180 ° C. for 90 seconds to form a resist film having a thickness of 4,000 angstroms (resist film forming step).

  Next, a line having a width of 0.07 μm was drawn on the formed resist film using an electron beam exposure device with an acceleration voltage of 50 KeV (exposure light irradiation step).

  Further, development was performed for 60 seconds using a developer in which methyl ethyl ketone and methyl isobutyl ketone were mixed at a weight ratio of 1: 1 (development process).

Further, a shape control film made of Al ₂ O ₃ was formed on the resist film and in the opening provided by the developing step by RF sputtering so as to have a thickness of 500 Å (shape control film forming step). In RF sputtering, the target was Al ₂ O ₃ , the sputtering gas was Ar, and the RF power was 1 kW. In this specification, Al ₂ O ₃ including Al _x O _{y in} which Al atoms and O atoms deviate from the stoichiometric composition is described.

  Thereafter, the resist film and the shape control film were baked at 140 ° C. for 5 minutes (baking step).

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Example 2)
-Formation of resist pattern-
In the shape control film forming step, instead of forming the shape control film made of Al ₂ O ₃ by RF sputtering so as to have a thickness of 500 Å, the shape control film made of Au is made to have a thickness of 500 Å. A resist pattern was formed in the same manner as in Example 1 except that the resist pattern was formed by vacuum evaporation. The vacuum deposition was performed under the conditions of a degree of vacuum of 5 × 10 ⁻⁶ Torr and 100 Å / min.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Example 3)
-Formation of resist pattern-
In the shape control film forming step, instead of forming the shape control film made of Al ₂ O ₃ by RF sputtering so as to have a thickness of 500 Å, the coating A forming material prepared in Preparation Example 3 is spin-coated. A resist pattern was formed in the same manner as in Example 1 except that the shape control film was formed so as to have a thickness of 500 angstroms by application.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

Example 4
-Formation of resist pattern-
In the shape control film forming step, instead of forming the shape control film made of Al ₂ O ₃ by RF sputtering so as to have a thickness of 500 Å, the coating A forming material prepared in Preparation Example 3 is spin-coated. A resist pattern was formed in the same manner as in Example 1 except that the shape control film was formed so as to have a thickness of 2,000 angstroms by application.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Example 5)
-Formation of resist pattern-
In the shape control film forming step, instead of forming the shape control film made of Al ₂ O ₃ by RF sputtering so as to have a thickness of 500 Å, the coating A forming material prepared in Preparation Example 3 is spin-coated. A resist pattern was formed in the same manner as in Example 1 except that the shape control film was formed so as to have a thickness of 2,100 angstroms by application.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Example 6)
-Formation of resist pattern-
In the shape control film forming step, instead of forming the shape control film made of Al ₂ O ₃ by RF sputtering so as to have a thickness of 500 Å, the coating B forming material prepared in Preparation Example 4 is spin-coated. A resist pattern was formed in the same manner as in Example 1 except that the shape control film was formed so as to have a thickness of 500 angstroms by application.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Example 7)
-Formation of resist pattern-
In the shape control film forming step, instead of forming the shape control film made of Al ₂ O ₃ by RF sputtering so as to have a thickness of 500 Å, the coating C forming material prepared in Preparation Example 5 is spin-coated. A resist pattern was formed in the same manner as in Example 1 except that the shape control film was formed so as to have a thickness of 500 angstroms by application.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Comparative Example 1)
-Formation of resist pattern-
A resist pattern was formed in the same manner as in Example 1 except that the shape control film forming step and the baking step were not performed.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Comparative Example 2)
-Formation of resist pattern-
A resist pattern was formed in the same manner as in Example 1 except that the shape control film forming step was not performed.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 1.

(Elastic modulus measurement)
Samples were prepared by forming each film having the same composition as the resist film and the shape control film in Examples 1 to 7 and Comparative Examples 1 and 2 so as to have a thickness of 3,000 angstroms or more, and an elastic modulus measuring device (Nano Indenter, Nano Instruments). Was used to measure the elastic modulus at 140 ° C. (heating temperature in the baking step). The measurement results are shown below.
(1) Resist film (resist 1) 1 GPa or less (2) Al ₂ O ₃ film 290 GPa
(3) Au film 80 GPa
(4) Coating A 2-3 GPa
(5) Coating B 3-4GPa
(6) Coating C 3-4 GPa

(Example 8)
-Formation of resist pattern-
The resist 2 obtained in Preparation Example 2 was applied on a Si substrate by spin coating (conditions: 2500 rpm, 60 seconds). Next, the applied resist 1 was baked at 180 ° C. for 90 seconds to form a resist film having a thickness of 4,000 angstroms (resist film forming step).

  Next, a line having a width of 0.07 μm was drawn on the formed resist film using an electron beam exposure device with an acceleration voltage of 50 KeV (exposure light irradiation step).

  Further, baking was performed at 120 ° C. for 90 seconds (post-exposure baking, PEB).

  Furthermore, development was performed for 60 seconds using a developer (2.38% tetramethylammonium hydroxide (TMAH) aqueous solution) (development process).

Further, a shape control film made of Al ₂ O ₃ was formed on the resist film and in the opening provided by the developing step by RF sputtering so as to have a thickness of 500 Å (shape control film forming step). In RF sputtering, the target was Al ₂ O ₃ , the sputtering gas was Ar, and the RF power was 1 kW. In this specification, Al ₂ O ₃ including Al _x O _{y in} which Al atoms and O atoms deviate from the stoichiometric composition is described.

  Thereafter, the resist film and the shape control film were baked at 150 ° C. for 5 minutes (baking step).

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 2.

(Comparative Example 3)
-Formation of resist pattern-
A resist pattern was formed in the same manner as in Example 8 except that the shape control film forming step and the baking step were not performed.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 2.

(Comparative Example 4)
-Formation of resist pattern-
A resist pattern was formed in the same manner as in Example 8 except that the shape control film forming step was not performed.

  The cross section of the resist pattern obtained as described above is observed with a scanning microscope (SEM). As shown in FIGS. 2A and 2B, the resist bottom opening length (not including the shape control film), the taper angle, and the side wall The linear distance was measured. In the measurement, the shape control film was removed with a solvent or the like as necessary. The measurement results are shown in Table 2.

(Elastic modulus measurement)
A sample in which each film having the same composition as the resist film and the shape control film in Example 8 and Comparative Examples 3 to 4 was formed to be 3,000 angstroms or more was prepared, and an elastic modulus measuring device (Nano Indenter, manufactured by Nano Instruments) ) Was used to measure the elastic modulus at 150 ° C. (heating temperature in the baking step). The measurement results are shown below.
(1) Resist film (resist 2) 1 GPa or less (2) Al ₂ O ₃ film 290 GPa

  As apparent from the above results (Tables 1 and 2), by using the semiconductor device manufacturing method (mask manufacturing method) of the present invention, the resist side wall is rounded and the resist bottom opening length varies. It has been found that the resist pattern can be prevented from becoming an inversely tapered shape while preventing the occurrence of a reverse taper, and a vertical pattern and, if necessary, a forward tapered pattern can be formed.

Example 9
-Flash memory and its manufacture-
Example 9 is an example of a semiconductor device of the present invention using the resist pattern shape control material of the present invention and a manufacturing method thereof. In Example 9, the following resist films 26, 27, 29 and 32 were formed by the same method as in Examples 1-8.

  3 and 4 are top views (plan views) of a FLASH EPROM called a FLOTOX type or an ETOX type, and FIGS. 5 to 13 are schematic cross-sectional views for explaining an example of a manufacturing method of the FLASH EPROM. In these figures, the left figure is a memory cell portion (first element region), and is a cross section in the gate width direction (X direction in FIGS. 3 and 4) of a portion where a MOS transistor having a floating gate electrode is formed ( (A direction cross section) is a schematic diagram, the central view is a memory cell portion of the same portion as the left view, and is a cross section (B direction) in the gate length direction (Y direction in FIGS. 3 and 4) orthogonal to the X direction. Cross section) is a schematic view, and the right figure is a cross section (cross section in the direction A in FIGS. 3 and 4) of a portion where a MOS transistor is formed in the peripheral circuit portion (second element region).

First, as shown in FIG. 5, a field oxide film 23 made of a SiO ₂ film was selectively formed in an element isolation region on a p-type Si substrate (semiconductor substrate) 22. Thereafter, the first gate insulating film 24a in the MOS transistor in the memory cell portion (first element region) is formed by SiO ₂ film by thermal oxidation so that the thickness becomes 100 to 300 mm (10 to 30 nm). In the process, the second gate insulating film 24b in the MOS transistor in the peripheral circuit portion (second element region) was formed of a SiO ₂ film by thermal oxidation so as to have a thickness of 100 to 500 mm (10 to 50 nm). When the first gate insulating film 24a and the second gate insulating film 24b have the same thickness, an oxide film may be formed simultaneously in the same process.

Next, in order to form a MOS transistor having an n-type depletion type channel in the memory cell portion (left and center diagrams in FIG. 5), the peripheral circuit portion (in FIG. (Right figure) was masked with a resist film 26. Then, phosphorus (P) or arsenic (As) with a dose amount of 1 × 10 ¹¹ to 1 × 10 ¹⁴ cm ⁻² is introduced as an n-type impurity into a channel region immediately below the floating gate electrode by an ion implantation method, A first threshold control layer 25a was formed. Note that the dose amount and the conductivity type of the impurity at this time can be appropriately selected depending on whether the depletion type or the accumulation type is used.

Next, in order to form a MOS transistor having an n-type depletion type channel in the peripheral circuit portion (the right diagram in FIG. 6), a memory cell portion (the left diagram in FIG. The resist film 27 was masked. Then, phosphorus (P) or arsenic (As) having a dose amount of 1 × 10 ¹¹ to 1 × 10 ¹⁴ cm ⁻² is introduced as an n-type impurity into a channel region immediately below the gate electrode by an ion implantation method. Two threshold control layers 25b were formed.

  Next, as the floating gate electrode of the MOS transistor in the memory cell portion (left and center diagrams in FIG. 7) and the gate electrode of the MOS transistor in the peripheral circuit portion (right diagram in FIG. 7), the thickness is 500-2. A first polysilicon film (first conductor film) 28 having a thickness of 1,000,000 (50 to 200 nm) was formed on the entire surface.

  After that, as shown in FIG. 8, the first polysilicon film 28 is patterned with a resist film 29 formed as a mask, so that the floating gate electrode 28a in the MOS transistor of the memory cell portion (the left and center views in FIG. 8) is formed. Formed. At this time, as shown in FIG. 8, patterning for defining the X direction so as to have a final dimension width is performed, and patterning for defining the Y direction is not performed, and a region to be an S / D region layer is a resist film 29. Was left coated.

Next, as shown in the left diagram and the central diagram in FIG. 9, after removing the resist film 29, the capacitor insulating film 30a made of SiO ₂ film has a thickness of about 30 mm so as to cover the floating gate electrode 28a. It formed by thermal oxidation so that it might become 200-500 mm (20-50 nm). At this time, the capacitor insulating film 30b made of the SiO ₂ film is also formed on the first polysilicon film 28 in the peripheral circuit portion (the right diagram in FIG. 9). Here, the capacitor insulating films 30a and 30b are formed of only the SiO ₂ film, but may be formed of a composite film in which two or _three SiO ₂ films and Si ₃ N ₄ films are laminated.

  Next, as shown in FIG. 9, a second polysilicon film (second conductor film) 31 serving as a control gate electrode is formed with a thickness of 500 to 2 so as to cover the floating gate electrode 28 a and the capacitor insulating film 30 a. , And a thickness of 50 to 200 nm.

  Next, as shown in FIG. 10, the memory cell portion (the left and center views in FIG. 10) is masked with a resist film 32, and the second polysilicon film 31 in the peripheral circuit portion (the right view in FIG. 10) is masked. Then, the capacitor insulating film 30b was sequentially removed by etching, and the first polysilicon film 28 was exposed.

  Next, as shown in FIG. 11, the second polysilicon film 31, the capacitor insulating film 30a of the memory cell portion (the left figure and the middle figure in FIG. 11), and the first poly film which is only patterned to define the X direction. The silicon film 28a is patterned using the resist film 32 as a mask to define the Y direction so as to be the final dimension of the first gate portion 33a, and the control gate electrode 31a / capacitor insulation having a width of about 1 μm in the Y direction. A stack of the film 30c / floating gate electrode 28c is formed, and the second gate portion 33b is finally formed with respect to the first polysilicon film 28 of the peripheral circuit portion (the right diagram in FIG. 11) using the resist film 32 as a mask. Patterning was performed so as to obtain a proper size, and a gate electrode 28b having a width of about 1 μm was formed.

Next, using the stack of the control cell electrode 31a / capacitor insulating film 30c / floating gate electrode 28c of the memory cell portion (left and center views in FIG. 12) as a mask, the dose of 1 × is applied to the Si substrate 22 in the element formation region. 10 ¹⁴ to 1 × 10 ¹⁶ cm ⁻² of phosphorus (P) or arsenic (As) is introduced by an ion implantation method to form n-type S / D (source / drain) region layers 35a and 35b. Using the gate electrode 28b of the peripheral circuit portion (the right diagram in FIG. 12) as a mask, phosphorus (P) having a dose amount of 1 × 10 ¹⁴ to 1 × 10 ¹⁶ cm ⁻² as an n-type impurity on the Si substrate 22 in the element formation region or Arsenic (As) was introduced by ion implantation to form S / D region layers 36a and 36b.

  Next, the first gate portion 33a of the memory cell portion (left and center views of FIG. 13) and the second gate portion 33b of the peripheral circuit portion (right portion of FIG. 13) are formed on the interlayer insulating film 37 made of PSG film. Was formed so as to have a thickness of about 5,000 mm (500 nm).

Thereafter, contact holes 38a and 38b and contact holes 39a and 39b are formed in the interlayer insulating film 37 formed on the S / D region layers 35a and 35b and the S / D region layers 36a and 36b, and then the S / D electrode 40a. And 40b and S / D electrodes 41a and 41b were formed.
As described above, as shown in FIG. 13, a FLASH EPROM was manufactured as a semiconductor device.

  In this FLASH EPROM, the second gate insulating film 24b of the peripheral circuit portion (the right figure in FIGS. 5 to 13) is covered with the first polysilicon film 28 or the gate electrode 28b from the beginning to the end after the formation (FIG. 5). 5 to the right in FIG. 13), the second gate insulating film 24 b still maintains the thickness when it is first formed. Therefore, the thickness of the second gate insulating film 24b can be easily controlled, and the conductivity type impurity concentration for controlling the threshold voltage can be easily adjusted.

  In this embodiment, the first gate portion 33a is formed by first patterning with a predetermined width in the gate width direction (X direction in FIGS. 3 and 4) and then in the gate length direction (in FIGS. 3 and 4). Patterning is performed in the Y direction) to obtain a final predetermined width, but conversely, after patterning with a predetermined width in the gate length direction (Y direction in FIGS. 3 and 4), the gate width direction (in FIGS. 3 and 4). The final predetermined width may be obtained by patterning in the X direction).

The manufacturing example of the FLASH EPROM shown in FIGS. 14 to 16 is the same as the above embodiment except that the steps shown in FIG. 9 in the embodiment 9 are changed as shown in FIGS. That is, as shown in FIG. 14, on the second polysilicon film 31 in the memory cell portion (left and center views in FIG. 14) and on the first polysilicon film 28 in the peripheral circuit portion (right view in FIG. 14). Further, a refractory metal film (fourth conductor film) 42 made of a tungsten (W) film or a titanium (Ti) film is formed so as to have a thickness of about 2,000 mm (200 nm), and a polycide film is provided. Only differs from the above embodiment. The subsequent steps of FIG. 14, that is, the steps shown in FIGS. 15 to 16 were performed in the same manner as in FIGS. Description of steps similar to those in FIGS. 11 to 13 is omitted, and in FIGS. 14 to 16, the same components as those in FIGS. 11 to 13 are denoted by the same symbols.
As described above, as shown in FIG. 16, a FLASH EPROM was manufactured as a semiconductor device.
In FIG. 15, reference numeral 44a denotes a first gate part, and 44b denotes a second gate part. Further, in FIG. 16, 45a, 45b, 46a, 46b indicate S / D (source / drain) region layers, 47 indicates an interlayer insulating film, 48a, 48b, 49a, 49b indicate contact holes, 50a, Reference numerals 50b, 51a, 51b denote S / D (source / drain) electrodes.

In this FLASH EPROM, since the refractory metal films (fourth conductor films) 42a and 42b are provided on the control gate electrode 31a and the gate electrode 28b, the electric resistance value can be further reduced.
Here, although the refractory metal films (fourth conductor film) 42a and 42b are used as the refractory metal film (fourth conductor film), a refractory metal silicide film such as a titanium silicide (TiSi) film is used. May be used.

A manufacturing example of the FLASH EPROM shown in FIGS. 17 to 19 is the same as that of the ninth embodiment in that the second gate portion 33c of the peripheral circuit portion (second element region) (the right diagram in FIG. 17) is also the memory cell portion ( First polysilicon region 28b (first conductor film) / SiO ₂ film 30d (capacitor insulating film) / second, similarly to the first gate portion 33a in the first element region (the left and center diagrams in FIG. 17). The gate electrode is formed by short-circuiting the first polysilicon film 28b and the second polysilicon film 31b as shown in FIG. 18 or FIG. Except for the differences, the embodiment is the same as the above embodiment.

Here, as shown in FIG. 18, the first polysilicon film 28b (first conductor film) / SiO ₂ film 30d (capacitor insulating film) / second polysilicon film 31b (second conductor film) is penetrated. The opening 52a is formed, for example, on a portion different from the second gate portion 33c shown in FIG. 17, for example, on the insulating film 54, and a third conductor film such as a W film or a Ti film is formed in the opening 52a. By embedding the melting point metal film 53a, the first polysilicon film 28b and the second polysilicon film 31b are short-circuited. Further, as shown in FIG. 19, an opening 52b that penetrates the SiO ₂ film 30d (capacitor insulating film) / second polysilicon film 31b (second conductor film) is formed, and a lower layer is formed at the bottom of the opening 52b. After the first polysilicon film 28b is exposed, a third conductor film, for example, a refractory metal film 53b such as a W film or a Ti film is embedded in the opening 52b, whereby the first polysilicon film 28b and the first polysilicon film 28b are formed. 2 The polysilicon film 31b is short-circuited.

In this FLASH EPROM, since the second gate portion 33c of the peripheral circuit portion has the same structure as the first gate portion 33a of the memory cell portion, the peripheral circuit portion is simultaneously formed when the memory cell portion is formed. It can be formed, the manufacturing process can be simplified, and it is efficient.
Although the third conductor film 53a or 53b and the refractory metal film (fourth conductor film) 42 are separately formed here, they may be formed simultaneously as a common refractory metal film. Good.

(Example 10)
-Manufacture of magnetic heads-
Example 10 relates to the manufacture of a composite type ceramic head as an application example of a resist pattern formed by the method for manufacturing a semiconductor device of the present invention.
FIG. 20 is an exploded perspective view showing the main part of the composite magnetic head. In this exploded perspective view, in order to clarify the inside of the magnetic head, the uppermost protective layer is omitted, and the left half as viewed in the drawing of the recording head WR is omitted.

A composite magnetic head shown in FIG. 20 includes a substrate 101, a substrate protective film 102 formed on the substrate 101, a reproducing head RE formed on the substrate protective film 102, and the reproducing head RE. A recording head WR formed on the recording head WR and a protective layer 117 (not shown) formed on the recording head WR are provided.
The reproducing head RE includes a reproducing lower magnetic shield layer 103, a first nonmagnetic insulating layer (reproducing lower gap layer) 104 formed on the lower magnetic shield layer 103, and the first nonmagnetic layer. A magnetic transducer 105 formed on the insulating layer 104, a pair of terminals 106a and 106b (only one shown) formed at both ends of the magnetic transducer 105, the magnetic transducer 105, and a pair of terminals 106a and 106a A second non-magnetic insulating layer (reproduction upper gap layer) 107 formed on 106b, and a reproduction upper magnetic shield layer 108 formed on the second non-magnetic insulating layer 107. Yes. That is, in the reproducing head RE, both the Z direction surfaces of the magnetic transducer 105 and the terminals 106a and 106b are covered with the first nonmagnetic insulating layer 104 and the second nonmagnetic insulating layer 107, and further the first nonmagnetic insulating layer. The both sides of the layer 104 and the second nonmagnetic insulating layer 107 are covered with the lower magnetic shield layer 103 and the upper magnetic shield layer 108.

The reproduction upper magnetic shield layer 108 is a merge type that is also used as a lower magnetic pole of a recording head WR described later, and serves as a reproduction upper magnetic shield layer and a recording lower magnetic pole. Accordingly, the reproducing upper magnetic shield layer / recording lower magnetic pole 108 may hereinafter be referred to as a (reproducing) upper magnetic shield layer or a (recording) lower magnetic pole.
The recording head WR includes a recording lower magnetic pole 108, a recording gap layer 109, a spiral recording coil 112 disposed in the recording gap layer 109, a third nonmagnetic insulating layer 110 covering the recording coil 112, and a second It has four nonmagnetic insulating layers 111 and a recording upper magnetic pole 116 formed on the third nonmagnetic insulating layer 110 and the fourth nonmagnetic insulating layer 111. That is, the recording head WR covers the gap layer 109 sandwiching the recording coil 112 and both surfaces of the third nonmagnetic insulating layer 110 and the fourth nonmagnetic insulating layer 111 with the recording lower magnetic pole 108 and the recording upper magnetic pole 116. It has a structure.

The recording coil 112 does not exist in the spiral central region 113 of the recording coil 112, and the recording upper magnetic pole 116 is recessed and connected to the recording lower magnetic pole 108 in the central region 113. Yes. Further, the recording upper magnetic pole 116 is tapered toward the magnetic recording medium 120, and this portion is particularly referred to as a pole 116a.
As described above, the composite magnetic head shown in FIG. 20 has a piggyback structure in which the recording head WR is added to the back of the reproducing head RE. In order to clarify the positional relationship of each element of the magnetic head, as shown in the figure, the ABS surface of the recording upper magnetic pole 116 is in the X direction, the depth direction of the magnetic head when viewed from the ABS surface is the Y direction, and the magnetic heads are stacked. Let the direction be the Z direction.

Next, each element constituting such a composite magnetic head will be described.
The substrate 101 is a substantially disk-shaped wafer made of a material such as alumina, titanium, carbide (Al ₂ O ₃ TiC), ferrite, or calcium titanate.
The substrate protective layer 102, the first nonmagnetic insulating layer 104, the second nonmagnetic insulating layer 107, and the recording gap layer 109 are all made of, for example, Al ₂ O ₃ . The gap layer 109 has a film thickness of about 0.2 to 0.6 μm, and is written on the recording medium 120 by the pole 116 a of the recording upper magnetic pole 116 and the ABS surface of the recording lower magnetic pole 108 located on both sides of the gap layer 109. The recording magnetic field is generated.

  The reproduction lower magnetic shield layer 103, the reproduction upper magnetic shield layer / recording lower magnetic pole 108, and the recording upper magnetic pole 116 are all formed of, for example, a NiFe alloy. Alternatively, a Co-based alloy such as CoNiFe or CoZr, for example, an Fe-based alloy such as FeN or FeNZr can be used. Further, the film thickness of the recording upper magnetic pole 116 is about several μm.

  As the magnetic transducer 105, for example, an anisotropic magnetoresistive element (MR element), typically a giant magnetoresistive element (GMR element) such as a spin valve magnetoresistive element can be used. . A pair of terminals 106 a and 106 b are connected to both ends of the magnetic transducer 105, and a constant current (sense current) flows to the magnetic transducer 105 via these terminals during a reading operation.

The composite magnetic head is positioned so as to be opposed to the recording medium 120 such as a magnetic disk by a small distance (flying amount), and moves relative to the recording medium 120 in the track longitudinal direction. However, the magnetic recording information recorded on the magnetic recording medium 120 is read by the reproducing head RE, and the information is magnetically written on the recording medium 120 by the recording head WR.
A surface of the magnetic head that faces the magnetic recording medium 120 is called an ABS (Air Bearing Surface) or an air bearing surface.

21A is an ABS cross-sectional view of the magnetic head as viewed from the recording medium side, and FIG. 21B is a cross-sectional view of the YZ plane passing through the center of the recording coil. FIG. 21A corresponds to a cross-sectional view taken along line AA in FIG. 21B.
As shown in FIGS. 21A and 21B, the magnetic head includes, in order from the bottom, a substrate 101, a protective layer 102 formed on the substrate 101, and a lower magnetic shield layer 103 formed on the protective layer 102. A first nonmagnetic insulating layer 104, a magnetic transducer 105 formed on the first nonmagnetic insulating layer 104, a pair of terminals 106a and 106b, a magnetic transducer 105, and a pair of A second nonmagnetic insulating layer 107 formed on the first nonmagnetic insulating layer 104 and an upper magnetic layer formed on the second nonmagnetic insulating layer 107 so as to cover the terminals 106a and 106b. A shield layer / lower magnetic pole 108; a gap layer 109 formed on the lower magnetic pole 108; a third nonmagnetic insulating layer 110 formed on the gap layer 109; A spiral recording coil 112 formed on the insulating layer 110, a fourth nonmagnetic insulating layer 111 covering the recording coil 112, and a plating formed on the fourth nonmagnetic insulating layer 111 A base layer 114, an upper electrode 116 formed on the plating base layer 114, and a protective layer 117 formed on the upper electrode 116 are provided.

Here, as shown in a partially enlarged view related to FIG. 21A, a magnetic transducer 105 is disposed between the first nonmagnetic insulating layer 104 and the second nonmagnetic insulating layer 107, A pair of terminals 106a and 106b are connected to both ends of the magnetic transducer 105, respectively.
As shown in FIG. 21B, the magnetic head is ABS, and the upper magnetic pole 116 is a tapered pole 116a. As will be described in detail later, a pair of grooves or recesses 108a and 108b are formed on both sides of the portion directly below the pole 116a on the surface of the lower electrode 108 facing the upper magnetic pole 116.

Next, the manufacture of the composite magnetic head will be described below.
22A to 22C and FIGS. 23A to 23C are cross-sectional views of the ABS of the magnetic head in each manufacturing process, through all of these drawings. FIGS. 24A to 24C and FIGS. 25A to 25C are sectional views of the YZ plane passing through the center of the recording coil in each manufacturing process through these drawings.

First, the reproducing lower magnetic shield layer 103 was formed. Specifically, as shown in FIG. 24A, a substrate 101 was prepared, a substrate protective film 102 was formed on the substrate 101, and a lower magnetic shield layer 103 was formed on the substrate protective film 102.
Next, a first nonmagnetic insulating layer (reproduction lower gap layer) 104 was formed on the lower magnetic shield layer 103.

Next, the magnetic transducer 105 and the pair of terminals 106a and 106b were formed. Specifically, an MR film, a GMR film, or the like was formed on the first nonmagnetic insulating layer 104 and patterned to form a magnetic transducer 105. Next, a pair of terminals 106 a and 106 b were formed at both ends of the magnetic transducer 105.
A second nonmagnetic insulating layer (reproduction upper gap layer) 107 was formed on the first nonmagnetic insulating layer 104 so as to cover the magnetic transducer 5 and the pair of terminals 106a and 106b.

  Next, on the second nonmagnetic insulating layer 107, a reproducing upper magnetic shield layer / recording lower magnetic pole 108 was formed. The lower magnetic pole 108 can be formed by a plating method or a sputtering method. When the lower electrode 108 is formed by a plating method, a Ni-base alloy or a Co-based alloy such as CoNiFe is used. After the plating base layer 114 is formed in advance by sputtering or vapor deposition, a number is obtained by electrolytic plating. The film thickness was about μm. When the lower electrode 108 was formed by sputtering, an Fe alloy such as FeN or FeNZr or a Co alloy such as CoZr was used. In this case, the plating base layer is unnecessary.

Next, a recording gap layer 109 was formed on the recording lower magnetic pole 108. The recording gap layer 109 is formed using, for example, Al ₂ O ₃ , SiO ₂ or the like.
However, if a film having a high etching rate, such as SiO ₂ , is used alone as the recording gap layer 109, a third nonmagnetic insulating layer (resist thermosetting (hard cure) layer), a recording coil, and a second coil will be described later. In the process of forming the fourth nonmagnetic insulating layer (resist thermosetting (hard cure) layer), the thickness of the recording gap layer 109 may be reduced. Therefore, a cap protective layer may be provided on the recording gap layer 109 as desired in order to avoid a decrease in the thickness of the recording gap layer 109.

  Next, a third nonmagnetic insulating layer 110 was formed on the gap layer 109. The third nonmagnetic insulating layer 110 is applied by a spin coating method using a positive resist, patterned to remove a portion corresponding to the central region of the spiral recording coil 112, and then thermally cured (hard cured). ) To form.

Next, the recording coil 112 was formed.
First, a fourth nonmagnetic insulating layer 111 was formed on the third nonmagnetic insulating layer (resist pattern formed using the resist composition of the present invention) 110 so as to cover the recording coil 112. 22A and 24A show the shape of the magnetic head at this stage. Similarly to the third nonmagnetic insulating layer 110, the fourth nonmagnetic insulating layer 111 is also applied by spin coating using a positive resist and patterned to correspond to the central region of the spiral recording coil 112. Then, it was formed by heat curing (hard curing). Thus, a hole 113 reaching the lower magnetic pole 108 was formed in the central region of the recording coil 112. The hole 113 may be formed at a time after the third nonmagnetic insulating layer 110 and the fourth nonmagnetic insulating layer 111 are formed.

Next, as shown in FIGS. 22B and 24B, a plating base layer 114 was formed. Specifically, the plating base layer 114 made of NiFe was thinly formed on the fourth nonmagnetic insulating layer 111 and the gap layer 109 including the inner surface of the hole 113 by sputtering or vapor deposition.
Next, the upper magnetic pole 116 was formed. Specifically, the resist composition 115 of the present invention prepared in Example 10 is applied on the plating base layer 114 to form a resist film 115, which is exposed and developed, and an opening is formed at the location where the upper magnetic pole is formed. Part 115a was formed.

  Next, as shown in FIGS. 22C and 24C, an upper magnetic pole 116 made of NiFe was formed in the opening 115a of the resist film 115 to a thickness of several μm by electrolytic plating. The upper magnetic pole 116 is tapered toward the magnetic recording medium 120 in the vicinity of the magnetic recording medium 120, and has an elongated pole shape 116a in a region facing the magnetic recording medium. The upper magnetic pole 116 is connected to the lower magnetic pole 108 through a hole 113 located in the central region of the spiral recording coil 112.

  Next, as shown in FIGS. 23A and 25A, the pole 116a of the upper electrode 116 and the upper layer portion of the lower electrode 108 were partially trimmed by an ion milling method and shaped into a predetermined shape. Specifically, before dividing the substrate 101, both sides of the pole 116a in contact with the gap layer 109 in the upper magnetic pole 116 were trimmed by ion milling and shaped into a predetermined shape. At the same time, the lower magnetic pole 108 positioned below the pole 116 a was partially trimmed to form a groove or recess 108 a having a predetermined shape in the upper layer portion of the lower magnetic pole 108.

  After finishing this trimming operation, as shown in FIGS. 23B and 25B, the plating base layer 114 exposed except for the upper magnetic pole 116 was removed by an ion milling method. At this time, the upper magnetic pole 116 also decreases by a thickness corresponding to the plating base layer 114. However, since the plating base layer 114 and the upper magnetic pole 116 are formed of the same material, the plating base remaining below the upper magnetic pole 116 is formed. Layer 114 is incorporated as part of top pole 116 so that top pole 116 is substantially of the original thickness. Thereafter, electrode pads (not shown) connected to terminals at both ends of the transducer 105, electrode pads at both ends of the recording coil 112, etc. (not shown) were formed.

  This trimming process can be performed at any time as long as it is within the period from the formation of the upper magnetic pole to before the formation of the protective layer. As for the partial trimming process of the pole 116a and the lower magnetic pole 108, the working time can be greatly reduced as compared with the conventional focused ion beam irradiation, and as a result, the manufacturing time of the magnetic head is shortened and the manufacturing cost is reduced. Reduction can be achieved. The reason for this is that, firstly, the focused ion milling method requires the work of focusing the ion beam and is manufactured sequentially in units of one head, whereas the ion milling method in the present embodiment. This is because focusing is not required, and about 10,000 heads housed on one substrate can be trimmed at the same time.

Next, as shown in FIGS. 23C and 25C, a protective layer 117 made of, for example, Al ₂ O ₃ was formed on substantially the entire upper magnetic pole 116. At this time, the groove 108 a in the lower magnetic pole 108 located on both sides of the pole 116 a was buried with the protective layer 117.
Next, the substrate 101 was divided to form a slider. In the processes so far, the processes of the respective processes are performed as one body without dividing the substrate 101. Therefore, as shown in FIG. 26A, a plurality of composite magnetic heads 118 are formed on the substrate 101 side by side in the vertical and horizontal directions (about 10,1000 on a 5-inch wafer). Here, as shown in FIG. 26B, the substrate 101 was cut and divided into a plurality of rod-like bodies 101a. Next, as shown in FIG. 26C, rail surfaces 101b and 101c were formed on the divided rod-shaped body 101a, and then the rod-shaped body 101a was further divided into a slider 119 shape.
As a result, a composite magnetic head including the reproducing head RE and the recording head WR shown in FIG. 20 was manufactured.
In this example, since the resist pattern formed by the resist pattern forming method was used when forming the upper magnetic pole and the like, the magnetic head could be manufactured with high dimensional accuracy.

(Example 11)
-Photomask manufacturing-

  A reticle was manufactured according to steps (A) to (E) shown in order in FIGS. 27A to 27E.

  Step (A): A chrome mask blank 5 made of a substrate 1 made of quartz glass and a reticle-forming metal layer 2 made of chrome is prepared, and the resist 1 used in the embodiment of the present invention is spin-coated and dried. Resist layer 3 was obtained (FIG. 27A).

  Step (B): In order to obtain a pattern of the resist layer 3 necessary for forming the reticle pattern, electron beam drawing was performed on the resist layer 3. What was used here was an electron beam drawing apparatus of a variable shaping vector scan system, and the acceleration voltage was 50 KeV (FIG. 27B).

  Step (C): After completion of the electron beam drawing, the resist layer 3 was developed. As the developer, a 1: 1 mixture of methyl ethyl ketone (manufactured by Kanto Chemical Co., Inc.) and methyl isobutyl ketone (manufactured by Kanto Chemical Co., Ltd.) was used. As a result, the electron beam irradiated portion (exposure area) of the resist layer 3 was dissolved and removed, and an opening was provided in the resist layer 3. Thereafter, in the same manner as in Example 4, a coating A was formed on the resist layer 3 and in the openings provided in the resist layer 3, and the resist layer 3 and the shape control film were baked. As a result, a resist pattern 13 as shown was obtained (FIG. 27C). Thereafter, only the coating A was selectively removed with a 2.38% aqueous tetramethylammonium hydroxide solution (manufactured by Tokyo Ohka Kogyo Co., Ltd., NMD-3).

  Step (D): Using the obtained resist pattern 13 as a mask, the underlying metal material (chrome) layer 2 was dry-etched. The etching conditions were a chlorine charging rate of 50 ml / min, an oxygen charging rate of 50 ml / min, a pressure of 0.1 Torr, and an RF power of 300 W. As a result of the etching, the chromium layer 2 not covered with the resist pattern 13 was peeled off. A reticle pattern 12 as shown was obtained (FIG. 27D).

  Step (E): As shown in the figure, a target reticle 20 having a chromium pattern deposited on a quartz glass substrate was obtained (FIG. 27E).

  The obtained resist had no misalignment, the pattern shape was accurate, and had no defects.

FIG. 1A is a sectional view for explaining the method for producing a semiconductor device of the present invention (No. 1). FIG. 1B is sectional drawing explaining the manufacturing method of the semiconductor device of this invention (the 2). FIG. 1C is a cross-sectional view for explaining the method for manufacturing a semiconductor device of the present invention (No. 3). FIG. 1D is a sectional view for explaining the method for producing a semiconductor device of the present invention (No. 4). FIG. 2A is a sectional view for explaining a resist bottom opening length, a taper angle, and a linear distance (No. 1). FIG. 2B is a cross-sectional view for explaining a resist bottom opening length, a taper angle, and a linear distance (part 2). FIG. 3 is a plan view showing a first example of a FLASH EPROM manufactured by the method for manufacturing a semiconductor device of the present invention. FIG. 4 is a plan view showing a first example of a FLASH EPROM manufactured by the method for manufacturing a semiconductor device of the present invention. FIG. 5 is a schematic explanatory view of a first example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention. FIG. 6 is a schematic explanatory view of a first example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 7 is a schematic explanatory diagram of a first example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 8 is a schematic explanatory view of a first example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 9 is a schematic explanatory view of a first example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 10 is a schematic explanatory view of a first example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 11 is a schematic explanatory view of a first example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 12 is a schematic explanatory view of a first example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 13 is a schematic explanatory view of a first example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 14 is a schematic explanatory diagram of a second example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention. FIG. 15 is a schematic explanatory view of a second example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 16 is a schematic explanatory diagram of a second example of manufacturing a FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 17 is a schematic explanatory view of a third example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention. FIG. 18 is a schematic explanatory view of a third example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 19 is a schematic explanatory view of a third example of the manufacture of FLASH EPROM by the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. FIG. 20 is an exploded perspective view showing the main part of a composite magnetic head manufactured by using the method for manufacturing a semiconductor device of the present invention. FIG. 21A is a cross-sectional view of the ABS when the magnetic head shown in FIG. 19 is viewed from the recording medium side. FIG. 21B is a sectional view of the YZ plane passing through the center of the recording coil of the magnetic head shown in FIG. FIG. 22A is a schematic explanatory diagram of the manufacture of a magnetic head using the semiconductor device manufacturing method of the present invention, and is a cross-sectional view of the ABS of the magnetic head. FIG. 22B is a schematic explanatory diagram of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 22A. FIG. 22C is a schematic explanatory diagram of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 22B. FIG. 23A is a schematic explanatory diagram of the manufacture of a magnetic head using the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. 22C. FIG. 23B is a schematic explanatory diagram of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 23A. FIG. 23C is a schematic explanatory diagram of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 23B. FIG. 24A is a corresponding view of FIG. 22A of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and is a sectional view of the YZ plane passing through the center of the recording coil. FIG. 24B is a corresponding diagram of FIG. 22B for manufacturing a magnetic head using the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. 24A. FIG. 24C is a diagram corresponding to FIG. 22C of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 24B. FIG. 25A is a diagram corresponding to FIG. 23A of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 24C. FIG. 25B is a diagram corresponding to FIG. 23B of the manufacture of the magnetic head using the semiconductor device manufacturing method of the present invention, and represents the next step of FIG. 25A. FIG. 25C is a diagram corresponding to FIG. 23C of the manufacture of the magnetic head using the method for manufacturing a semiconductor device of the present invention, and represents the next step of FIG. 25B. FIG. 26A is a schematic explanatory diagram showing a state in which a plurality of magnetic heads are formed on one wafer. FIG. 26B is a schematic explanatory diagram illustrating a state where the wafer of FIG. 26A is cut into a rod-shaped body. FIG. 26C is a schematic explanatory diagram illustrating a state in which a slider is manufactured from the wafer rod-shaped body of FIG. 26B. FIG. 27A is a cross-sectional view for explaining the mask manufacturing method of the present invention (No. 1). FIG. 27B is sectional drawing for demonstrating the manufacturing method of the mask of this invention (the 2). FIG. 27C is a cross-sectional view for explaining the mask manufacturing method of the present invention (No. 3). FIG. 27D is a cross-sectional view for explaining the mask manufacturing method of the present invention (No. 4). FIG. 27E is a cross-sectional view for explaining the mask manufacturing method of the present invention (No. 5). FIG. 28 is a cross-sectional view for explaining a forward tapered shape. FIG. 29 is a cross-sectional view for explaining a reverse taper shape. FIG. 30 is a cross-sectional view for explaining a resist pattern formed by a conventional resist pattern forming method.

Explanation of symbols

1 Substrate 2 Rectile-forming metal layer (chromium layer)
3 Resist Layer 4 Resist Pattern Shape Control Material Layer 12 Reticle Pattern 13 Resist Pattern 20 Rectyl 22 Si Substrate (Semiconductor Substrate)
23 field oxide film 24a first gate insulating film 24b second gate insulating film 25a first threshold control layer 25b second threshold control layer 26 resist film 27 resist film 28 first polysilicon layer (first conductor film)
28a Floating gate electrode 28b Gate electrode (first polysilicon film)
28c Floating gate electrode 29 Resist film 30a Capacitor insulating film 30b Capacitor insulating film 30c Capacitor insulating film 30d SiO ₂ film 31 Second polysilicon layer (second conductor film)
31a Control gate electrode 31b Second polysilicon film 32 Resist film 33a First gate part 33b Second gate part 33c Second gate part 35a S / D (source / drain) region layer 35b S / D (source / drain) region layer 36a S / D (source / drain) region layer 36b S / D (source / drain) region layer 37 Interlayer insulating film 38a Contact hole 38b Contact hole 39a Contact hole 39b Contact hole 40a S / D (source / drain) electrode 40b S / D (source / drain) electrode 41a S / D (source / drain) electrode 41b S / D (source / drain) electrode 42 refractory metal film (fourth conductor film)
42a refractory metal film (fourth conductor film)
42b refractory metal film (fourth conductor film)
44a First gate portion 44b Second gate portion 45a S / D (source / drain) region layer 45b S / D (source / drain) region layer 46a S / D (source / drain) region layer 46b S / D (source / drain) region layer Drain) region layer 47 Interlayer insulating film 48a Contact hole 48b Contact hole 49a Contact hole 49b Contact hole 50a S / D (source / drain) electrode 50b S / D (source / drain) electrode 51a S / D (source / drain) electrode 51b S / D (Source / Drain) Electrode 52a Opening 52b Opening 53a Refractory Metal Film (Third Conductor Film)
53b refractory metal film (third conductor film)
54 Insulating Film 101 Substrate 102 Substrate Protective Film 103 Reproduction Lower Magnetic Shield Layer 104 First Nonmagnetic Insulating Layer (Reproduction Lower Gap Layer)
105 Magnetic transducer 107 Second non-magnetic insulating layer (reproduction upper gap layer)
108 Playback upper magnetic shield layer (recording lower magnetic pole)
109 recording gap layer 110 third nonmagnetic insulating layer 111 fourth nonmagnetic insulating layer 112 recording coil 114 plated base layer 115 resist film 115a opening 116 recording upper magnetic pole 116a pole 119 slider 120 magnetic recording medium RE reproducing head WR recording Head 200 Substrate 201 Resist film 202 Shape control film 300 Resist side wall 400 Resist bottom opening length

Claims (6)

  Developing a resist film forming step of forming a resist film on the substrate; an exposure light irradiation step of selectively irradiating the formed resist film with exposure light; and developing the resist film irradiated with the exposure light. A development step of providing an opening in the resist film; a shape control film forming step of forming a shape control film on the resist film and in the opening; and a baking step of heating the resist film and the shape control film. A method for manufacturing a semiconductor device, wherein an elastic modulus of the shape control film is higher than an elastic modulus of the resist film at a heating temperature in the baking step.   The method for manufacturing a semiconductor device according to claim 1, wherein the shape control film is made of an inorganic film.   The said shape control film | membrane contains base resin, The glass transition temperature of base resin contained in the said shape control film is higher than the glass transition temperature of base resin which comprises the said resist film. The manufacturing method of the semiconductor device of description.   4. The method of manufacturing a semiconductor device according to claim 1, wherein a thickness of the shape control film is ½ or less of a thickness of the resist film. 5.   5. The method of manufacturing a semiconductor device according to claim 1, wherein a heating temperature in the baking step is 80 to 180 ° C. 6.   Developing a resist film forming step of forming a resist film on the substrate; an exposure light irradiation step of selectively irradiating the formed resist film with exposure light; and developing the resist film irradiated with the exposure light. A development step of providing an opening in the resist film; a shape control film forming step of forming a shape control film on the resist film and in the opening; and a baking step of heating the resist film and the shape control film. A method for manufacturing a mask, wherein an elastic modulus of the shape control film is higher than an elastic modulus of the resist film at a heating temperature in the baking step.