JP2009105772A - Iterative decoding apparatus and iterative decoding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an iterative decoding apparatus and iterative decoding method in which processing delay can be reduced by reducing computational complexity required for decoding to a turbo code including a tail bit. <P>SOLUTION: In a turbo decoder 100, a tail processing section 151, 152 calculates beforehand a path metric value β from reception likelihood of a tail portion as pre-processing of iterative decoding processing, and an iterative decoding processing section (soft determination decoding sections 111, 112, interleavers 121, 122) uses the path metric value β to perform iterative decoding only upon a code word body portion. Thus, since the need to iteratively perform decoding processing that is conventionally performed in vain, upon the tail portion is eliminated, computational complexity required for decoding to a turbo code including a tail bit is reduced, thereby reducing processing delay. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an iterative decoding apparatus and iterative decoding method for decoding a digital signal encoded using an error correction code, and more particularly to an iterative decoding apparatus and an iterative decoding method suitable for decoding a turbo encoded digital signal. About.

  In recent years, error correction codes have been used to improve data transmission rate and increase reliability in wireless and wired communication systems. Also, in a recording device such as a disk device, an error correction code is used in order to improve recording density and increase reliability.

  A turbo code has attracted attention as one of error correction codes. The turbo code is known as a code having a very high error correction capability, although it has a problem that a calculation amount required for decoding and a processing delay time are large, and is used in various systems including mobile communication.

  A communication system 1 shown in FIG. 9 is an example of a system using a turbo encoder. For example, in the case of a mobile phone downlink, the transmitting side 10 is a base station device and the receiving side 20 is a mobile phone terminal.

  In FIG. 9, the transmission side 10 includes a turbo encoder 11, a modulation / demodulation unit 12, and a transmission antenna 13. The reception side 20 includes a reception antenna 21, a radio / demodulation unit 22, and a turbo decoder 23. The transmission antenna 13 and the reception antenna 21 transmit and receive wireless signals via the wireless transmission path 30.

  The turbo decoder 11 encodes the information bit string c (n) to generate a code word {x (N), y (N), x ′ (N), y ′ (N)}. Here, n = 0 to K−1, N = 0 to K + L−1, K is the length of the information bit string, and L is the length of the tail described later.

  The modulation / radio unit 12 performs data modulation such as QAM (Quadrature Amplitude Modulation), spreading, and OFDM (Orthogonal Frequency Division Multiplexing) processing on the codeword generated by the turbo encoder, and also performs D / A conversion and carrier wave Radio processing such as superposition is performed, and a signal is output to the transmission antenna 13.

  The transmission antenna 13 outputs a radio signal. The radio signal is received by the receiving antenna 21 via the radio propagation path 30. The received signal is subjected to noise and fading in the radio propagation path 30, thereby generating waveform distortion and spectrum distortion.

  In the receiving unit 20, the signal received by the receiving antenna 21 is subjected to radio / analog processing such as frequency conversion, detection, A / D conversion, and demodulation processing corresponding to the modulation method in the radio / demodulation unit 22.

  The reception likelihood {Lx (N), Ly (N), Lx ′ (N), Ly ′ (N)} is obtained by the demodulation process. This is a soft decision value corresponding to the code word output from the turbo encoder. As this soft decision value, the log likelihood ratio of each bit may be used.

  The turbo decoder 23 receives the reception likelihood and generates a reception bit string C (n). That is, it is estimated what value is transmitted as the information bit string c (n).

  As shown in this example, a system using a turbo encoder and a turbo decoder generates a code word by a turbo encoder on the transmission side, and generates a reception likelihood corresponding to the code word on the reception side. A reception bit string is obtained by inputting the reception likelihood to the turbo decoder.

(Turbo encoder)
FIG. 10 is a configuration diagram of a turbo encoder adopted in W-CDMA, which is a mobile communication system, and is described in Non-Patent Document 1.

  The W-CDMA turbo encoder 40 a employs a configuration in which two convolutional encoders 50 a and 60 a are connected in parallel via an interleaver 41. The convolutional encoder 50a includes registers 51a to 51d and XOR calculators 52a to 52d. The interleaver 41 has a function of rearranging the input data string according to a predetermined rule.

  When the turbo encoder 40a inputs an information bit string to the input terminal 41, the bit string is output from the output terminals 42, 43, 44, and 45. Among these, the bit string x (n) output from the output terminal 42, the bit string y (n) output from the output terminal 43, and the bit string y '(n) output from the output terminal 45 are transmitted as codewords. The bit string x ′ (n) output from the output terminal 44 is not normally transmitted. Here, n = 0 to K-1.

(Trellis termination)
It is known that a convolutional code can improve error correction capability by a technique called trellis termination. Even in the turbo code, the error correction capability can be improved by using the trellis termination technique in the internal convolutional encoder.

  At the end of the trellis, after the information bit string has been input, an operation of setting the internal values of all the registers of the convolutional encoder to 0 by a predetermined method is performed. In this operation, a bit string called a tail bit output from the output terminal is transmitted.

  As a predetermined method for generating tail bits (that is, an operation method for setting the internal values of all the registers of the convolutional encoder to 0), a method for changing the internal connection of the convolutional encoder, a predetermined method for the input terminal, or the like. A method of inputting a bit string of a specified value is known, and an appropriate method is used depending on the configuration of the convolutional encoder.

  Again, the W-CDMA turbo encoder 40a will be described as an example. In order to perform the trellis termination, after the input of the information bit string to the turbo encoder 40a is completed, the internal connections of the convolutional encoders 50a and 60a are changed while retaining the contents of the registers 51a to 51d at that time. The convolutional encoders 50b and 60b are used. That is, the inputs of the convolutional encoders 50a and 60a are closed, the output of the XOR operator 52d is input to the XOR operator 52a instead of the information bit string, and the output of the XOR operator 62d is input to the XOR operator 62a.

  At this time, the bit string obtained from the output terminals 42, 43, 44, 45 is transmitted as a tail bit.

(Turbo decoding)
Next, a conventional turbo decoding method will be described. FIG. 12 is a block diagram for explaining a conventional turbo decoder.

  In FIG. 12, a turbo decoder 70 includes soft decision decoding units 71 and 72, interleavers 73 and 75, a deinterleaver 74, a reception likelihood memory 76, a selector 77, and an output terminal 78.

  Specifically, the soft decision decoders 71 and 72 use a MAP (Maximum Aposterior Probability) decoding method, a Max-log-MAP method approximating the MAP method by logarithmic calculation, a SOVA (Soft Output Viterbi Algorithm), or the like. It is done.

  The turbo decoder 70 rearranges the external value Le (n) output from the first soft decision decoding unit 71 by the interleaver 73 and inputs it to the second soft decision decoding unit 72. Further, the external value Le ′ (n) output from the second soft decision decoding unit 72 is rearranged by the deinterleaver 74 and input to the first soft decision decoding unit 71. The above is one processing unit (one cycle), and this is repeated a plurality of times. Hereinafter, this iterative process may be referred to as “iterative decoding process”. In addition, the two-step soft decision decoding process included in one cycle (here, the soft decision decoding process by the first soft decision decoding unit 71 and the second soft decision decoding unit 72) is “first step decoding process”. And “second step decoding process”.

  After sufficient repetition, the decoding result is obtained from the output terminal 78. As the number of repetitions increases, the error rate of the decoding result decreases, but a sufficient effect can be obtained with repetitions of about 8 times (8 cycles).

  Such a turbo decoder is described in Patent Document 1.

  The operation of the turbo decoder 70 will be described in more detail with reference to FIG.

  Data 81a is input data to the first soft decision decoding unit 71 in the first iteration. The data 81a includes systematic including a tail, that is, reception likelihoods Lx (0) to Lx (K + 2), and parity 1 including a tail, that is, reception likelihoods Ly (0) to Ly (K + 2). That is, in the first step decoding process of the first cycle, the codeword main body part and the tail part corresponding to the output of the convolutional encoder 50a that is the first encoder of the turbo encoder 40a on the transmission side are input.

  The first soft decision decoder 71 performs soft decision decoding with the data 81a as an input, and outputs external values Le (0) to Le (K + 2). Among these, Le (0) to Le (K−1) excluding the portion corresponding to the tail are interleaved by the interleaver and transferred to the second soft decision decoding unit 72. On the other hand, the external values Le (K) to Le (K + 2) corresponding to the tail are discarded.

  Since the data 81a includes a tail portion, the main body portion can be decoded with high accuracy. If there is no tail portion, the accuracy is greatly deteriorated particularly in the latter half of the main body portion.

  Next, the data 82a is input data to the second soft decision decoding unit 72 in the first iteration. The data 82a includes interleaved systematic (Lx (0) to Lx (K + 2)), tail Lx ′ (K) to Lx ′ (K + 2) corresponding to the systematic, and parity 2 including the tail, that is, reception likelihood. Degrees Ly ′ (0) to Ly ′ (K + 2). That is, in the second step decoding process of the first cycle, the parity codeword main body part and tail part which are the outputs of the convolutional encoder 60a which is the second encoder of the turbo encoder 40a on the transmission side, and the systematic The tail portion is included in the input data.

  The second soft decision decoder 72 performs soft decision decoding with the data 82a as input, and outputs external values Le '(0) to Le' (K + 2). Of this output, Le ′ (0) to Le ′ (K−1) excluding the portion corresponding to the tail is deinterleaved by the deinterleaver and transferred to the first soft decision decoding unit 71. On the other hand, the external values Le ′ (K) to Le ′ (K + 2) corresponding to the tail are discarded.

  Hereinafter, the first soft decision decoder 71 performs soft decision with the data 81b as an input, and then the second soft decision decoder 72 performs with the data 82b as an input. Similarly, iterative decoding is performed until the required number of iterations is reached. Except for the external value, the input signal of the “first step decoding process” is the same regardless of the cycle, and similarly, the input signal of the “second step decoding process” is also the same.

(Parallel turbo decoding)
Incidentally, a parallel turbo decoding method is known as a method for shortening the processing time of turbo decoding. Patent Document 2 discloses a method of performing turbo decoding at high speed by parallelizing soft decision decoding and an interleaver.

  FIG. 14 shows an example of a parallel turbo decoder. The parallel turbo decoder 90 has a plurality of soft decision decoders. In the example described in FIG. 14, it is assumed that four soft decision decoders 92a to 92d are provided.

  The interleaver of the parallel turbo decoder needs to be a parallel interleaver. The parallel interleaver 93 shown in FIG. 14 simultaneously receives four external values output from the soft decision decoders 92a to 92d, performs interleaving or deinterleaving, and outputs them simultaneously to the soft decision decoders 92a to 92d. The two processes in the soft decision decoders 92a to 92d correspond to the above-described one cycle.

  Since the decoding processing is performed in parallel in the four soft decision decoders 92a to 92d, the reception likelihood memory 91 needs to divide the reception likelihood into four and appropriately distribute it to the soft decision decoders 92a to 92d. There is. Here, two division methods will be described with reference to FIG. Here, as an example, the information bit length K = 512 and the tail length L = 3.

(Division method 1)
The division method 1 is a method for making the division sizes as close to each other as possible.

  When this method is used, the division size is 129 bits, 129 bits, 129 bits, and 128 bits. Since the processing delay of the parallel turbo decoder is determined according to the processing delay of the soft decision decoder to which the largest division size is assigned, when the division method 1 is used, the processing delay is maximized using the conventional parallel turbo decoder. Can be shortened.

(Division method 2)
The division method 2 is a method in which the part excluding the tail, that is, the main part of the codeword is divided equally, and the tail part is attached to the last block.

  When this method is used, the division size is 128 bits, 128 bits, 128 bits, and 131 bits. This method has an advantage that it is easily adapted to a parallel interleaver as will be described later since the division size of the main part of the codeword is uniform, but the processing delay is larger than that of the division method 1.

(New parallel interleaver)
Incidentally, the interleaving method disclosed in Patent Document 2 can be parallelized, but has a problem that the error rate characteristic is not sufficiently high. Therefore, new methods such as ARP (Almost Regular Permutation) and QPP (Quadratic Permutation Polynomial) interleavers are attracting attention.

ARP and QPP have the following properties (see Non-Patent Document 2 and Non-Patent Document 3).
(1) In order to perform parallel interleaving, it is desirable that the division size should be a divisor of the interleaver size (information bit length).
(2) When the division size is not a divisor of the interleaver size, a large bandwidth is required for the external value memory, and the circuit scale increases.
(3) Further, in the ARP, the division size needs to be a multiple of a specific constant C. A value such as 8 or 16 is used for C.

  QPP is adopted in the next-generation mobile communication system (see Non-Patent Document 4), but the information bit size is determined to be a multiple of 8 in consideration of the above-described properties. This facilitates the realization of 1, 2, 4, and 8 parallel interleavers.

From the above properties, it is desirable to apply the division method 2 when using a new parallel interleaver such as ARP or QPP.
3GPP TS 25.212 v6.3.0 Broadcom, R1-070172, “Formulaic Collision-free Memory Accessing for Parallel Turbo decoding with ARP interleave”, 3GPP TSG RAN WG1 Meeting # 47bits, Sorrento, Italy, Jan. 15-19, 2007 Ericsson, R1-070463, “Contention-Free Interleavers vs. Contention-Avoidance Decoding Solutions”, 3GPP TSG RAN WG1Meeting # 47bits, Sorrento, Italy, Jan.15-19, 2007 3GPP TS 36.212 v8.0.0 JP 2002-271209 A US Pat. No. 6,775,800

  However, such a conventional turbo decoder has the following problems.

  (1) In the conventional turbo decoder, although the external value corresponding to the tail bit is not used, the tail bit processing is performed in the soft decision decoder. This increases the processing delay time.

  (2) When there is no tail bit, the performance of the turbo code is greatly degraded, and sufficient error rate characteristics cannot be obtained by turbo decoding.

  (3) The conventional parallel turbo decoder has to divide the reception likelihood including tail bits. When emphasizing shortening the processing delay of soft decision decoding and adopting the above-described division method 1, it is difficult to apply a new parallel interleaver having good performance such as ARP and QPP.

  (4) When adopting the above-described division method 2 in order to adopt a new parallel interleaver such as ARP or QPP, there is a problem that the division size is not uniform and the processing delay time of the parallel turbo decoder increases. .

  The present invention has been made in view of this point, and provides an iterative decoding apparatus and iterative decoding method that can reduce the amount of computation required for decoding a turbo code including tail bits and reduce processing delay. For the purpose.

  The present invention also facilitates the application of parallel turbo decoding to turbo codes including tail bits, enables matching with a parallel interleaver without increasing processing delay and circuit scale, and processing delay while obtaining high decoding performance. An object of the present invention is to provide an iterative decoding apparatus and an iterative decoding method capable of reducing the circuit scale.

  An iterative decoding apparatus according to the present invention is an iterative decoding apparatus that decodes turbo-coded digital data to which a trellis end is added, wherein the first digital data related to the trellis end included in the digital data is selected. A metric value based on the first digital data selected by the first selector, a second selector that selects second digital data excluding the first digital data included in the digital data, Metric value calculation means for calculating; memory for storing the metric value calculated by the metric value calculation means; decoding means for performing iterative decoding processing using the second digital data and the metric value. Take the configuration.

  The iterative decoding method of the present invention is an iterative decoding method for decoding turbo-coded digital data to which a trellis end is added by repeating a decoding step, wherein the first digital data relating to the trellis end included in the digital data A metric value calculating step for calculating a metric value based on the metric value, and decoding the second digital data excluding the first digital data related to the trellis end included in the digital data, with the metric value as an initial value of each decoding step And an iterative decoding process step.

  According to the present invention, it is possible to provide an iterative decoding apparatus and an iterative decoding method capable of reducing the amount of computation required for decoding a turbo code including tail bits and reducing the processing delay.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing the overall configuration of the turbo decoder according to Embodiment 1 of the present invention. The turbo decoder shown in the figure conforms to the basic principle described in the background art. Hereinafter, a case where the codeword encoded by the turbo decoder 70 and transmitted is turbo-decoded will be described as an example.

  In FIG. 1, a turbo decoder 100 includes soft decision decoding units 111 and 112, interleavers 121 and 123, deinterleaver 122, reception likelihood memory 130, tail path metric memories 141 and 142, tail processing units 151 and 152, and output terminals. 160 is comprised. Although not shown in FIG. 1, the turbo decoder 100 adds a plurality of partial data sequences included in the data sequence output from the reception likelihood memory 130 to the position of the branch point of the signal line in the drawing. It has a selector that selectively distributes it to an appropriate function part.

  The tail processing unit 151 selects a reception likelihood (Lx (n), Ly (n)) related to the first convolutional encoder 50b on the transmission side, which is an output of the reception likelihood memory 130, with a selector. The tail data (Lx (K) to Lx (K + 2) and Ly (K) to Ly (K + 2), that is, tail 1 and tail 2 in FIG. 1) are input. The tail processing unit 151 generates a path metric β (K−1) using the data of the tail part. A method for mounting the tail processing unit 151 will be described later with reference to FIG.

  The tail path metric memory 141 holds the path metric generated by the tail processing unit 151.

  The first soft decision decoding unit 111 includes systematic (Lx (0) to Lx (K−1)) and parity 1 (Ly (0)) excluding the tail among the data held in the reception likelihood memory 130. ˜Ly (K−1)) are selectively input by the selector. In addition, the path metric stored in the tail path metric memory 141 is input to the first soft decision decoding unit 111 instead of the tail part removed by the selector.

  The tail processing unit 152 includes a selector among the reception likelihoods (Lx ′ (n), Ly ′ (n)) related to the second convolutional encoder 60b on the transmission side, which is an output of the reception likelihood memory 130. The tail part data (Lx ′ (K) to Lx ′ (K + 2) and Ly ′ (K) to Ly ′ (K + 2), that is, the tail 3 and the tail 4 in FIG. 1) selected in (1) are input. The tail processing unit 152 generates a path metric β ′ (K−1) using the data of the tail part. The mounting method of the tail processing unit 152 is the same as that of the tail processing unit 151.

  The tail path metric memory 142 holds the path metric generated by the tail processing unit 152.

  The second soft decision decoding unit 112 uses the parity 2 (Ly ′ (0) to Ly ′ (K−1)) excluding the tail selected by the selector from the data held in the reception likelihood memory 130. , And the systematic interleaved by the interleaver 123 is input. In addition, the path metric stored in the tail path metric memory 142 is input to the second soft decision decoding unit 112 instead of the tail part removed by the selector.

  Next, the operation of the turbo decoder 100 will be described in detail with reference to FIG. FIG. 2 basically shows the relationship between each decoding step and data used in each decoding step.

  First, before performing iterative decoding by the soft decision decoding units 111 and 112, the turbo decoder 100 calculates two path metric values by the tail processing units 151 and 152, and stores them in the tail path metric memories 141 and 142. Keep it. As will be described below, in the iterative decoding, the decoding of the tail part is not performed, and instead the path metric value calculated in advance is used to improve the decoding accuracy.

  Data 201 is data to be input to the tail processing unit 151. The data 201 includes tail part data related to the first convolutional encoder 50b on the transmission side, that is, the likelihood of the tail 1 (Lx (K) to Lx (K + 2)) and the likelihood of the tail 2 (Ly ( K) to Ly (K + 2)). The path metric 203 calculated by the tail processing unit 151 using the tail part data is stored in the tail path metric memory 141 and held while iterative decoding is performed.

  Data 202 is data to be input to the tail processing unit 152. The data 201 includes tail part data related to the second convolutional encoder 60b on the transmission side, that is, the likelihood of tail 3 (Lx ′ (K) to Lx ′ (K + 2)) and the likelihood of tail 4 ( Ly ′ (K) to Ly ′ (K + 2)). The path metric 204 calculated by the tail processing unit 152 using the tail part data is stored in the tail path metric memory 142 and held while iterative decoding is being executed.

  Data 205a is input data to the first soft decision decoding unit 111 in the first iteration. Data 205a includes systematic (reception likelihood Lx (0) to Lx (K-1)) not including a tail and parity 1 (reception likelihood Ly (0) to Ly (K-1)) not including a tail. Is included. That is, the data 205a includes data corresponding to the codeword main body part related to the first convolutional encoder 50b on the transmission side.

  In the decoding process in the first soft decision decoding unit 111 in the first iteration, the data 205a and the data 203 are used as inputs. That is, in the first step decoding process in the first cycle, the soft metric decoding process is performed on data corresponding to only the codeword main body using the path metric 203. As a result, external values Le (0) to Le (K−1) are generated and transferred to the second soft decision decoding unit 112 via the interleaver 121.

  Data 206a is input data to the second soft decision decoding unit 112 in the first iteration. The data 206a includes interleaved systematic (interleaved reception likelihoods Lx (0) to Lx (K-1)) and parity 2 (reception likelihood Ly ′ (0) to Ly ′ (not including tail) ( K + 2)). That is, the data 206a does not include a tail portion, and includes only data corresponding to the code word body.

  In the decoding process in the second soft decision decoding unit 112 in the first iteration, the data 206a and the data 204 are used as inputs. That is, also in the second step decoding process in the first cycle, the soft metric decoding process is performed on the data corresponding to only the codeword main body part using the path metric 204. As a result, external values Le ′ (0) to Le ′ (K−1) are generated and transferred to the first soft decision decoding unit 111 via the deinterleaver 122.

  Thereafter, the first soft decision decoding unit 111 performs soft decision decoding with the data 205b and 203 as inputs, and then the second soft decision decoding unit 112 performs data 206b and 204 as inputs. Similarly, iterative decoding is performed until the required number of iterations is reached.

  As described above, in turbo decoder 100, soft decision decoding of only the codeword main body portion is repeatedly performed using the path metric value of the tail portion calculated in advance.

  It should be noted here that the turbo decoder 100 does not have to perform tail processing for each iteration, so that the amount of computation can be reduced as a whole, resulting in a reduction in processing delay required for iterative decoding. Be able to.

  FIG. 3 is a trellis diagram for explaining the operation of the tail processing units 151 and 152. Nodes (points) such as 301, 302a to 302b, 303a to 303d, and 304a to 304h represent states of the convolutional encoder at a specific time. For example, node 304a indicates that the state of the convolutional encoder is 000 at time K-1. Branches such as 310, 311 and 312 represent transitions between two states in the convolutional encoder.

  Soft decision decoding methods such as MAP decoding, Max-log-MAP decoding, and SOVA are performed by calculating metric values of all nodes on the trellis diagram. Metrics are calculated along the branch. Metrics calculated in the arrow direction (from left to right) in FIG. 3 are forward metrics, and metrics calculated in the opposite direction are backward metrics. Call it. The metric value calculated for each node is often called a path metric because it is calculated according to the path (path) that follows the branch.

  Further, since the path metric is calculated, the metric is also calculated for each branch. This is called a branch metric.

  The path metrics calculated by the tail processing units 151 and 152 and held in the tail path metric memories 141 and 142 are backward metrics of the nodes 304a to 304h.

  A path metric calculation method in the tail processing unit 151 will be described next.

すなわち、Trellis termination部分（上述のテイル部分に相当）では、ブランチの合流がないため、遷移元の逆方向パスメトリックは、ブランチメトリックと遷移先の逆方向パスメトリックとの和により求められる。 The path metric is calculated by tracing the branch in the direction opposite to the arrow starting from the node 301. When the branch metric of the branch 310 is γ00 (K + 1) and the reverse path metric of the node 302a is β0 (K + 1), β0 (K + 1) is calculated by the following equation.

That is, in the Trellis termination portion (corresponding to the tail portion described above), there is no branch merging, so that the reverse path metric of the transition source is obtained by the sum of the branch metric and the reverse path metric of the transition destination.

There are four types of branch metrics depending on the transition state, and is calculated by the following equation.

As described above, by sequentially obtaining the path metrics of the nodes 302a to 302b, 303a to 303d, and 304a to 304h, the path metric β (K−1) = {β0 (K -1), β1 (K-1), β2 (K-1), β3 (K-1), β4 (K-1), β5 (K-1), β6 (K-1), β7 (K- 1)} is obtained.

  As described above, in the turbo decoder 100 of the present embodiment, the tail processing units 151 and 152 calculate the path metric value β from the reception likelihood of the tail part in advance as preprocessing of the iterative decoding process, In the iterative decoding process, iterative decoding is performed only for the main body using the path metric value β.

  On the other hand, as described above, in the iterative decoding process in the conventional turbo decoder, the soft decision decoding process is performed not only on the main body part but also on the tail part (see FIG. 13). Further, the external value relating to the tail portion used in each decoding step is always “0”. In other words, the external value of the tail portion obtained in the preceding decoding step is discarded without being taken over by the succeeding decoding step.

  The inventor has focused on this point. That is, it has been found that the fact that the external value related to the tail part is not used in the soft decision decoding process means that the branch metric used in each decoding step is always updated without being updated.

  That is, in the iterative decoding process in the conventional turbo decoder, at each decoding step (exactly every other step), the input information (reception likelihood of the tail portion), the calculation process using the input information, The same decoding process is repeated for the tail part of the calculation process result. More specifically, referring to the trellis diagram of FIG. 3, the calculation of the reverse path metric from the node 301 at the time K + 2 to the nodes 304a to h at the time K-1 is repeated.

  Conventionally, the decoding process for the tail part is repeated at each decoding step because the external value is sequentially updated as the iterative decoding process proceeds, so that the decoding result of the tail part is the main body at each decoding step. This is because it was thought to affect the decoding of the part.

  However, the present inventor who realized that the branch metric used for the soft decision decoding process of the tail part is always constant can quantify the influence of the decoding result of the tail part on the decoding of the main body part in advance. Thus, it was conceived that it is possible to iteratively decode only the main body using this numerical value. The above-mentioned path metric value β is obtained by quantifying the influence of the decoding result of the tail part on the decoding of the main body part.

  As described above, according to the present embodiment, in turbo decoder 100, tail processing sections 151 and 152 pre-calculate the path metric value β from the reception likelihood of the tail portion as preprocessing for iterative decoding processing. Then, the iterative decoding processing units (soft decision decoding units 111 and 112, interleavers 121 and 122) perform iterative decoding only on the codeword main body portion using the path metric value β.

  By doing so, it is possible to realize the turbo decoder 100 that can reduce the amount of calculation required for decoding the turbo code including the tail bits and reduce the processing delay.

(Embodiment 2)
FIG. 4 is a block diagram showing an overall configuration of a turbo decoder according to Embodiment 2 of the present invention. The disclosure of the present embodiment aims to show a configuration adopted in real hardware implementation by specifically showing the sharing of functions. In particular, FIG. 4 shows the overall configuration of a turbo decoder when the Max-log-MAP scheme is applied.

  In FIG. 4, a turbo decoder 400 includes a reception likelihood memory 410, a soft decision decoder 420, an interleaver / deinterleaver 430, an external value memory 440, and a tail path metric memory 450.

  The reception likelihood memory 410 has the same function as the reception likelihood memory 130 of FIG. An interleaver 123 may be incorporated.

  The soft decision decoder 420 shares the two soft decision decoding units 111 and 112 and the two tail processing units 151 and 152 in FIG. The implementation of the soft decision decoder 420 will be described later with reference to FIG.

  Interleaver / deinterleaver 430 receives the external value calculated by soft decision decoder 420, performs interleaving or deinterleaving, and sends the result to soft decision decoder 420. That is, interleaver / deinterleaver 430 includes the functions of interleaver 121 and deinterleaver 122 of FIG. Note that two processes in the soft decision decoder 420 correspond to the above-described one cycle.

  The tail path metric memory 450 is a memory that holds two sets of path metric values generated by tail processing, and has a function that combines the tail path metric memories 141 and 142 of FIG.

  FIG. 5 is a block diagram illustrating the internal configuration of soft decision decoder 420. The soft decision decoder 420 includes an input terminal 421, γ calculation units 422a and 422b, an α calculation unit 423, memories 424a and 424b, a β calculation unit 425, an Λ calculation unit 426, an e calculation unit 427, and an output terminal 428. Is done.

  Prior to the iterative decoding process, the γ calculating unit 422b receives the reception likelihood of the tail portion from the reception likelihood memory 410 and calculates the branch metric of the tail portion. In the first step decoding process in the first cycle, the γ calculation unit 422a calculates the branch metric of the codeword main body portion from the input data 205a. In the second step decoding process of the first cycle, the branch metric of the codeword body part is calculated from the data 206a and the external value obtained in the immediately preceding decoding step. In the subsequent soft decision decoding process, in addition to the external value obtained in the immediately preceding decoding step, data 205a and data 206a are alternately used to calculate a branch metric.

  The γ calculation unit 422a performs the same process as the γ calculation unit 422b except that the tail process is not performed.

  The α calculation unit 423 calculates the forward path metric using the branch metric obtained by the γ calculation unit 422a.

  The β calculation unit 425 calculates the metric value of the tail portion using the branch metric of the tail portion obtained by the γ calculation unit 422b. The metric value of the tail portion is held in the tail path metric memory 450. In addition, the β calculation unit 425 calculates a reverse path metric using the branch metric obtained by the γ calculation unit 422b in each decoding step and the metric value of the tail portion held in the tail path metric memory 450. To do.

  The Λ calculation unit 426 uses the branch metric obtained by the γ calculation unit 422a, the forward path metric obtained by the α calculation unit 423, and the backward path metric obtained by the β calculation unit 425 to perform the posterior Calculate the value. The e calculation unit 427 calculates the external value Le using the input data corresponding to each decoding step and the a posteriori value calculated by the Λ calculation unit 426 according to the input data. The external value Le is interleaved or deinterleaved by the interleaver / deinterleaver 430 and then input to the soft decision decoder 420.

  Next, the operation of the turbo decoder 400 will be described using the flowchart of FIG.

  In step ST1, a first tail process is performed. The reception likelihood memory 410 selects tail bits Lx (K) to Lx (K + 2) and Ly (K) to Ly (K + 2), and inputs them to the soft decision decoder 420. In the soft decision decoder 420, tail bit information is input from the input terminal 421, and a branch metric is calculated by the γ calculation unit 422b. Further, a path metric β (K−1) is calculated by the β calculation unit 425 using this branch metric. This path metric is transferred to the tail path metric memory 450 where it is stored.

  In step ST2, a second tail process is performed. The reception likelihood memory 410 selects tail bit reception likelihoods Lx ′ (K) to Lx ′ (K + 2) and Ly ′ (K) to Ly ′ (K + 2), and inputs them to the soft decision decoder 420. In the soft decision decoder 420, tail bit information is input from the input terminal 421, and a branch metric is calculated by the γ calculation unit 422b. Further, the path metric β ′ (K−1) is calculated by the β calculation unit 425 using this branch metric. This path metric is transferred to the tail path metric memory 450 where it is stored.

  In step ST3, first soft decision decoding is performed. The reception likelihood memory 410 selects reception likelihoods Lx (0) to Lx (K−1) and Ly (0) to Ly (K−1) that do not include tail bits, and inputs them to the soft decision decoder 420. . The soft decision decoder 420 sequentially calculates branch metrics, backward path metrics, forward path metrics, posterior values, and external values. Here, the path metric β (K−1) stored in the tail path metric memory 450 is used as an initial value when the backward path metric is calculated.

  In step ST4, second soft decision decoding is performed. The reception likelihood memory 410 selects reception likelihoods Ly ′ (0) to Ly ′ (K−1) that do not include tail bits, and inputs them to the soft decision decoder 420. In addition, reception likelihoods Lx (0) to Lx (K−1) are interleaved and input to soft decision decoder 420. Further, the external value obtained in the immediately preceding decoding step is input to the soft decision decoder 420 via the interleaver / deinterleaver 430. The soft decision decoder 420 sequentially calculates a branch metric, a backward path metric, a forward path metric, a posterior value, and an external value using the input data. Here, the path metric β ′ (K−1) stored in the tail path metric memory 450 is used as an initial value when the backward path metric is calculated.

  In step ST5, it is determined whether or not to continue iterative decoding. Stop iterations when the specified maximum number of iterations is reached and when the early stopping criteria are met.

  As described above, according to the present embodiment, a tail processing unit dedicated to tail processing performed before iterative decoding processing is not provided, but a reverse path metrics calculation function unit (γ calculation unit) included in the soft decision decoder 420 is provided. By using the 422b and β calculation unit 425) for tail processing, the function unit can be shared by the two processes, and the circuit scale can be reduced.

  Also, according to the embodiment, in the iterative decoding process, two soft decision decoders are not provided, but the “first step decoding process” and the “second step decoding process” are performed by the soft decision decoder 420 alone. Since this is done, the circuit scale can be reduced.

  In the soft decision decoder 420 shown in FIG. 5, even if the positions of the β calculation unit 425 and the α calculation unit 423 are switched, iterative decoding processing can be performed in the same manner as in the case where the positions are not switched. However, in the case of replacement, a tail-specific input terminal is added, and this input terminal may be connected to the γ calculation 422a. As a result, the tail portion can be input to the γ calculation 422a via this connection line, and the path metric value of the tail portion can be obtained.

  Further, even if the order of steps ST1 and ST2 in the processing flow of the soft decision decoder 420 described in FIG. 6 is changed, iterative decoding processing is possible as in the case where the order is not changed. Alternatively, steps ST1 and ST2 may be performed in parallel. Further, the processing of steps ST1 and ST2 may be realized by software. Furthermore, the present invention is not limited to steps ST1 and ST2, and all of the processing flow shown in FIG. 6 may be realized by software.

(Embodiment 3)
FIG. 7 is a block diagram showing an overall configuration of a turbo decoder according to Embodiment 3 of the present invention. This embodiment shows a parallel turbo decoder suitable for realizing high-speed processing while maintaining high decoding accuracy.

  The parallel turbo decoder 500 includes a reception likelihood memory 501, soft decision decoders 502a to 502d, a parallel interleaver 503, a tail processing unit 505, and a tail path metric memory 506.

  The reception likelihood memory 501 holds the reception likelihood. The reception likelihood memory 501 divides the reception likelihood related to the codeword main body excluding tail bits into a plurality of sub-blocks, and distributes it to each soft decision decoder. In this embodiment, since there are four soft decision decoders, it is divided into four or less sub-blocks. Also, the reception likelihood memory 501 selects a tail bit reception likelihood and transfers it to the tail processing unit.

  The tail processing unit 505 and the tail path metric memory 506 have the same functions as the tail processing units 151 and 152 and the tail path metric memory 141 and 142 of the first embodiment. In other words, tail processing is performed in the tail processing unit 505, and two sets of path metrics are held in the tail path metric memory 506.

  Each of soft decision decoders 502a to 502d takes charge of any one of the divided reception likelihoods, that is, sub blocks, performs soft decision decoding, and generates external values of the sub blocks.

  Of the soft decision decoders 502a to 502d, the soft decision decoder 502d that is in charge of the subblock closest to the last part of the information bits performs decoding using the path metric stored in the tail path metric memory 506 as an initial value. In order to improve the decoding accuracy.

  The parallel interleaver 503 simultaneously receives the external values output from the soft decision decoders 502a to 502d, performs interleaving or deinterleaving, and outputs them simultaneously to the soft decision decoders 502a to 502d. The two processes in the soft decision decoders 502a to 502d correspond to the above-described one cycle.

  Next, the operation of the parallel turbo decoder 500 will be described with reference to FIG.

  Prior to performing iterative decoding by the soft decision decoding units 502 a to 502 d, the parallel turbo decoder 500 calculates two path metric values 203 and 204 by the tail processing unit 505 and stores them in the tail path metric memory 506. .

  The reception likelihood division for performing soft decision decoding in parallel is performed on a portion excluding the tail. Data 251a to 251d is obtained by dividing the data 205a shown in FIG.

When the number of information bits is K, the division size is M, and the parallel number is P, the division size is determined by the following equation.
M = K / P

  When the parallel number P is determined to be a divisor of the number of information bits K, M is always an integer, so that the sizes of the divided reception likelihoods 251a to 251d can be all equal.

  For the other sub-blocks excluding the sub-block closest to the last part of the information bits, iterative decoding processing is performed in the soft decision decoding units 502a to 502c as in the conventional case.

  For the sub-block closest to the final part of the information bits, the soft decision decoding unit 502d performs the iterative decoding process using the path metric value of the tail part calculated in advance, as in the first embodiment.

  As described above, according to the present embodiment, the sizes of subblocks handled by soft decision decoding sections 502a to 502d are equal in parallel turbo decoder 500, and therefore the subblock sizes are required to be equal. It is possible to provide a new parallel interleaver with good performance such as ARP and QPP.

  Also, the iterative decoding process in soft decision decoding section 502d for the subblock closest to the final part of the information bits is equivalent to the iterative decoding process in Embodiment 1, and is therefore a decoding for a turbo code including tail bits. In addition, iterative decoding processing can be performed with a processing amount equivalent to decoding of only the codeword main body.

  Accordingly, the sizes of the subblocks handled by the soft decision decoding units 502a to 502d are equal, and the iterative decoding process in the soft decision decoding unit 502d can be regarded as the same process as the decoding process of only the subblock. It is possible to prevent an increase in processing delay due to non-uniform sub-block sizes in the parallel turbo encoder.

  In the above description, the case where the tail processing unit 505 is provided as an independent function unit has been described. However, the present invention is not limited to this, and the tail processing unit may be shared with the β calculation unit in the soft decision decoder as in the second embodiment.

  Further, in the parallel turbo decoder, one tail processing (tail processing related to the first convolutional encoder 50b on the transmission side) is further transferred to one soft decision decoder and the other tail processing (transmission side). Tail processing of the tail part related to the second convolutional encoder 60b) is handled by another soft decision decoder, so that tail processing can be performed in parallel without adding a circuit, and processing delay is further increased. Can be reduced.

  As described above, each functional unit of the turbo decoder described in each embodiment can be realized by either hardware or software, or a combination thereof.

  The iterative decoding apparatus and the iterative decoding method according to the present invention are useful as those capable of reducing the amount of calculation required for decoding a turbo code including tail bits and reducing the processing delay.

1 is a block diagram showing the overall configuration of a turbo decoder according to Embodiment 1 of the present invention. FIG. 1 is a diagram for explaining the operation of the turbo decoder of FIG. Trellis diagram for explanation of tail processing operation FIG. 3 is a block diagram showing an overall configuration of a turbo decoder according to the second embodiment. The block diagram which shows the internal structure of the soft decision decoding part of FIG. Flow chart for explaining the operation of the turbo decoder of FIG. FIG. 9 is a block diagram showing an overall configuration of a turbo decoder according to the third embodiment. The figure which uses for description of operation | movement of the parallel turbo encoder of FIG. Overall configuration diagram of a communication system using a conventional turbo encoder and turbo decoder Configuration diagram of turbo coder adopted in W-CDMA which is a mobile communication system FIG. 10 is a diagram for explaining trellis termination in the turbo encoder of FIG. Block diagram for explaining a conventional turbo decoder FIG. 12 is a diagram for explaining iterative decoding processing in the turbo decoder of FIG. Block diagram showing the configuration of a conventional parallel turbo decoder Diagram for explaining a method of dividing a reception likelihood sequence in a parallel turbo decoder

Explanation of symbols

100, 400, 500 Turbo decoder 111, 112 Soft decision decoder 121, 123, 503 Interleaver 122, 430 Deinterleaver 130, 410, 440, 501 Reception likelihood memory 141, 142, 450, 506 Tail path metric memory 151, 152,505 Tail processing unit 160,428 Output terminal 420,502 Soft decision decoder 421 Input terminal 422 γ calculation unit 423 α calculation unit 424 Memory 425 β calculation unit 426 Λ calculation unit 427 e calculation unit

Claims (2)

An iterative decoding device for decoding turbo encoded digital data to which a trellis termination is added,
A first selector for selecting first digital data related to a trellis termination included in the digital data;
A second selector for selecting second digital data excluding the first digital data included in the digital data;
Metric value calculation means for calculating a metric value based on the first digital data selected by the first selector;
A memory for storing the metric value calculated by the metric value calculating means;
Decoding means for performing iterative decoding processing using the second digital data and the metric value;
An iterative decoding apparatus comprising: An iterative decoding method for decoding turbo encoded digital data to which a trellis end is added by repeating a decoding step,
A metric value calculating step for calculating a metric value based on first digital data related to a trellis termination included in the digital data;
An iterative decoding process step of decoding second digital data excluding first digital data related to a trellis end included in the digital data, with the metric value as an initial value of each decoding step;
An iterative decoding method comprising:

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