JP2009105298A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device that can prevent a semiconductor substrate of a device having a metal layer bonded to an electrode frame from cracking even when the metal layer to be stacked on the reverse surface of the semiconductor substrate is made thin. <P>SOLUTION: Disclosed is the manufacturing method of the semiconductor device in which the metal layer is formed on the reverse surface of the semiconductor substrate of a wafer having devices formed in regions sectioned by a plurality of streets formed in a lattice shape on the top surface of the semiconductor substrate and the wafer is cut along the plurality of streets to be divided into the individual devices, the manufacturing method of the semiconductor device including a V-groove forming step of forming V-shaped cutting grooves from the reverse surface side of the semiconductor substrate with a V-shaped cutting blade, a processing strain removing step of removing processing strain remaining on exposed surfaces of the V-shaped cutting grooves formed on the semiconductor substrate, a metal layer forming step of stacking the metal layer on the reverse surface of the semiconductor substrate, and a cutting step of cutting the wafer between the bottom of the V-shaped cutting groove and the top surface of the semiconductor substrate along the streets to divide the wafer into the individual devices. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  In the present invention, a metal layer is formed on the back surface of a semiconductor substrate in a wafer in which devices are formed in a region partitioned by a plurality of streets formed in a lattice pattern on the surface of the semiconductor substrate, and the wafer is formed on the plurality of streets. The present invention relates to a method for manufacturing a semiconductor device, which is divided into individual devices by cutting along.

  In the semiconductor device manufacturing process, a plurality of regions are partitioned by dividing lines called streets arranged in a grid on the surface of a semiconductor wafer having a substantially disk shape, and IC, LSI, IBGT are divided into these partitioned regions. A device such as an insulated gate bipolar transistor is formed. A metal layer serving as an electrode is laminated on the back surface of an individual semiconductor device such as an insulated gate bipolar transistor. A semiconductor wafer in which an insulated gate bipolar transistor or the like is formed on the surface of a semiconductor substrate is formed by laminating a metal film on the back surface of the semiconductor substrate, and then cutting along a street to divide into individual devices.

Such division along the street of the semiconductor wafer is usually performed by a cutting device called a dicer. This cutting apparatus includes a chuck table for holding a semiconductor wafer as a workpiece, a cutting means for cutting the semiconductor wafer held on the chuck table, and a movement for relatively moving the chuck table and the cutting means. Means. The cutting means includes a rotating spindle that is rotated at a high speed and a cutting blade attached to the spindle. The cutting blade is composed of a disk-shaped base and an annular cutting edge mounted on the outer periphery of the side surface of the base. The cutting edge is formed by fixing diamond abrasive grains having a grain size of about 3 μm, for example, by electroforming. ing. (For example, refer to Patent Document 1.)
JP 2002-359212 A

  Thus, it has been found that the following problems occur when a semiconductor wafer having a metal layer laminated on the back surface of a semiconductor substrate is cut into individual devices by cutting with a cutting blade of a cutting device. That is, when a wafer having a metal layer laminated is cut by a cutting blade of a cutting machine and the metal layer side of a device is bonded to an electrode frame and packaged, and repeatedly raised and lowered in a temperature range of 180 ° C., for example, a semiconductor There is a problem that a mica-like crack occurs within a few μm from the metal layer on the substrate, and the semiconductor substrate peels off from the metal layer bonded to the electrode frame.

  The above-mentioned problem is that when the thickness of the metal layer laminated on the back surface of the semiconductor substrate is thick or the thickness of the brazing material that joins the metal layer of the device to the electrode frame is large, the coefficient of thermal expansion between the electrode frame and the semiconductor substrate. The semiconductor substrate is not cracked by absorption of the thermal strain due to the difference by the metal layer or the brazing material. However, if the thickness of the metal layer or the brazing material is reduced to, for example, about 1 to 2 μm for reasons such as reducing the weight of the semiconductor package or reducing the cost, the thermal strain due to the difference in thermal expansion coefficient between the electrode frame and the semiconductor substrate is reduced. It cannot be absorbed by the raw material. At this time, it is considered that the semiconductor substrate is cracked when the processing strain due to the cutting blade remains on the cut surface of the device.

  The present invention has been made in view of the above-mentioned fact, and the main technical problem thereof is a semiconductor device in which a metal layer is bonded to an electrode frame even if the thickness of the metal layer laminated on the back surface of the semiconductor substrate is reduced. It is an object of the present invention to provide a semiconductor device manufacturing method capable of preventing a substrate from being cracked.

In order to solve the main technical problem, according to the present invention, a metal layer is formed on the back surface of a semiconductor substrate in a wafer in which devices are formed in a region partitioned by a plurality of streets formed in a lattice pattern on the surface of the semiconductor substrate. A method of manufacturing a semiconductor device by dividing the wafer into individual devices by cutting the wafer along the plurality of streets,
A V-groove that holds a wafer front surface on a chuck table of a cutting device and forms V-shaped cutting grooves along the plurality of streets from the back surface side of the semiconductor substrate by a cutting blade having a V-shaped cross section. Forming process;
A processing strain removing step of removing the processing strain remaining on the exposed surface of the V-shaped cutting groove formed on the semiconductor substrate of the wafer after the V-groove forming step is performed;
A metal layer forming step of laminating a metal layer on the back surface of the semiconductor substrate of the wafer subjected to the processing strain removing step;
A step of cutting the wafer on which the metal layer formation step has been performed into a device by dividing the wafer along the street between the bottom of the V-shaped cutting groove and the surface of the semiconductor substrate. ,
A method for manufacturing a semiconductor device is provided.

The processing strain removal step is performed by plasma etching.
Moreover, the said cutting process is implemented with the cutting blade which has a cutting blade of the width smaller than the width | variety of a V-shaped cutting groove.

  According to the wafer dividing method of the present invention, the periphery of the back surface of the semiconductor substrate constituting the divided device is formed as a chamfered inclined surface, and this inclined surface is processed by the processing strain removing step. The strain is removed and the metal layer 24 is laminated by the metal layer forming step. Therefore, even when the metal layer stacked on the back surface of the semiconductor substrate constituting the device is as thin as 1 μm, the semiconductor layer is bonded to the electrode frame and packaged, and the semiconductor is not affected by repeated thermal loads. There is no cracking in the substrate.

  Hereinafter, a semiconductor device manufacturing method according to the present invention will be described in more detail with reference to the accompanying drawings.

  FIG. 1 is a perspective view of a semiconductor wafer as a wafer. A semiconductor wafer 2 shown in FIG. 1 has a plurality of rectangular regions formed in a lattice shape and partitioned by a plurality of streets 21 on a surface 20a of a semiconductor substrate 20 made of silicon having a thickness of 300 μm, for example. A device 22 such as an insulated gate bipolar transistor is formed in the rectangular region.

  As shown in FIG. 2, a protective tape 3 is attached to the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2 as described above in order to protect the device 22 (protective tape attaching step).

  Next, the front side of the semiconductor wafer 2 is held on the chuck table of the cutting apparatus, and V-shaped cutting grooves are formed along the plurality of streets 21 from the back side of the semiconductor substrate 20 by a cutting blade having a V-shaped cross section. A V-groove forming process is performed. This V-groove forming step is performed using a cutting device 4 shown in FIG. 3 includes a chuck table 41 for holding a workpiece, a cutting means 42 having a cutting blade 421 for cutting the workpiece held on the chuck table 41, and a chuck table 41. The imaging means 43 which images the to-be-processed object hold | maintained in is comprised. The chuck table 41 is configured to suck and hold a workpiece, and can be moved in a machining feed direction indicated by an arrow X and an index feed direction indicated by an arrow Y in FIG. Yes. The cutting blade 421 is composed of a disc-shaped base and an annular cutting edge 421a mounted on the outer peripheral portion of the side surface of the base. The cutting edge 421a fixes diamond abrasive grains having a particle size of about 3 μm, for example, by electroforming. The cross-sectional shape is V-shaped with an angle of 90 degrees. The width of the annular cutting edge 421a is set to 200 μm in the illustrated embodiment. In the illustrated embodiment, the imaging unit 43 includes, in addition to a normal imaging device (CCD) that captures an image with visible light, an infrared illumination unit that irradiates a workpiece with infrared rays, and an infrared ray that is irradiated by the infrared illumination units. And an imaging device (infrared CCD) that outputs an electrical signal corresponding to the infrared rays captured by the optical system, and sends the captured image signal to a control means (not shown).

  In order to perform the V-groove forming process using the cutting device 4 configured in this way, the protective tape 3 side adhered to the surface 20a of the semiconductor substrate 20 is placed as described above as shown in FIG. Then, the semiconductor wafer 2 is sucked and held on the chuck table 41 by operating a suction means (not shown). Accordingly, in the semiconductor wafer 2 sucked and held on the chuck table 41, the back surface 20b side of the semiconductor substrate 20 is on the upper side. In this way, the chuck table 41 that sucks and holds the semiconductor wafer 2 is positioned directly below the imaging means 43 by a cutting feed mechanism (not shown). When the chuck table 41 is positioned immediately below the image pickup means 43, an alignment process for detecting an area to be cut of the semiconductor wafer 2 is executed by the image pickup means 43 and a control means (not shown). That is, the image pickup means 43 and the control means (not shown) perform pattern matching for aligning the streets 21 formed in the predetermined direction on the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2 and the cutting blade 421. Image processing is executed to perform alignment of the cutting area (alignment process). In addition, the alignment of the cutting region is similarly performed on the street 21 that is formed on the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2 and that extends perpendicular to the predetermined direction. At this time, the surface 20a of the semiconductor substrate 20 on which the streets 21 are formed is positioned on the lower side. However, as described above, the imaging unit 43 is an infrared illumination unit, an optical system that captures infrared rays, and an electrical signal corresponding to the infrared rays. Therefore, the street 21 can be imaged through the back surface 20b of the semiconductor substrate 20.

  As described above, when the alignment for aligning the 21 formed on the semiconductor wafer 2 and the cutting blade 421 is performed, the chuck table 41 holding the semiconductor wafer 2 is moved to the cutting start position in the cutting area. At this time, as shown in FIG. 4, the semiconductor wafer 2 is positioned such that one end (the left end in FIG. 4) of the street 21 to be cut is positioned to the right by a predetermined amount from just below the cutting blade 421. Then, the cutting blade 421 is rotated at a predetermined rotational speed in the direction indicated by an arrow 420 in FIG. 4, and is cut downward by a predetermined amount as shown by a solid line in FIG. To send. This cutting feed position is set to a position below, for example, 80 μm from the back surface 20b (upper surface) of the semiconductor substrate 20 constituting the semiconductor wafer 2.

  When the cutting blade 421 is cut and fed as described above, the chuck table 41 is rotated at a predetermined rotational speed in the direction indicated by the arrow 420 in FIG. 4 while the chuck table 41 is rotated in the direction indicated by the arrow X1 in FIG. Is cut and fed at a predetermined cutting feed speed. When the right end of the semiconductor wafer 2 held on the chuck table 41 passes directly below the cutting blade 421, the movement of the chuck table 41 is stopped. As a result, in the semiconductor wafer 2, V-shaped cutting grooves 23 are formed along the streets 21 on the back surface 20 b of the semiconductor substrate 20 as shown in FIG. 5. Thereafter, the chuck table 41 is sequentially indexed and fed in the direction indicated by the arrow Y by a distance corresponding to the interval between the plurality of streets 21, and V-shaped cutting is performed on the back surface 20 b of the semiconductor substrate 20 along the adjacent first street 21. A groove 23 is formed. In the illustrated embodiment, the V-shaped cutting groove 23 formed on the back surface 20b of the semiconductor substrate 20 has a depth H of 80 μm and a width L of 160 μm.

The V-groove forming step is performed, for example, under the following processing conditions.
Cutting blade: outer diameter 52 mm, width 200 μm (cross-sectional shape: V-shaped)
Cutting blade rotation speed: 40000 rpm
Cutting feed rate: 10 mm / sec

  As described above, if the V-shaped cutting grooves 23 are formed along the plurality of streets 21 on the back surface 20b of the semiconductor substrate 20 constituting the semiconductor wafer 2, the chuck table 41 holding the semiconductor wafer 2 is rotated 90 degrees. Move. And the said V-groove formation process is implemented along each street 21 extended in the direction orthogonal to the said predetermined direction. In this manner, when the V-shaped cutting grooves 23 are formed along the plurality of streets 21 on the back surface 20b of the semiconductor substrate 20, the processing strain generated by the cutting remains on the surface 23a of the V-shaped cutting grooves 23. .

  If the V-groove forming step is performed as described above, the processing for removing the processing strain remaining on the exposed surface 23a of the V-shaped cutting groove 23 formed on the back surface 20b of the semiconductor substrate 20 constituting the semiconductor wafer 2 is performed. A distortion removal step is performed. In the illustrated embodiment, this processing strain removal step is performed using a plasma etching apparatus 5 shown in FIG. The plasma etching apparatus 5 shown in FIG. 6 includes a housing 51, a lower electrode 52 disposed in the housing 51 so as to face in the vertical direction, and an upper electrode 53. The lower electrode 52 includes a disk-shaped workpiece holding portion 521 and a columnar support portion 522 formed so as to protrude from the center of the lower surface of the workpiece holding portion 521. A suction chuck 521a made of a porous ceramic material is disposed on the workpiece holding portion 521, and the semiconductor wafer 2 on which the V-groove forming step has been performed is placed on the suction chuck 521a. The suction is held by operating a suction means (not shown). The support portion 522 is connected to the high-frequency voltage applying means 54.

The upper electrode 53 includes a disk-like gas ejection portion 531 and a columnar support portion 532 formed so as to protrude from the center of the upper surface of the gas ejection portion 531. As described above, the upper electrode 53 including the gas ejection part 531 and the columnar support part 532 is disposed so that the gas ejection part 531 faces the workpiece holding part 521 constituting the lower electrode 52. The disc-shaped gas ejection portion 531 constituting the upper electrode 53 is provided with a plurality of ejection ports 531a that open to the lower surface. The plurality of jet outlets 531 a communicate with the gas supply means 55 through a communication path 531 b formed in the gas ejection part 531 and a communication path 532 a formed in the support part 532. The gas supply means 55 supplies a mixed gas for generating plasma mainly composed of a fluorine-based gas such as sulfur hexafluoride (SF ₆ ).

  In order to perform the processing strain removal process using the plasma etching apparatus 5 configured as described above, the semiconductor wafer 2 on which the V-groove forming process has been performed on the workpiece holding part 521 configuring the lower electrode 52 is mounted. The protective tape 3 attached to the surface 20a of the semiconductor substrate 20 to be constructed is placed, and a suction means (not shown) is operated to suck and hold the semiconductor wafer 2 on the workpiece holding portion 521. Accordingly, in the semiconductor wafer 2 sucked and held on the workpiece holding portion 521, the back surface 20b of the semiconductor substrate 20 is on the upper side.

  Next, the gas supply means 55 is operated to supply the plasma generating gas to the upper electrode 53. The plasma generating gas supplied from the gas supply means 55 passes through the communication passage 532a formed in the support portion 532 of the upper electrode 53 and the communication passage 531b formed in the gas ejection portion 531 from the plurality of jet outlets 531a to the lower electrode 52. Are ejected toward the back surface 20b (upper surface) of the semiconductor substrate 20 constituting the semiconductor wafer 2 held on the suction holding member 521. In this way, a high frequency voltage is applied between the lower electrode 52 and the upper electrode 53 from the high frequency voltage applying means 54 with the plasma generating gas being supplied. As a result, plasma is generated in the space between the lower electrode 52 and the upper electrode 53, and an active material generated by the plasma acts on the back surface 20 b of the semiconductor substrate 20 constituting the semiconductor wafer 2. As a result, the back surface 20b of the semiconductor substrate 20 made of silicon and the exposed surface 23a of the V-shaped cutting groove 23 are etched. Therefore, the processing strain remaining on the exposed surface 23a of the V-shaped cutting groove 23 formed on the back surface 20b of the semiconductor substrate 20 is removed. In addition, since the back surface 20b of the semiconductor substrate 20 is etched over the entire surface, when the back surface 20b is ground, the remaining grinding distortion is also removed.

  In addition, although the example which implemented by the plasma etching using the gas for plasma generation mainly containing fluorine-type gas was shown in the process distortion removal process mentioned above, the process distortion removal process consists of a liquid mixture of nitric acid and hydrofluoric acid. You may implement by the wet etching using an etching liquid.

  When the processing strain removing step described above is performed, a metal layer forming step of stacking a metal layer on the back surface 20b of the semiconductor substrate 20 constituting the semiconductor wafer 2 is performed. This metal layer forming step is performed using a sputtering apparatus 6 shown in FIG. A sputtering apparatus 6 shown in FIG. 7 includes a housing 62 that forms a sputtering chamber 61, an electrostatic adsorption holding table 63 that is disposed in the sputtering chamber 61 of the housing 62 and serves as an anode that holds a workpiece, A cathode 65 to which a target 64 made of metal that is disposed facing and is opposed to the holding table 63 is attached, excitation means 66 illustrating the target 64, and a high-frequency power source 67 that applies a high-frequency voltage to the cathode 65. . The housing 62 is provided with a decompression port 621 that communicates with the decompression means (not shown) in the sputtering chamber 61 and an introduction port 622 that communicates with the sputtering gas supply means (not shown) within the sputtering chamber 61.

In order to perform the metal layer forming process using the sputtering apparatus 6 configured as described above, the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2 on which the processing strain removing process described above is performed on the holding table 63. The protective tape 3 attached to the surface is placed and held by electrostatic attraction. Accordingly, in the semiconductor wafer 2 electrostatically held on the holding table 63, the back surface 20b of the semiconductor substrate 20 is on the upper side. Next, the excitation means 66 is operated to excite the target 64 and a high frequency voltage of 40 kHz, for example, is applied to the cathode 65 from a high frequency power supply 67. Then, the decompression means (not shown) is operated to decompress the inside of the sputtering chamber 61 to about 10 ⁻² Pa to 10 ⁻⁴ Pa, and the sputtering gas supply means (not shown) is operated to introduce argon gas into the sputtering chamber 61. Generate plasma. As a result, the argon gas in the plasma collides with the target 64 made of metal attached to the cathode 65, and the metal particles scattered by the collision are deposited on the back surface 20 b of the semiconductor substrate 20 constituting the semiconductor wafer 2. As shown in FIG. 8, the metal layer 24 is laminated on the back surface 20 b of the semiconductor substrate 20 including the exposed surface 23 a of the V-shaped cutting groove 23.

  If the metal layer forming process described above is performed, a cutting process is performed in which the semiconductor wafer 2 is cut along the street 21 between the bottom of the V-shaped cutting groove 23 and the surface of the semiconductor substrate 20. This cutting step can be performed using the cutting device 4 shown in FIG. When performing this cutting step, the cutting edge 422a of the cutting blade 422 has a width smaller than the width L of the V-shaped cutting groove 23 formed on the back surface 20b of the semiconductor substrate 20, as shown in FIG. It is important to use a cutting blade, and in the illustrated embodiment, the cutting edge 422a has a width of 30 μm.

  In order to carry out the cutting process using the cutting device 4 shown in FIG. 3, the back surface 20b of the semiconductor substrate 20 constituting the semiconductor wafer 2 on which the metal layer forming process has been carried out as shown in FIG. Is attached to the surface of the dicing tape T on which the outer periphery is mounted so as to cover the inner opening of the wafer (wafer support step). Then, the protective tape 3 attached to the surface 20a of the semiconductor substrate 20 is peeled off.

  When the wafer support process described above is performed, the dicing tape T on which the semiconductor wafer 2 is adhered in the wafer support process described above is placed on the chuck table 41 of the cutting apparatus 4 as shown in FIG. Then, the semiconductor wafer 2 is held on the chuck table 41 via the dicing tape T by operating a suction means (not shown). In FIG. 9, the annular frame F on which the dicing tape T is mounted is omitted, but the annular frame F is fixed by a clamp (not shown) disposed on the chuck table 41. In this way, the chuck table 41 that sucks and holds the semiconductor wafer 2 is positioned directly below the imaging means 43 by a cutting feed mechanism (not shown).

  When the chuck table 41 is positioned immediately below the image pickup means 43, an alignment process for detecting an area to be cut of the semiconductor wafer 2 is executed by the image pickup means 43 and a control means (not shown). That is, the image pickup means 43 and the control means (not shown) perform pattern matching for aligning the cutting blade 421 with the street 21 extending in a predetermined direction formed on the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2. The image processing is executed and alignment of the cutting area is performed (alignment process). Further, the alignment of the cutting region is similarly performed on the street 21 extending in the direction orthogonal to the predetermined direction formed on the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2.

  If the street 21 formed on the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2 held on the chuck table 41 as described above is detected and the cutting region is aligned, the semiconductor wafer 2 is obtained. Is moved to the cutting start position in the cutting area. At this time, as shown in FIG. 11 (a), the semiconductor wafer 2 is such that one end (the left end in FIG. 11 (a)) of the predetermined street 21 to be cut is positioned to the right by a predetermined amount from directly below the cutting blade 422. Positioned on. Then, the cutting blade 421 is rotated at a predetermined rotational speed in the direction indicated by an arrow 420 in FIG. 11A, and is shown by a solid line in FIG. As shown, it cuts and feeds a predetermined amount downward. In the illustrated embodiment, the cutting feed position is such that the lower end of the cutting edge 421a is from the front surface 20a (upper surface) of the semiconductor substrate 20 constituting the semiconductor wafer 2 to the rear surface 20b of the semiconductor substrate 20 as shown in FIG. It is set at a position that reaches the V-shaped cutting groove 23 formed in.

  If cutting feed of the cutting blade 421 is performed as described above, the chuck table 41 is moved as shown in FIG. 11 (a) while rotating the cutting blade 422 in the direction indicated by the arrow 420 in FIG. In a), it is moved at a predetermined cutting feed speed in the direction indicated by the arrow X1. When the right end of the semiconductor wafer 2 held on the chuck table 41 passes directly below the cutting blade 422, the movement of the chuck table 41 is stopped. As a result, the semiconductor wafer 2 is cut from the surface 20a of the semiconductor substrate 20 to the V-shaped cutting groove 23 along the first street 21a. As a result, the semiconductor wafer 2 is cut along the street 21. Thereafter, the chuck table 41 is sequentially indexed and fed in the direction indicated by the arrow Y by a distance corresponding to the interval between the plurality of streets 21, and the semiconductor wafer 2 is cut along the adjacent streets 21.

In addition, the said cutting process is performed on the following process conditions similarly to the said reference line formation process.
Cutting blade: outer diameter 52mm, width 30μm
Cutting blade rotation speed: 40000 rpm
Cutting feed rate: 10 mm / sec

  As described above, when the cutting process is performed along the plurality of streets 21 formed on the surface 20a of the semiconductor substrate 20 constituting the semiconductor wafer 2, the chuck table 41 holding the semiconductor wafer 2 is rotated by 90 degrees. . Then, the cutting process is performed along all the streets 21 extending on the surface 20a of the semiconductor substrate 20 extending in the direction orthogonal to the predetermined direction. As a result, the semiconductor wafer 2 is divided into individual devices 200 in which the metal layer 24 is laminated on the back surface as shown in FIG. The periphery of the back surface 20b side of the semiconductor substrate 20 constituting the device 200 divided in this way is formed as a chamfered inclined surface. As described above, the inclined surface has the processing strain removed by the processing strain removing step, and the metal layer 24 is laminated by the metal layer forming step. Therefore, even when the metal layer 24 laminated on the back surface of the semiconductor substrate 20 constituting the device 200 is as thin as about 1 μm, the metal layer 24 side is bonded to an electrode frame (not shown) and packaged to reduce the thermal load. Even if it acts repeatedly, the semiconductor substrate 20 does not crack.

The perspective view of the semiconductor wafer as a wafer divided | segmented by the manufacturing method of the semiconductor device by this invention. The perspective view which shows the state which affixed the protective tape on the back surface of the semiconductor wafer shown in FIG. The principal part perspective view of the cutting device for implementing the V-groove formation process in the manufacturing method of the semiconductor device by this invention. Explanatory drawing of the V-groove formation process in the manufacturing method of the semiconductor device by this invention. FIG. 5 is an enlarged cross-sectional view of the semiconductor wafer on which the V-groove forming step shown in FIG. 4 is performed. The principal part sectional drawing of the plasma etching apparatus for implementing the process distortion removal process in the manufacturing method of the semiconductor device by this invention. The principal part sectional drawing of the sputtering device for implementing the metal layer formation process in the manufacturing method of the semiconductor device by this invention. The cross-sectional enlarged view of the semiconductor wafer in which the metal layer formation process in the manufacturing method of the semiconductor device by this invention was implemented. The principal part perspective view of the cutting device for implementing the cutting process in the manufacturing method of the semiconductor device by this invention. Explanatory drawing of the wafer support process in the manufacturing method of the semiconductor device by this invention. Explanatory drawing of the cutting process in the manufacturing method of the semiconductor device by this invention. The perspective view of the device divided | segmented by the manufacturing method of the semiconductor device by this invention.

Explanation of symbols

2: Semiconductor wafer 20: Semiconductor substrate 21: Street 22: Device 23: V-shaped cutting groove 24: Metal layer 3: Protection tape 4: Cutting device 41: Chuck table of cutting device 42: Cutting means 421: Cutting blade 422 : Cutting blade 43: Imaging means 5: Plasma etching apparatus 51: Housing 52: Lower electrode 53: Upper electrode 54: High frequency voltage applying means 55: Gas supply means 6: Sputtering apparatus 61: Sputtering chamber 62: Housing 63: Holding table 64 : Metal target 65: Cathode 66: Excitation means 67: High frequency power supply
F: Ring frame
T: Dicing tape

Claims (3)

A metal layer is formed on the back surface of the semiconductor substrate in a wafer in which a device is formed in a region partitioned by a plurality of streets formed in a lattice pattern on the surface of the semiconductor substrate, and the wafer is cut along the plurality of streets. A method of manufacturing a semiconductor device that is divided into individual devices by:
A V-groove that holds the front side of the wafer on a chuck table of a cutting device and forms V-shaped cutting grooves along the plurality of streets from the back side of the semiconductor substrate by a cutting blade having a V-shaped cross section. Forming process;
A processing strain removing step of removing the processing strain remaining on the exposed surface of the V-shaped cutting groove formed on the semiconductor substrate of the wafer after the V-groove forming step is performed;
A metal layer forming step of laminating a metal layer on the back surface of the semiconductor substrate of the wafer subjected to the processing strain removing step;
A step of cutting the wafer on which the metal layer formation step has been performed into a device by dividing the wafer along the street between the bottom of the V-shaped cutting groove and the surface of the semiconductor substrate. ,
A method for manufacturing a semiconductor device.   The method of manufacturing a semiconductor device according to claim 1, wherein the processing strain removing step is performed by plasma etching.   3. The method of manufacturing a semiconductor device according to claim 1, wherein the cutting step is performed by a cutting blade having a cutting edge having a width smaller than the width of the V-shaped cutting groove.

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