JP2009093517A - Electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To omit an SRAM as a backup memory circuit. <P>SOLUTION: When a system is turned off, the backup memory circuit is constructed in an FPGA 3 and powered from a backup power supply 5. When a system is turned on, the data stored in the FPGA 3 is read into a work memory of a DRAM 2. Subsequently, an I/O control circuit is constructed in the FPGA 3 and navigation processing is executed. When the system is turned off, the backup memory circuit is again constructed in the FPGA 3 and the data required when the system is next turned on out of the data stored in the DRAM 2 is transferred to the backup memory circuit, and then the system is turned off. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electronic device including a reconfigurable logic circuit such as an FPGA or a PLD.

  An in-vehicle device using a reconfigurable logic circuit such as an FPGA is known (Patent Document 1). The in-vehicle device disclosed in Patent Document 1 performs image processing on an image signal from an imaging device using a reconfigurable logic circuit. Then, the configuration of the reconfigurable logic circuit is rearranged so that the input image signal is subjected to pedestrian emphasis processing, parking line emphasis processing, or night pedestrian emphasis processing according to the situation of the vehicle.

JP 2006-282072 A

  In such an in-vehicle device, the capacity of a storage device to be mounted has been steadily increasing in recent years, the circuit scale has been increased, and it is desired to reduce the circuit scale.

(1) An electronic device according to the invention of claim 1 is configured by connecting a plurality of logic elements in an electronic device that performs various processes based on input signals and outputs various signals, and includes a plurality of logic devices. A reconfigurable logic circuit that rearranges the circuit configuration based on the first or second connection information indicating the connection state between the elements, a nonvolatile storage device that stores the first and second connection information, and a first when the system is on A circuit construction control means for constructing the first circuit in the reconfigurable logic circuit based on the connection information, and constructing the second circuit in the reconfigurable logic circuit based on the second connection information when the system is off; And a backup power supply circuit for supplying power to the reconfigurable logic circuit.
(2) According to a second aspect of the present invention, in the electronic device according to the first aspect, the electronic device according to the first aspect further includes a temporary storage device that temporarily stores data used in various processes when the system is turned on. The memory circuit is constructed as a second circuit in the reconfigurable logic circuit based on the second connection information, and the data stored in the temporary storage device is transferred to the memory circuit and stored, and stored in the memory circuit when the system is turned on. The data is transferred to and stored in a temporary storage device, and a logic circuit as a first circuit that executes various processes is constructed in a reconfigurable logic circuit based on the first connection information.
(3) The invention of claim 3 is the electronic device according to claim 2, wherein various processing is navigation processing using map data, and data stored in a memory circuit constructed when the system is turned off is stored in the system. It is the data of the position of the electronic device when turned off.
(4) According to a fourth aspect of the present invention, in the electronic device according to the first aspect, the circuit construction control means is a first circuit as a first circuit that executes various processes based on the first connection information when the system is on. One processor circuit is constructed in a reconfigurable logic circuit, and when the system is off, a backup memory circuit and a logic circuit as a second circuit can be reconfigured based on the second connection information under the control of the processor circuit The backup memory circuit is a memory circuit for storing data in the temporary storage device when the system is off, and the logic circuit temporarily stores the data stored in the memory circuit when the system is off when the system is on. It is a logic circuit for transferring data to a device.
(5) The invention of claim 5 includes a reconfigurable logic circuit that is configured by connecting a plurality of logic elements, and that can be rearranged into a logic circuit or a memory circuit by changing a connection state between the plurality of logic elements. The circuit construction control / signal processing method for electronic equipment includes the following procedures (i) to (v).
(I) Build a logic circuit in the reconfigurable logic circuit in response to the system on command, (II) Build a memory circuit in the reconfigurable logic circuit in response to the system off command, and (III) System on After the logic circuit is constructed in the reconfigurable logic circuit in response to the command, data used when executing various processes in the logic circuit is temporarily stored in the temporary storage device, and (IV) in response to the system off command After the memory circuit is constructed as a reconfigurable logic circuit, (a) the data stored in the temporary storage device is transferred to the memory circuit and stored, (b) the memory circuit is powered from the backup power source, (C) Thereafter, the system is turned off, and (V) after the logic circuit is constructed in the reconfigurable logic circuit in response to the system on command, the data stored in the memory circuit is transferred to the temporary storage device. save.

  According to the present invention, since the reconfigurable logic circuit can be effectively used when the system is off, the circuit scale can be reduced.

  FIG. 1 shows a configuration of an embodiment in which an electronic device according to the present invention is applied to an in-vehicle car navigation electronic device. 1 includes a CPU 1, a DRAM 2, an FPGA 3 that is a reconfigurable logic circuit, an I / 04, a backup power supply 5 for the FPGA 3, and a flash memory 6.

  The navigation electronic device has a normal navigation function such as map display and route guidance, a music playback function, a music ripping function, a digital terrestrial broadcast viewing and recording function. Accordingly, although not shown in the drawings, the own vehicle position detection device composed of a GPS receiver, a gyro, etc., a storage device such as an HDD for storing map data, a display for displaying maps and videos, a DVD drive device, the ground It has a digital broadcast receiver. These devices are controlled by the CPU 1. When the ACC switch is turned on by operating the IGN key for starting the vehicle, the vehicle-mounted electronic device is turned on. When the ACC switch is turned off by operating the IGN key, the system is turned off. When the ACC switch is turned on from off (when a system on command is output), the system is turned on after a predetermined process, and when the ACC switch is turned off from on (system off command is output). The system is turned off after a predetermined process.

  The FPGA 3 is a reconfigurable logic circuit configured by connecting a plurality of logic elements and rearranging the configuration based on connection information indicating a connection state between the plurality of logic elements. In this specification, an FPGA mainly composed of SRAM will be described as an example of a reconfigurable logic circuit, but a PLD mainly composed of EEPROM may be used.

  In the FPGA 3, an I / 0 control circuit is constructed in response to a command from the CPU 1 in response to a system-on command, and a backup memory circuit is constructed in response to a command from the CPU 1 in response to a system-off command. Therefore, the electronic device of FIG. 1 does not need to be equipped with an SRAM generally used as a backup memory circuit.

  In order to realize such FPGA reconfiguration, the flash memory 6 has I / O control circuit construction data for constructing the FPGA as an I / O control circuit and a backup memory circuit for construction. Memory circuit construction data is stored. These circuit construction data are connection information indicating connection states between a plurality of logic elements of the FPGA 3. In response to the system off command, the CPU 1 configures the FPGA 3 by using the memory circuit construction data to construct a backup memory circuit, and in response to the system on command, constructs the I / O control circuit. The FPGA 3 is configured using the business data to construct an I / O control circuit.

  FIG. 2 is a flowchart illustrating a procedure example of the FPGA construction process executed by the CPU 1. When the system is turned on in step S1, backup data is read from the FPGA 3 functioning as a backup memory circuit in step S2, transferred to the DRAM 2, and stored. In step S3, the logic circuit is reconstructed with the I / O control circuit construction data so that the FPGA 3 functions as an I / O control circuit. In step S4, various processes of normal car navigation operations are performed. In step S5, when the IGN key is operated and the ACC switch is turned off, in step S6, the logic circuit is reconstructed with the memory circuit construction data so that the FPGA 3 functions as a backup memory circuit. When the backup memory circuit is constructed, in step S7, the data to be saved out of the data in the DRAM 2 is read out and transferred to the FPGA 3 for storage. Thereafter, in step S8, the system is turned off.

This will be described more specifically with reference to FIGS.
FIG. 3 is a diagram for explaining an electronic device when the system is off. A backup memory circuit is constructed in the FPGA 3. When the system is off, the FPGA 3 is supplied with power from the backup power source 5 and holds backup data.

  FIG. 4 is a diagram for explaining an electronic device at the time of a system-on command. Various data stored in the backup memory circuit built in the FPGA 3 is transferred to the DRAM 2 via the CPU 1. When all the backup data is transferred to the DRAM 2, as shown in FIG. 5, the CPU 1 downloads the I / O control circuit construction data and reconstructs the FPGA 3 to function as an I / O control circuit. .

  FIG. 6 is a diagram for explaining an electronic device after the FPGA 3 is reconfigured as an I / O control circuit in response to a system-on command. After the system is turned on, the FPGA 3 is connected with various processes of a normal car navigation operation. Functions as an / O control circuit, and exchanges various input / output signals between the I / O 4 and the CPU 1. Between the CPU 1 and the DRAM 2, vehicle position data and the like are transferred to the DRAM 2 at a predetermined timing, and the vehicle position data in the DRAM 2 is updated to the latest data.

  FIG. 7 is a diagram for explaining an electronic device in a system-off command. A logic circuit as an I / O control circuit is constructed in the FPGA 3. In response to the system-off command, the FPGA 3 downloads the memory circuit construction data and reconstructs the FPGA 3 to function as a backup memory circuit, as shown in FIG.

  When the backup memory circuit is constructed in the FPGA 3, as shown in FIG. 8, the CPU 1 uses the data stored in the DRAM 2 when executing various processes when the system is turned on, that is, the backup memory circuit. Transfer to and store. Since power is supplied to the FPGA 3 from the backup power source 5, data can be held even when the system is off.

According to the navigation electronic device according to the embodiment described above, the following operational effects can be obtained.
(1) In response to the system-off command, the FPGA 3 is constructed to function as an SRAM, and in response to the system-on command, the FPGA 3 is constructed to function as an I / O control circuit. Therefore, it is not necessary to mount an SRAM as a backup memory circuit, and the circuit scale can be reduced. In particular, in-vehicle navigation devices increase the capacity of data to be backed up when the system is turned off, which contributes to reducing the capacity of a backup storage device.
(2) Since the FPGA is normally not powered when the system is off, the logic circuit is initialized. In this embodiment, a backup memory circuit is constructed in the FPGA 3 in response to the system off command, and the memory circuit Power was supplied from the backup power source 5. Therefore, it is possible to effectively use an FPGA that has not been conventionally used when the system is off.

The following modifications are also within the scope of the present invention.
The electronic device is not limited to the vehicle-mounted navigation electronic device. In response to the system-off command, a backup memory circuit is constructed in the FPGA 3 so that power is supplied from the backup power supply 5, and in response to the system-on command, the data stored in the memory circuit is read into a work memory such as DRAM2. The present invention can also be suitably used for various electronic devices such as flat-screen televisions and digital cameras used.

  FIG. 9 is a diagram showing an example in which the electronic apparatus of the present invention is applied to a flat-screen television called a so-called white goods home appliance. The electronic device shown in FIG. 9 is configured by connecting a plurality of logic elements, and is reconfigured like an FPGA or PLD that rearranges the circuit configuration based on the first or second connection information indicating the connection state between the plurality of logic elements. A configurable logic circuit 10 and a non-volatile storage device 20 such as a flash memory or a ROM for storing the first and second connection information are provided.

  As shown in FIG. 9A, in the reconfigurable logic circuit 10, when the system is on, a processor circuit 10a is constructed and various processes are performed. The electronic device also includes a temporary storage device 30 that temporarily stores data used in various processes executed by the processor circuit 10a when the system is turned on. When the system off is instructed, the reconfigurable logic circuit 10 includes a memory circuit 10b and a logic circuit as shown in FIG. 9B under the control of the processor circuit 10a built in the reconfigurable logic circuit 10. 10c is constructed. That is, the memory circuit / logic circuit construction data is downloaded from the flash memory 20, and the two circuits 10b and 10c are constructed.

  The logic circuit 10c transfers the data stored in the memory circuit 10b to the temporary storage device 30 and downloads the processor circuit construction data from the flash memory 20 when the electronic device shifts from system off to system on. Thus, the processor circuit 10a is constructed.

  Note that the electronic device in FIG. 9 is a home appliance, and the reconfigurable logic circuit 10 is always supplied with power from a commercial 100 V power supply, so that a backup power supply when the system is off is not necessary.

  Even in such an electronic device, the same operational effects as the above-described electronic device can be achieved. Further, since the CPU function itself is constructed in the reconfigurable logic circuit 10, a dedicated CPU can be omitted, which contributes to cost reduction.

  As long as the characteristics of the present invention are not impaired, the present invention is not limited to the above-described embodiments, and other forms conceivable within the scope of the technical idea of the present invention are also included in the scope of the present invention. .

  For example, a circuit of an electronic device such as a navigation device having a reconfigurable logic circuit that is configured by connecting a plurality of logic elements, and can be changed into a logic circuit or a memory circuit by changing a connection state between the plurality of logic elements. The construction control / signal processing method can be realized by being configured to include the following procedures (i) to (v).

(I) In response to the system-on command, construct a logic circuit in a reconfigurable logic circuit such as an FPGA,
(II) In response to the system off command, a memory circuit such as SRAM is constructed in the reconfigurable logic circuit,
(III) After the logic circuit is constructed in the reconfigurable logic circuit in response to the system-on command, data used when executing various processes in the logic circuit is temporarily stored in a temporary storage device such as a DRAM. ,
(IV) After the memory circuit is constructed in the reconfigurable logic circuit in response to the system-off command, (a) the data stored in the temporary storage device is transferred to the memory circuit and stored, and (b) the memory Power the circuit from the backup power source, (c) then turn off the system,
(V) After the logic circuit is constructed in the reconfigurable logic circuit in response to the system-on command, the data stored in the memory circuit is transferred to the temporary storage device and stored.

In addition, the correspondence between each component of the navigation device in the embodiment described above and each component of the claims is as follows.
The FPGA 3 constitutes a reconfigurable logic circuit, the CPU 1 constitutes a circuit construction control means, the DRAM 2 constitutes a temporary storage device, and the flash memory 6 constitutes a nonvolatile storage device. Note that the above description of the correspondence relationship is merely an example, and is not constrained when interpreting rights.

1 is a block diagram showing a configuration of navigation electronic equipment in one embodiment Flowchart explaining the procedure for reconstructing the FPGA when the system is turned on / off The figure explaining the electronic equipment at the time of system off The figure explaining electronic equipment at the time of system ON A diagram for explaining that an I / O control circuit construction data is downloaded in response to a system-on command and an I / O control circuit is constructed in the FPGA 3 The figure explaining the electronic device after rebuilding an I / O control circuit in FPGA3 in response to a system-on command The figure explaining downloading backup memory circuit construction data in response to a system-off command and constructing a backup memory circuit in the FPGA 3 The figure explaining electronic equipment at the time of system off command 10A and 10B each illustrate an electronic device according to another embodiment of the invention.

Explanation of symbols

1: CPU 2: DRAM
3: FPGA 4: I / O
5: Power supply for backup 10: Reconfigurable logic circuit (FPGA)
20: Nonvolatile storage device (FLASH) 30: Temporary storage device (DRAM)

Claims (5)

In an electronic device that performs various processing based on an input signal and outputs various signals,
A reconfigurable logic circuit configured by connecting a plurality of logic elements and rearranging the circuit configuration based on first or second connection information indicating a connection state between the plurality of logic elements;
A non-volatile storage device for storing the first and second connection information;
A first circuit is constructed in the reconfigurable logic circuit based on the first connection information when the system is on, and a second circuit is constructed in the reconfigurable logic circuit based on the second connection information when the system is off. Circuit construction control means,
An electronic apparatus comprising: a backup power supply circuit that supplies power to the reconfigurable logic circuit when the system is off. The electronic device according to claim 1,
A temporary storage device that temporarily stores data used in the various processes when the system is turned on;
The circuit construction control means includes
When the system is off, a memory circuit is constructed as the second circuit in the reconfigurable logic circuit according to the second connection information, and the data stored in the temporary storage device is transferred to the memory circuit for storage.
When the system is turned on, the data stored in the memory circuit is transferred to and stored in the temporary storage device, and the logic circuit as the first circuit that executes the various processes is re-executed according to the first connection information. An electronic device characterized by being built into a configurable logic circuit. The electronic device according to claim 2,
The various processes are navigation processes using map data, and the data stored in the memory circuit constructed when the system is off is data on the position of the electronic device when the system is off. Electronics. The electronic device according to claim 1,
The circuit construction control means includes
When the system is turned on, based on the first connection information, the first processor circuit as the first circuit that executes the various processes is constructed in the reconfigurable logic circuit,
When the system is off, the processor circuit is controlled to build a backup memory circuit and a logic circuit as the second circuit in the reconfigurable logic circuit based on the second connection information,
The backup memory circuit is a memory circuit for storing data in the temporary storage device when the system is off,
The electronic device according to claim 1, wherein the logic circuit is a logic circuit for transferring data stored in the memory circuit when the system is off to the temporary storage device when the system is on. Circuit construction control / signal processing method for electronic equipment having a reconfigurable logic circuit that is configured by connecting a plurality of logic elements, and can be changed into a logic circuit or a memory circuit by changing the connection state between the plurality of logic elements Comprises the following procedures (i) to (v).
(I) In response to a system-on command, construct the logic circuit in the reconfigurable logic circuit;
(II) In response to a system off command, the memory circuit is constructed in the reconfigurable logic circuit;
(III) After the logic circuit is constructed in the reconfigurable logic circuit in response to a system-on command, data used for executing various processes in the logic circuit is temporarily stored in a temporary storage device.
(IV) After building the memory circuit into the reconfigurable logic circuit in response to a system off command,
(A) transferring and storing data stored in the temporary storage device to the memory circuit;
(B) supplying power to the memory circuit from a backup power source;
(C) Then turn off the system,
(V) After constructing the logic circuit in the reconfigurable logic circuit in response to a system-on command, the data stored in the memory circuit is transferred and stored in the temporary storage device.

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