JP2009090543A - Information processor, printing device and information processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To more suppress data-missing, and to transfer thinned-data. <P>SOLUTION: A thinning circuit 33 performs a data thinning processing per MCU unit, and when the thinned data which is equal to or below a DMA transfer unit is outputted, the thinning circuit 33 switches so as to transfer the data to an SDRAM 25 by a plurality of MCUs, upon transferring the data by the plurality of MCUs, in such the state that the final data transfer is not enough as 1 DMA transfer unit, dummy data is added to the final data, then, the final data with the added dummy data is transferred. Probably, the data transfer is not performed in the state where the data is not enough as the DMA transfer unit. In this case, by adding the dummy data to the data not enough as the DMA transfer unit, the data is surely transferred. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an information processing apparatus, a printing apparatus, and an information processing method.

Conventionally, as an information processing apparatus, when JPEG-compressed image data is expanded and rotated and displayed, Y, U, V data to be stored in a video output capacity area in a RAM by an address generator and a UV converter. There has been proposed an arrangement in which a rotated image can be arranged in a RAM simultaneously with the development of the image data by controlling the arrangement order and the change of the UV data value (for example, see Patent Document 1).
JP 2000-322566 A

  By the way, in the information processing apparatus described in Patent Document 1, the so-called MCU unit of 8 × 8 pixels is used as a basic unit for handling an image, and JPEG-compressed image data is developed or after being developed. Image data is reduced and displayed. Also in this image data reduction processing, so-called thinning-out processing may be performed in MCU units, and the processed data may be output to the RAM. In addition, there is a case where image data is transferred after being developed by burst transfer that outputs at a higher speed to the RAM by performing processing in units of a predetermined data amount. When transferring the image data after the thinning-out process by burst transfer, if the data thinning-out process is executed, the entire data amount of the image data after the thinning-out process may not be enough for the data unit for burst transfer. In such a case, data output may be lost.

  The present invention has been made in view of such a problem, and an object thereof is to provide an information processing apparatus, a printing apparatus, and an information processing method capable of transferring data that has been thinned while further suppressing data loss. To do.

  The present invention adopts the following means in order to achieve the above-mentioned object.

The information processing apparatus of the present invention
An information processing apparatus for converting image data and transferring the data to a storage means in a predetermined transfer data amount unit,
Thinning means for executing data thinning processing in image configuration units constituting image data;
When data equal to or less than the transfer data amount unit is output from the thinning unit, the data is switched to the storage unit in a plurality of image constituent units, and the last data is transferred in the data transfer in the plurality of image constituent units. Data transfer means for performing data transfer by adding dummy data to any of the data transfers when the transfer is less than the transfer data amount unit;
It is equipped with.

  In this information processing apparatus, data thinning processing is executed in units of image components constituting image data, and when data after decimation below the unit of transfer data amount is output, data transfer is performed to storage means in units of multiple image components When transferring data in multiple image composition units, if the last data transfer is less than the transfer data amount unit, dummy data is added to one of the data transfers to execute the data transfer To do. As described above, when the transfer data amount unit is insufficient, the insufficient data transfer itself may be omitted, but here, by adding dummy data, the transfer of data that is insufficient for the transfer data amount unit is performed. Ensure that it is done. Therefore, it is possible to transfer the thinned data while further suppressing data loss. Here, “when the last data transfer is less than the transfer data amount unit” may be determined at the initial stage of data transfer (before data transfer or the like) or may be determined immediately after the last data transfer. Good.

  In the information processing apparatus of the present invention, when the data transfer means transfers data to the storage means in a plurality of image constituent units, 2n (n is an integer of 1 or more) transfer data amount units by the image constituent units. When data transfer is executed and dummy data is added and data transfer is executed, the number of image constituent units in the X-axis direction is n (a + 1) (a is an integer of 1 or more) in the image data. When the number of image constituent units in the Y-axis direction orthogonal to the X-axis is 2b + 1 (b is an integer of 1 or more), (b + 1) times × (a + 2) / 2 times 2n data transfer units using the image constituent units , B times × a / 2 times, 2n data transfer by the image composition unit, and data transfer is performed by adding n dummy data to any of the data transfers. As Also good. As described above, when the number of image constituent units in the X-axis direction of image data is n (a + 1), that is, when there are half (n) data transfer times in the X-axis direction by 2n, the number of transfer times is omitted. Furthermore, if the Y-axis direction is 2b + 1, that is, an odd number that is not divisible by 2, an insufficient amount of data transfer by the image constituent unit occurs. Here, in the data transfer, the Y-axis direction is divided into two (b + 1) times and b times, and data that fills the half end of the (b + 1) times side is received from the b times side. The deficiency in the transfer is compensated by n dummy data. By so doing, it is possible to transfer the thinned data relatively easily while suppressing data loss. At this time, when the number of image constituent units in the X-axis direction is 2n × a and the number of image constituent units in the Y-axis direction is b, the data transfer means uses a times × b times of the image constituent units. Data transfer may be executed. In this way, when there is no half end in the X-axis direction, data transfer can be executed in consideration of the image arrangement of a times in the X-axis direction and b times in the Y-axis direction. At this time, the information processing apparatus of the present invention includes an X-axis counter that counts the position of the image constituent unit in the X-axis direction, and a Y-axis counter that counts the position of the image constituent unit in the Y-axis direction. The data transfer means sets the X-axis count end value to n (a + 2) and executes data transfer of the 2n image constituent units before the Y-axis counter value exceeds (b + 1). When the X-axis counter is incremented by 2n and the X-axis counter value reaches the X-axis count end value, the Y-axis counter is incremented, and after the Y-axis counter value exceeds (b + 1), the Y-axis counter value is b Until the X-axis count end value is set to na and the data transfer of the 2n image constituent units is executed, the X-axis counter is incremented by 2n. When the X-axis counter value serial Y-axis counter value is Y-axis count end value becomes the count end value may shall terminate the data transfer. In this way, the thinned data can be transferred more easily using the counter while further suppressing data loss.

  In the information processing apparatus of the present invention, the data transfer means executes data transfer in units of transfer data amount by 2n (n is an integer of 1 or more) of the image constituent units, and in the image data, When the number of image constituent units is n (c + 1) (c is an integer of 1 or more) and the number of image constituent units in the Y-axis direction orthogonal to the X axis is 2d (d is an integer of 1 or more), d It is also possible to execute data transfer using 2n image composition units of times x (c + 2) / 2 times and data transfer using 2n image composition units of d times x c / 2 times. In this way, the number of image constituent units in the X-axis direction of image data is n (c + 1), that is, the number of transfer times is omitted, and the number of data transfers in the X-axis direction by 2n is half (n). Yes, and when the Y-axis direction is divisible by 2 (2d), data transfer is performed relatively easily by suppressing data loss by distributing data by assigning one half end to the other. be able to.

  In the information processing apparatus of the present invention, when the data transfer means transfers the data in the plurality of image constituent units, and the last data transfer is less than the transfer data amount unit, the dummy data is transferred at the end of the data transfer. May be added to execute data transfer. This makes it easier to remove dummy data.

  In the information processing apparatus according to the present invention, the data transfer means includes the number of the image constituent units included in the image data and the plurality of image constituent units to which the data transfer is performed when the dummy data is added and transferred. Data transfer may be executed by adding the dummy data having a predetermined data amount. In this way, dummy data can be added relatively easily. At this time, the number of image constituent units included in the image data is divided by a plurality of image constituent units (transfer data amount units) after the thinning process for transferring the data, and the integer data and the remainder are used to calculate the dummy data. The amount of data may be obtained.

  The printing apparatus according to the present invention includes an information processing apparatus according to any one of the above, storage means for storing image data thinned by the information processing apparatus, and the stored image data after thinning processing. And a print output means for printing out to a print medium. Since a printing apparatus often prints image data after thinning it out, it is highly meaningful to apply the present invention.

The information processing method of the present invention includes:
An information processing method for converting image data and transferring the data to a storage means in units of transfer data amount,
(A) executing a data thinning process in units of image components constituting the image data;
(B) When data equal to or less than the transfer data amount unit is output in step (a), switching is performed so that data is transferred to the storage means in a plurality of image constituent units, and when transferring data in the plurality of image constituent units In addition, when the last data transfer is less than the transfer data amount unit, dummy data is added somewhere during the data transfer, and the data transfer is executed.
Is included.

  In this information processing method, data thinning processing is executed in units of image constituents constituting image data, and when data after thinning out is transferred in units of transfer data amount or less, data is transferred to the storage means in units of plural image constituents. When transferring data in multiple image composition units, if the last data transfer is less than the transfer data amount unit, dummy data is added to one of the data transfers to execute the data transfer To do. As described above, when the transfer data amount unit is insufficient, the insufficient data transfer itself may be omitted, but here, by adding dummy data, the transfer of data that is insufficient for the transfer data amount unit is performed. Secure it. Therefore, it is possible to transfer the thinned data while further suppressing data loss. In this information processing method, various aspects of the information processing apparatus described above may be adopted, and steps for realizing each function of the information processing apparatus described above may be added.

  Next, the best mode for carrying out the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram showing an outline of a configuration of a printer 20 as a printing apparatus according to an embodiment of the present invention. The printer 20 according to the present embodiment includes a controller 21 that controls the entire apparatus, an SDRAM (Synchronous Dynamic RAM) 25 that temporarily stores data that can be burst-transferred to transfer data every clock, and a recording sheet S. A slot for inserting a printing mechanism 26 for printing an image, an interface (I / F) 27 capable of inputting / outputting information between an external device such as a connected personal computer, and a memory card 12 as a portable storage medium. A memory card controller 28 that can be attached / detached to / from 28a, an image processing ASIC 30 that is a circuit that performs rotation and reduction of an image, and an operation panel 40 that can display information to the user and can input user instructions. It is equipped with. The controller 21 is configured as a microprocessor centered on the CPU 22 and includes a flash ROM 23 that stores various processing programs and a cache memory 24 that temporarily stores data. The SDRAM 25 is a main memory capable of burst transfer, in which an external bus interface operates in synchronization with a clock signal having a fixed period, and a plurality of data is transferred continuously in a single address designation. Although not shown, the printing mechanism 26 is an ink jet mechanism that applies a pressure to each color ink and discharges the pressurized ink onto the recording paper S to execute a printing process. The mechanism for applying pressure to the ink may be due to deformation of the piezoelectric element or due to generation of bubbles due to the heat of the heater.

  The image processing ASIC 30 includes an image expansion circuit 31 that decompresses compressed image data stored in the memory card 12 or the like and expands the image data, and a rotation circuit 32 that rotates the expanded image data at a predetermined angle. A thinning circuit 33 for thinning out and reducing the image data developed by the image development circuit 31, a register 34 for setting information necessary for executing predetermined processing on the image data, and the X-axis direction of the image An Xmcu counter 35 that counts the MCU in the (horizontal direction) and a Ymcu counter 36 that counts the MCU in the Y-axis direction (vertical direction orthogonal to the X-axis) of the image. The MCU is an “image constituent unit” and is a basic unit of 8 × 8 bytes constituting image data. Based on a command from the controller 21, the image expansion circuit 31 accesses the memory card 12 and expands (decompresses) the compressed and stored image data, and the expanded image data is supplied to the rotation circuit 32 and the thinning circuit 33. Process to output. The rotation circuit 32 is a circuit that rotates the image data developed by the image development circuit 31 and the image data thinned out by the thinning circuit 33 to an angle such as 90 °, 180 °, or 270 °. The rotation circuit 32 executes a process of writing the rotated image data into the SDRAM 25 by DMA (Direct Memory Access). The thinning circuit 33 is configured as a circuit that executes input image data by 1/2 thinning, 1/4 thinning, and 1/8 thinning by simple thinning. The thinning circuit 33 performs thinning processing using the value set in the register 34, the Xmcu counter 35, and the Ymcu counter 36, and outputs the thinned image data to the rotation circuit 32 or DMA to the SDRAM 25. Execute the writing process. The register 34 is configured as a circuit that sets / resets various setting values such as information on the size of image data (for example, the number of MCUs in the X-axis direction and the number of MCUs in the Y-axis direction), a thinning rate, and a rotation angle. The Xmcu counter 35 is configured as an up / down counter that can count between the Xend value that is the last MCU number of the X axis set in the register 34 and the value “0”. When the X counter and the Y counter (not shown) that generate an internal address of the MCU are counted up to a predetermined value (here, 8 × 8), the Xmcu counter 35 counts the counter value according to either the up / down count. 1 ”It is configured to be changed. The Ymcu counter 36 is configured such that when the Xmcu counter 35 counts all between the Xend value and the value “0”, the counter value is changed to “1” in accordance with either the up / down count. Yes. Here, for convenience of explanation, the case of counting up the Xmcu counter 35 and the Ymcu counter 36 will be mainly described.

  The operation panel 40 is a device for a user to input various instructions to the printer 20, and includes a liquid crystal panel that displays a color image, and a display unit 42 that displays characters and images according to the various instructions. In addition, an operation unit 44 for performing various operations is provided, which includes a cursor key that is pressed when moving the cursor, a determination key that is pressed when determining processing selection, and the like. The controller 21, SDRAM 25, printing mechanism 26, I / F 27, memory card controller 28, image processing ASIC 30, and operation panel 40 are electrically connected by a bus 29. The memory card 12 is a nonvolatile memory in which data can be written and erased, and stores a plurality of image files photographed by a photographing device such as a digital camera. In this image file, for example, image data compressed in a predetermined format (for example, JPEG format) and additional information (such as shooting date and time and shooting mode) of the image data are stored.

  In the printer 20 configured as described above, the access to the SDRAM 25 with the controller 21, the printing mechanism 26, the memory card controller 28, the image processing ASIC 30, and the like is empirically 16 bits · 4 from the viewpoint of increasing the transfer speed and transfer efficiency. It is fixedly determined to transfer data in units of 8 bytes at a time as burst transfer, that is, “transfer data amount unit”.

  Next, the operation of the printer 20 of this embodiment configured as described above will be described. Here, a case where one image among image files stored in the memory card 12 is reduced (thinned) and displayed on the display unit 42 and printed will be mainly described. Note that description of the process of rotating the image is omitted for convenience of description, and a case where the image is not rotated will be described. First, the user operates the operation unit 44 to select an image displayed on the display unit 42, and executes a reduction process. Then, the CPU 22 sets execution conditions such as a thinning number and a rotation angle in the register 34, and causes the memory card controller 28 to output image data to the image development circuit 31. FIG. 2 is a flowchart illustrating an example of a thinning execution routine executed by the image processing ASIC 30 of the printer 20. This thinning execution routine is executed by the image processing ASIC 30 after the image processing ASIC 30 receives the image data thinning processing command transmitted by the CPU 22.

  When this routine is started, the image expansion circuit 31 expands the compressed image data input from the memory card controller 28 (step S100). At this time, the image development circuit 31 performs processing for setting the number of pixels and the number of MCUs in the X-axis direction and the number of pixels and the number of MCUs in the Y-axis direction of the image data in the register 34. Thus, the CPU 22 can grasp the size of the image data and which pixel is stored in which address of the SDRAM 25 by checking the value of the register 34. Here, the image development circuit 31 converts the compressed YUV format image data into RGB format image data. FIG. 3 is an explanatory diagram of the MCU when expanded into RGB data, and FIG. 4 is an explanatory diagram of image data configured by the MCU. As shown in FIG. 3, the developed image data is composed of four MCUs of R, G, B, and Null, and the MCU as one unit of the image data includes 8 × 8 bytes of data. Has been. That is, 1-pixel data is composed of 4-byte data of R, G, B, and Null. Note that Null data may be data that does not include anything, or may store information accompanying the image data (for example, shooting date and time).

  Next, the value of the thinning number is checked (step S110). When the thinning number is 1/1, 1/2, or 1/4, the normal thinning process is executed (step S120), and this routine is finished as it is. . Here, in the normal thinning process, for example, when 1/1 thinning, that is, thinning is not executed, the transfer data amount unit is 8 bytes in MCU units from left to right and from top to bottom of the image data shown in FIG. Burst transfer by DMA is executed from the thinning circuit 33 to the SDRAM 25 by (2 pixels). FIG. 4 shows an example of image data of 16 pixels (2 MCU) in the X-axis direction and 24 pixels (3 MCU) in the Y-axis direction. For example, in FIG. 4, the first MCU address “0” to “1c” is transferred, then “40” is similarly transferred to “1dc”, and then the second MCU address “20” is transferred. The process of transferring up to “1fc” is repeated until the last “5fc” is transferred. Further, as shown in FIG. 3A, the upper left 4 × 4 pixels of each MCU are to be transferred during 1/2 thinning, and the upper left 2 × 2 of each MCU is used during 1/4 thinning. The same processing as described above is executed with the pixel as the transfer target. When the thinning-out number is 1/1, 1/2, or 1/4, there are 2 or more pixels per MCU regardless of the number of MCUs in the X-axis direction and the Y-axis direction. Data can be transferred in units of 8 bytes. As described above, in the normal thinning process, the image data is transferred via the respective circuits of the image processing ASIC 30 to the address of the SDRAM 25 corresponding to the image image from left to right and from top to bottom of the image.

  On the other hand, when the thinning number is 1/8, 1/8 thinning processing is executed (step S130), and this routine is terminated. Here, in the 1/8 decimation process, as shown in FIG. 3A, only 1 pixel (4 bytes) of data at the upper left per 1 MCU is used, and therefore, 1 MCU may perform burst transfer in units of 8 bytes. Can not. For this reason, the image processing ASIC 30 basically performs burst transfer every two MCUs together with the adjacent MCU. However, when the number of MCUs in the X-axis direction is an odd number or when the number of MCUs in the Y-axis direction is an odd number, there is a case where there is no adjacent MCU, which causes inconvenience. Here, this inconvenience is solved by using an address that is not conscious of the image. Specific contents will be described below. FIG. 5 is a flowchart showing an example of the 1/8 thinning process routine. This routine is executed by the thinning circuit 33 of the image processing ASIC 30. When this routine is started, the thinning circuit 33 first initializes the counter value X of the Xmcu counter 35 to a value “0” and the counter value Y of the Ymcu counter 36 to a value “1” (step S200). The number of MCUs in the axial direction and the Y-axis direction is checked (step S210). The values set in the register 34 are used as the number of MCUs in the X-axis direction and the Y-axis direction.

  When the number of MCUs in the X-axis direction is even and the number of MCUs in the Y-axis direction is even, and when the number of MCUs in the X-axis direction is even and the number of MCUs in the Y-axis direction is odd, that is, in the X-axis direction If the number of MCUs is divisible by 2, the number of MCUs in the Y-axis direction is 2 MCU units in the X-axis direction regardless of whether the number of MCUs is even or odd. Execute. Specifically, the thinning-out circuit 33 executes a data writing process to the 2-pixel SDRAM 25 corresponding to 2MCU (step S220), and increments the counter value of the Xmcu counter 35 by a value “2” (step S230). Then, it is determined whether or not the counter value X is the end value Xend (step S240). Here, the end value Xend is set to a value Xmax which is the last MCU value in the X-axis direction. When the counter value X is not the end value Xend, the thinning circuit 33 repeats the processes of steps S220 to S240 described above. On the other hand, when the counter value X is the end value Xend, the thinning circuit 33 clears the counter value X to the value “0” (step S250), and whether or not the counter value Y of the Ymcu counter 36 is the end value Yend. Is determined (step S260). In this 1/8 decimation processing routine, the end value Yend is set to the value Ymax which is the last MCU value in the Y-axis direction. When the counter value Y is not the end value Yend, the counter value Y is incremented by the value “1” (step S270), and the above-described step S220 is performed until the counter value X is the end value Xend and the counter value Y reaches the end value Yend. The process of ~ S270 is repeated. When the counter value X is the end value Xend and the counter value Y is the end value Yend, the writing of the image data to the SDRAM 25 is completed and an interrupt signal is output to the CPU 22 (step S280), and this routine is finished. . Upon receiving the interrupt signal, the CPU 22 uses the value set in the register 34 to grasp the relationship between the address of the SDRAM 25 and the image pixel, and displays the image data stored in the SDRAM 25 on the display unit 42. The printing mechanism 26 prints out. As described above, when the number of MCUs in the X-axis direction is an even number, the thinning circuit 33 transfers the image data to the address of the SDRAM 25 corresponding to the image image from left to right and from top to bottom of the image. .

  On the other hand, when the number of MCUs in the X-axis direction is odd and the number of MCUs in the Y-axis direction is even, that is, the number of MCUs in the X-axis direction is not divisible by 2, and the number of MCUs in the Y-axis direction is divisible by 2. The following processing was performed. FIG. 6 is a conceptual diagram of the address of the SDRAM 25 transferred by DMA when the number of MCUs in the X-axis direction is an odd number and the number of MCUs in the Y-axis direction is an even number. FIG. FIG. 6B is a conceptual diagram of addresses that are not conscious of images. FIG. 6 shows an address when the X-axis direction is 9 MCU and the Y direction is 10 MCU after 1/8 thinning. When burst transfer is performed in units of 2 MCUs, as shown in FIG. 6A, the decimal point that cannot be divided when the value Xmax (the value “9” in the figure) that is the last MCU number in the X-axis direction is divided by 2. Cannot be processed due to the circuit configuration, and here, the number of DMAs, which is the number of transfers, is processed as a value “4”, and pixels corresponding to one column at the right end are not transferred and data is lost. Resulting in. Here, as shown in FIG. 6 (b), the MCU in the Y-axis direction is divided into two, and processing for shifting one of the odd-numbered MCUs to the other is performed to execute burst transfer by DMA.

  Specifically, the thinning circuit 33 determines whether or not the counter value Y is smaller than the value obtained by dividing the value Ymax, which is the last MCU number in the Y-axis direction, by 2 (step S290). This determination is processing for determining whether or not the data transfer has been executed up to half in the Y-axis direction in FIG. When the counter value Y is smaller than the value Ymax / 2, the thinning-out circuit 33 sets a value obtained by adding 1 to the final MCU number Xmax in the X-axis direction to the end value Xend (step S300), and corresponds to 2 MCUs. Data is written into the 2-pixel SDRAM 25 (step S310), and the counter value of the Xmcu counter 35 is incremented by "2" (step S320). In FIG. 6, the number of DMA transfers is originally four in the X-axis direction (FIG. 6A), but the number of DMA transfers is increased by 1 MCU in the X-axis direction up to half of the Y-axis direction. Is set to 5 times (FIG. 6B). Next, the thinning-out circuit 33 determines whether or not the counter value X has reached the end value Xend (step S330). When the counter value X has not reached the end value Xend, the processing after step S290 is executed. On the other hand, when the counter value X reaches the end value Xend, the counter value X is reset to the value “0” (step S340), and it is determined whether or not the counter Y has reached the end value Yend (step S350). When the counter value Y has not reached the end value Yend, the value of the counter Y is incremented by 1 (step S360), that is, the process proceeds to the next X-axis column process, and the processes after step S290 are executed. While this process is repeated, if it is determined in step S290 that the counter value Y is greater than the value Ymax / 2, the end value Xend is set to a value obtained by subtracting 1 from the value Xmax (step S370), and the above-described step S310 is performed. The subsequent processing is executed. When the counter X reaches the end value Xend in step S330 and the counter Y reaches the end value Yend in step S350, the writing of the image data to the SDRAM 25 is completed and an interrupt signal is output to the CPU 22 (step S280). ) This routine is terminated as it is. As described above, when the number of MCUs in the X-axis direction is an odd number and the number of MCUs in the Y-axis direction is an even number, the thinning circuit 33 transfers the image data to the address of the SDRAM 25 that is not aware of the image image. In this process, data transfer is performed in units of burst transfer data amount (1 DMA) by 2n (n is an integer of 1 or more) MCUs, and the number of MCUs in the X-axis direction is n (c + 1) (c is 1). When the number of MCUs in the Y-axis direction is 2d (d is an integer equal to or greater than 1), d times × (c + 2) / 2 times 2n MCU data transfer and d times × c / Data transfer by 2n MCUs twice can be generalized. In the example of FIG. 6, data transfer is performed with 1 DMA by 2 MCUs, the number of MCUs in the X-axis direction is 1 × (8 + 1) = 9, and the number of MCUs in the Y-axis direction is 2 × 5 = 10. n = 1, c = 8, d = 5, and 5 times × 5 times of data transfer by 2MCU and 5 times × 4 times of data transfer by 2MCU are executed.

  On the other hand, when the number of MCUs in the X-axis direction is odd and the number of MCUs in the Y-axis direction is odd, that is, when the number of MCUs in the X-axis direction and the Y-axis direction is not divisible by 2, the following processing is performed. It was. FIG. 7 is a conceptual diagram of the address of the SDRAM 25 transferred by DMA when the number of MCUs in the X-axis direction and the Y-axis direction is an odd number, FIG. 7A is an address conscious of the image image, FIG. ) Is a conceptual diagram of an address not conscious of an image. FIG. 7 shows addresses when the X-axis direction is 9 MCU and the Y direction is 9 MCU after 1/8 thinning. When burst transfer is performed in units of 2 MCUs, when the X-axis direction is an odd number, as shown in FIG. 7A, transfer is not performed for pixels corresponding to one column at the right end, and data is lost. End up. Further, as described above, when the number of MCUs in the Y-axis direction is an even number, the number can be divided into two in the Y-axis direction. However, when the number of MCUs in the Y-axis direction is an odd number, dividing into two in the Y-axis direction causes a further half-end. . Here, as shown in FIG. 7B, a process for adding one vertical column to the first half, subtracting one vertical column from the second half, and adding dummy data in accordance with the second half generated in the second half is performed. Burst transfer is assumed to be executed. Since this dummy data is discarded and there is no meaning in the content, any data may be used.

  Specifically, the thinning circuit 33 determines whether or not the counter value Y is smaller than the value of the integer solution obtained by dividing the value Ymax by 2 and adding 1 (step S380). This determination is a process of determining whether or not the data transfer has been executed up to the smallest integer value larger than half of the Y-axis direction in FIG. 7B. When the counter value Y is smaller than the integer solution of the value Ymax / 2 + 1, the thinning circuit 33 sets a value obtained by adding 1 to the value Xmax to the end value Xend (step S390), and the counter value Y is the end value Yend. Further, it is determined whether or not the counter value X is two times before the end value Xend (step S400). This determination is to determine whether or not to execute the process of adding dummy data. When the counter value Y = Yend and the counter value X = Xend−2 are not satisfied, data write processing to the SDRAM 25 of 2 pixels corresponding to 2MCU is executed (step S410), and the counter value of the Xmcu counter 35 is set to the value “ 2 "is incremented (step S420). In FIG. 7, the number of DMA transfers is originally four in the X-axis direction (FIG. 7 (a)), but the DMA is increased by 1 MCU in the X-axis direction until just after half of the Y-axis direction. The number of transfers is 5 (FIG. 7B). Next, the thinning-out circuit 33 determines whether or not the counter value X is the end value Xend (step S430). When the counter value X is not the end value Xend, the processing after step S400 is executed. On the other hand, when the counter value X is the end value Xend, the counter value X is reset to the value “0” (step S440), the value of the counter Y is incremented by 1 (step S450), that is, the next X-axis column. The process proceeds to step S380 and subsequent steps.

  While this process is repeated, if it is determined in step S380 that the counter value Y is larger than the integer solution of the value Ymax / 2 + 1, a value obtained by subtracting 1 from the value Xmax is set to the end value Xend (step S460). The processes after step S400 are executed. When the counter value Y = Yend and the counter value X = Xend−2 are satisfied in step S400, as shown in FIG. 7B, since the remaining MCU is 1, the data of dummy data added to 1 MCU is stored. Write processing to the SDRAM 25 is executed (step S470), writing of the image data to the SDRAM 25 is completed and an interrupt signal is output to the CPU 22 (step S280), and this routine is ended as it is. Upon receiving this interrupt signal, the CPU 22 uses the value set in the register 34 to grasp that the last MCU is dummy data, and grasps the relationship between the address of the SDRAM 25 and the image pixel, The image data stored in the SDRAM 25 is displayed on the display unit 42 or printed out by the printing mechanism 26.

  As described above, when both the numbers of MCUs in the X-axis direction and the Y-direction are odd numbers, dummy data is further added, and the thinning circuit 33 transfers the image data to the address of the SDRAM 25 that is not conscious of the image image. In this process, data transfer is performed in units of burst transfer data amount (1 DMA) by 2n (n is an integer of 1 or more) MCUs, and the number of MCUs in the X-axis direction is n (a + 1) (a is 1). When the number of MCUs in the Y-axis direction is 2b + 1 (b is an integer equal to or greater than 1), (b + 1) times × (a + 2) / 2 times of data transfer by 2n MCUs and b times It can be generalized to execute data transfer by adding 2 dummy MCUs at the last data transfer and adding n dummy data in the last data transfer. In the example of FIG. 7, data transfer is executed with 1 DMA by 2 MCUs, the number of MCUs in the X-axis direction is 1 × (8 + 1) = 9, and the number of MCUs in the Y-axis direction is 2 × 4 + 1 = 9. n = 1, a = 8, b = 4, 5 × 5 data transfer by 2MCU, and 4 × 4 data transfer by 2MCU including one dummy data in the last data transfer, Is executed.

  Here, the correspondence between the components of the present embodiment and the components of the present invention will be clarified. The image processing ASIC 30 of the present embodiment is the information processing apparatus of the present invention. Among them, one DMA transfer unit corresponds to a transfer data amount unit of the present invention, an MCU unit corresponds to an image configuration unit, and a thinning circuit 33 is provided. The Xmcu counter 35 corresponds to an X-axis counter, and the Ymcu counter 36 corresponds to a Y-axis counter. The printer 20 corresponds to the printing apparatus of the present invention. Among these, the SDRAM 25 corresponds to the storage means, and the printing mechanism 26 corresponds to the print output means. In this embodiment, an example of the information processing method of the present invention is also clarified by describing the operation of the printer 20.

  According to the printer 20 of this embodiment described in detail above, data thinning processing is executed in units of MCUs, and when data after thinning out in units of DMA transfer is output, data is transferred to the SDRAM 25 by a plurality of MCUs. When switching and transferring data among a plurality of MCUs, if the last data transfer is not enough for one DMA transfer unit, dummy data is added to the last data transfer to execute data transfer. When the DMA transfer unit is insufficient, the data transfer itself may be omitted, but here, dummy data is added to ensure the transfer of data that is insufficient for the DMA transfer unit. Therefore, it is possible to transfer the thinned data while further suppressing data loss. Further, since dummy data is added at the end of data transfer and data transfer is executed, it is easy to remove dummy data. Further, when the number of MCUs Xmax in the X-axis direction is n (a + 1) (a is an integer of 1 or more) and the number of MCUs Ymax in the Y-axis direction is 2b + 1 (b is an integer of 1 or more), (b + 1) 2 times × (a + 2) / 2 times of data transfer by 2n MCUs and b times × a / 2 times of data transfer by 2n MCUs, and n during any of the data transfers. In order to execute data transfer by adding dummy data, the Y-axis direction of data transfer is divided into two (b + 1) times and b times, and the (b + 1) -time side half is filled. By receiving data from the b-th side and compensating for the deficiency in the b-th side transfer with n pieces of dummy data, it is possible to transfer the thinned-out data while suppressing data loss more easily. In addition, when the number of MCUs in the X-axis direction is 2n × a and the number of MCUs in the Y-axis direction is b, data transfer is performed a times × b MCUs, so there is no half-way in the X-axis direction. In some cases, data transfer can be executed in consideration of the arrangement of images a times in the X-axis direction and b times in the Y-axis direction. Furthermore, until the counter value Y reaches (b + 1), the end value Xend is set to n (a + 2), and when the data transfer of 2n MCUs is executed, the counter value X is incremented by 2n, and the counter value X becomes the X end value Xend. Then, the Ymcu counter 36 is incremented. On the other hand, until the counter value Y counts b times after (b + 1), the X-axis counter end value is set to na and the data transfer of 2n MCUs is executed. When the counter value Y reaches the end value Yend and the counter value X reaches the end value Xend-2n, the data transfer is completed by DMA transfer of 1 MCU and dummy data. Data that has been reduced and thinned out can be transferred. Then, data transfer is executed in units of DMA transfer by 2n MCUs (n is an integer of 1 or more), the number of MCUs Xmax in the X-axis direction is n (c + 1) (c is an integer of 1 or more), and Y When the number of MCUs Ymax in the axial direction is 2d (d is an integer equal to or greater than 1), d times × (c + 2) / 2 times of data transfer by 2nMCU, d times × c / 2 times of data transfer by 2nMCU, Therefore, when the number of times of data transfer in the X-axis direction is half (n) and the Y-axis direction is divisible by 2 (2d), the data is transferred by distributing one half-end to the other. As a result, it is possible to transfer the thinned data relatively easily while suppressing data loss. In addition, since the printer 20 often prints image data after thinning it out, it is highly significant to apply the present invention. In addition, since each of the circuits included in the image processing ASIC 30 executes image development processing, thinning processing, rotation processing, and the like, the processing speed can be further increased as compared to execution of each processing by software.

  It should be noted that the present invention is not limited to the above-described embodiment, and it goes without saying that the present invention can be implemented in various modes as long as it belongs to the technical scope of the present invention.

  For example, in the above-described embodiment, the 1 DMA transfer unit as the transfer data amount unit is 8 bits of 16 bits and 4 bursts and 2 MCU units, but is not particularly limited to this, and any transfer unit may be used. Further, although the image configuration unit is 1 MCU unit, it is not particularly limited to this, and may be 4 MCU unit or 8 MCU unit. In addition, DMA transfer using an address that is not conscious of the image image in the 1/8 thinning process is performed, but depending on the conditions, the image image is also conscious in 1/2 thinning, 1/4 thinning, and 1/16 thinning. It is also possible to perform DMA transfer using a non-performing address.

  For example, as shown in FIG. 8, the DMA transfer unit may be 16 bits and 16 bytes of 8 bursts, DMA transfer may be executed in units of 4 MCUs, and nMCUs may be insufficient in the X-axis direction by transfer of 2 nMCUs. FIG. 8 is a conceptual diagram of the address of the SDRAM 25 that is transferred by DMA when there are not enough nMCUs in the X-axis direction and the number of MCUs in the Y-axis direction is odd in the transfer of 2nMCUs, and FIG. FIG. 8B is a conceptual diagram of an address that is not conscious of an image. FIG. 8 shows an address when the X-axis direction is 18 MCU and the Y-direction is 19 MCU after 1/4 thinning, and there are not enough 2 MCUs in the X-axis direction by transfer of 4 MCU. When burst transfer is performed in units of 4 MCUs as described above, if the X-axis direction is not divisible in units of 4 MCUs even by 1/4 decimation processing or 1/8 decimation processing, for example, as shown in FIG. In addition, transfer is not performed for pixels corresponding to two columns at the right end, and data is lost. Further, as described above, when the number of MCUs in the Y-axis direction is an odd number, if the number of MCUs is divided into two in the Y-axis direction, a further half end occurs. Here, as shown in FIG. 8B, processing for adding two vertical columns in the first half, subtracting two vertical columns from the second half, and adding n = 2 dummy data in accordance with the half-end generated in the second half. And burst transfer by DMA is executed. In executing this processing, in the 1/8 decimation processing routine shown in FIG. 5, the value obtained by adding 2 to the last MCU number Xmax in the X-axis direction is set to the end value Xend in steps S300 and S390, and step S370 is executed. In step S460, the value obtained by subtracting 2 from the last MCU number Xmax in the X-axis direction is set to the end value Xend. In steps S310, S320, S410, and S420, 4 MCUs are written and the counter value X is incremented by 4, and in step S400. It is determined whether or not the counter value Y = Yend and the counter value X = Xend−4 are satisfied, and the write process to the SDRAM 25 of the data in which the dummy data for 2 MCU is added to the 2MCU is executed in step S470. Good. In the example of FIG. 8, the number of MCUs in the X-axis direction is 2 × (8 + 1) = 18, the number of MCUs in the Y-axis direction is 2 × 9 + 1 = 19, and the total is 18 × 19 = 342 MCUs. = 2, a = 8, b = 9, and when data transfer is performed with 1 DMA by 4 MCUs, 10 times × 5 data transfers by 4 MCUs and the last data transfer includes n = 4 dummy data 9 Times × 4 times data transfer by 4 MCUs. Therefore, in this case as well, the generalized processing in the above-described embodiment, “data transfer is executed with 1 DMA by 2n MCUs, the number of MCUs in the X-axis direction is n (a + 1), and the Y-axis direction When the number of MCUs is 2b + 1, (b + 1) times × (a + 2) / 2 times of data transfer by 2n MCUs and b times × a / 2 times of data transfer by 2n MCUs are executed. At the same time, the data transfer is executed by adding n dummy data in the last data transfer ”. Although not shown, for example, in FIG. 8, when the Y-axis direction is an even 20 MCU, the number of MCUs in the X-axis direction is 2 × (8 + 1) = 18, and the number of MCUs in the Y-axis direction is 2 ×. Since 10 = 20 and 18 × 20 = 360 MCUs in total, n = 2, c = 8, and d = 10, and when data transfer is performed with 1 DMA by 4 MCUs, data transfer is performed 10 times × 5 times by 4 MCUs And 10 times × 4 times data transfer by 4 MCUs. Therefore, the generalized processing described above, “when the Y-axis direction is an even number, data transfer is performed with 1 DMA by 2n MCUs, the number of MCUs in the X-axis direction is n (c + 1), and the Y-axis When the number of MCUs in the direction is 2d, data transfer by 2n MCUs of d times × (c + 2) / 2 times and data transfer by 2n MCUs of d times × c / 2 times are executed. Satisfies. Even in this case, it is possible to transfer the thinned data while further suppressing the omission of data.

  Alternatively, as shown in FIG. 9, DMA transfer may be executed in units of 8 MCUs, assuming that 1 DMA transfer unit is 32 bits of 16 bits and 16 bursts. FIG. 9 is a conceptual diagram of the address of the SDRAM 25 that is transferred by the DMA when there are not enough nMCUs in the X-axis direction and the number of MCUs in the Y-axis direction is odd in the transfer of 2nMCUs, and FIG. FIG. 9B is a conceptual diagram of an address that is not conscious of an image. FIG. 9 shows an address when the X-axis direction is 20 MCU and the Y-direction is 19 MCU after 1/2 thinning, and there are not enough 4 MCUs in the X-axis direction in the transfer of 8 MCU. In the case of performing burst transfer in units of 8 MCUs as described above, for example, as shown in FIG. 9A, if the X-axis direction is not divisible by 8 MCU units even by ½ decimation processing, For pixels corresponding to four columns, transfer is not executed and data is lost. Further, as described above, when the number of MCUs in the Y-axis direction is an odd number, if the number of MCUs is divided into two in the Y-axis direction, a further half end occurs. Here, as shown in FIG. 9B, the vertical four columns are added to the first half, the vertical four columns are subtracted from the second half, and n = 4 dummy data are added in accordance with the second half generated in the second half. And burst transfer by DMA is executed. In executing this processing, in the 1/8 decimation processing routine shown in FIG. 5, a value obtained by adding 4 to the last MCU number Xmax in the X-axis direction is set to the end value Xend in steps S300 and S390, and step S370 is executed. In step S460, the value obtained by subtracting 4 from the last MCU number Xmax in the X-axis direction is set to the end value Xend. In steps S310, S320, S410, and S420, 8 MCUs are written and the counter value X is incremented by 8, and in step S400. It is determined whether or not the counter value Y = Yend and the counter value X = Xend−8 are satisfied, and the write process to the SDRAM 25 of the data in which the dummy data for 4 MCUs is added to the 4MCU is executed in step S470. Good. In the example of FIG. 9, the number of MCUs in the X-axis direction is 4 × (4 + 1) = 20, the number of MCUs in the Y-axis direction is 2 × 9 + 1 = 19, and the total is 20 × 19 = 380 MCUs. = 4, a = 4, b = 9, and when data transfer is performed with 1 DMA by 8 MCUs, 10 times × 3 data transfers by 8 MCUs and the last data transfer includes n = 4 dummy data 9 Times × 2 times data transfer by 8 MCUs. Therefore, in this case as well, the generalized processing in the above-described embodiment, “data transfer is executed with 1 DMA by 2n MCUs, the number of MCUs in the X-axis direction is n (a + 1), and the Y-axis direction When the number of MCUs is 2b + 1, (b + 1) times × (a + 2) / 2 times data transfer by 2n MCUs and b times × a / 2 times data transfers by 2n MCUs are executed. At the same time, the data transfer is executed by adding n dummy data in the last data transfer ”. Although not shown, for example, in FIG. 9, when the Y-axis direction is an even 20 MCU, the number of MCUs in the X-axis direction is 4 × (4 + 1) = 20, and the number of MCUs in the Y-axis direction is 2 ×. Since 10 = 20 and 20 × 20 = 400 MCUs in total, n = 4, c = 4, and d = 10, and when data transfer is executed by 1 DMA by 8 MCUs, data transfer by 8 MCUs by 10 times × 3 times And 10 times × 2 times data transfer by 8 MCUs. Therefore, the generalized processing described above, “when the Y-axis direction is an even number, data transfer is performed with 1 DMA by 2n MCUs, the number of MCUs in the X-axis direction is n (c + 1), and the Y-axis When the number of MCUs in the direction is 2d, data transfer by 2n MCUs of d times × (c + 2) / 2 times and data transfer by 2n MCUs of d times × c / 2 times are executed. Satisfies. Even in this case, it is possible to transfer the thinned data while further suppressing the omission of data.

  Or, for example, as shown in FIG. 10, DMA transfer is performed in units of 4 MCU with 1 DMA transfer unit of 16 bits and 8 bursts of 16 bytes, and there is no nMCU in the X-axis direction due to transfer of 2 nMCU. May be. FIG. 10 is a conceptual diagram of the address of the SDRAM 25 that is transferred by DMA when the number of MCUs in the Y-axis direction is an odd number except that there are not enough nMCUs in the X-axis direction due to the transfer of 2 nMCU. FIG. 10B is a conceptual diagram of addresses that are conscious of image images, and FIG. 10B is an address that is unaware of image images. FIG. 10 shows an address when the X-axis direction is 17 MCU and the Y-direction is 19 MCU after 1/4 thinning, and there are not enough 3 MCUs in the X-axis direction in a transfer unit of 4 MCUs. When burst transfer is performed in units of 4 MCUs as described above, if the X-axis direction is not divisible in units of 4 MCUs, for example, as shown in FIG. Transfer is not executed and data is lost. Further, as described above, when the number of MCUs in the Y-axis direction is an odd number, if the number of MCUs is divided into two in the Y-axis direction, a further half end occurs. Here, as shown in FIG. 10 (b), the first half, the first half of the second half (referred to as the first half), and the second half of the second half (referred to as the second half) are divided into three columns that are insufficient in the first half. Add, subtract 3 vertical columns from the second half, add 2 vertical columns that are not enough in the previous 2nd half, add 2 columns from the 2nd half, subtract 2 vertical columns from the 2nd half, and add dummy data to the half It is assumed that burst transfer by DMA is executed by performing a process of adding one of these. That is, in FIG. 10, 5 × 10 times = 50 first half DMA transfers, 4 × 5 times = 20 first and second half DMA transfers, and 3 × 4 including DMA transfer with one dummy data added. Times = 12 times and the latter half of the DMA transfer. At this time, the dummy data may be determined by the number of MCUs included in the image data and a plurality of MCUs that perform data transfer. In this way, dummy data can be added relatively easily. Specifically, for example, dummy data can be obtained from an integer solution and a remainder value obtained by dividing the number of MCUs included in image data by a plurality of MCUs (DMA transfer units) for data transfer. For example, in FIG. 10, the total is 17 × 19 = 323 MCU, and dividing this by 4 MCUs of the DMA transfer unit is 80 remainders 3, so it can be seen that one dummy data is necessary. This also applies to the above-described embodiment and other examples. Even in this case, it is possible to transfer the thinned data while further suppressing the omission of data.

  In the above-described embodiment, dummy data is added at the time of the last data transfer of the thinned image data. However, if the CPU 22 can grasp the address where the dummy data is stored, the data transfer is possible. It may be added to any data transfer during the transfer, or may be added at the beginning of the transfer of the image data after the thinning, or may be added in the middle of the transfer of the image data after the thinning. In consideration of the ease of grasping the image data on the CPU 22 side after transfer to the SDRAM 25, it is preferably added at the beginning of the transfer of the image data after thinning, more preferably added at the end.

  In the above-described embodiment, when the number of MCUs in the X-axis direction is odd, data transfer is performed by adding 1 MCU in the X-axis direction in the first half of the image data and subtracting 1 MCU from the X-axis direction in the second half of the image data. However, the present invention is not limited to this. Data transfer may be performed by subtracting 1 MCU from the X-axis direction in the first half of the image data and adding 1 MCU in the X-axis direction in the second half of the image data. Transfer with 1 MCU added to and transfer with 1 MCU subtracted from the X-axis direction may be alternately performed in the Y-axis direction, or transfer with 1 MCU added in the X-axis direction and transfer with 1 MCU subtracted from the X-axis direction. May be performed randomly in the Y-axis direction. Even in this case, it is possible to transfer the thinned data while further suppressing the omission of data.

  In the embodiment described above, the DMA transfer is executed using the Xmcu counter 35 and the Ymcu counter 36, but the counters determined in the X-axis direction and the Y-axis direction may not be used. In the above-described embodiment, whether or not the last data transfer is insufficient for the DMA transfer unit depends on whether the number of MCUs in the X-axis direction or the number of MCUs in the Y-axis direction is even or odd. Although the determination is made before data transfer), it may be determined immediately before the last data transfer.

  In the embodiment described above, simple thinning is executed, but it is not particularly limited as long as image data is thinned out. For example, averaging thinning may be executed. Further, when thinning out, the upper left pixel in the MCU is used as an image pixel, but a pixel at a position such as the center or the lower right side may be used.

  Although the description is omitted in the above-described embodiment, the image data thinned out by the thinning circuit 33 may be rotated by the rotation circuit 32. In the above-described embodiment, the image development circuit 31 is described as converting YUV data into RGB data. However, the thinning circuit 33 performs the thinning process on the YUV data and converts the RGB data converted into RGB data to the SDRAM 25. It is good also as what outputs to. Even in this case, it is possible to transfer the thinned data while further suppressing the omission of data.

  In the above-described embodiment, the printer 20 as the information processing apparatus has been described. However, the image processing ASIC 30 can be used without particular limitation as long as the image data ASIC 30 is used to perform the process of thinning out image data. As an electronic device as a processing device, such as a digital camera, digital video, mobile phone, television, personal computer, portable game machine, home game machine, recording device (video deck or HDD deck), PDA (Personal Digital Assistant), etc. Also good. Further, although the present invention has been described in the form of the printer 20, it may be in the form of an information processing method or a program aspect of this method.

1 is a configuration diagram showing an outline of the configuration of a printer 20 according to an embodiment of the present invention. The flowchart which shows an example of a thinning execution routine. Explanatory drawing of MCU when expand | deploying to RGB data. Explanatory drawing of the image data comprised by MCU. The flowchart which shows an example of a 1/8 thinning-out process routine. The conceptual diagram of the address where the number of MCUs of an X-axis is an odd number, and the number of MCUs of a Y-axis is an even number. The conceptual diagram of the address whose MCU numbers of X-axis and Y-axis are odd numbers. The conceptual diagram of the address where nMCU is insufficient on the X axis and the Y axis direction is odd. The conceptual diagram of the address where nMCU is insufficient on the X axis and the Y axis direction is odd. FIG. 6 is a conceptual diagram of addresses in which X-axis other than nMCU is insufficient and the Y-axis direction is odd.

Explanation of symbols

  12 memory card, 20 printer, 21 controller, 22 CPU, 23 flash ROM, 24 cache memory, 25 SDRAM, 26 printing mechanism, 27 interface (I / F), 28 memory card controller, 28a slot, 29 bus, 30 image processing ASIC, 31 image development circuit, 32 rotation circuit, 33 thinning circuit, 34 register, 35 Xmcu counter, 36 Ymcu counter, 40 operation panel, 42 display unit, 44 operation unit, S recording paper.

Claims (8)

An information processing apparatus for converting image data and transferring the data to a storage means in a predetermined transfer data amount unit,
Thinning means for executing data thinning processing in image configuration units constituting image data;
When data equal to or less than the transfer data amount unit is output from the thinning unit, the data is switched to the storage unit in a plurality of image constituent units, and the last data is transferred in the data transfer in the plurality of image constituent units. Data transfer means for performing data transfer by adding dummy data to any of the data transfers when the transfer is less than the transfer data amount unit;
An information processing apparatus comprising:   When transferring data to the storage unit in a plurality of image configuration units, the data transfer unit executes data transfer in units of transfer data amount by 2n (n is an integer of 1 or more) of the image configuration units, and performs dummy data Is added to the image data, the number of image constituent units in the X-axis direction is n (a + 1) (a is an integer of 1 or more) in the image data, and the Y-axis direction orthogonal to the X-axis When the number of image constituent units is 2b + 1 (b is an integer of 1 or more), (b + 1) times × (a + 2) / 2 times 2n data transfer by the image constituent units and b times × a / 2 times 2. The information processing according to claim 1, wherein the data transfer is performed by 2n of the image constituent units, and the data transfer is performed by adding n dummy data to any of the data transfers. apparatus. An information processing apparatus according to claim 2,
An X-axis counter that counts the position of the image constituent unit in the X-axis direction;
A Y-axis counter that counts the position of the image constituent unit in the Y-axis direction,
The data transfer means sets the X-axis count end value to n (a + 2) before the Y-axis counter value exceeds (b + 1) and executes the data transfer of the 2n image configuration units. When the axis counter is incremented by 2n and the X-axis counter value reaches the X-axis count end value, the Y-axis counter is incremented. On the other hand, after the Y-axis counter value exceeds (b + 1), the Y-axis counter value becomes b. Until the X-axis count end value is set to na and data transfer of the 2n image constituent units is executed, the X-axis counter is incremented by 2n, and the Y-axis counter value is the Y-axis count end value. An information processing apparatus that terminates data transfer when the X-axis counter value reaches a count end value.   The data transfer means executes data transfer in units of transfer data amount by 2n (n is an integer of 1 or more) of the image constituent units, and the number of image constituent units in the X-axis direction is n (c + 1) in the image data. ) (C is an integer of 1 or more), and the number of image constituent units in the Y-axis direction orthogonal to the X-axis is 2d (d is an integer of 1 or more), d times × (c + 2) / 2 times 4. The data transfer by 2n of the image constituent units and the data transfer by 2n pieces of the image constituent units of d times × c / 2 times are performed. 5. Information processing device.   The data transfer means executes the data transfer by adding the dummy data to the end of the data transfer when the data transfer is not performed in the unit of the transfer data amount when transferring the data in the plurality of image constituent units. The information processing apparatus according to any one of claims 1 to 4.   The data transfer means adds the dummy data and transfers the dummy data with a data amount determined by the number of the image constituent units included in the image data and the plurality of image constituent units to which the data is transferred. The information processing apparatus according to claim 1, wherein the data transfer is executed by adding The information processing apparatus according to any one of claims 1 to 6,
Storage means for storing image data thinned out by the information processing apparatus;
Print output means for printing out the stored image data after the thinning process to a print medium;
Printing device with An information processing method for converting image data and transferring the data to a storage means in units of transfer data amount,
(A) executing a data thinning process in units of image components constituting the image data;
(B) When data equal to or less than the transfer data amount unit is output in step (a), switching is performed so that data is transferred to the storage means in a plurality of image constituent units, and when transferring data in the plurality of image constituent units In addition, when the last data transfer is less than the transfer data amount unit, dummy data is added somewhere during the data transfer, and the data transfer is executed.
An information processing method including:

Images