JP2009089006A - Method for manufacturing piezoelectric thin film vibrator and piezoelectric thin film vibrator - Google Patents

Method for manufacturing piezoelectric thin film vibrator and piezoelectric thin film vibrator Download PDF

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JP2009089006A
JP2009089006A JP2007256002A JP2007256002A JP2009089006A JP 2009089006 A JP2009089006 A JP 2009089006A JP 2007256002 A JP2007256002 A JP 2007256002A JP 2007256002 A JP2007256002 A JP 2007256002A JP 2009089006 A JP2009089006 A JP 2009089006A
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substrate
thin film
piezoelectric thin
sacrificial layer
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Kazumasa Ikoma
和将 生駒
Naoto Inose
直人 猪瀬
Atsushi Kamijo
敦 上條
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Nihon Dempa Kogyo Co Ltd
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<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a piezoelectric thin film vibrator which can be manufactured simply and inexpensively. <P>SOLUTION: First, a recess part is formed on a surface of a substrate. Subsequently, a sacrifice layer which has the same thickness as a depth of the recess part and is made of a different material from an insulating film is formed on the surface of the substrate and inside the recess part by a physical vapor deposition. Thereafter, a resist mask and the sacrifice layer formed on the resist mask concerned are removed by a liftoff method. A solution containing a precursor of the insulating film is coated on the surface of the substrate by a spin coating method. The insulating film is formed on the surface of the substrate by sintering. Next, a laminated body of a lower electrode, a piezoelectric thin film and an upper electrode is formed on the surface of the substrate, and the sacrifice layer is etched to form a cavity part under the laminated body. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、圧電薄膜振動子の製造方法及び圧電薄膜振動子に関する。 The present invention relates to a method for manufacturing a piezoelectric thin film vibrator and a piezoelectric thin film vibrator.

携帯電話等の移動体通信端末に組み込まれる各種フィルタ回路には、例えばLCフィルタやSAW(Surface Acoustic Wave)フィルタ等が用いられるが、移動通信端末の更なる小型化に伴ってこれらフィルタと比較して小型化や加工の容易な圧電薄膜振動子(圧電薄膜共振子)を用いたフィルタ(BAW(Bulk Acoustic Wave)フィルタ)が注目されている。   For example, LC filters and SAW (Surface Acoustic Wave) filters are used for various filter circuits incorporated in mobile communication terminals such as mobile phones. Compared to these filters as mobile communication terminals are further downsized. A filter (BAW (Bulk Acoustic Wave) filter) using a piezoelectric thin film resonator (piezoelectric thin film resonator) that is easy to downsize and process is attracting attention.

このフィルタに用いられる圧電薄膜振動子は、その構造や製造方法によっていくつかのタイプに分類されるが、その中で圧電薄膜の膜厚方向の縦方向を利用するFBAR(Film Bulk Acoustic Resonator)型の圧電薄膜振動子がある。   Piezoelectric thin film vibrators used in this filter are classified into several types depending on the structure and manufacturing method, and among them, an FBAR (Film Bulk Acoustic Resonator) type that uses the longitudinal direction of the film thickness direction of the piezoelectric thin film. There is a piezoelectric thin film vibrator.

この圧電薄膜振動子は、励振した弾性振動を閉じ込めるために、共振部分の上部及び下部は空気に接している構造となっている。つまり共振部分の上部は自然に空気と接することになるが、共振部分の下部は空気と接するための空洞部が形成される。この空洞部を作成する方法については大きく分けて主に3種類ある。
(1)基板上に犠牲層を作成し、犠牲層の上部に下部電極、圧電薄膜及び上部電極の積層体(共振部)を作成して最後に犠牲層をエッチングすることにより空隙部を作成する方法(例えば特許文献1参照)。
(2)基板にギャップを形成し、犠牲層で当該ギャップを埋めてCMP(Chemical Mechanical Polishing)を行う。そして共振部を作成し、最後に犠牲層をエッチングすることにより空洞部を作成する方法(例えば特許文献2参照)。
(3)基板に共振部を作成し、基板の下面からエッチングすることにより空洞部を作成する方法(例えば特許文献3参照)。
This piezoelectric thin film vibrator has a structure in which the upper part and the lower part of the resonance part are in contact with air in order to confine the excited elastic vibration. That is, the upper part of the resonance part naturally comes into contact with air, but the lower part of the resonance part forms a cavity part for making contact with air. There are mainly three types of methods for creating the hollow portion.
(1) A sacrificial layer is formed on a substrate, a laminated body (resonant portion) of a lower electrode, a piezoelectric thin film and an upper electrode is formed on the upper portion of the sacrificial layer, and finally the sacrificial layer is etched to create a void portion. Method (for example, refer to Patent Document 1).
(2) A gap is formed in the substrate, and the sacrificial layer fills the gap and performs CMP (Chemical Mechanical Polishing). A method of creating a cavity by creating a resonance part and finally etching a sacrificial layer (see, for example, Patent Document 2).
(3) A method of creating a cavity by creating a resonance part on a substrate and etching from the lower surface of the substrate (see, for example, Patent Document 3).

上述した(1)〜(3)の方法においてはそれぞれ一長一短がある。(1)の方法では、空洞部を容易に作成することができるが、基板上に形成される犠牲層に段差部分があるために、その上部に作成する共振部にも段差が生じる。このため段差部分の圧電薄膜は不完全となり、不完全な圧電薄膜の振動や段差部分での振動の横方向モードの反射・吸収が起こり、Q値が低下するといった問題がある。また(2)の方法では、犠牲層部分と基板部分とが平滑であるために(1)の方法で述べたような問題は起こらないが、基板を研磨することにより、工程誤差、つまり設計値に対するばらつきが大きくなるといった問題がある。その理由としては、CMPプロセスでは、研磨速度がスラリーの濃度により左右されるが、スラリー中の固形分が凝集、沈降しやすいためその濃度管理が非常に難しく、この結果研磨速度を安定化させることが困難であるといったこと等が挙げられる。またCMPではディッシング、エロージョン、スクラッチなど解決すべき課題が多数有る。さらに、パターン依存性の問題、つまり基板領域と犠牲層領域とで研磨特性に差が出てしまうという問題もあることから、CMPは他のプロセスと比較して誤差が生じやすい。またCMP装置では消耗部材である研磨パッドが用いられ、この研磨パッドは高価であるため、研磨パッドが消耗する度に新しい研磨パッドに交換することにより製造コストが高くなってしまうといった問題もある。   The methods (1) to (3) described above have their merits and demerits. In the method (1), the cavity can be easily formed. However, since the sacrificial layer formed on the substrate has a step portion, a step is also generated in the resonance portion formed on the upper portion. For this reason, the piezoelectric thin film at the step portion becomes imperfect, and there is a problem that the Q value is lowered due to incomplete vibration of the piezoelectric thin film and reflection / absorption of the transverse mode of vibration at the step portion. In the method (2), since the sacrificial layer portion and the substrate portion are smooth, the problem described in the method (1) does not occur. However, by polishing the substrate, a process error, that is, a design value is obtained. There is a problem that the variation with respect to increases. The reason for this is that in the CMP process, the polishing rate depends on the concentration of the slurry, but the solid content in the slurry tends to agglomerate and settle, making it very difficult to control the concentration. As a result, the polishing rate must be stabilized. Is difficult. In CMP, there are many problems to be solved such as dishing, erosion, and scratches. Furthermore, since there is a problem of pattern dependency, that is, there is a problem that the polishing characteristics are different between the substrate region and the sacrificial layer region, CMP is more likely to cause an error than other processes. In addition, a polishing pad as a consumable member is used in the CMP apparatus, and this polishing pad is expensive. Therefore, there is a problem that the manufacturing cost is increased by replacing the polishing pad with a new one every time the polishing pad is consumed.

また(3)の方法では、基板下面からエアギャップを形成するため(1)の方法で述べたような問題は起こらないが、基板自体を大きくエッチングするため、共振子の強度が劣化するおそれがある。また空洞部の作成のために素子寸法を大きくする必要があり素子の小型化(集積化)が困難であるといった問題もある。
このように上述した(1)〜(3)の方法において、その方法に応じて種々の問題が生じるが、本発明者らは(2)の方法のように基板にギャップを形成し、当該ギャップを犠牲層で埋めて、共振部を作成した後、犠牲層をエッチングして空洞部を作成することを検討している。
In the method (3), since the air gap is formed from the lower surface of the substrate, the problem described in the method (1) does not occur. However, since the substrate itself is largely etched, the strength of the resonator may be deteriorated. is there. In addition, there is a problem that it is necessary to increase the element size in order to create the cavity, and it is difficult to reduce the size (integration) of the element.
As described above, in the methods (1) to (3) described above, various problems occur depending on the method. However, the inventors form a gap in the substrate as in the method (2), and the gap The cavity is filled with a sacrificial layer to create a cavity, and then the sacrificial layer is etched to create a cavity.

特開2005−338065号公報JP 2005-338065 A 特開2002−140075号公報JP 2002-140075 A 特開2002−76824号公報JP 2002-76824 A

本発明はかかる事情に鑑みてなされたものであって、その目的は、基板の表面の凹部を覆うようにして当該基板の表面に下部電極、圧電薄膜及び上部電極の積層体を形成し、前記凹部と積層体との下面とにより空洞部が形成される圧電薄膜振動子を製造する方法であって、簡単且つ安価に製造することができる圧電薄膜振動子の製造方法及びこの方法により製造した圧電薄膜振動子を提供することを目的とする。   The present invention has been made in view of such circumstances, and an object thereof is to form a laminate of a lower electrode, a piezoelectric thin film, and an upper electrode on the surface of the substrate so as to cover a recess on the surface of the substrate, A method of manufacturing a piezoelectric thin film vibrator in which a cavity is formed by a recess and a lower surface of a laminate, and a method of manufacturing a piezoelectric thin film vibrator that can be manufactured easily and inexpensively, and a piezoelectric device manufactured by this method An object is to provide a thin film vibrator.

本発明は、基板の表面の凹部を覆うようにして当該基板の表面に下部電極、圧電薄膜及び上部電極の積層体を形成し、前記凹部と積層体との下面とにより空洞部が形成される圧電薄膜振動子を製造する方法であって、
前記基板の表面に前記凹部に相当する部分が開口したレジストマスクを形成する工程と、
前記レジストマスクから露出する基板をエッチングし、基板の表面に凹部を形成する工程と、
物理気相成長法により基板の表面及び前記凹部内に、前記凹部の深さと同じ厚さの前記絶縁膜とは異なる材料からなる犠牲層を成膜する工程と、
しかる後、リフトオフ法によりレジストマスクと当該レジストマスク上に形成された犠牲層とを除去する工程と、
次に、基板の表面に絶縁膜の前駆体を含んだ溶液をスピン塗布法により塗布し、さらに焼成することで基板の表面に絶縁膜を形成する工程と、
次いで、前記基板の表面に下部電極、圧電薄膜及び上部電極の積層体を形成する工程と、
その後、前記基板の表面に犠牲層をエッチングするための開口部を有するレジストマスクを形成し、このマスクを用いて犠牲層をエッチングして積層体の下に空洞部を形成する工程と、を含むことを特徴とする。
In the present invention, a laminated body of a lower electrode, a piezoelectric thin film and an upper electrode is formed on the surface of the substrate so as to cover the concave portion of the surface of the substrate, and a cavity is formed by the lower surface of the concave portion and the laminated body. A method of manufacturing a piezoelectric thin film vibrator,
Forming a resist mask having an opening corresponding to the recess on the surface of the substrate;
Etching the substrate exposed from the resist mask to form a recess on the surface of the substrate;
Forming a sacrificial layer made of a material different from the insulating film having the same thickness as the depth of the recesses on the surface of the substrate and in the recesses by physical vapor deposition;
Thereafter, a step of removing the resist mask and the sacrificial layer formed on the resist mask by a lift-off method,
Next, a step of applying a solution containing a precursor of the insulating film on the surface of the substrate by a spin coating method and further baking to form an insulating film on the surface of the substrate;
Next, forming a laminate of a lower electrode, a piezoelectric thin film and an upper electrode on the surface of the substrate;
And then forming a resist mask having an opening for etching the sacrificial layer on the surface of the substrate, and etching the sacrificial layer using the mask to form a cavity under the stacked body. It is characterized by that.

上記圧電薄膜振動子の製造方法において、前記絶縁膜は例えばシリコン酸化物を主成分とする膜であることが好ましい。
また本発明の圧電薄膜振動子は、上述した圧電薄膜振動子の製造方法により製造されたことを特徴とする。
In the method for manufacturing the piezoelectric thin film vibrator, the insulating film is preferably a film containing, for example, silicon oxide as a main component.
The piezoelectric thin film vibrator of the present invention is manufactured by the above-described method for manufacturing a piezoelectric thin film vibrator.

本発明によれば、犠牲層の形成工程を、凹部を含めた基板全体の成膜及びCMPのプロセスでは行わず、リフトオフ法とスピン塗布法とによって行われるため、工程誤差を減らすことができ、製造工程が簡素化されると共に、製造コストを抑えることができる。また犠牲層形成工程をリフトオフ工程及びスピン塗布工程で行っているため、犠牲層と基板との間の段差の発生が極力抑えられる。従って、犠牲層の段差による圧電薄膜の不完全な部分から起因するQ値の低下を減らすことができる。   According to the present invention, the sacrificial layer forming step is not performed by the film formation and CMP process of the entire substrate including the concave portion, but by the lift-off method and the spin coating method, so that the process error can be reduced. The manufacturing process can be simplified and the manufacturing cost can be reduced. Further, since the sacrificial layer forming process is performed in the lift-off process and the spin coating process, the generation of a step between the sacrificial layer and the substrate can be suppressed as much as possible. Accordingly, it is possible to reduce a decrease in Q value caused by an incomplete portion of the piezoelectric thin film due to a step of the sacrificial layer.

本発明に係る製造方法により製造される圧電薄膜振動子の一例を、図1を参照しながら説明する。図1は本実施の形態に係る圧電薄膜振動子を模式的に示した断面図である。図1中の30は矩形状のシリコン製の基板であり、当該基板30の略中央部には、圧電薄膜33の横幅よりも少し左右にはみ出る大きさの矩形状の凹部31が形成されている。前記基板30の表面には、後述するようにスピン塗布法により絶縁膜であるSOG膜(SiO膜)32が形成されている。このSOG膜32の表面には、下部電極33が形成されており、この下部電極33の形成領域は、この例では基板30の一端側から前記凹部31を跨いで当該凹部31の他縁側を少し越えた位置まで形成されている。 An example of a piezoelectric thin film vibrator manufactured by the manufacturing method according to the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view schematically showing a piezoelectric thin film vibrator according to the present embodiment. A reference numeral 30 in FIG. 1 denotes a rectangular silicon substrate, and a rectangular recess 31 having a size that protrudes slightly to the left and right of the lateral width of the piezoelectric thin film 33 is formed at a substantially central portion of the substrate 30. . An SOG film (SiO 2 film) 32 that is an insulating film is formed on the surface of the substrate 30 by a spin coating method as will be described later. A lower electrode 33 is formed on the surface of the SOG film 32. In this example, a region where the lower electrode 33 is formed extends slightly from the one end side of the substrate 30 across the concave portion 31 to the other edge side of the concave portion 31. It is formed to the position beyond.

また下部電極33及び基板3の表面には矩形状の圧電薄膜34が形成されており、当該圧電薄膜34の形成領域は、この例では凹部31を覆うようにして基板30の略中央部に形成されている。また前記圧電薄膜34及び基板30の表面には上部電極35が形成されており、当該上部電極35の形成領域はこの例では圧電薄膜34の一端側から他端側を介して基板10の他端側まで形成されている。このように凹部31の上に下部電極33、圧電薄膜34及び上部電極35の積層体3が位置することにより、当該積層体3の下方に空洞部36が形成されることになる。さらに、基板30の一端側に位置する下部電極33の表面には電極パッド37aが形成され、基板30の他端側に位置する上部電極35の表面には電極パッド37bが形成されている。   In addition, a rectangular piezoelectric thin film 34 is formed on the surfaces of the lower electrode 33 and the substrate 3, and the formation region of the piezoelectric thin film 34 is formed in a substantially central portion of the substrate 30 so as to cover the recess 31 in this example. Has been. Further, an upper electrode 35 is formed on the surfaces of the piezoelectric thin film 34 and the substrate 30, and the formation region of the upper electrode 35 is the other end of the substrate 10 from one end side to the other end side of the piezoelectric thin film 34 in this example. It is formed to the side. As described above, the laminated body 3 of the lower electrode 33, the piezoelectric thin film 34 and the upper electrode 35 is positioned on the concave portion 31, so that a cavity 36 is formed below the laminated body 3. Further, an electrode pad 37 a is formed on the surface of the lower electrode 33 located on one end side of the substrate 30, and an electrode pad 37 b is formed on the surface of the upper electrode 35 located on the other end side of the substrate 30.

このようにして構成された圧電薄膜振動子の発振動作は、電極パッド37a,37bを介して上部電極35及び下部電極33に電圧を印加することで圧電薄膜34の厚み方向に励振された弾性振動が上部電極35と空気との境界面、並びに下部電極33と凹部31との境界面で反射され、圧電薄膜34の膜厚によって決まる共振周波数で共振が起こる。   The oscillating operation of the piezoelectric thin film vibrator configured as described above is an elastic vibration excited in the thickness direction of the piezoelectric thin film 34 by applying a voltage to the upper electrode 35 and the lower electrode 33 via the electrode pads 37a and 37b. Is reflected at the boundary surface between the upper electrode 35 and air and the boundary surface between the lower electrode 33 and the recess 31, and resonance occurs at a resonance frequency determined by the film thickness of the piezoelectric thin film 34.

次に、図1に示す圧電薄膜振動子の製造方法について図2〜図4を参照しながら説明する。先ず、切り出された一枚のシリコン基板30を研磨加工して洗浄した後に(図2(a))、シリコン基板30の表面にレジスト膜40を形成し、フォトリソグラフィによって図1に示す凹部31に相当する部分のレジスト膜40を剥離する(図2(b))。なお、この例ではシリコン基板30を用いているが、シリコン基板30の他に例えばガラス基板や水晶基板等を用いてもよい。続いて、このレジスト膜40をマスクにしてドライエッチング又はウエットエッチングを行って、レジスト膜40に覆われていない基板30をエッチングし(異方性エッチング)、基板30表面に凹部31を形成する(図2(c))。   Next, a method for manufacturing the piezoelectric thin film vibrator shown in FIG. 1 will be described with reference to FIGS. First, after polishing and cleaning the cut silicon substrate 30 (FIG. 2A), a resist film 40 is formed on the surface of the silicon substrate 30, and the recess 31 shown in FIG. 1 is formed by photolithography. The corresponding portion of the resist film 40 is removed (FIG. 2B). In this example, the silicon substrate 30 is used. However, for example, a glass substrate or a quartz substrate may be used in addition to the silicon substrate 30. Subsequently, dry etching or wet etching is performed using the resist film 40 as a mask to etch the substrate 30 not covered with the resist film 40 (anisotropic etching), thereby forming a recess 31 on the surface of the substrate 30 (see FIG. FIG. 2 (c)).

次に基板30表面に蒸着あるいはスパッタによるPVD(Physical Vapor Deposition)法によりゲルマニウム(Ge)を犠牲層材料として成膜する。この犠牲層41の成膜では、成膜時間をコントロールしており、基板30の表面及び基板30上に形成した凹部31内に前記凹部31の深さと同じ厚さの犠牲層41が成膜されるようになっている(図2(d))。つまり基板30の表面と凹部31内に成膜された犠牲層41の表面とは面一となっている。なお、犠牲層41としてはGeの他にSi、W等の金属を用いてもよい。   Next, germanium (Ge) is formed on the surface of the substrate 30 as a sacrificial layer material by PVD (Physical Vapor Deposition) method by vapor deposition or sputtering. In the deposition of the sacrificial layer 41, the deposition time is controlled, and the sacrificial layer 41 having the same thickness as the depth of the recess 31 is formed on the surface of the substrate 30 and in the recess 31 formed on the substrate 30. (FIG. 2D). That is, the surface of the substrate 30 and the surface of the sacrificial layer 41 formed in the recess 31 are flush with each other. The sacrificial layer 41 may be made of metal such as Si or W in addition to Ge.

ここで既述のようにして基板30の表面及び凹部31内に犠牲層41を成膜した後の基板30表面の様子について説明すると、図2(d)に示すように凹部31の側面は全て犠牲層41に接しておらず、凹部31の側面と犠牲層41の側面との間には隙間50が形成されている。これは蒸着する場合、成膜材料は直進するので、レジスト膜40に対して影になる部分や側壁には成膜材料が堆積することができないためである。即ち、基板30表面にPVD法により犠牲層41を成膜した場合には、凹部31の側面と犠牲層41との側面との間に隙間50が形成されることになる。   The state of the surface of the substrate 30 and the surface of the substrate 30 after the sacrificial layer 41 is formed in the recess 31 as described above will now be described. As shown in FIG. A gap 50 is formed between the side surface of the recess 31 and the side surface of the sacrificial layer 41 without being in contact with the sacrificial layer 41. This is because in the case of vapor deposition, since the film forming material goes straight, the film forming material cannot be deposited on the shadowed portion or the side wall of the resist film 40. That is, when the sacrificial layer 41 is formed on the surface of the substrate 30 by the PVD method, the gap 50 is formed between the side surface of the recess 31 and the side surface of the sacrificial layer 41.

基板30の表面及び凹部31内に犠牲層41を成膜した後、リフトオフ法によりレジスト膜40の上に形成されている犠牲層41を剥離する。即ち、先ずレジスト溶解用の薬液例えばアセトンに基板30を浸漬し、超音波を印加することによって当該レジスト膜40が溶解し、レジスト膜40上の犠牲層41が除去される(図2(e))。   After the sacrificial layer 41 is formed on the surface of the substrate 30 and in the recess 31, the sacrificial layer 41 formed on the resist film 40 is peeled off by a lift-off method. That is, first, the substrate 30 is immersed in a chemical solution for dissolving a resist, for example, acetone, and ultrasonic waves are applied to dissolve the resist film 40, thereby removing the sacrificial layer 41 on the resist film 40 (FIG. 2E). ).

しかる後、スピン塗布法により絶縁膜であるSOG膜32を基板30の表面に形成する。この工程について詳しく述べると、先ず基板30を低速に回転させながらノズルによって基板30の表面中央部にSiO膜(シリコン及び酸素からなる絶縁膜)の粉末状の前駆体を含んだ溶液、この例ではSOG溶液を塗布する。ノズルから基板30の中央部に供給されたSOG溶液は遠心力により周縁に向かって広がり、全面に行き渡る。この際、凹部31の側面と犠牲層41の側面との間の隙間50にSOG溶液60が流れ込むことになる(図3)。このようにして前記隙間50にはSOG溶液60が埋め込まれ、基板30と犠牲層41との間の段差が無くなる。基板30表面にSOG溶液を塗布した後、基板30を加熱してSOG溶液が硬化し、基板30表面にSOG膜32が形成される(図4(a))。これにより基板30と犠牲層42との表面がSOG膜32によって平坦化される。 Thereafter, an SOG film 32, which is an insulating film, is formed on the surface of the substrate 30 by spin coating. This process will be described in detail. First, a solution containing a powdery precursor of SiO 2 film (insulating film made of silicon and oxygen) at the center of the surface of the substrate 30 by a nozzle while rotating the substrate 30 at a low speed, in this example Then, an SOG solution is applied. The SOG solution supplied from the nozzle to the central portion of the substrate 30 spreads toward the periphery by centrifugal force and spreads over the entire surface. At this time, the SOG solution 60 flows into the gap 50 between the side surface of the recess 31 and the side surface of the sacrificial layer 41 (FIG. 3). In this way, the SOG solution 60 is embedded in the gap 50, and the step between the substrate 30 and the sacrificial layer 41 is eliminated. After applying the SOG solution to the surface of the substrate 30, the substrate 30 is heated to cure the SOG solution, and an SOG film 32 is formed on the surface of the substrate 30 (FIG. 4A). As a result, the surfaces of the substrate 30 and the sacrificial layer 42 are planarized by the SOG film 32.

次に基板30の表面に、マグネトロンスパッタ法等により膜厚が例えば0.1〜0.3μmの金属膜を形成し、リソグラフィー及びウエットエッチングによりパターニングして下部電極33を形成する(図4(b))。この金属膜としては例えばモリブテン(Mo)、アルミニウム(Al)、チタン(Ti)、白金(Pt)、銅(Cu)、クロム(Cr)、タングステン(W)、タンタル(Ta)等の金属が用いられる。   Next, a metal film having a film thickness of, for example, 0.1 to 0.3 μm is formed on the surface of the substrate 30 by a magnetron sputtering method or the like, and patterned by lithography and wet etching to form the lower electrode 33 (FIG. 4B). )). As this metal film, for example, a metal such as molybdenum (Mo), aluminum (Al), titanium (Ti), platinum (Pt), copper (Cu), chromium (Cr), tungsten (W), tantalum (Ta) is used. It is done.

次に、基板30の表面にRFマグネトロンスパッタ法により例えば膜厚が0.5〜3.0μmの圧電薄膜を成膜して、リソグラフィー及びウエットエッチングによりパターニングして圧電薄膜34を形成する(図4(c))。この圧電薄膜34の膜厚は所望の共振周波数が得られるように設定する。前記圧電薄膜としては例えば窒化アルミニウム(AlN)あるいは酸化亜鉛(ZnO)等が用いられる。   Next, a piezoelectric thin film having a film thickness of 0.5 to 3.0 μm, for example, is formed on the surface of the substrate 30 by RF magnetron sputtering, and patterned by lithography and wet etching to form the piezoelectric thin film 34 (FIG. 4). (C)). The film thickness of the piezoelectric thin film 34 is set so as to obtain a desired resonance frequency. For example, aluminum nitride (AlN) or zinc oxide (ZnO) is used as the piezoelectric thin film.

圧電薄膜34のパターニング後、基板30の表面にマグネトロンスパッタ法等により膜厚が例えば0.1〜0.3μmの金属膜を形成し、リソグラフィー及びウエットエッチングによりパターニングして上部電極35を形成する。そして外部への電気接続のための電極パッド37a,37bをリフトオフ法により形成する(図4(d))。最後にPVD法により空洞部36に埋め込んだGe犠牲層41をエッチングするための開口部を有するレジストパターンをリソグラフィーで形成し、過酸化水素水によりGe犠牲層41をエッチングする(図4(e))。こうして、下部電極33の下に空洞部36が形成され、図1に示す圧電薄膜振動子が完成する。   After patterning the piezoelectric thin film 34, a metal film having a film thickness of, for example, 0.1 to 0.3 μm is formed on the surface of the substrate 30 by a magnetron sputtering method or the like, and patterned by lithography and wet etching to form the upper electrode 35. Then, electrode pads 37a and 37b for electrical connection to the outside are formed by a lift-off method (FIG. 4D). Finally, a resist pattern having an opening for etching the Ge sacrificial layer 41 embedded in the cavity 36 by the PVD method is formed by lithography, and the Ge sacrificial layer 41 is etched with hydrogen peroxide (FIG. 4E). ). Thus, the cavity 36 is formed under the lower electrode 33, and the piezoelectric thin film vibrator shown in FIG. 1 is completed.

上述の実施の形態によれば、犠牲層41の形成工程を、凹部31を含めた基板全体の成膜及びCMPのプロセスでは行わず、リフトオフ法とスピン塗布法とによって行われるため、工程誤差を減らすことができ、製造工程が簡素化されると共に、製造コストを抑えることができる。また犠牲層形成工程をリフトオフ工程及びスピン塗布工程で行っているため、犠牲層41と基板30との間の段差の発生が極力抑えられる。従って、犠牲層41の段差による圧電薄膜34の不完全な部分から起因するQ値の低下を減らすことができる。   According to the above-described embodiment, the formation process of the sacrificial layer 41 is not performed in the film formation and CMP process of the entire substrate including the recesses 31, but is performed by the lift-off method and the spin coating method. Thus, the manufacturing process can be simplified and the manufacturing cost can be reduced. In addition, since the sacrificial layer forming process is performed in the lift-off process and the spin coating process, the generation of a step between the sacrificial layer 41 and the substrate 30 is suppressed as much as possible. Therefore, it is possible to reduce a decrease in the Q value caused by an incomplete portion of the piezoelectric thin film 34 due to the step of the sacrificial layer 41.

また上述の実施の形態において、絶縁膜としてSOG膜32の代わりにシリケートガス(BPSG)膜を用いてもよい。この場合、スピン塗布工程ではシリコン、酸素、ホウ素及びリンからなる絶縁膜の粉末状の前駆体を含んだ溶液が塗布される。   In the above-described embodiment, a silicate gas (BPSG) film may be used instead of the SOG film 32 as the insulating film. In this case, in the spin coating process, a solution containing a powdery precursor of an insulating film made of silicon, oxygen, boron and phosphorus is applied.

また上述した圧電薄膜振動子は、電子部品であるバンドパスフィルタに用いることができる。このフィルタの等価回路図を図5に示しておく。図5においてこのフィルタは、入力端子Vin1、Vin2と、出力端子Vout1、Vout2と、直列腕をなす上述した圧電薄膜振動子81,82,83と、並列腕をなす上述した圧電薄膜振動子84,85とからなる。   The piezoelectric thin film vibrator described above can be used for a band-pass filter that is an electronic component. An equivalent circuit diagram of this filter is shown in FIG. In FIG. 5, this filter includes input terminals Vin1 and Vin2, output terminals Vout1 and Vout2, the above-described piezoelectric thin film vibrators 81, 82, and 83 that form series arms, and the above-described piezoelectric thin film vibrator 84 that forms parallel arms. 85.

本発明の実施の形態に係る圧電薄膜振動子を示す概略断面図である。1 is a schematic cross-sectional view showing a piezoelectric thin film vibrator according to an embodiment of the present invention. 上記圧電薄膜振動子の製造工程の説明図である。It is explanatory drawing of the manufacturing process of the said piezoelectric thin film vibrator. 上記製造工程において、基板表面にSOG溶液を形成する様子を示す説明図である。It is explanatory drawing which shows a mode that an SOG solution is formed in the substrate surface in the said manufacturing process. 上記製造工程の第2の説明図である。It is 2nd explanatory drawing of the said manufacturing process. 本発明の実施の形態に係るバンドパスフィルタの等価回路図である。It is an equivalent circuit diagram of the band pass filter concerning an embodiment of the invention.

符号の説明Explanation of symbols

3 積層体
30 基板
31 凹部
32 SOG膜
33 下部電極
34 圧電薄膜
35 上部電極
36 空洞部
37a、37b 電極パッド
41 犠牲層
50 隙間
60 SOG溶液
3 Stack 30 Substrate 31 Recess 32 SOG Film 33 Lower Electrode 34 Piezoelectric Thin Film 35 Upper Electrode 36 Cavity 37a, 37b Electrode Pad 41 Sacrificial Layer 50 Gap 60 SOG Solution

Claims (3)

基板の表面の凹部を覆うようにして当該基板の表面に下部電極、圧電薄膜及び上部電極の積層体を形成し、前記凹部と積層体との下面とにより空洞部が形成される圧電薄膜振動子を製造する方法であって、
前記基板の表面に前記凹部に相当する部分が開口したレジストマスクを形成する工程と、
前記レジストマスクから露出する基板をエッチングし、基板の表面に凹部を形成する工程と、
物理気相成長法により基板の表面及び前記凹部内に、前記凹部の深さと同じ厚さの前記絶縁膜とは異なる材料からなる犠牲層を成膜する工程と、
しかる後、リフトオフ法によりレジストマスクと当該レジストマスク上に形成された犠牲層とを除去する工程と、
次に、基板の表面に絶縁膜の前駆体を含んだ溶液をスピン塗布法により塗布し、さらに焼成することで基板の表面に絶縁膜を形成する工程と、
次いで、前記基板の表面に下部電極、圧電薄膜及び上部電極の積層体を形成する工程と、
その後、前記基板の表面に犠牲層をエッチングするための開口部を有するレジストマスクを形成し、このマスクを用いて犠牲層をエッチングして積層体の下に空洞部を形成する工程と、を含むことを特徴とする圧電薄膜振動子の製造方法。
A piezoelectric thin film vibrator in which a laminated body of a lower electrode, a piezoelectric thin film, and an upper electrode is formed on the surface of the substrate so as to cover a concave portion on the surface of the substrate, and a cavity is formed by the lower surface of the concave portion and the laminated body A method of manufacturing
Forming a resist mask having an opening corresponding to the recess on the surface of the substrate;
Etching the substrate exposed from the resist mask to form a recess on the surface of the substrate;
Forming a sacrificial layer made of a material different from the insulating film having the same thickness as the depth of the recesses on the surface of the substrate and in the recesses by physical vapor deposition;
Thereafter, a step of removing the resist mask and the sacrificial layer formed on the resist mask by a lift-off method,
Next, a step of applying a solution containing an insulating film precursor to the surface of the substrate by a spin coating method and further baking to form an insulating film on the surface of the substrate;
Next, forming a laminate of a lower electrode, a piezoelectric thin film and an upper electrode on the surface of the substrate;
And then forming a resist mask having an opening for etching the sacrificial layer on the surface of the substrate, and etching the sacrificial layer using the mask to form a cavity under the stacked body. A method of manufacturing a piezoelectric thin film vibrator.
前記絶縁膜はシリコン酸化物を主成分とする膜であることを特徴とする請求項1に記載の圧電薄膜振動子の製造方法。   The method for manufacturing a piezoelectric thin film vibrator according to claim 1, wherein the insulating film is a film containing silicon oxide as a main component. 請求項1または2に記載の圧電薄膜振動子の製造方法により製造されたことを特徴とする圧電薄膜振動子。   A piezoelectric thin film vibrator manufactured by the method for manufacturing a piezoelectric thin film vibrator according to claim 1.
JP2007256002A 2007-09-28 2007-09-28 Method for manufacturing piezoelectric thin film vibrator and piezoelectric thin film vibrator Pending JP2009089006A (en)

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